Infineon IPD10N03LA, IPF10N03LA, IPS10N03LA, IPU10N03LA Schematic [ru]

IPD10N03LA IPF10N03LA

)

IPS10N03LA IPU10N03LA

OptiMOS®2 Power-Transistor

Features

• Ideal for high-frequency dc/dc converters

• Qualified according to JEDEC

• N-channel, logic level

• Excellent gate charge x R

• Superior thermal resistance

• 175 °C operating temperature

Type

Package

IPD10N03LA IPF10N03LA IPS10N03LA IPU10N03LA

P-TO252-3-11 P-TO252-3-23 P-TO251-3-11 P-TO251-3-21

1)

for target application

product (FOM

DS(on)

Product Summary

V

DS

R

DS(on),max

I

D

25 V

10.4

30 A

mΩ

Ordering Code

Marking

Maximum ratings, at T

Parameter Symbol Conditions Unit

Continuous drain current

Pulsed drain current

Avalanche energy, single pulse

Reverse diode dv /dt dv /dt

Gate source voltage

Power dissipation

Operating and storage temperature

Q67042-S4238 Q67042-S4239 Q67042-S4247 Q67042-S4242

10N03LA 10N03LA 10N03LA 10N03LA

=25 °C, unless otherwise specified

j

Value

=100 °C

=175 °C

2)

3)

GS

=25 Ω

30 A

30

210

80 mJ

6 kV/µs

±20 V

52 W

-55 ... 175 °C

I

D

I

D,pulse

E

AS

TC=25 °C

T

C

TC=25 °C

ID=30 A, R

=30 A, VDS=20 V,

I

D

di /dt =200 A/µs,

T

j,max

4)

V

GS

P

tot

, T

T

j

TC=25 °C

stg

IEC climatic category; DIN IEC 68-1 55/175/56

Rev. 1.3 page 1 2004-05-19

IPD10N03LA IPF10N03LA

IPS10N03LA IPU10N03LA

Parameter Symbol Conditions Unit

Values

min. typ. max.

Thermal characteristics

Thermal resistance, junction - case
SMD version, device on PCB

Electrical characteristics, at T

=25 °C, unless otherwise specified

j

R

thJC

R

thJA

minimal footprint - - 75

6 cm

2

cooling area

5)

- - 2.9 K/W

--50

Static characteristics

Drain-source breakdown voltage

Gate threshold voltage

Zero gate voltage drain current

V

(BR)DSSVGS

V

GS(th)

I

DSS

=0 V, ID=1 mA

VDS=VGS, ID=20 µA

VDS=25 V, VGS=0 V,
T

=25 °C

j

V

=25 V, VGS=0 V,

DS

T

=125 °C

j

25 - - V

1.2 1.6 2

- 0.1 1 µA

- 10 100

Gate-source leakage current

Drain-source on-state resistance

Gate resistance

Transconductance

1)

J-STD20 and JESD22

2)

Current is limited by bondwire; with an R

3)

See figure 3

4)

T

=150 °C and duty cycle D <0.25 for VGS<-5 V

j,max

5)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical in still air.

I

GSS

R

DS(on)VGS

R

G

g

fs

=2.9 K/W the chip is able to carry 53 A.

thJC

VGS=20 V, VDS=0 V

=4.5 V, ID=20 A

=10 V, ID=30 A

V

GS

|VDS|>2|ID|R

I

=30 A

D

DS(on)max

- 10 100 nA

- 13.9 17.4

- 8.7 10.4

-1-

,

20 41 - S

mΩ

Ω

Rev. 1.3 page 2 2004-05-19

IPD10N03LA IPF10N03LA

g

IPS10N03LA IPU10N03LA

Parameter Symbol Conditions Unit

Values

min. typ. max.

Dynamic characteristics

Input capacitance
Output capacitance

Reverse transfer capacitance

Turn-on delay time

Rise time

Turn-off delay time

Fall time

Gate Char

e Characteristics+A40

Gate to source charge

Gate charge at threshold

Gate to drain charge

Switching charge

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

6)

Q

gs

Q

g(th)

Q

gd

Q

sw

V

=0 V, VDS=15 V,

GS

f =1 MHz

V

=15 V, VGS=10 V,

DD

=15 A, R

I

D

V

DD

V

GS

G

=15 V, ID=15 A,
=0 to 5 V

=2.7 Ω

- 1021 1358 pF

- 393 522

-5278

- 6.3 9.4 ns

- 4.8 7.2

-1827

- 2.8 4.2

- 3.4 4.5 nC

- 1.6 2.2

- 2.3 3.5

- 4.1 5.8

Gate charge total

Gate plateau voltage

Gate charge total, sync. FET

Output charge

Q

V

Q

Q

g

plateau

g(sync)

oss

Reverse Diode

Diode continous forward current

Diode pulse current

Diode forward voltage

Reverse recovery charge

6)

See figure 16 for gate charge parameter definition

I

S

I

S,pulse

V

SD

Q

rr

VDS=0.1 V,
V

=0 to 5 V

GS

VDD=15 V, VGS=0 V

TC=25 °C

VGS=0 V, IF=30 A,
T

=25 °C

j

VR=15 V, IF=IS,

di

/dt =400 A/µs

F

- 8.2 11

- 3.3 - V

- 7.2 9.6 nC

- 8.5 11

- - 30 A

- - 210

- 0.93 1.2 V

- - 10 nC

Rev. 1.3 page 3 2004-05-19

1 Power dissipation 2 Drain current

P

=f(TC) ID=f(TC); VGS≥10 V

tot

IPD10N03LA IPF10N03LA

IPS10N03LA IPU10N03LA

60

40

50

30

40

[W]

30

tot

P

[A]

D

I

20

20

10

10

0

0 50 100 150 200

TC [°C]

0

0 50 100 150 200

TC [°C]

3 Safe operating area 4 Max. transient thermal impedance

I

=f(VDS); TC=25 °C; D =0 Z

D

parameter: t

p

=f(tp)

thJC

parameter: D =tp/T

1000

1 µs

limited by on-state
resistance

10 µs

100 µs

1 ms

10 ms

[A]

D

I

100

DC

10

1

0.1 1 10 100

VDS [V]

10

0.5

1

0.2

[K/W]

Z

0.1

0.05

thJC

0.02

0.1

0.01

single pulse

0000001

0.01

10

-6

10

10

10

-4

-5

-2

-3

10

10

tp [s]

0

-1

10

Rev. 1.3 page 4 2004-05-19