Infineon IPB77N06S2-12, IPP77N06S2-12 Schematic [ru]

IPB77N06S2-12

IPP77N06S2-12

OptiMOS® Power-Transistor

Product Summary

Features

• N-channel - Enhancement mode

• Automotive AEC Q101 qualified

• MSL1 up to 260°C peak reflow

• 175°C operating temperature

• Green package (lead free)

• Ultra low Rds(on)

• 100% Avalanche tested

Type Package Ordering Code Marking

IPB77N06S2-12 PG-TO263-3-2 SP0002-18173 2N0612

IPP77N06S2-12 PG-TO220-3-1 SP0002-18172 2N0612

V

DS

R

DS(on),max

I

D

55 V

(SMD version) 11.7

77 A

PG-TO220-3-1PG-TO263-3-2

mΩ

Maximum ratings, at T

Parameter Symbol Conditions Unit

Continuous drain current

Pulsed drain current

Avalanche energy, single pulse

Gate source voltage

Power dissipation

Operating and storage temperature

=25 °C, unless otherwise specified

j

1)

I

D

TC=25 °C, VGS=10 V

T

V

2)

2)

4)

I

D,pulse

E

AS

V

GS

P

tot

T

, T

j

TC=25 °C

ID= 77 A

TC=25 °C

stg

=100 °C,

C

=10 V

GS

Value

77 A

2)

56

308

280 mJ

±20 V

158 W

-55 ... +175 °C

IEC climatic category; DIN IEC 68-1 55/175/56

Rev. 1.0 page 1 2005-12-27

IPB77N06S2-12

IPP77N06S2-12

Parameter Symbol Conditions Unit

Values

min. typ. max.

Thermal characteristics

Thermal resistance, junction - case

Thermal resistance, junction ­ambient, leaded

SMD version, device on PCB

Electrical characteristics, at T

2)

R

thJC

R

thJA

R

thJA

=25 °C, unless otherwise specified

j

minimal footprint - - 62

2

cooling area

6 cm

5)

- - 0.95 K/W

--62

--40

Static characteristics

Drain-source breakdown voltage

Gate threshold voltage

V

(BR)DSSVGS

V

GS(th)

=0 V, ID= 1 mA

VDS=VGS, ID=93 µA

55 - - V

2.1 3.0 4.0

Zero gate voltage drain current

Gate-source leakage current

Drain-source on-state resistance

I

I

R

DSS

GSS

DS(on)

VDS=55 V, VGS=0 V,
T

=25 °C

j

V

=55 V, VGS=0 V,

DS

T

=125 °C

j

2)

VGS=20 V, VDS=0 V

VGS=10 V, ID=38 A,

V

=10 V, ID=38 A,

GS

SMD version

- 0.01 1 µA

- 1 100

- 1 100 nA

- 9.8 12.0 mΩ

- 9.5 11.7

Rev. 1.0 page 2 2005-12-27

IPB77N06S2-12

y

g

IPP77N06S2-12

Parameter Symbol Conditions Unit

Values

min. typ. max.

namic characteristics

D

Input capacitance

Output capacitance

Reverse transfer capacitance

Turn-on delay time

Rise time

Turn-off delay time

Fall time

Gate Char

e Characteristics

Gate to source charge

Gate to drain charge

Gate charge total

2)

C

iss

V

=0 V, VDS=25 V,

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

2)

Q

gs

Q

gd

Q

g

GS

f =1 MHz

V

=30 V, VGS=10 V,

DD

I

=77 A, R

D

=44 V, ID=77 A,

V

DD

V

=0 to 10 V

GS

=6.2 Ω

G

- 1770 - pF

- 460 -

- 120 -

-14-ns

-27-

-34-

-26-

- 9 12 nC

-1828

-4560

Gate plateau voltage

V

plateau

- 5.6 - V

Reverse Diode

Diode continous forward current

I

S

- - 77 A

2)

TC=25 °C

Diode pulse current

2)

Diode forward voltage

Reverse recovery time

Reverse recovery charge

1)

Current is limited by die area; with an R

information see Application Note ANPS071E at www.infineon.com/optimos

2)

Defined by design. Not subject to production test.

3)

See diagram 13.

4)

Qualified at -20V and +20V.

5)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical in still air.

2)

2)

I

S,pulse

V

SD

t

rr

Q

rr

= 0.95 K/W the chip is able to carry 77 A at 25°C. For detailed

thJC

VGS=0 V, IF=77 A,
T

=25 °C

j

VR=30 V, IF=IS,

di

/dt =100 A/µs

F

- - 308

- 0.9 1.3 V

-4560ns

-6480nC

Rev. 1.0 page 3 2005-12-27