IEI Integration PE-6SD3 User Manual
PE-6SD3-R40
Dec. 03, 2009
5-Slot PICMG 1.3 PCIe to PCI Bridge Backplane
User Manual Ver. 4.0
1. USB1, USB2: External 4 Port USB Connectors From the Mainboard
2. FAN1, FAN2, FAN3, FAN4: Fan Connector
7 5 3 1
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123
PIN DESCRIPTION PIN DESCRIPTION
1 USBVCC 2 GND
3 DATA- 4 DATA+
5 DATA+ 6 DATA7 GND 8 USBVCC
PIN DESCRIPTION
1 GND
2 +12V
3 NC
3. ATXCTL1: Backplane to Mainboa r d ATX Power Control Conn e c to r
123
4. PWRBTN: Power On Button
5. RESET: Reset Button Connector
2
1
2
1
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■
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■
PIN DESCRIPTION
PIN DESCRIPTION
1 GND
2 PSON#
3 5VSB
PIN DESCRIPTION
1 GND
2 PWRBT#
1 GND
2 SHB_RST#
1
6. PWRGD: Power Good Connector
●
2
PIN DESCRIPTION
1 GND
■
1
2 PWRGD
7. SM-BUS: System Management BUS Connector
2
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■
1
PIN DESCRIPTION
1 SMDAT
2 SMCLK
8. CN1: PCIE X16 SDVO Control Signal Pin
1 2 3
■ ● ●
PIN DESCRIPTION
1 EXP_EN
2 SDVO_CLK
3 SDVO_DAT
9. IOPWR: The I/O Power Connector indicators for controlling your
CPU board
PIN DESCRIPTION PIN DESCRIPTION
1 GND 2 -12V
3 +12V 4 GND
5 IPMB_DA 6 5VSB
7 GND 8 GND
9 IPMB_CL 10 5VSB
11 +5V 12 PWRGD
13 SMDAT 14 SHB_RST#
15 5VSB 16 GND
17 SMCLK 18 PSON#
19 +3.3V 20 PWRBT#
19 17 15 13 11 9 7 5 3 1
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20 18 16 14 12 10
8642
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