ICT PA7140F-20, PA7140F-25, PA7140FI-20, PA7140FI-25, PA7140J-20 Datasheet
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PA7140 PEEL
TM
Array
Programmable Electrica lly Erasable Logic Array
■
Versatile Logic Array Architecture
- 24 I/Os, 14 inputs, 60 registers/latches
- Up to 72 logic cell output functions
- PLA structure with true product-term sharing
- Logic functions and registers can be I/O-buried
■
High-Speed Commercial and Industrial Versions
- As fast as 13ns/20ns (tpdi/tpdx), 66.6MHz (f
MAX
)
- Industrial grade available for 4.5 to 5.5V Vcc and -40
to +85 °C temperatures Ideal for Combinatorial,
Synchronous and Asynchronous Logic Applications
- Integration of multiple PLDs and random logic
- Buried counters, complex state-machines
- Comparators, decoders, other wide-gate functions
■
CMOS Electrically Erasable Technology
-
Reprogrammable in 40-pin DIP,
44-pin PLCC, and TQFP packages
■
Flexible Logic Cell
- Up to 3 output functions per logic cell
- D,T and JK registers with special features
- Independent or global clocks, resets, presets,
clock polarity and output enables
- Sum-of-products logic for output enables
■
Development and Programmer Support
- ICT PLACE Development Software
-Fitters for ABEL, CUPL and other software
-Programming suppor t for by ICT PDS-3 and popular
third-party programmers
The PA7140 is a member of the Programmable Electrically
Erasable Logic (PEEL™) Array family based on ICT’s
CMOS EEPROM technology. PEEL™ Arrays free designers from the limitations of ordin ary PLDs by providing the
architectural flexibility and speed needed for today’s programmable logic designs. The PA7140 offers a versatile
logic array architecture with 24 I/O pins, 14 input pins and
60 registers/latches (24 buried logic cells, 12 input registers/latches, 24 buried I/O registers/latches). Its l ogic array
implements 100 sum-of-products logic functions divided
into two groups each serving 12 logic cells. Each group
shares half (60) of the 120 product-terms available for logic
cells.
The PA7140’s logic and I/O cells (LCCs, IOCs) are
extremely flexible with up to three output functions per cell
(a total of 72 for all 24 logic cells). Cells are configurable as
D, T, and JK registers with independent or global clocks,
resets, presets, clock polarity, and other features, making
the PA7140 suitable for a variety of combin atorial , synchronous and asynchronous logic applications. The PA7140
supports speeds as fast as 13ns/20ns (tpdi/tpdx) and
66.6MHz (f
MAX
) at moderate power consumption 140mA
(100mA typical). Packaging includes 40-pin DIP and 44-pin
PLCC (see Figure 1). Development and programming support for the PA7140 is provided by ICT and popular thirdparty development tool manufacturers.
General Description
Features
TQFP
1
2
3
4
5
6
7
8
9
10
11
Pin 1
12 13 14 15 16 17 18 19 20 21 22
33
32
31
30
29
28
27
26
25
24
23
44 43 42 41 40 39 38 37 36 35 34
Figure 1: Pin Configuration Figure 2. Block Diagram
Commercial/
Industrial
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PA7140
Table 1. Absolute Maximum Ratings
Symbol Parameter Conditions Ratings Unit
V
CC
Suppl y Voltage Relative t o Gr ou nd -0.5 to + 7.0 V
V
I
, V
O
Voltage Applied to Any Pin Relative to Ground
1
-0.5 to VCC + 0.6 V
I
O
Output Current Per pin (IOL, IOH)±25mA
T
ST
Storage Temperature -65 to + 150 °C
T
LT
Lead Temperature Soldering 10 seco nds +300 °C
Table 2. Operating Ranges
Symbol Parameter Conditions Min Max Unit
V
CC
Supply Voltage
Commercial 4.75 5.25
V
Industrial 4.5 5.5
T
A
Ambient Temperature
Commercial 0 +70
°C
Industrial -40 +85
T
R
Clock Rise Time See Note 2 20 ns
T
F
Clock Fall Time See Note 2 20 ns
T
RVCC
V
CC
Rise Time See Note 2 250 ms
Table 3. D.C. Electrical Characteristics over the recommended operating conditions
Symbol Parameter Conditions Min Max Unit
V
OH
Output HIGH Voltage - TTL VCC = Min, IOH = -4.0mA 2.4 V
V
OHC
Output HIGH Voltage - CMO S VCC = Min, IOH = -10µA VCC - 0.3 V
V
OL
Output LOW Voltage - TT L V
CC
= Min, I
OL
= 16mA 0.5 V
V
OLC
Output LOW Voltage - CM OS VCC = Min, IOL = -10µA 0.15 V
V
IH
Input HIGH Level 2.0 VCC + 0.3 V
V
IL
Input LOW Level -0.3 0.8 V
I
IL
Input Leakage Current V
CC
= Max, GND ≤ V
IN
≤
V
CC
±10 µA
I
OZ
Output Leakage Current I/O = High-Z, GND ≤ V
O
≤
V
CC
±10 µA
I
SC
Output Short Circuit Current
4
VCC = 5V, VO = 0.5V, TA= 25°C -30 -120 mA
ICC
11
VCC Current
V
IN
= 0V or V
CC
3,11
f = 25MHz
All outputs disabled
4
-20
100 (typ.)
18
140
mA-25 140
I-25 150
C
IN
7
Input Capacitance
5
TA = 25°C, VCC = 5.0V
@ f = 1 MHz
6pF
C
OUT
7
Output Capacitance
5
12 pF
This device has been designed and tested for the recommended
operating conditions. Proper operation outside of these levels is not
guaranteed. Exposure to absolute maximu m ratings may cause permanent damage.
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