HP sx7, 4325S, 4425s Schematics

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DDRIII-SODIMM1
PAGE 6,7
DDRIII-SODIMM2
PAGE 6,7
DDRIII 1066 MHz
DDRIII 1066 MHz
AMD Champlain
35mm X 35mm S1G4 Processor
638P (PGA) 25W
PAGE 3,4,5
HT3
CPU THERMAL SENSOR
PAGE 5
CPU_CLK
NBGFX_CLK
NBGPP_CLK
SBLINK_CLK
14.318MHz
CLOCK GEN
ICS9LPRS476AKLFT-->HP SLG8SP628VTR-->HP RTM880N-796 -->HP
SX7 SYSTEM DIAGRAM
01
PAGE 2
PCI-E
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B B
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RTL8151DH
(10/100/1000)
PAGE 28
5-
SYSTEM CHARGER(bq24740)
3/5VS5 RT8206B
+1.1V(RT8029)/+1.1VS5/+1.8V
C C
DDR3 (RT8207)/+1.0V_VGA
VGACORE(1.1V~0.9V)RT8028A
CPU_CORE ISL6265
PAGE 36,37
PAGE 38
PAGE 39
PAGE 40
PAGE 41
PAGE 42
PAGE 28
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M93-S3/ Park-S3
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352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
5
6
Block Diagram
Date: Sheet
7
143Monday, March 15, 2010
8
3A
of
SMBUS TABLE
SB--SCL0/SD0
D D
EC -- AB1A
EC -- AB2A
Clock gen/ wirless LAN/ New card/ DDR3/ DDR3 thermal/ Accelerometer/system thermal
Battery charge/discharge
VGA thermal
1
+3V
+3VPCU
+3V
2
3
5
4
3
2
1
DiscreteCLOCKS name
C694
C744
*0.1U/10V_4
+1.1V_CLKVDDIO
C743
*0.1U/10V_4
+3V_CLKVDD
C691
*0.1U/10V_4
C695
*0.1U/10V_4
C745
*0.1U/10V_4
C717
*0.1U/10V_4
NBGFX_CLKP NBGFX_CLKN
EXT_GFX_CLKP EXT_GFX_CLKN
SBLINK_CLKP SBLINK_CLKN
CLK_VGA_27M_SS CLK_VGA_27M_NSS To Park-S3 27Mhz - Discrete only
NA
RP21 STUFF to Park-S3 external reference clock -Discrete only
RP26 STUFF
R441,R442 STUFF
to NB for VGA reference clock
to NB for AC-LINK reference clock
L69
+1.1V
*BLM18PG181SN1D(180,1.5A)_6
D D
600 ohm, 0.5A
L70
+3V
*BLM18PG181SN1D(180,1.5A)_6
C742
*22U/6.3V_8
+3V_CLKVDD
C733
*22U/6.3V_8
*0.1U/10V_4
C737
*2.2U/6.3V_6
C746
*0.1U/10V_4
*0.1U/10V_4
C747
C678
C723
*0.1U/10V_4
*0.1U/10V_4
Clock pin function
02
Need check the net name for the short pad
3 1
3 1 3 1
3 1 3 1
3 1 3 1 3 1
3 1
+3V_CLKVDD
RS880M
R487 *261_4
Clock for Dis only
OSC_SPREAD
27Mhz for Dis only
R478 *8.2K_4
SEL_27 SEL_SATA SEL_HT66
not need to stuff ,
R467 *8.2K_4
SEL_HT66 have pull LOW
2
E_CPUCLKP 12 E_CPUCLKN 12
E_VGA_CLKP 12 E_VGA_CLKN 12
E_SBLINK_CLKP 12 E_SBLINK_CLKN 12 E_SBSRC_CLKP 12 E_SBSRC_CLKN 12
E_MINI1_CLKP 12 E_MINI1_CLKN 12 E_NEW_CLKP 12 E_NEW_CLKN 12 E_LAN_CLKP 12 E_LAN_CLKN 12
E_XTALI 18
E_NBHT_CLKP 12 E_NBHT_CLKN 12
E_48M_USB 13
E_48M_CR 12
E_SB_OSC 12
to NB for AC-LINK reference clock
to SB
to WLAN
to New card
to LAN
XTALIN --for Park-S3-1.8V level input
modify SI
R449 *158/F_4 R450 *90.9/F_4
Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.
Size Document Number Rev Custom
Date: Sheet
to Park-S3 -Discrete only
EXT_NB_OSC 10
352-(&76;
4XDQWD&RPSXWHU,QF
Clock Generator
1
243Monday, March 15, 2010
3A
of
U32
+3V_CLKVDD
Place very close to
1 2
C/G
CG_XIN
CG_XOUT
+3V
+3V
+3V_CLK_VDDA
C697 *2.2U/6.3V_6
C701 *0.1U/10V_4
PCLK_SMB5,6,7,13,29,31,33 PDAT_SMB5,6,7,13,29,31,33
R493 *8.2K_4 R484 *8.2K_4
R477 *8.2K_4 R492 *8.2K_4 R491 *8.2K_4 R490 *8.2K_4
if use clock request pin , need to pull Hi for default sttting
+1.1V_CLKVDDIO
CG_XIN CG_XOUT
CLK_PD#
CLKREQ1# CLK_PD#
CLKREQ0# CLKREQ2# CLKREQ3# CLKREQ4#
CLKREQ0# CLKREQ4# CLKREQ3# CLKREQ2# CLKREQ1#
NEW_CLKREQ# 13,29
LAN_CLKREQ# 13,28 WLAN_CLKREQ# 13,33
4
+3V_CLKVDD
C C
C720 *33P/50V_4
C709 *33P/50V_4
can remove MOSFET level shift SB/clock gen / DDR3 is 3.3V/S0 power level
B B
L64
*BLM18PG181SN1D(180,1.5A)_6
Y8
*14.318MHZ
For EMI
C670 *10P/50V_4
C184 *10P/50V_4 C667 *10P/50V_4
A A
E_48M_USB
E_XTALI OSC_SPREAD
5
4
VDDDOT
16
VDDSRC
26
VDDATIG
35
VDDSB
40
VDD_SATA
48
VDDCPU
55
VDDHTT
56
VDDREF
63
VDD48
11
VDDSRC_IO
17
VDDSRC_IO
25
VDDATIG_IO
34
VDDSB_IO
47
VDDCPU_IO
1
GND48
7
GNDDOT
10
GNDSRC
18
GNDSRC
24
GNDATIG
33
GNDSB
43
GNDSATA
46
GNDCPU
52
GNDHTT
60
GNDREF
61
X1
62
X2
2
SMBCLK
3
SMBDAT
51
PD#
23
*CLKREQ0#
38
*CLKREQ4#
39
*CLKREQ3#
44
*CLKREQ2#
45
*CLKREQ1#
*RTM880N-796_QFN64
QFN64
ICS9LPRS480AKLFT--ALPRS480000
IDT
SLG8SP628VTR--AL8SP628000
SLG
RTM880N-796-- AL000880001RTL
* default
SEL_HTT66
SEL_SATA
SEL_27 1027MHz non-spreading singled clock
66 MHz 3.3V single ended HTT clock
1
*01100 MHz differential HTT clock
100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
*0 *
100 MHz spreading differential SRC clock
CPUK8_0T
CPUK8_0C
ATIG0T ATIG0C ATIG1T ATIG1C
SB_SRC0T SB_SRC0C SB_SRC1T SB_SRC1C
SRC0T SRC0C SRC1T SRC1C SRC2T SRC2C SRC3T SRC3C SRC4T SRC4C
SRC7T/27M_SS
SRC7C/27M
SRC6T/SATAT
SRC6C/SATAC
HTT0T/66M HTT0C/66M
48MHz_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
TGND
65
50 49
30 29 28 27
37 36 32 31
22 21 20 19 15 14 13 12 9 8 6 5 42 41
54 53
64
59 58 57
3
E_CPUCLKP E_CPUCLKN
NBGFX_CLKP NBGFX_CLKN E_VGA_CLKP E_VGA_CLKN
E_SBLINK_CLKP E_SBLINK_CLKN E_SBSRC_CLKP E_SBSRC_CLKN
E_MINI1_CLKP E_MINI1_CLKN E_NEW_CLKP E_NEW_CLKN E_LAN_CLKP E_LAN_CLKN
CLK_VGA_27M_SS CLK_VGA_27M_NSS
E_NBHT_CLKP E_NBHT_CLKN
CLK48MUSB
SEL_HT66 SEL_SATA SEL_27
Place within 0.5" of CLKGEN
RP25 *0_4P2R_4
4 2
RP22 *0_4P2R_4
4 2
RP21 *0_4P2R_4
4 2
RP26 *0_4P2R_4
4 2
RP24 *0_4P2R_4
4 2
RP20 *0_4P2R_4
4 2
RP19 *0_4P2R_4
4 2
RP17 *0_4P2R_4
4 2
R441 *33_4 R442 *75/F_4 R150 *100/F_4
RP23 *0_4P2R_4
4 2
R443 *22_4 R446 *22_4
R479 *33_4
R485 *8.2K_4
R476
*8.2K_4
5
+1.1V +1.1V_VLDT
D D
HT_NB_CPU_CAD_H[15..0]8 HT_NB_CPU_CAD_L[15..0]8 HT_NB_CPU_CLK_H[1..0]8 HT_NB_CPU_CLK_L[1..0]8 HT_NB_CPU_CTL_H[1..0]8 HT_NB_CPU_CTL_L[1..0]8 HT_CPU_NB_CAD_H[15..0]8 HT_CPU_NB_CAD_L[15..0]8 HT_CPU_NB_CLK_H[1..0]8 HT_CPU_NB_CLK_L[1..0]8
C C
HT_CPU_NB_CTL_H[1..0]8 HT_CPU_NB_CTL_L[1..0]8
FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)
1.1V@1.5A
R251 *0_6/S R253 *0_6/S
+1.1V2,8,9,10,11,15,39 +2.5V35,41
+1.1V_VLDT
HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
C306 10U/6.3V_8 R13 169/F_4 C307 10U/6.3V_8 C315 0.22U/6.3V_4 C316 180P/50V_4
2.5V@250mA
HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15
HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1
HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1
BLM21PG221SN1D(220,100M,2A)_8
+2.5V
C293
4.7U/6.3V_6
+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT
L33
LS0805-100M-N
U4A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SOCKET_638_PIN
4
HT LINK
+CPUVDDA
C305
4.7U/6.3V_6
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1 L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
W/S= 15 mil/20mil
C324
+1.1V_VLDT
AE2
+1.1V_VLDT
AE3
+1.1V_VLDT
AE4
+1.1V_VLDT
AE5
HT_CPU_NB_CAD_H0
AD1
HT_CPU_NB_CAD_L0
AC1
HT_CPU_NB_CAD_H1
AC2
HT_CPU_NB_CAD_L1
AC3
HT_CPU_NB_CAD_H2
AB1
HT_CPU_NB_CAD_L2
AA1
HT_CPU_NB_CAD_H3
AA2
HT_CPU_NB_CAD_L3
AA3
HT_CPU_NB_CAD_H4
W2
HT_CPU_NB_CAD_L4
W3
HT_CPU_NB_CAD_H5
V1
HT_CPU_NB_CAD_L5
U1
HT_CPU_NB_CAD_H6
U2
HT_CPU_NB_CAD_L6
U3
HT_CPU_NB_CAD_H7
T1
HT_CPU_NB_CAD_L7
R1
HT_CPU_NB_CAD_H8
AD4
HT_CPU_NB_CAD_L8
AD3
HT_CPU_NB_CAD_H9
AD5
HT_CPU_NB_CAD_L9
AC5
HT_CPU_NB_CAD_H10
AB4
HT_CPU_NB_CAD_L10
AB3
HT_CPU_NB_CAD_H11
AB5
HT_CPU_NB_CAD_L11
AA5
HT_CPU_NB_CAD_H12
Y5
HT_CPU_NB_CAD_L12
W5
HT_CPU_NB_CAD_H13
V4
HT_CPU_NB_CAD_L13
V3
HT_CPU_NB_CAD_H14
V5
HT_CPU_NB_CAD_L14
U5
HT_CPU_NB_CAD_H15
T4
HT_CPU_NB_CAD_L15
T3
HT_CPU_NB_CLK_H0
Y1
HT_CPU_NB_CLK_L0
W1
HT_CPU_NB_CLK_H1
Y4
HT_CPU_NB_CLK_L1
Y3
HT_CPU_NB_CTL_H0
R2
HT_CPU_NB_CTL_L0HT_NB_CPU_CTL_L0
R3
HT_CPU_NB_CTL_H1
T5
HT_CPU_NB_CTL_L1
R5
C323 3300P/50V_4
0.22U/6.3V_4
3
CPU CLK
CPUCLKP12 CPUCLKN12
Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"
C45710U/6.3V_8 C4270.22U/6.3V_4 C433180P/50V_4
CPUCLKIN CPUCLKP
CPUCLKN
SideBand Temp sense I2C
+1.1V_VLDT
+1.5VSUS
+1.5VSUS
C18 3900P/25V_4 C17 3900P/25V_4
CPU_VDD0_RUN_FB_H42 CPU_VDD0_RUN_FB_L42
CPU_VDD1_RUN_FB_H42 CPU_VDD1_RUN_FB_L42
CPUCLKP CPUCLKN
CPUCLKIN#
CPU_LDT_RST#12
CPU_PWRGD12
CPU_LDT_STOP#10,12
CPU_SIC5,13 CPU_SID5,13
CPU_ALERT5
R289 44.2/F_4 R286 44.2/F_4
R271 1K/F_4 R272 1K/F_4
R232 510/F_4 R10 510/F_4
R341 1K/F_4 R64 1K/F_4 R65 1K/F_4 R67 1K/F_4 R300 1K/F_4 R68 1K/F_4
R25 *0_4/S
2
modify MV
CPU_LDT_RST# CPU_PWRGD CPU_LDT_REQ#_CPU
+CPUVDDA
place them to CPU within 1.5"
T59
place them to CPU within 1.5"
CPU_LDT_STOP#
250mA
W/S= 15 mil/20mil
+CPUVDDA +CPUVDDA
CPUCLKIN CPUCLKIN#
CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP#
CPU_LDT_REQ#_CPU
CPU_SIC CPU_SID CPU_ALERT
CPU_HTREF0 CPU_HTREF1
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
CPUTEST23 CPUTEST18
CPUTEST19 CPUTEST25H
CPUTEST25L CPUTEST21
CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27
U4D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SOCKET_638_PIN
C5410.1U/10V_4
VSS
RSVD11
SVC SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
R11300/F_4 R12300/F_4 R237*300/F_4
R2462.2K_4
1
+1.5V
modify MV
M11 W18
CPU_SVC_R
A6
CPU_SVD_R
A4
CPU_THERMTRIP_L#
AF6
CPU_PROCHOT_L#
AC7
CPU_MEMHOT_L#
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
VDDIO_FB_H
W9
VDDIO_FB_L
Y9 H6
G6
E10 AE9
J7 H8
D7 E7 F7 C7
C3 K8
C4
C9 C8
H18 H19 AA7 D5 C5
CPU_VDDNB_RUN_FB_H 42 CPU_VDDNB_RUN_FB_L 42
CPU_DBREQ# CPU_TDO
CPUTEST17 CPUTEST16 CPUTEST15 CPUTEST14
CPUTEST29H
CPUTEST29L
R234 *300/F_4
R233 300/F_4
add +1.5VSUS option R233 for Caspian CPU power leakage issue
R250 *300/F_4
03
modify PV
VDDIO_FB_H 40 VDDIO_FB_L 40
modify SI
T50 T51 T52 T49
+1.1V_VLDT
modify PV
T48
R231
80.6/F_4
T1
T44 T45
+1.5V
+1.5VSUS
B B
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
A A
+1.5VSUS
+1.5VSUS
CPU_PROCHOT_L#37
R370 *10K/F_4
R368 *1K/F_4
CPU_MEMHOT_L#
R75 10K/F_4
R354 1K/F_4
CPU_THERMTRIP_L#
R348 10K/F_4
R349 300_4
2
Q46 *MMBT3904
13
2
Q42 MMBT3904-7-F
1 3
2
Q8
1 3
MMBT3904-7-F
5
modify PV
R84 *10K/F_4
+1.5V
CPU_LDT_RST#
CPU_MEMHOT# 6,7,12
CPU_THERMTRIP# 13,18,31
CPU_PROCHOT# 12,31
+3V
CNTR_VREF
R96 *0_4/S
12
G1 *SHORT_ PAD1
2
Q11
1 3
*MMBT3904-7-F
for debug only
S1g4 does not support MEMHOT#
4
R95 *4.7K_4
CPU_LDT_RST_HTPA#
Serial VID
+1.5V +1.5VSUS
+1.5V +1.5VSUS
+1.5V
CPU_SVC_R CPU_SVD_R CPU_SVD CPU_PWRGD
R229 *2.2K_4 R18 1K/F_4
R19 *1K/F_4 R14 1K/F_4
R15 *1K/F_4
R17 *0_4/S R21 *0_4/S R228 *0_4/S
R16 *220_4 R20 *220_4 R230 *220_4
HDT Connector
+1.5VSUS
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
C11 *0.1U/10V_4
3
add +1.5VSUS option R18 R14 for Caspian CPU power leakge issue
modify PV
CPU_SVC
CPU_PWRGD_SVID_REG
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
KEY
CN30*HDT CONN
25
CPU_LDT_RST_HTPA#
2
CPU_SVC 42 CPU_SVD 42 CPU_PWRGD_SVID_REG 42
modify PV
modify PV
VFIX MODE
VID Override Circuit
SVC SVD Voltage Output
00 0
1 0
1 1
1
CPUTEST20 CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18
R63 *1K/F_4 R66 *1K/F_4 R302 *1K/F_4 R270 *300/F_4 R9 *300/F_4 R278 *1K/F_4 R277 *1K/F_4
1.1V
1.0V
0.9V
0.8V
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
S1G2 HT,CTL I/F 1/3
Date: Sheet
1
of
343Monday, March 15, 2010
3A
A
U4B
VDDR1 VDDR2 VDDR3 VDDR4
MEMZP MEMZN
MA_RESET_L MA0_ODT0
MA0_ODT1 MA1_ODT0 MA1_ODT1
MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1
MA_CKE0 MA_CKE1
MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MA_BANK0 MA_BANK1 MA_BANK2
MA_RAS_L MA_CAS_L MA_WE_L
SOCKET_638_PIN
+0.9V
C295
4.7U/6.3V_6
+0.9V
C299
1000P/50V_4
0.9V@1.5A
MEM:CMD/CTRL/CLK
VDDR_SENSE
MEMVREF
MB_RESET_L
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
Place close to socket
C479
4.7U/6.3V_6
C300
1000P/50V_4
R62 39.2/F_4 R61 39.2/F_4
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
+1.5VSUS3,5,6,7,40,41,42
+0.9V41
+0.9V
M_ZP M_ZN
D10 C10 B10
AD10 AF10
AE10
H16 T19
V22 U21 V19
T20 U19 U20 V20
N19 N20 E16 F16 Y16
AA16
P19 P20
N21
M20
N22 M19 M22
M24
K22
R21
K20
V24
K24
K19
R20
R23
R19
T22
T24
J22 J20
L20 L21
L19
L22
J21
+1.5VSUS +0.9V
PLACE THEM CLOSE TO CPU WITHIN 1"
R69 *0_4/S
modify PV
C520 10U/6.3V_8
4 4
MEM_MA_ADD[0..15]6
3 3
2 2
1 1
MEM_MA_RST#6
MEM_MA0_ODT06 MEM_MA0_ODT16
MEM_MA0_CS#06 MEM_MA0_CS#16
MEM_MA_CKE06 MEM_MA_CKE16
MEM_MA_CLK1_P6 MEM_MA_CLK1_N6
MEM_MA_CLK2_P6 MEM_MA_CLK2_N6
MEM_MA_BANK06 MEM_MA_BANK16 MEM_MA_BANK26
MEM_MA_RAS#6 MEM_MA_CAS#6 MEM_MA_WE#6
+0.75VSMVREF6,40
VDDR5 VDDR6 VDDR7 VDDR8 VDDR9
MB_CKE0 MB_CKE1
4.7U/6.3V_6
C387
1000P/50V_4
C294
B
W10 AC10 AB10 AA10 A10
CPU_VTT_SENSE
Y10
MEMVREF_CPU
W17 B18 W26
W23 Y26
V26 W25 U22
J25 H26
P22 R22 A17 A18 AF18 AF17 R26 R25
P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24
R24 U26 J26
U25 U24 U23
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
C480
4.7U/6.3V_6
C477
1000P/50V_4
CPU_VTT_SENSE 40
MEM_MB_RST# 6 MEM_MB0_ODT0 6
MEM_MB0_ODT1 6
MEM_MB0_CS#0 6 MEM_MB0_CS#1 6
MEM_MB_CKE0 6 MEM_MB_CKE1 6
MEM_MB_CLK1_P 6 MEM_MB_CLK1_N 6
MEM_MB_CLK2_P 6 MEM_MB_CLK2_N 6
MEM_MB_BANK0 6 MEM_MB_BANK1 6 MEM_MB_BANK2 6
MEM_MB_RAS# 6 MEM_MB_CAS# 6 MEM_MB_WE# 6
C474
0.22U/6.3V_4
C302
180P/50V_4
+1.5VSUS
R304
1K/F_4
R298
1K/F_4
MEM_MB_ADD[0..15] 6
C473
0.22U/6.3V_4
C297
180P/50V_4
0.22U/6.3V_4
C476
C298
180P/50V_4
R297 *0_4
C405
0.1U/10V_4
0.22U/6.3V_4
180P/50V_4
C
MEM_MB_DATA[0..63]6
+0.75VSMVREF 6,40
Reserved
C404
1000P/50V_4
MEM_MB_DM[0..7]6
C475
C303
D
Processor Memory Interface
U4C
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS0_P6 MEM_MB_DQS0_N6 MEM_MB_DQS1_P6 MEM_MB_DQS1_N6 MEM_MB_DQS2_P6 MEM_MB_DQS2_N6 MEM_MB_DQS3_P6 MEM_MB_DQS3_N6 MEM_MB_DQS4_P6 MEM_MB_DQS4_N6 MEM_MB_DQS5_P6 MEM_MB_DQS5_N6 MEM_MB_DQS6_P6 MEM_MB_DQS6_N6 MEM_MB_DQS7_P6 MEM_MB_DQS7_N6
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23
G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11
Y11 AE14 AF14 AF11 AD11
A12 B16 A22
E25 AB26 AE22 AC16 AD12
C12
B12
D16
C16
A24
A23
F26
E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
SOCKET_638_PIN
MEM:DATA
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24 AC24 Y19 AB16 Y13
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8
MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
E
MEM_MA_DATA[0..63] 6
MEM_MA_DM[0..7] 6
MEM_MA_DQS0_P 6 MEM_MA_DQS0_N 6 MEM_MA_DQS1_P 6 MEM_MA_DQS1_N 6 MEM_MA_DQS2_P 6 MEM_MA_DQS2_N 6 MEM_MA_DQS3_P 6 MEM_MA_DQS3_N 6 MEM_MA_DQS4_P 6 MEM_MA_DQS4_N 6 MEM_MA_DQS5_P 6 MEM_MA_DQS5_N 6 MEM_MA_DQS6_P 6 MEM_MA_DQS6_N 6 MEM_MA_DQS7_P 6 MEM_MA_DQS7_N 6
04
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
A
B
C
D
S1G2 DDRII MEMORY I/F 2/3
Date: Sheet
E
443Monday, March 15, 2010
3A
of
5
4
3
2
1
U4F
AA4
VSS1
U4E
G4
VDD_1
H2
VDD_2
J9
VDD_3
J11
VDD_4
J13
VDD_5
D D
+CPUVDDNB
3A
+1.5VSUS
C C
J15
VDD_6
K6
VDD_7
K10
VDD_8
K12
VDD_9
K14
VDD_10
L4
VDD_11
L7
VDD_12
L9
VDD_13
L11
VDD_14
L13
VDD_15
L15
VDD_16
M2
VDD_17
M6
VDD_18
M8
VDD_19
M10
VDD_20
N7
VDD_21
N9
VDD_22
N11
VDD_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
modify PV
2
3
Q10
1
MMBT3904-7-F
PCLK_SMB2,6,7,13,29,31,33
PDAT_SMB2,6,7,13,29,31,33
B B
3
*BSS138_NL/SOT23
*BSS138_NL/SOT23
VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
+1.5VSUS
2
Q9
1
2
13
+VCORE+VCORE +VCORE
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2
Q45
AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
R77
1K/F_4
+1.5VSUS
+1.5VSUS
1.5V@2A
R80 1K/F_4
R366 1K/F_4
CPU_SIC 3,13
CPU_SID 3,13
CPU_ALERT 3PM_THERM#13
modify PV
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
SOCKET_638_PIN
PROCESSOR POWER AND GROUND
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
BOTTOM SIDE DECOUPLING
C397
22U/6.3V_8
+VCORE
+CPUVDDNB
C389
22U/6.3V_8
C373
22U/6.3V_8
22U/6.3V_8
C380
22U/6.3V_8
22U/6.3V_8
C353
C341
C372
22U/6.3V_8
22U/6.3V_8
C354
22U/6.3V_8
C329
+1.5VSUS
C333
22U/6.3V_8
22U/6.3V_8
C330 22U/6.3V_8
C342
C388
0.22U/6.3V_4
C348
0.22U/6.3V_4
C385
22U/6.3V_8
C386
0.01U/25V_4
C360
0.01U/25V_4
C378
0.22U/6.3V_4
C376
180P/50V_4
C346
180P/50V_4
C339
0.22U/6.3V_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.5VSUS
C686
10U/6.3V_8
+1.5VSUS
C687
10U/6.3V_8
C358
4.7U/6.3V_6
C359
0.22U/6.3V_4
C312
4.7U/6.3V_6
C395
0.22U/6.3V_4
4.7U/6.3V_6
C340
0.1U/10V_4
C313
C350
0.1U/10V_4
C366
4.7U/6.3V_6
C396
0.01U/25V_4
C394
0.22U/6.3V_4
C374
180P/50V_4
C364
0.22U/6.3V_4
C314
180P/50V_4
modify DB2 modify SImodify SI
C381
180P/50V_4
C446
10U/6.3V_8
C576
10U/6.3V_8
C379
0.01U/25V_4
C671
10U/6.3V_8
C674
10U/6.3V_8
05
C347
180P/50V_4
+
*100U/6.3V_3528
+
*100U/6.3V_3528
C676
C685
For fix HyperTransport nets across plane splits
+1.5VSUS
EC8
+VGA_CORE +1.8V
A A
*0.1U/10V_4
+3V +1.8V+3VS5 +3VS5
EC5 *0.01U/25V_4 EC2 *0.01U/25V_4
352-(&76;
EC1
5
4
3
*0.1U/10V_4
*0.1U/10V_4
EC6
*0.1U/10V_4
EC3
EC4
*0.1U/10V_4
2
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
S1G2 PWR & GND 3/3
Date: Sheet of
543Monday, March 15, 2010
1
3A
5
+1.5VSUS
105
106
111
MEM_MA_ADD[0..15]4
D D
MEM_MA_BANK[0..2]4
MEM_MA_DQS0_P4 MEM_MA_DQS1_P4 MEM_MA_DQS2_P4 MEM_MA_DQS3_P4 MEM_MA_DQS4_P4 MEM_MA_DQS5_P4 MEM_MA_DQS6_P4
C C
B B
MEM_MA_DQS7_P4 MEM_MA_DQS0_N4
MEM_MA_DQS1_N4 MEM_MA_DQS2_N4 MEM_MA_DQS3_N4 MEM_MA_DQS4_N4 MEM_MA_DQS5_N4 MEM_MA_DQS6_N4 MEM_MA_DQS7_N4
MEM_MA_CLK1_P4 MEM_MA_CLK1_N4 MEM_MA_CLK2_P4 MEM_MA_CLK2_N4
MEM_MA_CKE04 MEM_MA_CKE14
MEM_MA_RAS#4 MEM_MA_CAS#4 MEM_MA_WE#4 MEM_MA0_CS#04 MEM_MA0_CS#14
MEM_MA0_ODT04 MEM_MA0_ODT14
PDAT_SMB2,5,7,13,29,31,33 PCLK_SMB2,5,7,13,29,31,33
MEM_MA_RST#4
+0.75VSMVREF_SUSA
+0.75VSMVREF
+0.75VSMVREF_DIMM
C512
0.1U/10V_4
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8
MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
DIM1_SA0 DIM1_SA1
C511
0.1U/10V_4
+0.75VSMVREF
C517
1000P/50V_4
98
A0
97
A1
VDD075VDD176VDD281VDD382VDD487VDD588VDD693VDD899VDD794VDD9
96
A2
95
A3/A4
92
A4/A3
91
A5/A6
90
A6/A5
86
A7/A8
89
A8/A7
85
A9
107
A10/AP
84
A11
83
A12_BC#
119
A13
80
A14
78
A15/BA3
109
BA0/BA1
108
BA1/BA0
79
BA2
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
110
RAS#
115
CAS#
113
WE#
114
S0#
121
S1#
116
ODT0
120
ODT1
197
SA0
201
SA1
200
SDA
202
SCL
199
VDDspd
30
RST#
198
EVENT#
1
VREF
126
VrefCA
203
VTT1
204
VTT2
2
VSS0
3
VSS1
8
VSS2
9
VSS3
13
VSS4
14
VSS5
19
VSS6
20
VSS7
25
VSS8
26
VSS9
31
VSS10
32
VSS11
VSS1237VSS1338VSS1443VSS1544VSS16
A A
100
VDD10
VDD11
VDD12
DDR3 SO-DIMM
(Standard )
VSS1854VSS1955VSS20
VSS17
48
60
61
49
H=8
R346 10K/F_4 R344 10K/F_4
SMbus address A0
5
4
112
117
118
123
124
CN8
MEM_MA_DATA1
5
DQ0
MEM_MA_DATA0
7
DQ1
MEM_MA_DATA7
VDD13
VDD14
DIM1_SA0 DIM1_SA1
15
VDD15
VDD16
VDD17
DQ2
MEM_MA_DATA6
17
DQ3
MEM_MA_DATA5
4
DQ4
MEM_MA_DATA4
6
DQ5
MEM_MA_DATA2
16
DQ6
MEM_MA_DATA3
18
DQ7
MEM_MA_DATA9
21
DQ8
MEM_MA_DATA8
23
DQ9
MEM_MA_DATA15
33
DQ10
MEM_MA_DATA11
35
DQ11
MEM_MA_DATA13
22
DQ12
MEM_MA_DATA12
24
DQ13
MEM_MA_DATA14
34
DQ14
MEM_MA_DATA10
36
DQ15
MEM_MA_DATA16
39
DQ16
MEM_MA_DATA21
41
DQ17
MEM_MA_DATA18
51
DQ18
MEM_MA_DATA23
53
DQ19
MEM_MA_DATA17
40
DQ20
MEM_MA_DATA20
42
DQ21
MEM_MA_DATA22
50
DQ22
MEM_MA_DATA19
52
DQ23
MEM_MA_DATA25
57
DQ24
MEM_MA_DATA24
59
DQ25
MEM_MA_DATA30
67
DQ26
MEM_MA_DATA27
69
DQ27
MEM_MA_DATA28
56
DQ28
MEM_MA_DATA29
58
DQ29
MEM_MA_DATA31
68
DQ30
MEM_MA_DATA26
70
DQ31
MEM_MA_DATA37
129
DQ32
MEM_MA_DATA36
131
DQ33
MEM_MA_DATA35
141
DQ34
MEM_MA_DATA39
143
DQ35
MEM_MA_DATA38
130
DQ36
MEM_MA_DATA32
132
DQ37
MEM_MA_DATA33
140
DQ38
MEM_MA_DATA34
142
DQ39
MEM_MA_DATA40
147
DQ40
MEM_MA_DATA41
149
DQ41
MEM_MA_DATA46
157
DQ42
MEM_MA_DATA47
159
DQ43
MEM_MA_DATA44
146
DQ44
MEM_MA_DATA45
148
DQ45
MEM_MA_DATA42
158
DQ46
MEM_MA_DATA43
160
DQ47
MEM_MA_DATA52
163
DQ48
MEM_MA_DATA49
165
DQ49
MEM_MA_DATA54
175
DQ50
MEM_MA_DATA51
177
DQ51
MEM_MA_DATA53
164
DQ52
MEM_MA_DATA48
166
DQ53
MEM_MA_DATA50
174
DQ54
MEM_MA_DATA55
176
DQ55
MEM_MA_DATA61
181
DQ56
MEM_MA_DATA60
183
DQ57
MEM_MA_DATA59
191
DQ58
MEM_MA_DATA58
193
DQ59
MEM_MA_DATA57
180
DQ60
MEM_MA_DATA56
182
DQ61
MEM_MA_DATA62
192
DQ62
MEM_MA_DATA63
194
DQ63
77
NC1
122
NC2
MEM_MA_TEST
125
TEST
196
VSS51
195
VSS50
190
VSS49
189
VSS48
185
VSS47
184
VSS46
179
VSS45
178
VSS44
173
VSS43
172
VSS42
168
VSS41
167
VSS40
162
VSS39
161
VSS38
156
VSS37
155
VSS36
151
VSS35
150
VSS34
145
VSS33
144
VSS32
139
VSS31
138
VSS30
134
VSS29
133
VSS28
128
VSS27
VSS26
VSS2572VSS2471VSS2366VSS2265VSS21
127
DDR3_SO-DIMM_SOCKET_1.5V_Standard
4
T54
+0.75VSMVREF_SUSA
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
MEM_MA_DATA[0..63] 4
Standard
Connector
1
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177
199
179 181 183 185 187 189 191 193 195 197 199
+1.5VSUS
R7 1K/F_4
R8 1K/F_4
R325 *2.2K_4
R332 *2.2K_4
MEMHOT_MA#
R324 *2.2K_4
R342 *2.2K_4
MEMHOT_MB#
2 4 6 8 10 12 14 16 18 20 22
2
24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
CON_SODIMM200_STD_V1
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176
200
178 180 182 184 186 188 190 192 194 196 198 200
+0.75VSMVREF_SUSB
+0.75VSMVREF
+0.75VSMVREF_DIMM
1 3
1 3
2
2
3
MEM_MB_ADD[0..15]4
MEM_MB_BANK[0..2]4
MEM_MB_DM[0..7]4MEM_MA_DM[0..7]4
Q38 *MMBT3904
Q39 *MMBT3904
3
MEM_MB_DQS0_P4 MEM_MB_DQS1_P4 MEM_MB_DQS2_P4 MEM_MB_DQS3_P4 MEM_MB_DQS4_P4 MEM_MB_DQS5_P4 MEM_MB_DQS6_P4 MEM_MB_DQS7_P4
MEM_MB_DQS0_N4 MEM_MB_DQS1_N4 MEM_MB_DQS2_N4 MEM_MB_DQS3_N4 MEM_MB_DQS4_N4 MEM_MB_DQS5_N4 MEM_MB_DQS6_N4 MEM_MB_DQS7_N4
MEM_MB_CLK1_P4 MEM_MB_CLK1_N4 MEM_MB_CLK2_P4 MEM_MB_CLK2_N4
MEM_MB_CKE04 MEM_MB_CKE14
MEM_MB_RAS#4 MEM_MB_CAS#4
MEM_MB_WE#4 MEM_MB0_CS#04 MEM_MB0_CS#14
MEM_MB0_ODT04 MEM_MB0_ODT14
+3V+3V
MEM_MB_RST#4
C510
0.1U/10V_4
CPU_MEMHOT# 3,7,12
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8
MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
DIM2_SA0 DIM2_SA1
PDAT_SMB PCLK_SMB
C495
0.1U/10V_4
MEMHOT_MB#MEMHOT_MA#
+0.75VSMVREF
C518
1000P/50V_4
+1.5VSUS
107
119
109 108
136 153 170 187
137 154 171 188
135 152 169 186
101 103 102 104
110 115 113 114 121
116 120
197 201
200 202
199
198
126 203
204
98
A0
97
A1
VDD075VDD176VDD281VDD382VDD487VDD588VDD693VDD899VDD794VDD9
96
A2
95
A3/A4
92
A4/A3
91
A5/A6
90
A6/A5
86
A7/A8
89
A8/A7
85
A9 A10/AP
84
A11
83
A12_BC# A13
80
A14
78
A15/BA3 BA0/BA1
BA1/BA0
79
BA2
11
DM0
28
DM1
46
DM2
63
DM3 DM4 DM5 DM6 DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3 DQS4 DQS5 DQS6 DQS7
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3# DQS4# DQS5# DQS6# DQS7#
CK0 CK0# CK1 CK1#
73
CKE0
74
CKE1 RAS#
CAS# WE# S0# S1#
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd
30
RST# EVENT#
1
VREF
o
VrefCA VTT1
VTT2
2
VSS0
3
VSS1
8
VSS2
9
VSS3
13
VSS4
14
VSS5
19
VSS6
20
VSS7
25
VSS8
26
VSS9
31
VSS10
32
VSS11
DIM2_SA0 DIM2_SA1
SMbus address A2
2
105
100
VDD10
DDR3 SO-DIMM
VSS1237VSS1338VSS1443VSS1544VSS16
VSS1854VSS1955VSS20
VSS17
48
60
49
R336 10K/F_4 R343 10K/F_4
2
106
VDD11
61
111
112
117
118
123
124
CN9
5
DQ0
7
DQ1
VDD14
VDD15
VSS2572VSS2471VSS2366VSS2265VSS21
VDD16
VSS26
127
VDD17
DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1
NC2 TEST
VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27
15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
77 122 125
196 195 190 189 185 184 179 178 173 172 168 167 162 161 156 155 151 150 145 144 139 138 134 133 128
H=4
VDD12
VDD13
(Standard )
DDR3_SO-DIMM_SOCKET_1.5V_Standard
+3V
MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA24 MEM_MB_DATA28 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA29 MEM_MB_DATA25 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA44 MEM_MB_DATA41 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA54 MEM_MB_DATA50 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA55 MEM_MB_DATA51 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_TEST
1
MEM_MB_DATA[0..63] 4
06
Standard
Connector
1
1
2 3 5
4
6 7
8 9
10 11
12 13
14 15
16 17
18 19
20 21
22
2
24
23 25
26 27
28 29
30 31
32 33
34 35
36 37
38 39
40
41
42 43
44 45
46
48
47 49
50 51
52 53
54 55
56 57
58 59
60 61
62 63
64 65
66
67
68 69
70 71
72 73
CON_SODIMM200_STD_V1
74 75
76 77
78 79
80 81
82 83
84 85
86 87
88 89
90 91
92 93
94 95
96 97
98 99
100 101 103
102
104 105
106 107
108 109
110 111
112 113
114 115
116 117
118 119
120 121
122 123
124 125
126 127
128 129
130 131
132 133
134 135
136 137 139
138
140 141
142 143
144 145
146 147
148 149
150 151
152 153
154 155 157
156
158 159
160 161
162 163
164 165
166 167
168 169
170 171
172 173
174
175
176
199
177 179 181 183 185 187 189 191 193 195 197 199
200
178
180
182
184
186
188
190
192
194
196
198
200
+1.5VSUS
R224
+0.75VSMVREF_SUSB
1K/F_4
T53
R225 1K/F_4
+0.75VSMVREF4,40
+1.5VSUS3,4,5,7,40,41,42
+0.75VSMVREF_DIMM40
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
DDR2 SODIMMS: A/B CHANNEL
Date: Sheet
1
of
643Monday, March 15, 2010
3A
5
4
3
2
1
07
D D
C C
+1.5VSUS
C296
0.1U/10V_4
C310
0.1U/10V_4
C362
0.1U/10V_4
C361
0.1U/10V_4
C309
0.1U/10V_4
C311
0.1U/10V_4
PLACE CLOSE TO SOCKET( PER EMI/EMC)
modify PV
VCC DXP DXN
GND
R356
*200/F_6
1 2 3 5
+3V
C550 *0.1U/10V_4
C555 *1000P/50V_4
Q43
2
*MMBT3904
1 3
B B
+3V
R351
PCLK_SMB2,5,6,13,29,31,33 PDAT_SMB2,5,6,13,29,31,33
CPU_MEMHOT#3,6,12
A A
*10K/F_4
2
13
Q41 *MMBT3904
*10K/F_4
MEM_THERMAL#
R353
8 7 6 4
U28
SCLK SDA ALERT# OVERT#
*G786P8
MSOP
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
5
4
3
2
DDR2 SODIMMS TERMINATIONS
Date: Sheet
1
743Monday, March 15, 2010
3A
of
5
HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5
D D
C C
HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15
HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1
HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1
R44 301/F_4
HT_RXCALP HT_RXCALN
4
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
AC24 AC25 AB25 AB24 AA24 AA25
Y22
Y23 W21 W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23 AA22
M22 M23 R21 R20
C23
A24
U5A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS880/RX881
3
HT_NB_CPU_CAD_H0
PART 1 OF 6
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N
HT_TXCALP HT_TXCALN
D24
HT_NB_CPU_CAD_L0
D25
HT_NB_CPU_CAD_H1
E24
HT_NB_CPU_CAD_L1
E25
HT_NB_CPU_CAD_H2
F24
HT_NB_CPU_CAD_L2
F25
HT_NB_CPU_CAD_H3
F23
HT_NB_CPU_CAD_L3
F22
HT_NB_CPU_CAD_H4
H23
HT_NB_CPU_CAD_L4
H22
HT_NB_CPU_CAD_H5
J25
HT_NB_CPU_CAD_L5
J24
HT_NB_CPU_CAD_H6
K24
HT_NB_CPU_CAD_L6
K25
HT_NB_CPU_CAD_H7
K23
HT_NB_CPU_CAD_L7
K22
HT_NB_CPU_CAD_H8
F21
HT_NB_CPU_CAD_L8
G21
HT_NB_CPU_CAD_H9
G20
HT_NB_CPU_CAD_L9
H21
HT_NB_CPU_CAD_H10
J20
HT_NB_CPU_CAD_L10
J21
HT_NB_CPU_CAD_H11
J18
HT_NB_CPU_CAD_L11
K17
HT_NB_CPU_CAD_H12
L19
HT_NB_CPU_CAD_L12
J19
HT_NB_CPU_CAD_H13
M19
HT_NB_CPU_CAD_L13
L18
HT_NB_CPU_CAD_H14
M21
HT_NB_CPU_CAD_L14
P21
HT_NB_CPU_CAD_H15
P18
HT_NB_CPU_CAD_L15
M18
HT_NB_CPU_CLK_H0
H24
HT_NB_CPU_CLK_L0
H25
HT_NB_CPU_CLK_H1
L21
HT_NB_CPU_CLK_L1
L20
HT_NB_CPU_CTL_H0
M24
HT_NB_CPU_CTL_L0
M25
HT_NB_CPU_CTL_H1
P19
HT_NB_CPU_CTL_L1
R18
HT_TXCALP
B24
HT_TXCALN
B25
R45 301/F_4
2
HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CTL_L[1..0]
signals
HT_TXCALP
HT_TXCALN
HT_RXCALP
HT_RXCALN
HT_CPU_NB_CAD_H[15..0] 3
HT_CPU_NB_CAD_L[15..0] 3
HT_CPU_NB_CLK_H[1..0] 3
HT_CPU_NB_CLK_L[1..0] 3
HT_CPU_NB_CTL_H[1..0] 3
HT_CPU_NB_CTL_L[1..0] 3
HT_NB_CPU_CAD_H[15..0] 3
HT_NB_CPU_CAD_L[15..0] 3
HT_NB_CPU_CLK_H[1..0] 3
HT_NB_CPU_CLK_L[1..0] 3
HT_NB_CPU_CTL_H[1..0] 3
HT_NB_CPU_CTL_L[1..0] 3
RS880M
R430 301 ohm 1%
R434 301 ohm 1%
1
08
This block is for UMA only , Discrete can remove all component
U5D
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
B B
A A
AD14 AD13 AD15 AC16 AE13 AC14
AD16 AE17 AD17
W12
AD18 AB13 AB18
W14
AE12 AD12
Y14
Y12
V14 V15
RS880/RX881
MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)
MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)
MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)
MEM_CKP(NC) MEM_CKN(NC)
MEM_COMPP(NC) MEM_COMPN(NC)
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
SPM_VREF1
R311 *0_4/S
L8BLM18PG181SN1D(180,1.5A)_6 L9BLM18PG181SN1D(180,1.5A)_6
+1.8V +1.1V
15mA 26mA
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
5
4
3
2
RS880M-HT LINK I/F 1/5
Date: Sheet
1
843Monday, March 15, 2010
3A
of
5
PEG_RX15 PEG_RX#15 PEG_RX#14 PEG_RX14 PEG_RX13 PEG_RX#13 PEG_RX12 PEG_RX#12 PEG_RX11 PEG_RX#11 PEG_RX10
D D
PCIE_RXP028 PCIE_RXN028
PCIE_RXP329 PCIE_RXN329
C C
PCIE_RXP433 PCIE_RXN433
PCIE_SB_NB_RX0P12 PCIE_SB_NB_RX0N12 PCIE_SB_NB_RX1P12 PCIE_SB_NB_RX1N12 PCIE_SB_NB_RX2P12 PCIE_SB_NB_RX2N12 PCIE_SB_NB_RX3P12 PCIE_SB_NB_RX3N12
PEG_RX#10 PEG_RX#9 PEG_RX9 PEG_RX8 PEG_RX#8 PEG_RX7 PEG_RX#7 PEG_RX6 PEG_RX#6 PEG_RX5 PEG_RX#5 PEG_RX#4 PEG_RX4 PEG_RX3 PEG_RX#3 PEG_RX#2 PEG_RX2 PEG_RX#1 PEG_RX1 PEG_RX0 PEG_RX#0
U5B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS880/RX881
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)
4
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N
SB_TX3P
SB_TX3N
C_PEG_TX15
A5
C_PEG_TX#15
B5
C_PEG_TX14
A4
C_PEG_TX#14
B4
C_PEG_TX#13 PEG_TX#13
C3
C_PEG_TX13 PEG_TX13
B2
C_PEG_TX12
D1
C_PEG_TX#12
D2
C_PEG_TX#11 PEG_TX#11
E2
C_PEG_TX11 PEG_TX11
E1
C_PEG_TX#10 PEG_TX#10
F4
C_PEG_TX10 PEG_TX10
F3
C_PEG_TX#9 PEG_TX#9
F1
C_PEG_TX9
F2
C_PEG_TX#8 PEG_TX#8
H4
C_PEG_TX8
H3
C_PEG_TX#7
H1
C_PEG_TX7
H2
C_PEG_TX#6
J2
C_PEG_TX6
J1
C_PEG_TX#5
K4
C_PEG_TX5
K3
C_PEG_TX#4
K1
C_PEG_TX4
K2
C_PEG_TX#3
M4
C_PEG_TX3
M3
C_PEG_TX#2
M1
C_PEG_TX2
M2
C_PEG_TX1
N2
C_PEG_TX#1
N1
C_PEG_TX#0
P1
C_PEG_TX0
P2
PCIE_TXP0_C
AC1
PCIE_TXN0_C
AC2 AB4 AB3 AA2 AA1
PCIE_TXP3_C
Y1
PCIE_TXN3_C
Y2
PCIE_TXP4_C
Y4
PCIE_TXN4_C
Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
A_TX0P_CA_TX0P_C A_TX0N_CA_TX0N_C A_TX1P_CA_TX1P_C A_TX1N_CA_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C
NB_PCIECALRP NB_PCIECALRN
C74 0.1U/10V_4 C72 0.1U/10V_4 C77 0.1U/10V_4 C76 0.1U/10V_4 C78 0.1U/10V_4 C79 0.1U/10V_4 C82 0.1U/10V_4 C80 0.1U/10V_4 C83 0.1U/10V_4 C86 0.1U/10V_4 C88 0.1U/10V_4 C90 0.1U/10V_4 C91 0.1U/10V_4 C94 0.1U/10V_4 C97 0.1U/10V_4 C98 0.1U/10V_4 C103 0.1U/10V_4 C119 0.1U/10V_4 C104 0.1U/10V_4 C123 0.1U/10V_4 C120 0.1U/10V_4 C124 0.1U/10V_4 C121 0.1U/10V_4 C122 0.1U/10V_4 C105 0.1U/10V_4 C106 0.1U/10V_4 C107 0.1U/10V_4 C108 0.1U/10V_4 C110 0.1U/10V_4 C109 0.1U/10V_4 C111 0.1U/10V_4 C112 0.1U/10V_4
C115 0.1U/10V_4 C116 0.1U/10V_4
C113 0.1U/10V_4 C114 0.1U/10V_4 C84 0.1U/10V_4 C81 0.1U/10V_4
C89 0.1U/10V_4 C87 0.1U/10V_4 C95 0.1U/10V_4 C92 0.1U/10V_4 C100 0.1U/10V_4 C101 0.1U/10V_4 C117 0.1U/10V_4 C118 0.1U/10V_4
R330 1.27K/F_4 R334 2K/F_4
PEG_TX15 PEG_TX#15 PEG_TX14 PEG_TX#14
PEG_TX12 PEG_TX#12
PEG_TX9 PEG_TX8
PEG_TX#7 PEG_TX7 PEG_TX#6 PEG_TX6 PEG_TX#5 PEG_TX5 PEG_TX#4 PEG_TX4 PEG_TX#3 PEG_TX3 PEG_TX#2 PEG_TX2 PEG_TX1 PEG_TX#1 PEG_TX#0 PEG_TX0
PCIE_TXP0 28
PCIE_TXN0 28
PCIE_TXP3 29
PCIE_TXN3 29
PCIE_TXP4 33 PCIE_TXN4 33
PCIE_NB_SB_TX0P 12 PCIE_NB_SB_TX0N 12 PCIE_NB_SB_TX1P 12 PCIE_NB_SB_TX1N 12 PCIE_NB_SB_TX2P 12 PCIE_NB_SB_TX2N 12 PCIE_NB_SB_TX3P 12 PCIE_NB_SB_TX3N 12
3
+1.1V
PEG_RX#[15:0]17 PEG_RX[15:0]17
TO PCIE-LAN
TO NEW CARD
TO WLAN
2
PEG_RX#[15:0] PEG_TX#[15:0]
PEG_TX[15:0]PEG_RX[15:0]
PEG_TX#[15:0] 17 PEG_TX[15:0] 17
1
9
B B
A A
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
5
4
3
2
RS880M-PCIE I/F 2/5
Date: Sheet
1
943Monday, March 15, 2010
3A
of
5
D D
modify SI
+1.1V
R185 *4.7K_4
for EXT Gen.
C C
R171 *4.7K_4
4
+3V +1.8V +1.8V
HSYNC_INT VSYNC_INT
+1.1V +1.8V
20mA
120mA
NB_PLTRST#12
NB_PWRGD_IN13,16
NBHT_REFCLKP12 NBHT_REFCLKN12
EXT_NB_OSC2
NBREF_CLKP12 NBREF_CLKN12
SBLINK_CLKP12 SBLINK_CLKN12
NB_REFCLK_N
+3V +3V
T2
T4
RP27 *0_4P2R_4
4
2
R373 4.7K_4 R448 4.7K_4
RP28 0_4P2R_4
2
4
R43 *4.7K_4 R52 *4.7K_4 R42 *4.7K_4
+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL
NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP
NBHT_REFCLKP NBHT_REFCLKN
3 1
1 3
JTAG_TDI JTAG_TCK JTAG_TDO JTAG_TMS
STRP_DATA
RS880_AUX_CAL
3
U5C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PW M_GPIO6)
E8
DAC_SDA(PCE_TCALRN)
F8
DAC_SCL(PCE_RCALRN)
G14
DAC_RSET(PW M_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFC LKP)
V3
GPPSB_REFCLKN(SB_REF CLKN)
A9
I2C_DATA
B9
I2C_CLK
B8
DDC_DATA/AUX0N(NC)
A8
DDC_CLK/AUX0P(NC)
B7
AUX1P(NC)
A7
AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS880/RX881
2
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
HPD(NC)
TESTMODE
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
A13 B13
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
D9 D10
D12 AE8
AD8 D13
+1.8V
+1.8V
SUS_STAT#_NB
TEST_EN
R321
1.8K_4
T3
R364 *0_4/S
R365 *3K/F_4
PART 3 OF 6
TXOUT_U1P(PCIE_RESET _GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET _GPIO5)
CRT/TVOUT
LVTM
I
I/O
I/O
PM
I
CLOCKs PLL PWR
MIS.
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC) TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1 )
TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET _GPIO1)
VDDLTP18(NC) VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
TVCLKIN(PW M_GPIO5)
THERMALDIODE_P THERMALDIODE_N
SUS_STAT# 13
NB_THRMDA 31 NB_THRMDC 31
modify PV
1
10
Enables Debug Bus acess
B B
through memory I/O pads and GPIO. 0 : Enable RS880M , Default 1 : Disable RS880M (RX881 use DAC_VSYNC)
Indicates if memory Side port is available or not 0: Reserved 1: Required setting. Select with a pull-up resistor on the strap ( RX881 use DAC_HSYNC)
A A
5
VSYNC_INT
HSYNC_INT
Discrete
R41 3K/F_4
R47 *3K/F_4
Discrete
R46 3K/F_4
+3V
+3V
+1.8V
VDDA18PCIEPLL -PCIE PLL
L41 BLM18PG221SN1D _6
VDDA18HTPLL -HT LINK PLL
L38 BLM18PG221SN1D _6
4
20mils width
+1.8V_VDDA18PCIEPLL
C460
2.2U/6.3V_6
20mils width
+1.8V_VDDA18HTPLL
C418
2.2U/6.3V_6
CPU_LDT_STOP#3,12
ALLOW_LDTSTOP12
3
+1.8V
+
Open
2
Drain
-
3 5
R372 *0_4/S
U29
74LVC07
4
+1.8V
R363
4.7K_4
NB_LDT_STOP#
R369 1K/F_4
NB_ALLOW_LDTSTOP
2
+1.8V
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
1%5'
RS880M-SYSTEM I/F 3/5
Date: Sheet
1
3A
of
10 43Monday, March 15, 2010
5
4
3
2
1
A2
U5F
VSSAPCIE1
D D
VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
H7
J4
R7
VSSAPCIE10
L1
L2
L4
L7
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
M6
N4
P6
R1
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
R2
R4
V7
U4
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
V8
V6
W1
W2
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
W4
W7
W8
Y6
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
GROUND
AA4
AB5
AB1
AB7
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
AC3
AC4
AE1
AE4
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
AE14
AB2
VSSAPCIE39
VSSAPCIE40
D11
VSS1
VSS2
E14
E15
VSS3G8VSS4
J15
VSS5
J12
VSS6
K14
VSS7
M11
VSS8
L15
VSS9
VSS10
PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE
PART 6/6
VDD18_MEM
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
AB15
AB17
AB19
AE20
C419
0.1U/10V_4
C415
0.1U/10V_4
C412
0.1U/10V_4
C453
0.1U/10V_4
VSS33
AB21
VSS34
K11
U5E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDDG18_1(VDD18_1)
G9
VDDG18_2(VDD18_2)
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS880/RX881
PART 5/6
VSSAHT20
J22
L17
L22
L24
G25
H19
L25
+1.1V
M20
N22
P20
R19
R22
R24
R25
H20
1.1V@0.6A
L40 *0_8/S
U22
V19
A25
E22
D23
G22
G24
C C
1.1V@0.7A
L34 *0_8/S
modify PV
1.1V@0.4A
C409
4.7U/6.3V_6
1.8V@0.7A
C455
4.7U/6.3V_6
+1.8V
+1.8V
L35 *0_6/S
L42
+1.1V
B B
BLM21PG221SN1D(220,100M,2A)_8
Y21
W22
W24
W25
AD25
C417
0.1U/10V_4
C458
4.7U/6.3V_6
R323 *0_6/S
L12
N13
M14
C424
4.7U/6.3V_6
C408
4.7U/6.3V_6
C481
0.1U/10V_4
P12
P15
R11
C414
0.1U/10V_4
R14
T12
U14
U11
C423
0.1U/10V_4
C413
0.1U/10V_4
C462
0.1U/10V_4
25mA
U15
V12
W11
Y18
W15
AA14
AB11
AC12
+1.1V_VDDHT
C422
0.1U/10V_4
+1.1V_VDDHTRX
C399
0.1U/10V_4
+1.1V_VDDHTTX
C416
0.1U/10V_4
+1.8V_VDDA18PCIE
C489
0.1U/10V_4
+1.8V_VDDG18_NB
C465 1U/10V_4
VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11
POWER
VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDDG33_1(NC) VDDG33_2(NC)
RX881/RS880 POWER DIFFERENCE TABLE
RX881
+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 GND +1.1V +1.1V +1.8V +1.1V GND
+1.8V/1.5V
+3.3V
+1.1V_VDD_PCIE
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
C542
0.1U/10V_4
C430
0.1U/10V_4
C426
0.1U/10V_4
RS880M without side-port: Connected to GND plane.
+3V_VDDG33
C461
0.1U/10V_4
RS880
+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V
+1.1V
+3.3V +1.8V+1.8V
PIN NAME IOPLLVDD
AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33
C471
0.1U/10V_4
C436
0.1U/10V_4
C444
0.1U/10V_4
C438
0.1U/10V_4
C467 1U/10V_4
C435
0.1U/10V_4
R371 *0_4/S
RX881 RS880
+1.1V GND GND +1.8V GND +1.8V GND GND
+1.8V GND GND NC
1.1V@2.5A
C466 1U/10V_4
0.95~1.1V@10A
C445
0.1U/10V_4
C441
0.1U/10V_4
60mA
+1.1V +3.3VAVDD
+1.1V +1.8V +1.8V +1.8V +1.8V +1.8V NC
VDDPCIE - PCIE-E Main power
R359 *0_8/S
C482
4.7U/6.3V_6
VDDC - Core Logic power
C421
10U/6.3V_8
C449
10U/6.3V_8
+1.1V
+1.1V
+3V
11
A A
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
5
4
3
2
RS880M-POWER5/5
Date: Sheet
1
11 43Monday, March 15, 2010
3A
of
5
4
3
2
1
modify SI
ZTE_PLTRST#34 NB_PLTRST#10 PCIE_RST#17 EPRESS_PLTRST#29 LAN_PLTRST#28
modify PV
D D
PLACE THESE PCIE AC COUPLING CAPS CLOSE TO SB820
KBC_PLTRST#27 MINI_PLTRST#33
PCIE_SB_NB_RX0P9 PCIE_SB_NB_RX0N9 PCIE_SB_NB_RX1P9 PCIE_SB_NB_RX1N9 PCIE_SB_NB_RX2P9 PCIE_SB_NB_RX2N9 PCIE_SB_NB_RX3P9 PCIE_SB_NB_RX3N9
To RS880
PCIE_NB_SB_TX0P9 PCIE_NB_SB_TX0N9 PCIE_NB_SB_TX1P9 PCIE_NB_SB_TX1N9 PCIE_NB_SB_TX2P9 PCIE_NB_SB_TX2N9 PCIE_NB_SB_TX3P9 PCIE_NB_SB_TX3N9
+1.1V_PCIE_VDDR
C C
E_NBHT_CLKP2 E_NBHT_CLKN2
E_SBLINK_CLKP2 E_SBLINK_CLKN2
E_SBSRC_CLKP2 E_SBSRC_CLKN2
SBLINK_CLKP10 SBLINK_CLKN10
NBREF_CLKP10 NBREF_CLKN10
NBHT_REFCLKP10 NBHT_REFCLKN10
CPUCLKP3 CPUCLKN3
CLK_PCIE_VGA17 CLK_PCIE_VGA#17
B B
A A
5
PCIE_LAN_CLKP28 PCIE_LAN_CLKN28
E_MINI1_CLKP2 E_MINI1_CLKN2
PCIE_MINI1_CLKP33 PCIE_MINI1_CLKN33
PCIE_NEW_CLKP29 PCIE_NEW_CLKN29
E_NEW_CLKP2 E_NEW_CLKN2
E_CPUCLKP2 E_CPUCLKN2
E_VGA_CLKP2 E_VGA_CLKN2
E_LAN_CLKP2 E_LAN_CLKN2
E_48M_CR2
CLK_48M_CR30
E_SB_OSC2
C632 22P/50V_4
C633 22P/50V_4
R451 *33_4 R412 33_4 R151 33_4 R419 33_4 R152 33_4 R415 33_4 R148 10K_4
C130 0.1U/10V_4 C129 0.1U/10V_4 C146 0.1U/10V_4 C145 0.1U/10V_4 C154 0.1U/10V_4 C156 0.1U/10V_4 C147 0.1U/10V_4 C151 0.1U/10V_4
R115 590/F_4 R392 2K/F_4
RP11 *0_4P2R_4
4
3
2
RP14 *0_4P2R_4
RP12 *0_4P2R_4
RP13 0_4P2R_4
RP1 *0_4P2R_4
RP2 *0_4P2R_4
RP8 *0_4P2R_4
RP9 *0_4P2R_4
RP5 *0_4P2R_4
RP18 *0_4P2R_4
RP4 *0_4P2R_4
RP16 *0_4P2R_4
RP3 *0_4P2R_4
RP7 *0_4P2R_4
RP10 *0_4P2R_4
RP15 *0_4P2R_4
R145 *0_4 R147 22_4 R149 *0_4
21
Y3 25MHZ
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
R409 1M_4
A_RST#_SB
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C
PCIE_CALRP_SB PCIE_CALRN_SB
NBHT_REFCLKP NBHT_REFCLKN
SBLINK_CLKP SBLINK_CLKN
SBSRC_CLKP SBSRC_CLKN
SBSRC_CLKP SBSRC_CLKN
NBREF_CLKP NBREF_CLKN
NBHT_REFCLKP NBHT_REFCLKN
CPUCLKP CPUCLKN
CLK_PCIE_VGA CLK_PCIE_VGA#
PCIE_LAN_CLKP PCIE_LAN_CLKN
PCIE_MINI1_CLKP PCIE_MINI1_CLKN
PCIE_MINI1_CLKP PCIE_MINI1_CLKN
PCIE_NEW_CLKP PCIE_NEW_CLKN
PCIE_NEW_CLKP PCIE_NEW_CLKN
CPUCLKP CPUCLKN
CLK_PCIE_VGA CLK_PCIE_VGA#
PCIE_LAN_CLKP PCIE_LAN_CLKN
CLK_48M_CR
25M_X1
25M_X2
4
U11A
P1
PCIE_RST#
L1
A_RST#
AD26
A_TX0P
AD27
A_TX0N
AC28
A_TX1P
AC29
A_TX1N
AB29
A_TX2P
AB28
A_TX2N
AB26
A_TX3P
AB27
A_TX3N
AE24
A_RX0P
AE23
A_RX0N
AD25
A_RX1P
AD24
A_RX1N
AC24
A_RX2P
AC25
A_RX2N
AB25
A_RX3P
AB24
A_RX3N
AD29
PCIE_CALRP
AD28
PCIE_CALRN
AA28
GPP_TX0P
AA29
GPP_TX0N
Y29
GPP_TX1P
Y28
GPP_TX1N
Y26
GPP_TX2P
Y27
GPP_TX2N
W28
GPP_TX3P
W29
GPP_TX3N
AA22
GPP_RX0P
Y21
GPP_RX0N
AA25
GPP_RX1P
AA24
GPP_RX1N
W23
GPP_RX2P
V24
GPP_RX2N
W24
GPP_RX3P
W25
GPP_RX3N
M23
PCIE_RCLKP/NB_LNK_CLKP
P23
PCIE_RCLKN/NB_LNK_CLKN
U29
NB_DISP_CLKP
U28
NB_DISP_CLKN
T26
NB_HT_CLKP
T27
NB_HT_CLKN
V21
CPU_HT_CLKP
T21
CPU_HT_CLKN
V23
SLT_GFX_CLKP
T23
SLT_GFX_CLKN
L29
GPP_CLK0P
L28
GPP_CLK0N
N29
GPP_CLK1P
N28
GPP_CLK1N
M29
GPP_CLK2P
M28
GPP_CLK2N
T25
GPP_CLK3P
V25
GPP_CLK3N
L24
GPP_CLK4P
L23
GPP_CLK4N
P25
GPP_CLK5P
M25
GPP_CLK5N
P29
GPP_CLK6P
P28
GPP_CLK6N
N26
GPP_CLK7P
N27
GPP_CLK7N
T29
GPP_CLK8P
T28
GPP_CLK8N
L25
14M_25M_48M_OSC
L26
25M_X1
L27
25M_X2
SB800 A11
IC CTRL(528P) SB710 A14(218-0660017) P/N : AJ066000T01
Part 1 of 5
SB800
PCI CLKS
PCI EXPRESS INTERFACES
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK GENERATOR
ALLOW_LDTSTP/DMA_ACTIVE#
PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
CPU
RTC
PCIRST#
AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8
AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31
FRAME#
DEVSEL#
PCI INTERFACELPC
PERR# SERR#
REQ1#/GPIO40
GNT1#/GPO44 GNT2#/GPO45
CLKRUN#
INTE#/GPIO32 INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0 LPCCLK1
LFRAME#
LDRQ0#
SERIRQ/GPIO48
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
32K_X1 32K_X2
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
3
CBE0# CBE1# CBE2# CBE3#
IRDY#
TRDY#
PAR
STOP#
REQ0#
GNT0#
LOCK#
LAD0 LAD1 LAD2 LAD3
W2 W1 W3 W4 Y1
V2
AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7
AJ6 AG6 AG4 AJ4
H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19
G21 H21 K19 G22 J24
C1 C2 D2
B2 B1
PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4
PCIRST#_L
AD23 AD24 AD25 AD26 AD27
SB820_MEMHOT#
CLKRUN#_R
INTH#
LPC_CLK0 LPC_CLK1
LDRQ0#_SB LDRQ1#_SB
RTC_X1 RTC_X2
INTRUDER_ALERT# +AVBAT
T41
R395 33_4
T72
T74
R397 *0_4/S
T71
modify SI
R452 *22_4
R165 22_4 R169 10_4
T80 T73
20MIL
+AVBAT
20MIL
C724 1U/10V_4
LAD0 27,33,34 LAD1 27,33,34 LAD2 27,33,34 LAD3 27,33,34 LFRAME# 27,33,34
SERIRQ 27,34
R46010K/F_4
+3VS5
ALLOW_LDTSTOP 10
CPU_PROCHOT# 3,31
CPU_PWRGD 3
CPU_LDT_STOP# 3,10
CPU_LDT_RST# 3
12
G3 *SHORT_ PAD1
2
PCI_CLK1 16 PCI_CLK2 16 PCI_CLK3 16 PCI_CLK4 16
PCIRST# 32
R481 499/F_4
+3VRTC_1 +3VRTC
R175 10_4
20MIL20MIL
Change from 0ohm to 1K for safty issue
+3V +3V
AD23 16 AD24 16 AD25 16 AD26 16 AD27 16
SERR# 27
CLKRUN# 27,34
GSENSOR_INT# 31
C205
5.6P/50V_4
C203 22P/50V_4
modify PV
+AVBAT
INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).
R456 *1M/F_4
+AVBAT
C684
0.1U/10V_4
R119
R122
*2.2K_4
*2.2K_4
2
Q12 *MMBT3904
1 3
Y4
R159
*20M_6
CLK_33M_ZTE 34 LPC_CLK0 16 LPC_CLK1 16 CLK_33M_KBC 27 CLK_33M_DEBUG 27,33
for EMI suggestion
4
32.768KHZ
R160 20M_6
C187 18P/50V_4
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
SB820-PCIE/PCI/CPU/LPC 1/4
Date: Sheet
CPU_MEMHOT# 3,6,7
23
1
1
D9
RB501V-40
D8
RB501V-40
20MIL
R168 1K/F_4
20MIL
*85205-0200L
CN16
RTC_X1
RTC_X2
C190 18P/50V_4
modify PV
12 43Monday, March 15, 2010
12
+3VPCU
+VCCRTC_2
1 2
+BAT
12
BAT1
1 2
BAT_CONN
of
3A
5
+3VS5
NC only ,Can't be install
R427 *2.2K_4
R432 *2.2K_4
R423 *2.2K_4
D D
+3V
SCL0/SDATA0 is 3V tolerance AMD datasheet define it
R377 2.2K_4 R376 2.2K_4
+3VS5
SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it
R428 2.2K_4 R422 2.2K_4
+3VS5
SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it
R458 2.2K_4 R459 2.2K_4
+3V
modify PV
R418 4.7K_4
C C
+3VS5
modify MV
R514 *10K_4 R513 *10K_4
C857 *0.1U/10V_4
SB_TEST0
SB_TEST1
SB_TEST2
Clock gen/CPU thermal
PCLK_SMB PDAT_SMB
SB_SMBCLK1 SB_SMBDATA1
SB_SCLK2 SB_SDATA2
RCIN#27
/DDR3/DDR3 thermal/Accelerometer
SUS_STAT#
SYS_RST#
SB_RSMRST# 39
3
2
1
RCIN#_1
Q47 2N7002E
To Azalia
ACZ_SDOUT
B B
ACZ_SYNC
ACZ_BCLK
ACZ_RST#
ACZ_SDIN0
R139 33_4
R138 33_4
R141 33_4
R137 33_4
C166 *10P/50V_4
C163 *10P/50V_4
C169 22P/50V_4
ACZ_SDOUT_AUDIO 25
ACZ_SYNC_AUDIO 25
BIT_CLK_AUDIO 25
ACZ_RST#_AUDIO 25
ACZ_SDIN0 25
Remove short pad
EMI modify PV
To Modem Board
ACZ_SDOUT
ACZ_SYNC
A A
ACZ_BCLK
ACZ_RST#
ACZ_SDIN1
R404 33_4
R402 33_4
R142 33_4
R400 33_4
Remove short pad
5
C625 *10P/50V_4
C620 *10P/50V_4
C172 22P/50V_4
ACZ_SYNC_MDC 29
ACZ_SDOUT_MDC 29
BIT_CLK_MDC 29
EMI modify PV
ACZ_RST#_MDC 29
ACZ_SDIN1 29
SB JTAG
4
modify DB2
SUSB#27
NBSWON1#27,31
SB_PWRGD_IN16
SUS_STAT#10
modify DB2
KBC_SCI#27
DSM#28
modify DB2
PCIE_WAKE#28,29,33
WD_PWRGD10,16
RSMRST#27
NEW_CLKREQ#2,29 LAN_CLKREQ#2,28
WEBCAM_OFF23 MC2_DISABLE33
SPKR25 PCLK_SMB2,5,6,7,29,31,33 PDAT_SMB2,5,6,7,29,31,33
modify DB2
WLAN_CLKREQ#2,33
LP_EN#28
LID_SW#23,27,31
GATEA2027
modify PV
CPU_THERMTRIP#3,18,31
NEW_CPPE#29
PM_THERM#5 ADP_PRES27,36,37
ACZ_SDOUT16
*S/W JTAG DEBUG
4
T77
T43 T42
R512 10K_4
LID_SW#_SB
SUSC#
SB_TEST0 SB_TEST1 SB_TEST2 GATEA20_SB RCIN#_1
CRD_REQ# SYS_RST#
SB_THERMTRIP#
SB_RSMRST#
modify MV
T70
SB_SMBCLK1 SB_SMBDATA1
SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1
SB_JTAG_RST#
CRD_CLKREQ#
LID_SW#_SB
GATEA20_SB
SB_THERMTRIP#
SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#
ACZ_BCLK ACZ_SDOUT ACZ_SDIN0 ACZ_SDIN1
ACZ_SYNC ACZ_RST#
ADP_PRES0
modify PV
T69
D18 RB501V-40
D17 RB501V-40
D22 RB501V-40
R438 150K/F_4
HD audio interface is +3VS5 voltage
R140 *10K/F_4
T81
CN32
+3VS5
1 2 3 4 5 6 7 8
C689 *10P/50V_4
3
U11D
J2
PCI_PME#/GEVENT4#
K1
RI#/GEVENT22#
D3
SPI_CS3#/GBE_STAT1/GEVENT21#
F1
SLP_S3#
H1
SLP_S5#
F2
PWR_BTN#
H5
PWR_GOOD
G6
SUS_STAT#
B3
TEST0
C4
TEST1/TMS
F6
TEST2
AD21
GA20IN/GEVENT0#
AE21
KBRST#/GEVENT1#
K2
LPC_PME#/GEVENT3#
J29
LPC_SMI#/GEVENT23#
H2
GEVENT5#
J1
SYS_RESET#/GEVENT19#
H6
WAKE#/GEVENT8#
F3
IR_RX1/GEVENT20#
J6
THRMTRIP#/SMBALERT#/GEVENT2#
AC19
NB_PWRGD
G1
RSMRST#
AD19
CLK_REQ4#/SATA_IS0#/GPIO64
AA16
CLK_REQ3#/SATA_IS1#/GPIO63
AB21
SMARTVOLT1/SATA_IS2#/GPIO50
AC18
CLK_REQ0#/SATA_IS3#/GPIO60
AF20
SATA_IS4#/FANOUT3/GPIO55
AE19
SATA_IS5#/FANIN3/GPIO59
AF19
SPKR/GPIO66
AD22
SCL0/GPIO43
AE22
SDA0/GPIO47
F5
SCL1/GPIO227
F4
SDA1/GPIO228
AH21
CLK_REQ2#/FANIN4/GPIO62
AB18
CLK_REQ1#/FANOUT4/GPIO61
E1
IR_LED#/LLB#/GPIO184
AJ21
SMARTVOLT2/SHUTDOWN#/GPIO51
H4
DDR3_RST#/GEVENT7#
D5
GBE_LED0/GPIO183
D7
GBE_LED1/GEVENT9#
G5
GBE_LED2/GEVENT10#
K3
GBE_STAT0/GEVENT11#
AA20
CLK_REQG#/GPIO65/OSCIN
H3
BLINK/USB_OC7#/GEVENT18#
D1
USB_OC6#/IR_TX1/GEVENT6#
E4
USB_OC5#/IR_TX0/GEVENT17#
D4
USB_OC4#/IR_RX0/GEVENT16#
E8
USB_OC3#/AC_PRES/TDO/GEVENT15#
F7
USB_OC2#/TCK/GEVENT14#
E7
USB_OC1#/TDI/GEVENT13#
F8
USB_OC0#/TRST#/GEVENT12#
M3
AZ_BITCLK
N1
AZ_SDOUT
L2
AZ_SDIN0/GPIO167
M2
AZ_SDIN1/GPIO168
M1
AZ_SDIN2/GPIO169
M4
AZ_SDIN3/GPIO170
N2
AZ_SYNC
P2
AZ_RST#
T1
GBE_COL
T4
GBE_CRS
L6
GBE_MDCK
L5
GBE_MDIO
T9
GBE_RXCLK
U1
GBE_RXD3
U3
GBE_RXD2
T2
GBE_RXD1
U2
GBE_RXD0
T5
GBE_RXCTL/RXDV
V5
GBE_RXERR
P5
GBE_TXCLK
M5
GBE_TXD3
P9
GBE_TXD2
T7
GBE_TXD1
P7
GBE_TXD0
M7
GBE_TXCTL/TXEN
P4
GBE_PHY_PD
M9
GBE_PHY_RST#
V7
GBE_PHY_INTR
E23
PS2_DAT/SDA4/GPIO187
E24
PS2_CLK/SCL4/GPIO188
F21
SPI_CS2#/GBE_STAT2/GPIO166
G29
FC_RST#/GPO160
D27
PS2KB_DAT/GPIO189
F28
PS2KB_CLK/GPIO190
F29
PS2M_DAT/GPIO191
E27
PS2M_CLK/GPIO192
SB800 A11
3
SB800
Part 4 of 5
GBE LAN
USBCLK/14M_25M_48M_OSC
ACPI / WAKE UP EVENTS
GPIO
USB OC
EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199
HD AUDIO
EC_PWM3/EC_TIMER3/GPIO200
EMBEDDED CTRL
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD0P/GPIO185
USB_HSD13P USB_HSD13N
USB 1.1 USB MISCEMBEDDED CTRL
USB_HSD12P USB_HSD12N
USB_HSD11P USB_HSD11N
USB_HSD10P USB_HSD10N
USB 2.0
SCL2/GPIO193
SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217
KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226
USB_FSD1N
USB_FSD0N
USB_HSD9P USB_HSD9N
USB_HSD8P USB_HSD8N
USB_HSD7P USB_HSD7N
USB_HSD6P USB_HSD6N
USB_HSD5P USB_HSD5N
USB_HSD4P USB_HSD4N
USB_HSD3P USB_HSD3N
USB_HSD2P USB_HSD2N
USB_HSD1P USB_HSD1N
USB_HSD0P USB_HSD0N
2
2
A10 G19
J10 H11
H9 J8
B12 A12
F11 E11
E14 E12
J12 J14
A13 B13
D13 C13
G12 G14
G16 G18
D16 C16
B14 A14
E18 E16
J16 J18
B17 A17
A16 B16
D25 F23 B26 E26 F25 E22 F22 E21
G24 G25 E28 E29 D29 D28 C29 C28
B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22
USB_RCOMP_SB
USBFSDP1+ 32 USBFSDP1- 32
USB_FDS12P USB_FSD12N
USBP9+ 32 USBP9- 32
USBP8+ 33 USBP8- 33
USBP7+ 33 USBP7- 33
USBP6+ 30 USBP6- 30
USBP5+ 29 USBP5- 29
USBP4+ 23 USBP4- 23
USBP3+ 29 USBP3- 29
USBP2+ 29 USBP2- 29
USBP1+ 29 USBP1- 29
USBP0+ 29 USBP0- 29
SB_SCLK2 SB_SDATA2
GPIO199 GPIO200
SUSB#
SUSC#
R433 11.8K/F_6
U10
TC7SH08FU
2 1
U9
TC7SH08FU
2 1
1
13
E_48M_USB 2
for EMI
Finger Printer
T78 T76
BLUETOOTH
WLAN Min-Card
WWAN
USB card reader
USB Connector
Carama USB
USB Connector
E-SATA and USB Connector
New Card
USB Connector
CPU_SIC 3,5
CPU_SID 3,5
GPIO199 16 GPIO200 16
+3VS5
4
3 5
+3VS5
4
3 5
352-(&76;
4XDQWD&RPSXWHU,QF
Size Document Number Rev Custom
SB820-ACPI/GPIO/USB 2/4
Date: Sheet
E_48M_USB
C198 *2.2P/50V_4
MAINON 20,35,36,40,41,43
SUSON 28,40,43
of
13 43Monday, March 15, 2010
1
3A
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