1
2
3
4
5
6
7
8
Stackup
R23 AMD Sabin UMA/Muxless SYSTEM DIAGRAM
TOP
GND
A A
SODIMM1
Max. 4GB
PG.12
DDR3
Channel A
AMD
PCI-E x 8 ( 8 ~ 15 )
DDR3
SODIMM2
Channel B
Llano APU
AMD
Seymour-XT
PP;PP
7'3:
PG.14~18
DDR3 900MHz
VRAM
128x16x4,64bit
PG.19
+3V/+5V
Max. 4GB
PG.13
3&,([
B B
LAN2
Card reader
RTS5219-GR
PG.24
10/100
LAN
RTS8165EH
PG.27 PG.30
10/100
LAN0 LAN1
WLAN
BT COMBO
35mm X 35mm
FS1 socket 722 pin uPGA
TDP 35W
PG.2~5
DP Port 1
UMI
PCI-E ( 0 ~ 3 )
DP Port 0
ANX3110
DP to LVDS
Translator
PG.11
LVDS
HDMI
LVDS
PG.21
PG.20
+1.1V/+1.1VS5
+1.2V/+2.5V
+VCC_CORE
IN1
IN2
VCC
BOT
PG.31
PG.32
PG.33
PG.34
+VDDNB_CORE
CRT
AMD FCH
USB2.0
Ports X 2
C C
USB 2.0
PORT10
SPI
ROM
SPI
LPC
KBC
EnE KB3930QF D2
PG.29
Hudson M2/M3
24.5mm X 24.5mm
656pin FCBGA
TDP 4.7W
PG.6~10
USB 2.0
SATA0
SATA1
PORT0,5
HDD
ODD
Webcam
PG.23
PG.23
PG.20 PG.26
PORT2
CRT
PG.22
BT
Softbreeze
PG.26
PORT15
+1.5VSUS
+1.0V_VGA
+1.8V_VGA
+VGACore
+1.5V_VGA
+3V_VGA
Charger
Azalia
KB TP ROM FAN
AUDIO
D D
CODEC
Speaker
HP/MIC
PG.25
PG.26
IDT92HD80B1
PG.25
1
2
3
Analog MIC
4
PG.25
5
6
7
Discharger
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
PG.35
PG.36
PG.37
PG.38
PG.39
1A
1A
1A
of
of
of
14 0 Tuesday, May 03, 2011
14 0 Tuesday, May 03, 2011
14 0 Tuesday, May 03, 2011
8
5
D D
PEG_RXN8 14
PEG_RXP8 14
P&N swap for
layout concern ,
AMD recommend
TO WLAN
TO PCIE-LAN
TO PCIE CARD READER
C C
PEG_RXP9 14
PEG_RXN9 14
PEG_RXP10 14
PEG_RXN10 14
PEG_RXN11 14
PEG_RXP11 14
PEG_RXP12 14
PEG_RXN12 14
PEG_RXP13 14
PEG_RXN13 14
PEG_RXP14 14
PEG_RXN14 14
PEG_RXP15 14
PEG_RXN15 14
PCIE_RXP0_WLAN 30
PCIE_RXN0_WLAN 30
PCIE_RXP1_LAN 27
PCIE_RXN1_LAN 27
PCIE_RXP2_CARD 24
PCIE_RXN2_CARD 24
UMI_RXP0 7
UMI_RXN0 7
UMI_RXP1 7
UMI_RXN1 7
UMI_RXP2 7
UMI_RXN2 7
UMI_RXP3 7
UMI_RXN3 7
+1.2V
HDT+ Connector for Debug only
U30
B B
APU_RST# 4,7
APU_PWRGD 4,7
APU_RST# APU_RST_L_BUF
APU_PWRGD
U30
1
A1
2
GND
3
A2
*74LVC2G07
*74LVC2G07
VCC
6
Y1
5
4
Y2
4
PEG_RXN8
PEG_RXP8
PEG_RXP9 PEG_TXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXN11
PEG_RXP11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
PCIE_RXP0_WLAN
PCIE_RXN0_WLAN
PCIE_RXP1_LAN
PCIE_RXN1_LAN
PCIE_RXP2_CARD
PCIE_RXN2_CARD
R508 196/F_6 R508 196/F_6
+3V
PV change to short-pad
+1.5V
R873
R873
*0_4/s
*0_4/s
R511
R510
R510
*300/J_4
*300/J_4
R511
*300/J_4
*300/J_4
APU_PWROK_BUF
U29F
U29F
AA8
P_GFX_RXP0
AA9
P_GFX_RXN0
Y7
P_GFX_RXP1
Y8
P_GFX_RXN1
W5
P_GFX_RXP2
W6
P_GFX_RXN2
W8
P_GFX_RXP3
W9
P_GFX_RXN3
V7
P_GFX_RXP4
V8
P_GFX_RXN4
U5
P_GFX_RXP5
U6
P_GFX_RXN5
U8
P_GFX_RXP6
U9
P_GFX_RXN6
T7
P_GFX_RXP7
T8
P_GFX_RXN7
R5
P_GFX_RXP8
R6
P_GFX_RXN8
R8
P_GFX_RXP9
R9
P_GFX_RXN9
P7
P_GFX_RXP10
P8
P_GFX_RXN10
N5
P_GFX_RXP11
N6
P_GFX_RXN11
N8
P_GFX_RXP12
N9
P_GFX_RXN12
M7
P_GFX_RXP13
M8
P_GFX_RXN13
L5
P_GFX_RXP14
L6
P_GFX_RXN14
L8
P_GFX_RXP15
L9
P_GFX_RXN15
AC5
P_GPP_RXP0
AC6
P_GPP_RXN0
AC8
P_GPP_RXP1
AC9
P_GPP_RXN1
AB7
P_GPP_RXP2
AB8
P_GPP_RXN2
AA5
P_GPP_RXP3
AA6
P_GPP_RXN3
AF8
P_UMI_RXP0
AF7
P_UMI_RXN0
AE6
P_UMI_RXP1
AE5
P_UMI_RXN1
AE9
P_UMI_RXP2
AE8
P_UMI_RXN2
AD8
P_UMI_RXP3
AD7
P_UMI_RXN3
K5
P_ZVDDP
Llano APU
Llano APU
PCI EXPRESS
PCI EXPRESS
GRAPHICS
GRAPHICS
GPP
GPP
UMI-LINK
UMI-LINK
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
P_ZVSS
3
note --HDMI P&N can not swap
PEG_HDMI_TXDP2
AA2
PEG_HDMI_TXDN2
AA3
PEG_HDMI_TXDP1
Y2
PEG_HDMI_TXDN1
Y1
PEG_HDMI_TXDP0
Y4
PEG_HDMI_TXDN0
Y5
PEG_HDMI_TXCP
W2
PEG_HDMI_TXCN
W3
V2
V1
V4
V5
swap for layout
U2
concern , AMD
U3
recommend
T2
T1
PEG_TXP8_C
T4
PEG_TXN8_C
T5
PEG_TXP9_C
R2
PEG_TXN9_C
R3
PEG_TXP10_C
P2
PEG_TXN10_C
P1
PEG_TXP11_C
P4
PEG_TXN11_C
P5
PEG_TXP12_C
N2
PEG_TXN12_C
N3
PEG_TXP13_C
M2
PEG_TXN13_C
M1
PEG_TXP14_C
M4
PEG_TXN14_C
M5
PEG_TXP15_C
L2
PEG_TXN15_C
L3
PCIE_TXP0_C
AD4
PCIE_TXN0_C
AD5
PCIE_TXP1_C
AC2
PCIE_TXN1_C
AC3
PCIE_TXP2_C
AB2
PCIE_TXN2_C
AB1
AB4
AB5
UMI_TXP0_C
AF1
UMI_TXN0_C
AF2
UMI_TXP1_C
AF5
UMI_TXN1_C
AF4
UMI_TXP2_C
AE3
UMI_TXN2_C
AE2
UMI_TXP3_C
AD1
UMI_TXN3_C
AD2
P_ZVSS P_ZVDDP
K4
R509 196/F_6 R509 196/F_6
VID Override Circuit
C771 0.1U/10V_4 C771 0.1U/10V_4
C1053 0.1U/10V_4 C1053 0.1U/10V_4
C775 0.1U/10V_4 C775 0.1U/10V_4
C777 0.1U/10V_4 C777 0.1U/10V_4
PEG_TXN8_C
PEG_TXP8_C
PEG_TXN9_C
PEG_TXP9_C
C783 0.1U/10V_4 C783 0.1U/10V_4
C785 0.1U/10V_4 C785 0.1U/10V_4
C787 0.1U/10V_4 C787 0.1U/10V_4
C789 0.1U/10V_4 C789 0.1U/10V_4
C791 0.1U/10V_4 C791 0.1U/10V_4
C793 0.1U/10V_4 C793 0.1U/10V_4
C903 0.1U/10V_4 C903 0.1U/10V_4
C905 0.1U/10V_4 C905 0.1U/10V_4
C907 0.1U/10V_4 C907 0.1U/10V_4
C795 0.1U/10V_4 C795 0.1U/10V_4
C797 0.1U/10V_4 C797 0.1U/10V_4
C799 0.1U/10V_4 C799 0.1U/10V_4
C801 0.1U/10V_4 C801 0.1U/10V_4
Note:
To override VID,Remove Rd, Re, Rf, install Rc
set VID via SVC & SVD option RES.
C779 0.1U/10V_4 C779 0.1U/10V_4
C781 0.1U/10V_4 C781 0.1U/10V_4
+1.5VSUS
C772 0.1U/10V_4 C772 0.1U/10V_4
C774 0.1U/10V_4 C774 0.1U/10V_4
C776 0.1U/10V_4 C776 0.1U/10V_4
C778 0.1U/10V_4 C778 0.1U/10V_4
C780 0.1U/10V_4 C780 0.1U/10V_4
C782 0.1U/10V_4 C782 0.1U/10V_4
C784 0.1U/10V_4 C784 0.1U/10V_4
C786 0.1U/10V_4 C786 0.1U/10V_4
C788 0.1U/10V_4 C788 0.1U/10V_4
C790 0.1U/10V_4 C790 0.1U/10V_4
C792 0.1U/10V_4 C792 0.1U/10V_4
C794 0.1U/10V_4 C794 0.1U/10V_4
C904 0.1U/10V_4 C904 0.1U/10V_4
C906 0.1U/10V_4 C906 0.1U/10V_4
C908 0.1U/10V_4 C908 0.1U/10V_4
C796 0.1U/10V_4 C796 0.1U/10V_4
C798 0.1U/10V_4 C798 0.1U/10V_4
C800 0.1U/10V_4 C800 0.1U/10V_4
C802 0.1U/10V_4 C802 0.1U/10V_4
SI
2
C_TX2_HDMI+
C_TX2_HDMIC_TX1_HDMI+
C_TX1_HDMIC_TX0_HDMI+
C_TX0_HDMIC_TXC_HDMI+
C_TXC_HDMI-
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
+1.5V
PEG_TXP8
PEG_TXN8
PEG_TXN9
C_TX2_HDMI+ 21
C_TX2_HDMI- 21
C_TX1_HDMI+ 21
C_TX1_HDMI- 21
C_TX0_HDMI+ 21
C_TX0_HDMI- 21
C_TXC_HDMI+ 21
C_TXC_HDMI- 21
PEG_TXP8 14
PEG_TXN8 14
PEG_TXP9 14
PEG_TXN9 14
PEG_TXP10 14
PEG_TXN10 14
PEG_TXP11 14
PEG_TXN11 14
PEG_TXP12 14
PEG_TXN12 14
PEG_TXP13 14
PEG_TXN13 14
PEG_TXP14 14
PEG_TXN14 14
PEG_TXP15 14
PEG_TXN15 14
PCIE_TXP0_WALN 30
PCIE_TXN0_WLAN 30
PCIE_TXP1_LAN 27
PCIE_TXN1_LAN 27
PCIE_TXP2_CARD 24
PCIE_TXN2_CARD 24
UMI_TXP0 7
UMI_TXN0 7
UMI_TXP1 7
UMI_TXN1 7
UMI_TXP2 7
UMI_TXN2 7
UMI_TXP3 7
UMI_TXN3 7
HDMI
P_GFX_TXP/N[3:0]
correspond t o DisplayPort 2.
PEG X 8
TO WLAN
TO PCIE-LAN
TO PCIE CARD READER
SVC SVD
000
1
1
1
0
1
VFIX_+VDD
=VCC/GND
1
BOOT VOLTAGE
VFIX_+VDD
=OPEN
1.1 1.1
1.0 1.2
0.9 1.0
0.8 0.8
02
R513
R512
R512
1K/F_4
J1
J1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
*HDT CONN
*HDT CONN
88511-2001-20p-l
88511-2001-20p-l
SVC 4
SVD 4
APU_PWRGD 4,7
APU_PWRGD have pull up 300o hm
to +1.5V on page 4
3
close to HDT
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
A A
debug HEADER
R530 *1K/F_4 R530 *1K/F_4
R531 *1K/F_4 R531 *1K/F_4
R532 *1K/F_4 R532 *1K/F_4
R533 *300/J_4 R533 *300/J_4
+1.5VSUS
APU_TEST18 4
APU_TEST19 4
APU_DBREQ# 4
APU_DBRDY 4
APU_TCK 4
APU_TMS 4
APU_TDI 4
APU_TRST# 4
APU_TDO 4
+1.5VSUS
TP37TP37
APU_TEST18
APU_TEST19
APU_RST_L_BUF
CPU_LDT_RST_HTPA#
APU_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_TDO
APU_PWROK_BUF
DEL AMD HDT debug port
5
4
1K/F_4
SVC
SVD
APU_PWRGD
R513
1K/F_4
1K/F_4
Rd
R517 0_4 R517 0_4
Re
R520 0_4 R520 0_4 R529 *1K/F_4 R529 *1K/F_4
Rf
R523 0_4 R523 0_4
for normal operation
open Ra , Rb,Rc
R516
R516
R514
R515
R515
*1K/J_4
*1K/J_4
R526
R526
*220/J_4
*220/J_4
Ra Rb Rc
2
R514
*1K/J_4
*1K/J_4
*2.2K/J_4
*2.2K/J_4
CPU_SVC
CPU_SVD
CPU_PWRGD_SVID_REG
R528
R528
R527
R527
*220/J_4
*220/J_4
*220/J_4
*220/J_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CPU_SVC 34,35
CPU_SVD 34,35
CPU_PWRGD_SVID_REG 34,35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Llano PCIE/UMI/GPP
Llano PCIE/UMI/GPP
Llano PCIE/UMI/GPP
1
R23
R23
R23
1A
1A
1A
of
of
of
24 0 Wednesday, May 04, 2011
24 0 Wednesday, May 04, 2011
24 0 Wednesday, May 04, 2011
5
4
3
2
1
U29A
M_A_A[15:0] 12 M_B_A[15:0] 13
D D
M_A_BS#[2..0] 12
M_A_DM[7..0] 12
M_A_DQSP0 12
M_A_DQSN0 12
M_A_DQSP1 12
M_A_DQSN1 12
C C
+1.5VSUS
B B
M_A_EVENT# 12
R537 1K/F_4 R537 1K/F_4
+MEMVREF_CPU
C235
C235
220pF/50V_4
220pF/50V_4
MV EMI suggestion
+1.5VSUS
M_A_DQSP2 12
M_A_DQSN2 12
M_A_DQSP3 12
M_A_DQSN3 12
M_A_DQSP4 12
M_A_DQSN4 12
M_A_DQSP5 12
M_A_DQSN5 12
M_A_DQSP6 12
M_A_DQSN6 12
M_A_DQSP7 12
M_A_DQSN7 12
M_A_CLKP0 12
M_A_CLKN0 12
M_A_CLKP1 12
M_A_CLKN1 12
M_A_CKE0 12
M_A_CKE1 12
M_A_ODT0 12
M_A_ODT1 12
M_A_CS#0 12
M_A_CS#1 12
M_A_RAS# 12
M_A_CAS# 12
M_A_WE# 12
M_A_RST# 12
R534 39.2/F_4 R534 39.2/F_4
Place close to APU within 1"
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS#1
M_A_BS#2
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
+MEMVREF_CPU
+M_ZVDDIO
U29A
U20
R20
R21
P22
P21
N24
N23
N20
N21
M21
U23
M22
L24
AA25
L21
L20
U24
U21
L23
E14
J17
E21
F25
AD27
AC23
AD19
AC15
G14
H14
G18
H18
J21
H21
E27
E26
AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15
T21
T22
R23
R24
H28
H27
Y25
AA27
V22
AA26
V21
W24
W23
H25
T24
W20
W21
Llano APU
Llano APU
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CKE0
MA_CKE1
MA_ODT0
MA_ODT1
MA_CS_L0
MA_CS_L1
MA_RAS_L
MA_CAS_L
MA_WE_L
MA_RESET_L
MA_EVENT_L
M_VREF
M_ZVDDIO
MEMORY CHANNEL A
MEMORY CHANNEL A
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
M_A_DQ0
E13
M_A_DQ1
J13
M_A_DQ2
H15
M_A_DQ3
J15
M_A_DQ4
H13
M_A_DQ5
F13
M_A_DQ6
F15
M_A_DQ7
E15
M_A_DQ8
H17
M_A_DQ9
F17
M_A_DQ10
E19
M_A_DQ11
J19
M_A_DQ12
G16
M_A_DQ13
H16
M_A_DQ14
H19
M_A_DQ15
F19
M_A_DQ16
H20
M_A_DQ17
F21
M_A_DQ18
J23
M_A_DQ19
H23
M_A_DQ20
G20
M_A_DQ21
E20
M_A_DQ22
G22
M_A_DQ23
H22
M_A_DQ24
G24
M_A_DQ25
E25
M_A_DQ26
G27
M_A_DQ27
G26
M_A_DQ28
F23
M_A_DQ29
H24
M_A_DQ30
E28
M_A_DQ31
F27
M_A_DQ32
AB28
M_A_DQ33
AC27
M_A_DQ34
AD25
M_A_DQ35
AA24
M_A_DQ36
AE28
M_A_DQ37
AD28
M_A_DQ38
AB26
M_A_DQ39
AC25
M_A_DQ40
Y23
M_A_DQ41
AA23
M_A_DQ42
Y21
M_A_DQ43
AA20
M_A_DQ44
AB24
M_A_DQ45
AD24
M_A_DQ46
AA21
M_A_DQ47
AC21
M_A_DQ48
AA19
M_A_DQ49
AC19
M_A_DQ50
AC17
M_A_DQ51
AA17
M_A_DQ52
AB20
M_A_DQ53
Y19
M_A_DQ54
AD18
M_A_DQ55
AD17
M_A_DQ56
AA16
M_A_DQ57
Y15
M_A_DQ58
AA13
M_A_DQ59
AC13
M_A_DQ60
Y17
M_A_DQ61
AB16
M_A_DQ62
AB14
M_A_DQ63
Y13
Soldermask openings for all botto m side vias/TPs under FS1
M_A_DQ[0..63] 12
M_B_BS#[2..0] 13
M_B_DM[7..0] 13
+1.5VSUS
M_B_DQSP0 13
M_B_DQSN0 13
M_B_DQSP1 13
M_B_DQSN1 13
M_B_DQSP2 13
M_B_DQSN2 13
M_B_DQSP3 13
M_B_DQSN3 13
M_B_DQSP4 13
M_B_DQSN4 13
M_B_DQSP5 13
M_B_DQSN5 13
M_B_DQSP6 13
M_B_DQSN6 13
M_B_DQSP7 13
M_B_DQSN7 13
M_B_CLKP0 13
M_B_CLKN0 13
M_B_CLKP1 13
M_B_CLKN1 13
M_B_CKE0 13
M_B_CKE1 13
M_B_ODT0 13
M_B_ODT1 13
M_B_CS#0 13
M_B_CS#1 13
M_B_RAS# 13
M_B_CAS# 13
M_B_WE# 13
M_B_RST# 13
M_B_EVENT# 13
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
R541 1K/F_4 R541 1K/F_4
220pF/50V_4
220pF/50V_4
C252
C252
MV EMI suggestion
U29B
U29B
T27
MB_ADD0
P24
MB_ADD1
P25
MB_ADD2
N27
MB_ADD3
N26
MB_ADD4
M28
MB_ADD5
M27
MB_ADD6
M24
MB_ADD7
M25
MB_ADD8
L26
MB_ADD9
U26
MB_ADD10
L27
MB_ADD11
K27
MB_ADD12
W26
MB_ADD13
K25
MB_ADD14
K24
MB_ADD15
U27
MB_BANK0
T28
MB_BANK1
K28
MB_BANK2
D14
MB_DM0
A18
MB_DM1
A22
MB_DM2
C25
MB_DM3
AF25
MB_DM4
AG22
MB_DM5
AH18
MB_DM6
AD14
MB_DM7
C15
MB_DQS_H0
B15
MB_DQS_L0
E18
MB_DQS_H1
D18
MB_DQS_L1
E22
MB_DQS_H2
D22
MB_DQS_L2
B26
MB_DQS_H3
A26
MB_DQS_L3
AG24
MB_DQS_H4
AG25
MB_DQS_L4
AG21
MB_DQS_H5
AF21
MB_DQS_L5
AG17
MB_DQS_H6
AG18
MB_DQS_L6
AH14
MB_DQS_H7
AG14
MB_DQS_L7
R26
MB_CLK_H0
R27
MB_CLK_L0
P27
MB_CLK_H1
P28
MB_CLK_L1
J26
MB_CKE0
J27
MB_CKE1
W27
MB_ODT0
Y28
MB_ODT1
V25
MB_CS_L0
Y27
MB_CS_L1
V24
MB_RAS_L
V27
MB_CAS_L
V28
MB_WE_L
J25
MB_RESET_L
T25
MB_EVENT_L
Llano APU
Llano APU
MEMORY CHANNEL B
MEMORY CHANNEL B
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
A14
B14
D16
E16
B13
C13
B16
A16
C17
B18
B20
A20
E17
B17
B19
C19
C21
B22
C23
A24
D20
B21
E23
B23
E24
B25
B27
D28
B24
D24
D26
C27
AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24
AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20
AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16
AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15 M_A_BS#0
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
03
M_B_DQ[0..63] 13
+1.5VSUS
R809
R809
1K/F_4
1K/F_4
A A
R811
R811
1K/F_4
1K/F_4
5
Reserved for AMD suggest
R808 0_4 R808 0_4
+3VS5
C417 *.1U/10V_4 C417 *.1U/10V_4
5 2
U43
+MEMVREF
C1047
C1047
*0.47u/6.3V_4
*0.47u/6.3V_4
U43
3
+
+
4
-
-
*OPA343NA/3K
*OPA343NA/3K
R813 *0_4 R813 *0_4
R814 *0_4 R814 *0_4
1
1 2
R812
R812
*10K/F_4
*10K/F_4
4
+MEMVREF_CPU
R867 *0_4 R867 *0_4 R810 *10_4 R810 *10_4
Reserved
C274
C274
220pF/50V_4
220pF/50V_4
3
DDR_VTTREF 12,13,36
MV EMI suggestion
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
Llano DDR3 MEM I/F
Llano DDR3 MEM I/F
Llano DDR3 MEM I/F
R23
R23
R23
1A
1A
1A
of
of
of
34 0 Wednesday, May 04, 2011
34 0 Wednesday, May 04, 2011
1
34 0 Wednesday, May 04, 2011
5
INT_eDP_TXP0 11
DP0 output to
eDP to LVDS converter
INT_eDP_TXN0 11
INT_eDP_TXP1 11
INT_eDP_TXN1 11
Display port power 1.5V min 1.2v max : 1.65v
D D
DP1 output to Hudson-M2
for VGA translator interface
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
C C
+1.5VSUS
R587
R587
R588
R588
10K/F_4
10K/F_4
1K/F_4
1K/F_4
B B
FCH_THERMTRIP# 6
MMBT3904-7-F
MMBT3904-7-F
THERMTRIP# shutdown temperature 125⹎ ⹎⹎⹎C
2
Q49
Q49
1 3
APU_THERMTRIP#
APU_DP_TXP0 8
APU_DP_TXN0 8
APU_DP_TXP1 8
APU_DP_TXN1 8
APU_DP_TXP2 8
APU_DP_TXN2 8
APU_DP_TXP3 8
APU_DP_TXN3 8
CLK_APU_P 7
CLK_APU_N 7
CLK_DP_P 7
CLK_DP_N 7
SVC 2
SVD 2
APU_RST# 2,7
APU_PWRGD 2,7
+1.5VSUS
CPU_VDDNB_RUN_FB_L 35
CPU_VDD0_RUN_FB_L 34
VDDP_FB_H 33
CPU_VDDNB_RUN_FB_H 35
VDDIO_FB_H 36
CPU_VDD0_RUN_FB_H 34
Thermal
Q47
Q47
MMBT3904-7-F
MMBT3904-7-F
2
2 1
1 3
SMBALERT#
3
Q48
Q48
*2N7002E-G
*2N7002E-G
A A
1
R590 *10K/F_4 R590 *10K/F_4
2
D24 *CH501H-40PT D24 *CH501H-40PT
2 1
D14
D14
CH501H-40PT
CH501H-40PT
R586 10K/F_4 R586 10K/F_4
3920_RST#
ECPWROK
ADD VGA TEMP_ FAIL function is active Hi
5
3920_RST# 29
ECPWROK 10,17,29
+3V
VGA_ALERT 15
HWPG 20,29,31,32,33,36
SMBALERT#
over 120 degree C= Low
4
Place caps with APU < 1 inch
route PCIE as 85ohm +/- 10%
C805 0.1U/10V_4 C805 0.1U/10V_4
C807 0.1U/10V_4 C807 0.1U/10V_4
C809 0.1U/10V_4 C809 0.1U/10V_4
C811 0.1U/10V_4 C811 0.1U/10V_4
C813 0.1U/10V_4 C813 0.1U/10V_4
C814 0.1U/10V_4 C814 0.1U/10V_4
C815 0.1U/10V_4 C815 0.1U/10V_4
C816 0.1U/10V_4 C816 0.1U/10V_4
C817 0.1U/10V_4 C817 0.1U/10V_4
C818 0.1U/10V_4 C818 0.1U/10V_4
C819 0.1U/10V_4 C819 0.1U/10V_4
C820 0.1U/10V_4 C820 0.1U/10V_4
R553 300/J_4 R553 300/J_4
+1.5V
R554 300/J_4 R554 300/J_4
+1.5V
R555 1K/F_4 R555 1K/F_4
APU_TDI 2
APU_TDO 2
APU_TCK 2
APU_TMS 2
APU_TRST# 2
APU_DBRDY 2
APU_DBREQ# 2
PV change to short-pad
R560 *0_4/s R560 *0_4/s
R562 *0_4/s R562 *0_4/s
+5VPCU +3VPCU
R583
R583
10K/F_4
10K/F_4
DEL Thermal IC circuit on MV
4
C821
C821
*1U/6.3V_4
*1U/6.3V_4
1 2
R580 *0_4/S R580 *0_4/S
U29C
U29C
INT_eDP_TXP0_C
INT_eDP_TXN0_C
INT_eDP_TXP1_C
INT_eDP_TXN1_C
TP1TP1
TP2TP2
TP3TP3
TP4TP4
APU_DP_TXP0_C
APU_DP_TXN0_C
APU_DP_TXP1_C
APU_DP_TXN1_C
APU_DP_TXP2_C
APU_DP_TXN2_C
APU_DP_TXP3_C
APU_DP_TXN3_C
CLK_APU_P
CLK_APU_N
CLK_DP_P
CLK_DP_N
SVC
SVD
APU_SIC
APU_SID
APU_RST#
APU_PWRGD
APU_PROCHOT#
APU_THERMTRIP#
APU_ALERT
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
VSS_SENSE
VDDP_FB_H
CPU_VDDNB_RUN_FB_H
VDDIO_FB_H
CPU_VDD0_RUN_FB_H
VDDP_FB_H
FCH_PROCHOT# 7
H_PROCHOT# 29
U31
U31
*G718
*G718
1
VCC
2
GND
3
OT1
4
OT2
:KHQ.17&& .
7KHUPDO7ULS &
F2
DP0_TXP0
F1
DP0_TXN0
E3
DP0_TXP1
E2
DP0_TXN1
D2
DP0_TXP2
D1
DP0_TXN2
C2
DP0_TXP3
C3
DP0_TXN3
K2
DP1_TXP0
K1
DP1_TXN0
J3
DP1_TXP1
J2
DP1_TXN1
H2
DP1_TXP2
H1
DP1_TXN2
G2
DP1_TXP3
G3
DP1_TXN3
AH7
CLKIN_H
AH6
CLKIN_L
AH4
DISP_CLKIN_H
AH3
DISP_CLKIN_L
B8
SVC
A8
SVD
AH11
SIC
AG11
SID
AF10
RESET_L
AE10
PWROK
AD10
PROCHOT_L
AG12
THERMTRIP_L
AH12
ALERT_L
C12
TDI
A12
TDO
A11
TCK
D12
TMS
B12
TRST_L
B11
DBRDY
C11
DBREQ_L
E8
RSVD_1
K21
RSVD_2
AC11
RSVD_3
B9
VSS_SENSE
C8
VDDP_SENSE
A9
VDDNB_SENSE
B10
VDDIO_SENSE
C9
VDD_SENSE
A10
VDDR_SENSE
Llano APU
Llano APU
APU_PROCHOT# ⎗ ⎗⎗⎗ẍẍẍẍ䔞䔞䔞䔞 input or output
䔞䔞䔞䔞 Low 㗪㗪㗪㗪 CPU 㚫㚫㚫㚫旵旵旵旵 P - STATE
R584 *0_4/s R584 *0_4/s
R830 0_4 R830 0_4
to EC reserve only
C278
C278
220pF/50V_4
220pF/50V_4
8
TMSNS1
R833 *8.87K/F_4 R833 *8.87K/F_4
7
RHYST1
6
TMSNS2
5
RHYST2
3
ANALOG/DISPLAY/MISC
ANALOG/DISPLAY/MISC
R581 *8.87K/F_4 R581 *8.87K/F_4
DP0_AUXP
DP0_AUXN
DP1_AUXP
DP1_AUXN
DP2_AUXP
DP2_AUXN
DP3_AUXP
DISPLAY
PORT 0
DISPLAY
PORT 0
DP3_AUXN
DP4_AUXP
DP4_AUXN
DP5_AUXP
DP5_AUXN
DISPLAY PORT
MISC.
DISPLAY PORT
MISC.
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DISPLAY
PORT 1
DISPLAY
PORT 1
DP4_HPD
DP5_HPD
DP_BLON
DP_DIGON
DP_VARY_BL
DP_AUX_ZVSS
TEST6
TEST9
TEST10
TEST12
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST21
TEST22
TEST
TEST
TEST23
JTAG CTRL SER. CLK
JTAG CTRL SER. CLK
RSVD
RSVD
SENSE
SENSE
PV change to short-pad
TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
FS1R1
DMAACTIVE_L
TEST4
TEST5
+1.5V
APU_PROCHOT#
PV inner document ADD R830 for EC request
R831
R831
*11.5K/F_4
*11.5K/F_4
R834 *100K_6 NTC R834 *100K_6 NTC
3
INT_eDP_AUXP_C
D4
INT_eDP_AUXN_C
D5
APU_DP_AUXP_C
E5
APU_DP_AUXN_C
E6
INT_HDMI_AUXP
J5
INT_HDMI_AUXN
J6
H4
H5
Display port power 1.5V min 1.2v max : 1.65v
G5
G6
F4
F5
FCH_LVDS_HPD
D7
FCH_VGA_HPD
E7
HDMI_HPD_Q
J7
H7
G7
F7
APU_BLEN
C6
APU_DIGON
C5
C7
DP_AUX_ZVSS
D8
APU_TEST6
AA10
APU_TEST9
G10
APU_TEST10
H10
APU_TEST12_SCANSHIFTEND
H12
APU_TEST14_BP0
D9
APU_TEST15_BP1
E9
APU_TEST16_BP2
G9
APU_TEST17_BP3
H9
APU_TEST18
H11
APU_TEST19
G11
APU_TEST20_SCANCLK2
F12
APU_TEST21_SCANEN
E11
APU_TEST22_SCANSHIFTEN
D11
APU_TEST23
F10
APU_TEST24_SCANCLK1
G12
APU_TEST25_H
AH10
APU_TEST25_L
AH9
APU_TEST28_H
K7
APU_TEST28_L
K8
ANATSTIN_H
AA12
ANATSTIN_L
AB12
M_TEST
K22
APU_TEST32_H
AB11
APU_TEST32_L
AA11
APU_TEST35
D10
FS1R1
Y11
DMAACTIVE_L
AB10
CPU_THERMDA
AE12
CPU_THERMDC
AD12
C806 0.1U/10V_4 C806 0.1U/10V_4
C808 0.1U/10V_4 C808 0.1U/10V_4
C810 0.1U/10V_4 C810 0.1U/10V_4
C812 0.1U/10V_4 C812 0.1U/10V_4
R550 150/F_4 R550 150/F_4
R563 10K/F_4 R563 10K/F_4
AMD internal test only
SI
R579
R579
1K/F_4
1K/F_4
R832
R832
*11.5K/F_4
*11.5K/F_4
1 2
R835 *100K_6 NTC R835 *100K_6 NTC
2
INT_eDP_AUXP 11
INT_eDP_AUXN 11
APU_DP_AUXP 8
APU_DP_AUXN 8
INT_HDMI_AUXP 21
INT_HDMI_AUXN 21
FCH_LVDS_HPD 11
FCH_VGA_HPD 8
HDMI_HPD_Q 21
APU_BLEN 20
APU_DIGON 20
APU_BLPWM 11
TP5TP5
TP6TP6
TP7TP7
TP8TP8
TP9TP9
TP10TP10
TP11TP11
TP12TP12
TP13TP13
TP14TP14
TP15TP15
TP16TP16
TP17TP17
+3VS5
TP38TP38
TP39TP39
FS1R1 signals is for detect CPU TYPE and protect it.
FS1R1 CPU this pin is N.C
FS1R2 CPU this pin is LOW
can remove it at MP
1 2
TP18TP18
TP19TP19
TP20TP20
TP21TP21
TP22TP22
TP23TP23
DMAACTIVE_L controls
entry and exit from the
TP24TP24
TP25TP25
sleep and power stat es
R568 *1K/F_4 R568 *1K/F_4
R571 1K/F_4 R571 1K/F_4
MBDATA2 29
2
APU_TEST18 2
APU_TEST19 2
+1.5V
+1.5VSUS
MBCLK2 29
M_TEST CONNECTION TBD
To AMD HDT
DMAACTIVE_L 7
MBCLK2
MBDATA2
1
LVDS
VGA
HDMI
INT_eDP_AUXP
INT_eDP_AUXN
INT_eDP_AUXP_C
INT_eDP_AUXN_C
APU_DP_AUXP
APU_DP_AUXN
APU_DP_AUXP_C
APU_DP_AUXN_C
APU_TEST25_L
APU_TEST9
APU_TEST12_SCANSHIFTEND
APU_TEST18
APU_TEST19
APU_TEST20_SCANCLK2
APU_TEST21_SCANEN
APU_TEST22_SCANSHIFTEN
APU_TEST24_SCANCLK1
APU_TEST25_H
+1.5VSUS
R548
R548
*39.2/F_4
*39.2/F_4
R551
R551
39.2/F_4
39.2/F_4
R542 *100K/F_4 R542 *100K/F_4
R543 *100K/F_4 R543 *100K/F_4
R858 1.8K/J_4 R858 1.8K/J_4
R859 1.8K/J_4 R859 1.8K/J_4
R860 100K/F_4 R860 100K/F_4
R861 100K/F_4 R861 100K/F_4
R544 1.8K/J_4 R544 1.8K/J_4
R545 1.8K/J_4 R545 1.8K/J_4
APU_TEST35 M_TEST
TEST35 PU FOR INTERNAL
TEST35 PD FOR CUSTOMER
R556 510/J_4 R556 510/J_4
PV change to short-pad
R557 *0_4/s R557 *0_4/s
R558 1K/F_4 R558 1K/F_4
R559 1K/F_4 R559 1K/F_4
R561 1K/F_4 R561 1K/F_4
R564 1K/F_4 R564 1K/F_4
R566 1K/F_4 R566 1K/F_4
R567 1K/F_4 R567 1K/F_4
R569 1K/F_4 R569 1K/F_4
R570 510/J_4 R570 510/J_4
SI
+1.5VSUS +1.5VSUS
R575
R574
R574
1K/F_4
1K/F_4
APU_SIC
APU_SID
1
R575
1K/F_4
1K/F_4
R23
R23
R23
R573
R573
R572
R572
2K/F_4
2K/F_4
2K/F_4
2K/F_4
Q44
Q44
MMBT3904-7-F
MMBT3904-7-F
2
1 3
2 1
D12 RB501V-40 D12 RB501V-40
Q46
Q46
MMBT3904-7-F
MMBT3904-7-F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
1 3
2 1
D13 RB501V-40 D13 RB501V-40
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Llano Display/Misc
Llano Display/Misc
Llano Display/Misc
04
+3V
+3V
+1.5VSUS
+1.2V
of
of
of
44 0 Wednesday, May 04, 2011
44 0 Wednesday, May 04, 2011
44 0 Wednesday, May 04, 2011
R549
R549
300/J_4
300/J_4
R552
R552
*300/J_4
*300/J_4
1A
1A
1A
5
APU POWER TABLE
C830
C830
22U/6.3VS_8
22U/6.3VS_8
NET NAME
+VCC_CORE
+VDDNB_CORE
+1.5VSUS
+1.2V_VDDP
+1.2V_VDDR
+2.5V_VDDA
C831
C831
22U/6.3VS_8
22U/6.3VS_8
C845
C845
0.22U/6.3V_4
0.22U/6.3V_4
VOLTAGE
+1.1V
??
+1.5V
+1.2V VDDP
+2.5V
C832
C832
22U/6.3VS_8
22U/6.3VS_8
18A
C833
C833
22U/6.3VS_8
22U/6.3VS_8
C842
C842
0.22U/6.3V_4
0.22U/6.3V_4
C834
C834
0.22U/6.3V_4
0.22U/6.3V_4
C843
C843
180P/50V_4
180P/50V_4
+VDDNB_CORE
C844
C844
180P/50V_4
180P/50V_4
+VDDNB_CORE +VDDNB_CORE
PIN NAME
VDD
VDDNB
VDDIO
VDDR +1.2V
D D
VDDA
C C
Maximum IDDNBspike 22.5A
4A Up to DDR3-1333 @ 1.50V VDDIO
C855
+1.2V_VDDP_A
C867
C867
0.22U/6.3V_4
0.22U/6.3V_4
+1.2V_VDDR_A
C875
C875
0.22U/6.3V_4
0.22U/6.3V_4
C855
180P/50V_4
180P/50V_4
EMI reserve
C869
C869
180P/50V_4
180P/50V_4
C876
C876
0.22U/6.3V_4
0.22U/6.3V_4
C887
C887
180P/50V_4
180P/50V_4
180P/50V_4
180P/50V_4
1.75A 1.75A
C852
C851
C851
0.22U/6.3V_4
0.22U/6.3V_4
B B
+1.2V
+1.2V
R592 *0_8/S R592 *0_8/S
C852
0.22U/6.3V_4
0.22U/6.3V_4
R591 *0_8/S R591 *0_8/S
C853
C853
0.22U/6.3V_4
0.22U/6.3V_4
VDDP_A + VDDP_B = 3.5A
C864
C864
10U/6.3V_8
10U/6.3V_8
C872
C871
C871
1000P/50V_4
1000P/50V_4
C872
1000P/50V_4
1000P/50V_4
C883
C883
4.7U/6.3V_6
4.7U/6.3V_6
C854
C854
0.22U/6.3V_4
0.22U/6.3V_4
C884
C884
4.7U/6.3V_6
4.7U/6.3V_6
4
+VCC_CORE +VCC_CORE
C856
C856
C888
C888
180P/50V_4
180P/50V_4
AE11
AF11
M10
M18
G28
M20
M23
M26
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9
C1
D3
D6
E1
F3
F6
F8
G1
H3
H6
H8
J1
K3
K6
L1
L11
L19
M3
M6
N1
N11
N19
P3
P6
P10
P18
R1
R11
R19
T3
J9
J10
J11
J12
J14
J16
K9
K10
H26
J28
K20
K23
K26
L22
L25
L28
N22
N25
N28
P20
P23
P26
U29D
U29D
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
VDDP_A_1
VDDP_A_2
VDDP_A_3
VDDP_A_4
VDDR_1
VDDR_2
VDDR_3
VDDR_4
VDDA_1
VDDA_2
Llano APU
Llano APU
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36
VDDP_B_1
VDDP_B_2
VDDP_B_3
VDDP_B_4
VDDR_5
VDDR_6
VDDR_7
VDDR_8
T6
T10
T18
U1
U11
U19
V3
V6
V10
V18
W1
W11
W13
W15
W17
W19
Y3
Y6
Y10
Y12
Y14
Y16
Y18
Y20
AA1
AB3
AB6
AC1
AD3
AD6
AE1
K11
K12
K13
K14
K16
K17
K18
L18
R22
R25
R28
T20
T23
T26
U22
U25
U28
V20
V23
V26
W22
W25
W28
Y24
Y26
AA28
A3
A4
B3
B4
A5
A6
B5
B6
3
36A
Maximum IDDspike 50A
C823
C823
22U/6.3VS_8
22U/6.3VS_8
C835
C835
0.22U/6.3V_4
0.22U/6.3V_4
C824
C824
22U/6.3VS_8
22U/6.3VS_8
C836
C836
0.22U/6.3V_4
0.22U/6.3V_4
C825
C825
22U/6.3VS_8
22U/6.3VS_8
DECOUPLING between PROCESSOR and DIMMs
+1.5VSUS +1.5VSUS
C857
C857
C858
C858
22U/6.3VS_8
22U/6.3VS_8
22U/6.3VS_8
22U/6.3VS_8
If the VSS plane is cut to create a VDDIO plane,
ceramic capacitors are connected across
the VDDIO and VSS plane split as follows
+1.2V_VDDP_B
C866
C866
10U/6.3V_8
10U/6.3V_8
C874
C874
1000P/50V_4
1000P/50V_4
C889
C889
180P/50V_4
180P/50V_4
1.5A 1.5A
C885
C885
4.7U/6.3V_6
4.7U/6.3V_6
C865
C865
10U/6.3V_8
10U/6.3V_8
+1.2V_VDDR_B
C873
C873
1000P/50V_4
1000P/50V_4
C886
C886
4.7U/6.3V_6
4.7U/6.3V_6
C827
C846
C846
C860
C860
4.7U/6.3V_6
4.7U/6.3V_6
C838
C838
180P/50V_4
180P/50V_4
180P/50V_4
180P/50V_4
C878
C878
0.22U/6.3V_4
0.22U/6.3V_4
C827
22U/6.3VS_8
22U/6.3VS_8
C839
C839
0.01U/25V_4
0.01U/25V_4
C847
C847
0.22U/6.3V_4
0.22U/6.3V_4
C861
C861
4.7U/6.3V_6
4.7U/6.3V_6
R824 *0_8/S R824 *0_8/S
C870
C870
R825 *0_8/S R825 *0_8/S
VDDR = 3A ( Up to DDR3-1333 @ 1.5V )
C826
C826
22U/6.3VS_8
22U/6.3VS_8
C837
C837
180P/50V_4
180P/50V_4
Across VDDIO and VSS split
+1.5VSUS
0.22U/6.3V_4
0.22U/6.3V_4
C859
C859
4.7U/6.3V_6
4.7U/6.3V_6
C868
C868
0.22U/6.3V_4
0.22U/6.3V_4
C877
C877
0.22U/6.3V_4
0.22U/6.3V_4
C890
C890
180P/50V_4
180P/50V_4
2
C388
C388
470P/50V_4
470P/50V_4
*470P/50V_4
*470P/50V_4
PV ADD 470pF on C388 for EMI suggestion
C828
C828
C829
C829
22U/6.3VS_8
22U/6.3VS_8
22U/6.3VS_8
22U/6.3VS_8
C841
C841
C840
C840
0.01U/25V_4
0.01U/25V_4
0.01U/25V_4
0.01U/25V_4
C849
+1.2V
C849
180P/50V_4
180P/50V_4
C863
C863
0.22U/6.3V_4
0.22U/6.3V_4
C848
C848
180P/50V_4
180P/50V_4
C862
C862
4.7U/6.3V_6
4.7U/6.3V_6
+1.2V
C383
C383
+VCC_CORE
C371
C371
*470P/50V_4
*470P/50V_4
SI EMI
U29E
U29E
A7
VSS_1
A13
VSS_2
A15
VSS_3
A17
VSS_4
A19
VSS_5
A21
VSS_6
A23
VSS_7
A25
VSS_8
B7
VSS_9
C4
VSS_10
C10
VSS_11
C14
VSS_12
C16
VSS_13
C18
VSS_14
C20
VSS_15
C22
VSS_16
C24
VSS_17
C26
VSS_18
C28
VSS_19
D13
VSS_20
D15
VSS_21
D17
VSS_22
D19
VSS_23
D21
VSS_24
D23
VSS_25
D25
VSS_26
D27
VSS_27
E4
VSS_28
E10
VSS_29
E12
VSS_30
F9
VSS_31
F11
VSS_32
F14
VSS_33
F16
VSS_34
F18
VSS_35
F20
VSS_36
F22
VSS_37
F24
VSS_38
F26
VSS_39
F28
VSS_40
G4
VSS_41
G8
VSS_42
G13
VSS_43
G15
VSS_44
G17
VSS_45
G19
VSS_46
G21
VSS_47
G23
VSS_48
G25
VSS_49
J4
VSS_50
J8
VSS_51
J18
VSS_52
J20
VSS_53
J22
VSS_54
J24
VSS_55
K19
VSS_56
L4
VSS_57
L7
VSS_58
L10
VSS_59
M9
VSS_60
M11
VSS_61
M19
VSS_62
N4
VSS_63
N7
VSS_64
N10
VSS_65
N18
VSS_66
P9
VSS_68
P11
VSS_67
P19
VSS_69
R4
VSS_70
R7
VSS_71
R10
VSS_72
R18
VSS_73
T9
VSS_74
Llano APU
Llano APU
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
1
05
T11
T19
U4
U7
U10
U18
V9
V11
V19
W4
W7
W10
W12
W14
W16
W18
Y9
Y22
AA4
AA7
AB9
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AC4
AC7
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26
AC28
AD9
AD11
AE4
AE7
AE13
AE15
AE17
AE19
AE21
AE23
AE25
AE27
AF3
AF6
AF9
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AH5
AH8
AH13
AH15
AH17
AH19
AH21
AH23
AH25
A A
L62
L62
+2.5V
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
5
+2.5V_VDDA
C879
C879
4.7U/6.3V_6
4.7U/6.3V_6
VDDA= 0.75A
C880
C880
0.22U/6.3V_4
0.22U/6.3V_4
C881
C881
3300P/50V_4
3300P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
PROJECT :
Llano POWER/GND
Llano POWER/GND
Llano POWER/GND
R23
R23
R23
1A
1A
1A
of
of
of
54 0 Wednesday, May 04, 2011
54 0 Wednesday, May 04, 2011
1
54 0 Wednesday, May 04, 2011
5
+3VS5
NC,no install by default
R594 *2.2K/J_4 R594 *2.2K/J_4
R596 *2.2K/J_4 R596 *2.2K/J_4
R598 *2.2K/J_4 R598 *2.2K/J_4
D D
+3V
R602 2.2K_4 R602 2.2K_4
R603 2.2K_4 R603 2.2K_4
R604 *1K/J_4 R604 *1K/J_4
J2
J2
1 2
*SOLDERJUMPER-2
*SOLDERJUMPER-2
FCH_TEST0
FCH_TEST1
FCH_TEST2
CGCLK_SMB
CGDAT_SMB
SYS_RST#
SYS_RST# internal
10K pull up
to DDR3 SMBUS
GEVENT0# internal pull Hi 8.2K to +3V
GEVENT1# internal pull Hi 8.2K to +3V
GEVENT23# internal pull Hi 8.2K to +3V
GEVENT5# internal pull Hi 8.2K to +3VS5
PCIE_WAKE# no need to pull
Hi resistor from check li st
PV change to short-pad
CLK_REQ2# internal pull Hi 8.2K to +3V
+3VS5
R856 10K/F_4 R856 10K/F_4
R857 10K/F_4 R857 10K/F_4
R611 10K/F_4 R611 10K/F_4
R613 10K/F_4 R613 10K/F_4
C C
R614 10K/F_4 R614 10K/F_4
R616 10K/F_4 R616 10K/F_4
R618 *4.7K/J_4 R618 *4.7K/J_4
C1073 *0.01U/25V_4 C1073 *0.01U/25V_4
R629 10K/F_4 R629 10K/F_4
SDA3
SCL2
SDA2
SCL1
SDA1
FCH_THERMTRIP#
DNBSWON#
CLK_REQ3# internal pull Hi 8.2K to +3V
CLK_REQ4# internal pull Hi 8.2K to +3V
This pin is used to
power down VGA DAC
regulators when CRT
no connected
GEVENT16# internal pull Hi 8.2K to +3VS5
GEVENT15# internal pull Hi 8.2K to +3VS5
B B
ACZ_SDOUT_R
ACZ_SYNC_R
ACZ_BCLK_R
ACZ_RST#_R
ACZ_SDIN0
Pure UMA can remove
VGA_REQ 37
A A
To Azalia
R635 33/J_4 R635 33/J_4
R636 33/J_4 R636 33/J_4
R637 33/J_4 R637 33/J_4
R638 33/J_4 R638 33/J_4
D26 RB501V-40 D26 RB501V-40
ACZ_SDOUT_AUDIO 25
ACZ_SYNC_AUDIO 25
BIT_CLK_AUDIO 25
ACZ_RST#_AUDIO 25
ACZ_SDIN0 25
CLK_REQ# already
internal pull up 8.2K
CLKREQ1#
2 1
4
remove PCIE_RST2# from AMD recommend
SUSB# 29
SUSC# 29
DNBSWON# 29
FCH_PWRGD 10
EC_A20GATE 29
EC_RCIN# 29
SIO_EXT_SMI# 29
SIO_EXT_SCI# 29
PCIE_WAKE# 27,30
FCH_THERMTRIP# 4
PCIE_CARD_CLKREQ# 24
PCIE_LAN_CLKREQ# 27
PCIE_MINI_CLKREQ# 30
LLB# Not Implement ed ,left unconnect ed.
VGA_POWER_DOWN 9
+3V
RSMRST# 29
LAN_DISABLE# 27,29
ACZ_SPKR 25
CGCLK_SMB 12,13
CGDAT_SMB 12,13
CARD_EECS 24
R829 *0_4/s R829 *0_4/s
C1075 *100P/50V_4 C1075 *100P/50V_4
R607 10K/F_4 R607 10K/F_4
SI
R868 *0/J_4 R868 *0/J_4
R612 *0_4/s R612 *0_4/s
R619 0_4 R619 0_4
R904 0_4 R904 0_4
SI
MV
ODD_PLUGIN# 23
ODD_DA#_FCH 23
For Zero ODD
R630 *10K/F_4 R630 *10K/F_4
HD audio
interface is
+3V_S5 voltage
R631 *10K/F_4 R631 *10K/F_4
R632 *10K/F_4 R632 *10K/F_4
R633 *10K/F_4 R633 *10K/F_4
R634 *10K/F_4 R634 *10K/F_4
TP153 TP153
TP154 TP154
TP155 TP155
TP160 TP160
TP161 TP161
TP163 TP163
TP165 TP165
TP168 TP168
TP169 TP169
TP170 TP170
TP171 TP171
TP172 TP172
PCIE_RST2#
RI#
SUSB#
SUSC#
DNBSWON#
FCH_PWRGD
FCH_TEST0
FCH_TEST1
FCH_TEST2
EC_A20GATE
EC_RCIN#
FCH_PME#
SIO_EXT_SMI#
GEVENT5#
SYS_RST#
PCIE_WAKE#
FCH_THERMTRIP#
WD_PWRGD
RSMRST#
PCIE_CARD_CLKREQ#
PCIE_LAN_CLKREQ#
LAN_DISABLE#_FCH
FCH_GPIO66 SCL3
CGCLK_SMB
CGDAT_SMB
SCL1
SDA1
PCIE_MINI_CLKREQ#
CLKREQ1#
LLB#
SMARTVOLT2
VGA_PD
GBE_LED0
ODD_PLUGIN#
ODD_DA#_FCH
FCH_JTAG_TCK
FCH_JTAG_TDI
FCH_JTAG_RST#
ACZ_BCLK_R
ACZ_SDOUT_R
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2_R
ACZ_SDIN3_R
ACZ_SYNC_R
ACZ_RST#_R
3
U32A
U32A
AB6
PCIE_RST2#/GEVENT4#
R2
RI#/GEVENT22#
W7
SPI_CS3#/GBE_STAT1/GEVENT21#
T3
SLP_S3#
W2
SLP_S5#
J4
PWR_BTN#
N7
PWR_GOOD
T9
TEST0
T10
TEST1/TMS
V9
TEST2
AE22
GA20IN/GEVENT0#
AG19
KBRST#/GEVENT1#
R9
PME#/GEVENT3#
C26
LPC_SMI#/GEVENT23#
T5
LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19#
K1
WAKE#/GEVENT8#
V7
IR_RX1/GEVENT20#
R10
THRMTRIP#/SMBALERT#/GEVENT2#
AF19
WD_PWRGD
U2
RSMRST#
AG24
CLK_REQ4#/SATA_IS0#/GPIO64
AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26
SMARTVOLT1/SATA_IS2#/GPIO50
AF22
CLK_REQ0#/SATA_IS3#/GPIO60
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18
SATA_IS5#/FANIN3/GPIO59
AF24
SPKR/GPIO66
AD26
SCL0/GPIO43
AD25
SDA0/GPIO47
T7
SCL1/GPIO227
R7
SDA1/GPIO228
AG25
CLK_REQ2#/FANIN4/GPIO62
AG22
CLK_REQ1#/FANOUT4/GPIO61
J2
IR_LED#/LLB#/GPIO184
AG26
SMARTVOLT2/SHUTDOWN#/GPIO51
V8
DDR3_RST#/GEVENT7#/VGA_PD
W8
GBE_LED0/GPIO183
Y6
SPI_HOLD#/GBE_LED1/GEVENT9#
V10
GBE_LED2/GEVENT10#
AA8
GBE_STAT0/GEVENT11#
AF25
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
M7
BLINK/USB_OC7#/GEVENT18#
R8
USB_OC6#/IR_TX1/GEVENT6#
T1
USB_OC5#/IR_TX0/GEVENT17#
P6
USB_OC4#/IR_RX0/GEVENT16#
F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
P5
USB_OC2#/TCK/GEVENT14#
J7
USB_OC1#/TDI/GEVENT13#
T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AZ_BITCLK
AB1
AZ_SDOUT
AA2
AZ_SDIN0/GPIO167
Y5
AZ_SDIN1/GPIO168
Y3
AZ_SDIN2/GPIO169
Y1
AZ_SDIN3/GPIO170
AD6
AZ_SYNC
AE4
AZ_RST#
K19
PS2_DAT/SDA4/GPIO187
J19
PS2_CLK/CEC/SCL4/GPIO188
J21
SPI_CS2#/GBE_STAT2/GPIO166
D21
PS2KB_DAT/GPIO189
C20
PS2KB_CLK/GPIO190
D23
PS2M_DAT/GPIO191
C22
PS2M_CLK/GPIO192
F21
KSO_0/GPIO209
E20
KSO_1/GPIO210
F20
KSO_2/GPIO211
A22
KSO_3/GPIO212
E18
KSO_4/GPIO213
A20
KSO_5/GPIO214
J18
KSO_6/GPIO215
H18
KSO_7/GPIO216
G18
KSO_8/GPIO217
B21
KSO_9/GPIO218
K18
KSO_10/GPIO219
D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19
KSO_14/XDB0/GPIO223
B17
KSO_15/XDB1/GPIO224
A24
KSO_16/XDB2/GPIO225
D17
KSO_17/XDB3/GPIO226
Hudson-M2-A13
Hudson-M2-A13
HUDSON-M3
HUDSON-M3
Part 4 of 5
Part 4 of 5
USBCLK/14M_25M_48M_OSC
USB
MISC
USB
MISC
USB
1.1
USB
1.1
ACPI / WAKE UP
EVENTS
ACPI / WAKE UP
EVENTS
USB
USB
GPIO
GPIO
USB
OC
USB
OC
USB
HD
AUDIO
HD
AUDIO
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
EMBEDDED
EMBEDDED
CTRL
CTRL
USB
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM3/EC_TIMER3/GPIO200
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
2.0
2.0
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX3P
USB_SS_RX3N
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
3.0
3.0
USB_SS_TX1N
USB_SS_RX1P
USB_SS_RX1N
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
2
G8
USB_RCOMP_SB
B9
H1
H3
H6
H5
H10
G10
K10
J12
USBP11+
G12
USBP11-
F12
K12
K13
B11
D11
E10
F10
USBP7+
C10
USBP7-
A10
H9
G9
A8
C8
F8
E8
C6
A6
C5
A5
USBP1+
C1
USBP1-
C3
E1
E3
USBSS_CALRP
C16
USBSS_CALRN
A16
A14
C14
USB 3.0 Not Implem ented: left unconnected.
C12
A12
D15
B15
E14
F14
F15
G15
H13
G13
J16
H16
J15
K15
SCL2
H19
SDA2
G19
SCL3
G22
SDA3
G21
E22
H22
EC_PWM2
J22
H21
No need for GPIO 200
K21
K22
F22
F24
E24
B23
C24
F18
R597 11.8K/F_6 R597 11.8K/F_6
USBP15+ 26
USBP15- 26
TP156 TP156
TP157 TP157
USBP10+ 30
USBP10- 30
TP158 TP158
TP159 TP159
USBP6+ 26
USBP6- 26
USBP5+ 26
USBP5- 26
USBP2+ 20
USBP2- 20
TP164 TP164
TP166 TP166
USBP0+ 26
USBP0- 26
TP151 TP151
TP152 TP152
EC_PWM2 10
BLUETOOTH
WLAN Min-Card
USB Connector
USB Connector
Carama USB
USB Connector
SCL3 of a TSI-capable APU's
thermal bus,Pulled up to
APU_VDDIO. Resistor value
verified in the relevant APU
design guide.
1
06
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Wednesday, May 04, 2011
Wednesday, May 04, 2011
5
4
3
2
Wednesday, May 04, 2011
PROJECT :
Hudson-M3 GPIO/USB/AZ/RGMII
Hudson-M3 GPIO/USB/AZ/RGMII
Hudson-M3 GPIO/USB/AZ/RGMII
R23
R23
R23
1A
1A
1A
of
64 0
64 0
1
64 0
5
CARD_PCIE_RST# 24
MINI_PCIE_RST# 30
LAN_PCIE_RST# 11,27
GPU_RST# 14
Place these PICE AC
D D
coupling cap close to FCH
C C
B B
C1058 150P/50V_4 C1058 150P/50V_4
C892 150P/50V_4 C892 150P/50V_4
C893 150P/50V_4 C893 150P/50V_4
C1059 150P/50V_4 C1059 150P/50V_4
CLK_DP_P 4
CLK_DP_N 4
CLK_ANX_P 11
CLK_ANX_N 11
CLK_APU_P 4
CLK_APU_N 4
CLK_VGA_P 14
CLK_VGA_N 14
CLK_WLAN_P 30
CLK_WLAN_N 30
CLK_PCIE_CARD_P 24
CLK_PCIE_CARD_N 24
UMI_RXP0 2
UMI_RXN0 2
UMI_RXP1 2
UMI_RXN1 2
UMI_RXP2 2
UMI_RXN2 2
UMI_RXP3 2
UMI_RXN3 2
UMI_TXP0 2
UMI_TXN0 2
UMI_TXP1 2
UMI_TXN1 2
UMI_TXP2 2
UMI_TXN2 2
UMI_TXP3 2
UMI_TXN3 2
+1.1V_PCIE_VDDR
+1.1V_CKVDD
R870 33/J_4 R870 33/J_4
R641 33/J_4 R641 33/J_4
R871 33/J_4 R871 33/J_4
R642 33/J_4 R642 33/J_4
C894 0.1U/10V_4 C894 0.1U/10V_4
C895 0.1U/10V_4 C895 0.1U/10V_4
C896 0.1U/10V_4 C896 0.1U/10V_4
C897 0.1U/10V_4 C897 0.1U/10V_4
C899 0.1U/10V_4 C899 0.1U/10V_4
C900 0.1U/10V_4 C900 0.1U/10V_4
C901 0.1U/10V_4 C901 0.1U/10V_4
C902 0.1U/10V_4 C902 0.1U/10V_4
R646 590/F_4 R646 590/F_4
R647 2K/F_4 R647 2K/F_4
R653 2K/F_4 R653 2K/F_4
RP5 0X2 RP5 0X2
2
1
4
RP6 0X2 RP6 0X2
RP7 0X2 RP7 0X2
RP8 0X2 RP8 0X2
RP9 0X2 RP9 0X2
RP11 0X2 RP11 0X2
3
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
Note: CLK_FCH_SRCP/N is 100MHZ SSC
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_PCIE_VGAP/N is 100MHZ SSC
Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable
RP10 0X2 RP10 0X2
4
CLK_PCIE_LANP 27
CLK_PCIE_LANN 27
C914
C914
27P/50V_4
27P/50V_4
A A
C915
C915
27P/50V_4
27P/50V_4
5
SI
Y5
25MHZY525MHZ
3
2
1
TP184 TP184
R666
R666
1M/F_4
1M/F_4
TP187 TP187
4
PCIE_RST#
A_RST#
UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C
PCIE_CALRP_FCH
PCIE_CALRN_FCH
CLK_CALRN_FCH
CLK_DP_FCH_P
CLK_DP_FCH_N
CLK_ANX_FCH_P
CLK_ANX_FCH_N
CLK_APU_FCH_P
CLK_APU_FCH_N
CLK_VGA_FCH_P
CLK_VGA_FCH_N
CLK_WLAN_FCH_P
CLK_WLAN_FCH_N
CLK_PCIE_CARDP_FCH
CLK_PCIE_CARDN_FCH
CLK_PCIE_LANP_FCH
CLK_PCIE_LANN_FCH
25M_X1
25M_X2
4
U32E
U32E
AE2
PCIE_RST#
AD5
A_RST#
AE30
UMI_TX0P
AE32
UMI_TX0N
AD33
UMI_TX1P
AD31
UMI_TX1N
AD28
UMI_TX2P
AD29
UMI_TX2N
AC30
UMI_TX3P
AC32
UMI_TX3N
AB33
UMI_RX0P
AB31
UMI_RX0N
AB28
UMI_RX1P
AB29
UMI_RX1N
Y33
UMI_RX2P
Y31
UMI_RX2N
Y28
UMI_RX3P
Y29
UMI_RX3N
AF29
PCIE_CALRP
AF31
PCIE_CALRN
V33
GPP_TX0P
V31
GPP_TX0N
W30
GPP_TX1P
W32
GPP_TX1N
AB26
GPP_TX2P
AB27
GPP_TX2N
AA24
GPP_TX3P
AA23
GPP_TX3N
AA27
GPP_RX0P
AA26
GPP_RX0N
W27
GPP_RX1P
V27
GPP_RX1N
V26
GPP_RX2P
W26
GPP_RX2N
W24
GPP_RX3P
W23
GPP_RX3N
F27
CLK_CALRN
G30
PCIE_RCLKP
G28
PCIE_RCLKN
R26
DISP_CLKP
T26
DISP_CLKN
H33
DISP2_CLKP
H31
DISP2_CLKN
T24
APU_CLKP
T23
APU_CLKN
J30
SLT_GFX_CLKP
K29
SLT_GFX_CLKN
H27
GPP_CLK0P
H28
GPP_CLK0N
J27
GPP_CLK1P
K26
GPP_CLK1N
F33
GPP_CLK2P
F31
GPP_CLK2N
E33
GPP_CLK3P
E31
GPP_CLK3N
M23
GPP_CLK4P
M24
GPP_CLK4N
M27
GPP_CLK5P
M26
GPP_CLK5N
N25
GPP_CLK6P
N26
GPP_CLK6N
R23
GPP_CLK7P
R24
GPP_CLK7N
N27
GPP_CLK8P
R27
GPP_CLK8N
J26
14M_25M_48M_OSC
C31
25M_X1
C33
25M_X2
Hudson-M2-A13
Hudson-M2-A13
HUDSON-M3
HUDSON-M3
Part 1 of 5
Part 1 of 5
PCI
CLKS
PCI
CLKS
PCI EXPRESS
INTERFACES
PCI EXPRESS
INTERFACES
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK
GENERATOR
CLOCK
GENERATOR
S5
S5
3
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCI
PCI
APU
APU
PLUS
PLUS
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
INTERFACE
INTERFACE
GNT2#/SD_LED/GPO45
LPC
LPC
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
GNT0#
GNT1#/GPO44
CLKRUN#
LOCK#
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
3
PAR
AF3
AF1
AF5
AG2
AF6
AB5
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
AF18
AE18
AC16
AD18
B25
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
G25
E28
E26
G26
F26
G2
G4
H7
F1
F3
E6
PCI_CLK1
PCI_CLK3
PCI_CLK4
PCIRST#_L
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
HUDSON_MEMHOT#_R
C1076 100P/50V_4 C1076 100P/50V_4
FCH_GPIO44
VGA_ON_SB
CLKRUN#
TRAVIS_EN#
PCIE_RST#_ANX
VGA_RSTB
LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
DMAACTIVE_L
FCH_PROCHOT#
APU_PWRGD_R
APU_STOP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
CLK_RTC
INTRUDER_ALERT#
+3V_RTC
20MIL
G2
G2
*SHORT_ PAD1
*SHORT_ PAD1
R643 33/J_4 R643 33/J_4
TP173 TP173
SI
R884 *0_4 R884 *0_4
TP175 TP175
TP176 TP176
TP177 TP177
TP178 TP178
LPC_CLK0 10
LPC_CLK1 10
R660 22/J_4 R660 22/J_4
R661 22/J_4 R661 22/J_4
LAD0 29,30
LAD1 29,30
LAD2 29,30
LAD3 29,30
LFRAME# 29,30
TP180 TP180
TP181 TP181
SERIRQ 29
DMAACTIVE_L 4
R664 *0_4/s R664 *0_4/s
TP183 TP183
APU_RST# 2,4
TP185 TP185
TP186 TP186
1 2
C916
C916
0.1U/10V_4
0.1U/10V_4
2
PCI_CLK1 10
PCI_CLK3 10
PCI_CLK4 10
KBC_RST#
PCI_AD23 10
PCI_AD24 10
PCI_AD25 10
PCI_AD26 10
PCI_AD27 10
C898 *150P/50V_4 C898 *150P/50V_4
KBC_RST# 29
+3V_RTC
20MIL
C909
C909
1U/6.3V_4
TP174 TP174
1U/6.3V_4
FCH_PROCHOT# 4
APU_PWRGD 2,4
S5_CORE_EN is necessary to connect enable
pin of +3VPCU/+5VPCU regulator for S5+
mode implementation
2
PCI_SERR# 29
VGA_ON_SB 29
CLKRUN# 29
SPI_WP 8,29
VGA_PWROK 17,29,36,37
VGA_RSTB 14
C910 5.6P/16V_4 C910 5.6P/16V_4
C911 5.6P/16V_4 C911 5.6P/16V_4
FCH PROCHOT#--- (input 0.8V threshold )
When it isasserted, it can generate SCI or
SMI to OS/BIOS
PV change to short-pad
LDT_STP# l et is NC from schematic recommend
CLK_RTC 10,29
+3V_RTC
INTRUDER_ALERT# Left not connected
(FCH has 50-kohm internal pull-up to
VBAT).
R654 499/F_4 R654 499/F_4
CLK_33_DEBUG 30
CLK_33M_KBC 29
1
07
D15
D15
RB500V-40
RB500V-40
2 1
+3VRTC_1 +3VRTC
R655 10_4 R655 10_4
20MIL 20MIL
D16
D16
RB500V-40
RB500V-40
20MIL
20MIL
88266-020L
88266-020L
32K_X1
R662
R662
20M/J_4
20M/J_4
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Wednesday, May 04, 2011
Wednesday, May 04, 2011
Wednesday, May 04, 2011
C912 18P/50V_4 C912 18P/50V_4
2 3
Y4
Y4
32.768KHZ
32.768KHZ
4 1
C913 18P/50V_4 C913 18P/50V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Hudson-M3 ACPI/PCI/CLOCK
Hudson-M3 ACPI/PCI/CLOCK
Hudson-M3 ACPI/PCI/CLOCK
R23
R23
R23
1
+3VPCU
2 1
R656
R656
1K/F_4
1K/F_4
+BAT +VCCRTC_2
CN24
CN24
1
2
of
74 0
74 0
74 0
1A
1A
1A
U32D
U32D
A3
VSS_1
A33
VSS_2
B7
VSS_3
B13
VSS_4
D9
VSS_5
D13
VSS_6
E5
VSS_7
E12
VSS_8
E16
VSS_9
E29
VSS_10
F7
D D
C C
B B
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
N8
K25
H25
Hudson-M2-A13
Hudson-M2-A13
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSSAN_HWM
VSSXL
VSSPL_SYS
ID4
0
0
001
0
0
0
11
0
1
0
1
A A
0
1
0
00001
5
HUDSON-M3
HUDSON-M3
Part 5 of 5
Part 5 of 5
ID0 ID1 ID2 ID3
0 0 0
1
0 0
11
0
1
1
1
0
1
1
T25
VSS_65
T27
VSS_66
U6
VSS_67
U14
VSS_68
U17
VSS_69
U20
VSS_70
U21
VSS_71
U30
VSS_72
U32
VSS_73
V11
VSS_74
V16
VSS_75
V18
VSS_76
W4
VSS_77
W6
VSS_78
W25
VSS_79
W28
VSS_80
Y14
VSS_81
Y16
VSS_82
Y18
VSS_83
AA6
VSS_84
AA12
VSS_85
AA13
VSS_86
AA14
VSS_87
AA16
VSS_88
AA17
VSS_89
AA25
VSS_90
AA28
VSS_91
AA30
VSS_92
AA32
VSS_93
AB25
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSSPL_DAC
VSSIO_DAC
EFUSE
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
GPIO52 internal pull Hi 8.2K to +3V
GPIO53 internal pull Hi 8.2K to +3V
GPIO54 internal pull Hi 8.2K to +3V
GPIO56 internal pull Hi 8.2K to +3V
GPIO57 internal pull Hi 8.2K to +3V
GPIO58 internal pull Hi 8.2K to +3V
GROUND
GROUND
VSSAN_DAC
VSSANQ_DAC
CONFIG 31- Level BOM Item
0
UMA
0
0
0
0
0
0
0
SG / Muxless
SATA_LED# 28
00101
1
0
01
1
0
1
1
1 1
5
4
SATA HDD
SATA ODD
U36
U36
TC7SH08FU
TC7SH08FU
4
+1.1V_AVDD_SATA
1
2
3
4
5
6
7
8
9
10
11
12
4
3
U32B
PLACE SATA AC COUPLING
CAPS CLOSE TO HUDSON-M2/M3
SATA_TXP0 23
SATA_TXN0 23
SATA_RXN0 23
SATA_RXP0 23
SATA_TXP1 23
SATA_TXN1 23
SATA_RXN1 23
SATA_RXP1 23
+3V
C921
C921
0.1U/10V_4
0.1U/10V_4
2
1
3 5
PLACE SATA_CAL RES VERY
CLOSE TO BALL OF
HUDSON-M2/M3
R682 1K/F_4 R682 1K/F_4
R683 1K/F_4 R683 1K/F_4
R685 10K/F_4 R685 10K/F_4
+3V
Integrated Clock Mode:
Leave unconnected.
RF_OFF# 30
BT_OFF# 26
BT_COMBO_EN# 30
ODD_PWR 23
BT_COMBO_OFF# 30
LCD_BK 20
R694
R694
R693
R693
10K/F_4
10K/F_4
10K/F_4
10K/F_4
SATA_TXP0
SATA_TXN0
SATA_TXP1
SATA_TXN1
SB_SATA_LED#
SATA_CALRP
SATA_CALRN
SB_SATA_LED#
RF_OFF#
BT_OFF#
BT_COMBO_EN#
ODD_PWR
BT_COMBO_OFF#
LCD_BK
R695
R695
10K/F_4
10K/F_4
TEMPIN0
TEMPIN1
TEMPIN2
TEMPIN3
R696
R696
10K/F_4
10K/F_4
SIDE_PORT_ID2
0
0
00 N C
0
0
1
011
U32B
AK19
SATA_TX0P
AM19
SATA_TX0N
AL20
SATA_RX0N
AN20
SATA_RX0P
AN22
SATA_TX1P
AL22
SATA_TX1N
AH20
SATA_RX1N
AJ20
SATA_RX1P
AJ22
SATA_TX2P
AH22
SATA_TX2N
AM23
SATA_RX2N
AK23
SATA_RX2P
AH24
SATA_TX3P
AJ24
SATA_TX3N
AN24
SATA_RX3N
AL24
SATA_RX3P
AL26
SATA_TX4P
AN26
SATA_TX4N
AJ26
SATA_RX4N
AH26
SATA_RX4P
AN29
SATA_TX5P
AL28
SATA_TX5N
AK27
SATA_RX5N
AM27
SATA_RX5P
AL29
NC6
AN31
NC7
AL31
NC8
AL33
NC9
AH33
NC10
AH31
NC11
AJ33
NC12
AJ31
NC13
AF28
SATA_CALRP
AF27
SATA_CALRN
AD22
SATA_ACT#/GPIO67
AF21
SATA_X1
AG21
SATA_X2
AH16
FANOUT0/GPIO52
AM15
FANOUT1/GPIO53
AJ16
FANOUT2/GPIO54
AK15
FANIN0/GPIO56
AN16
FANIN1/GPIO57
AL16
FANIN2/GPIO58
K6
TEMPIN0/GPIO171
K5
TEMPIN1/GPIO172
K3
TEMPIN2/GPIO173
M6
TEMPIN3/TALERT#/GPIO174
Hudson-M2-A13
Hudson-M2-A13
TEMP( 0 - 3 )
Temp Monitor Not Implemented
10-Kȍ 5% pull-up to +3VS5
or 10-Kȍ 5% pull-down
SIDE_PORT_ID0 SIDE_PORT_ID1
0
1
3
HUDSON-M3
HUDSON-M3
SD
CARD
SD
CARD
GBE
LAN
GBE
LAN
SERIAL
ATA
SERIAL
ATA
ROM_RST#/SPI_WP#/GPIO161
SPI
ROM
SPI
ROM
VGA
DAC
VGA
DAC
VGA
MAINLINK
VGA
MAINLINK
HW
HW
MONITOR
MONITOR
+3VS5
Samsung
Hynix
no supprot side port
Part 2 of 5
Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
ML_VGA_HPD/GPIO229
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
VIN5/SCLK_1/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
SD_CD#/GPIO75
SD_WP/GPIO76
SD_DATA2/GPIO79
SD_DATA3/GPIO80
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_DAC_RSET
AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
VIN0/GPIO175
VIN1/GPIO176
NC1
NC2
NC3
NC4
NC5
R836 10K/F_4 R836 10K/F_4
R838 *10K/F_4 R838 *10K/F_4
R840 *10K/F_4 R840 *10K/F_4
R842 *10K/F_4 R842 *10K/F_4
R844 *10K/F_4 R844 *10K/F_4
R846 10K/F_4 R846 10K/F_4
R847 *10K/F_4 R847 *10K/F_4
R848 *10K/F_4 R848 *10K/F_4
2
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
GBE_COL
GBE_CRS
GBE_MDIO
FCH_SPI_SI
FCH_SPI_SO
FCH_SPI_CLK
FCH_SPI_CS0#
FCH_SPI_WP
VGA_HPD
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
2
R668 10K/F_4 R668 10K/F_4
R670 10K/F_4 R670 10K/F_4
R672 10K/F_4 R672 10K/F_4
R674 10K/F_4 R674 10K/F_4
R675 10K/F_4 R675 10K/F_4
R676 *0_4/S R676 *0_4/S
R678 *0_4/S R678 *0_4/S
R680 *0_4/S R680 *0_4/S
R684 715/F_4 R684 715/F_4
R686 100/F_4 R686 100/F_4
R837 *10K/F_4 R837 *10K/F_4
R839 10K/F_4 R839 10K/F_4
R841 10K/F_4 R841 10K/F_4
R843 10K/F_4 R843 10K/F_4
R845 10K/F_4 R845 10K/F_4
R688 *10K/F_4 R688 *10K/F_4
R689 10K/F_4 R689 10K/F_4
R690 10K/F_4 R690 10K/F_4
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
follow AMD check list to pull UP / LOW
AD7
AG8
GBE_RXERR
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
GBE_PHY_INTR
W9
V6
V5
V3
T6
V1
FCH_CRT_R
L30
FCH_CRT_G
L32
FCH_CRT_B
M29
M28
N30
M33
N32
VGA_DAC_REST
K31
V28
V29
AUXCAL
U28
T31
T33
T29
T28
R32
R30
P29
P28
C29
SIDE_PORT_ID0
N2
SIDE_PORT_ID1
M3
SIDE_PORT_ID2
L2
BOARD_ID0
N4
BOARD_ID1
P1
BOARD_ID2
P3
BOARD_ID3
M1
BOARD_ID4
M5
AG16
AH10
VIN ( 0 - 7 )
A28
Voltage Monit or Not Implemented
G27
10-Kȍ 5% pull-up to +3VS5
L4
or 10-Kȍ 5% pull-down
SIDE_PORT_ID0
SIDE_PORT_ID1
SIDE_PORT_ID2
+3VS5
+3VS5
FCH_SPI_CS0#
TP188 TP188
FCH_SPI_CLK
TP189 TP189
FCH_SPI_SO
TP190 TP190
FCH_SPI_SI
TP191 TP191
TP192 TP192
FCH_CRT_RED 22
FCH_CRT_GRE 22
FCH_CRT_BLU 22
FCH_CRT_HSYNC 22
FCH_CRT_VSYNC 22
FCH_DDCDAT 22
FCH_DDCCLK 22
APU_DP_AUXP 4
APU_DP_AUXN 4
APU_DP_TXP0 4
APU_DP_TXN0 4
APU_DP_TXP1 4
APU_DP_TXN1 4
APU_DP_TXP2 4
APU_DP_TXN2 4
APU_DP_TXP3 4
APU_DP_TXN3 4
R687 *10K/F_4 R687 *10K/F_4
FCH_VGA_HPD 4
PV change to +FCH_VDDAN_33_DAC_R for AMD suggestion
PV DEL R687 for AMD suggestion
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Vender
AMIC
WINBOND
Socket
SPI_CLK
C1064
C1064
*22P/50V_4
*22P/50V_4
EMI
R878 *0_4 R878 *0_4
R879 *0_4 R879 *0_4
R880 *0_4 R880 *0_4
R881 *0_4 R881 *0_4
SPI_WP 7,29
R place close to PC H
FCH_CRT_R
FCH_CRT_G
FCH_CRT_B
+FCH_VDDAN_11_MLDAC
+FCH_VDDAN_33_DAC_R
+1.5V
FCH_VGA_HPD
Q53
Q53
DMN601K-7
DMN601K-7
Hudson-M3 SATA/HWM/SPI
Hudson-M3 SATA/HWM/SPI
Hudson-M3 SATA/HWM/SPI
Wednesday, May 04, 2011
Wednesday, May 04, 2011
Wednesday, May 04, 2011
1
08
Size P/N
AKE38ZN0801
2M
AKE38FP0N01
2M
DFHS08FS023
+3V
FCH SPI ROM
SI
R876
R876
*10K/F_4
*10K/F_4
R692
R692
10K/F_4
10K/F_4
3
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
C1063 *0.1U/10V_4 C1063 *0.1U/10V_4
U44
SPI_CS0#
SPI_CLK
SPI_SO
SPI_SI
SPI_WP
U44
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
*MX25L1605DM2I-12G
*MX25L1605DM2I-12G
R677 150/F_4 R677 150/F_4
R679 150/F_4 R679 150/F_4
R681 150/F_4 R681 150/F_4
VGA Hot-plug
+5V
R697
R697
100K/F_4
100K/F_4
2
3
Q54
Q54
DMN601K-7
DMN601K-7
2
1
R23
R23
R23
1
8
VDD
7
4
VSS
VGA_HPD
of
84 0
84 0
84 0
+3V
R877
R877
*10K/F_4
*10K/F_4
R700
R700
*100K/F_4
*100K/F_4
1A
1A
1A
5
+3.3V_VDDIO
+3V
C927
C927
0.1U/10V_4
0.1U/10V_4
D D
C C
L63
L63
+3V
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
L65
L65
+3V
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
NOTE : LDO_CAP
A11 stepping : C will
install 1nf cap
A12 stepping : C will
let it to NC
TRACE WIDTH >=15mil
C941
C940
C940
2.2U/6.3V_4
2.2U/6.3V_4
C948
C948
2.2U/6.3V_4
2.2U/6.3V_4
C941
*0.1U/10V_4
*0.1U/10V_4
TRACE WIDTH >=15mil
C949
C949
*0.1U/10V_4
*0.1U/10V_4
+FCH_VDDAN_11_MLDAC
M2 chipset need to connect to GND
VDDPL_33_USB_S : USB PHY PLL analog power
+3V_AVDD_USB +FCH_VDDPL_33_SUSB_S
L70
L70
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
VDDAN_33_USB_S : USB PHY I/O analog power
L73 PBY160808T-221Y-N(220,2A) L73 PBY160808T-221Y-N(220,2A)
+3VS5
C982
C982
0.1U/10V_4
0.1U/10V_4
VDDAN_11_USB_S : USB PHY PLL analog power
VDDCR_11_USB_S : USB PHY core power
B B
+1.1VS5
+1.1VS5
L75
L75
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
L76
L76
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
VDDQ--3.3V I/O power
C929
C929
C928
C928
0.1U/10V_4
0.1U/10V_4
22U/6.3VS_8
22U/6.3VS_8
+FCH_VDDAN_33_DAC_R
+FCH_VDDPL_33_MLDAC
R707 0_4 R707 0_4
+FCH_VDDAN_11_DAC
VDDAN_11_ML -- UMI 1.1V analog power
+FCH_VDDAN_11_ML
C957
C957
0.1U/10V_4
0.1U/10V_4
C984
C984
10U/6.3V_8
10U/6.3V_8
VDDAN_11_SSUSB_S : USB3.0 PHY PLL analog power
+FCH_VDDPL_33_SSUSB_S
+FCH_VDDPL_33_SUSB_S
C958
C958
1U/6.3V_4
1U/6.3V_4
C969
C969
2.2U/6.3V_4
2.2U/6.3V_4
TRACE WIDTH >=50mil
C985
C985
10U/6.3V_8
10U/6.3V_8
+FCH_VDDAN_11_USB_S
C992 0.1U/10V_4 C992 0.1U/10V_4
+FCH_VDDCR_11_USB_S
C997
C996
C996
0.1U/10V_4
0.1U/10V_4
C997
*0.1U/10V_4
*0.1U/10V_4
+FCH_VDDAN_11_SSUSB_S_R
+FCH_VDDCR_11_SSUSB_S
VDDCR_11_SSUSB_S : USB3.0 PHY core power
M2 chipset can let it to GND
if support
Modem wake
A A
5
up should be
change pull hi to
S5 power
VDDIO_AZ_S -- HD Audio
Interface I/O power
4
102mA
C930
C930
C931
C931
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
+VDDPL_3.3V
+VDDPL_33_SYS
+VDDPL_33_DAC
+FCH_VDDPL_33_PCIE
+FCH_VDDPL_33_SATA
C950 *1000P/50V_4 C950 *1000P/50V_4
C960
C959
C959
4.7U/6.3V_6
4.7U/6.3V_6
C986
C986
1U/6.3V_4
1U/6.3V_4
2.2U/6.3V_4 C988 2.2U/6.3V_4 C988
+3V
C960
0.1U/10V_4
0.1U/10V_4
C970
C970
1U/6.3V_4
1U/6.3V_4
+3V_AVDD_USB
C987
C987
1U/6.3V_4
1U/6.3V_4
TRACE WIDTH >=20mil
TRACE WIDTH >=15mil
C998
C998
10U/6.3V_8
10U/6.3V_8
R719 *0_4/S R719 *0_4/S
4
470mA
140mA
42mA
282mA
424mA
+VDDIO_AZ
47mA
20mA
20mA
30mA
11mA
14mA
11mA
12mA
+LDO_CAP
7mA
226mA
C1013
C1013
2.2U/6.3V_4
2.2U/6.3V_4
3
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U32C
U32C
AB17
VDDIO_33_PCIGP_1
AB18
VDDIO_33_PCIGP_2
AE9
VDDIO_33_PCIGP_3
AD10
VDDIO_33_PCIGP_4
AG7
VDDIO_33_PCIGP_5
AC13
VDDIO_33_PCIGP_6
AB12
VDDIO_33_PCIGP_7
AB13
VDDIO_33_PCIGP_8
AB14
VDDIO_33_PCIGP_9
AB16
VDDIO_33_PCIGP_10
H24
VDDPL_33_SYS
V22
VDDPL_33_DAC
U22
VDDPL_33_ML
T22
VDDAN_33_DAC
L18
VDDPL_33_SSUSB_S
D7
VDDPL_33_USB_S
AH29
VDDPL_33_PCIE
AG28
VDDPL_33_SATA
M31
LDO_CAP
V21
VDDPL_11_DAC
Y22
VDDAN_11_ML_1
V23
VDDAN_11_ML_2
V24
VDDAN_11_ML_3
V25
VDDAN_11_ML_4
AB10
VDDIO_33_GBE_S
AB11
VDDCR_11_GBE_S_1
AA11
VDDCR_11_GBE_S_2
AA9
VDDIO_GBE_S_1
AA10
VDDIO_GBE_S_2
G7
VDDAN_33_USB_S_1
H8
VDDAN_33_USB_S_2
J8
VDDAN_33_USB_S_3
K8
VDDAN_33_USB_S_4
K9
VDDAN_33_USB_S_5
M9
VDDAN_33_USB_S_6
M10
VDDAN_33_USB_S_7
N9
VDDAN_33_USB_S_8
N10
VDDAN_33_USB_S_9
M12
VDDAN_33_USB_S_10
N12
VDDAN_33_USB_S_11
M11
VDDAN_33_USB_S_12
U12
VDDAN_11_USB_S_1
U13
VDDAN_11_USB_S_2
T12
VDDCR_11_USB_S_1
T13
VDDCR_11_USB_S_2
P16
VDDAN_11_SSUSB_S_1
M14
VDDAN_11_SSUSB_S_2
N14
VDDAN_11_SSUSB_S_3
P13
VDDAN_11_SSUSB_S_4
P14
VDDAN_11_SSUSB_S_5
N16
VDDCR_11_SSUSB_S_1
N17
VDDCR_11_SSUSB_S_2
P17
VDDCR_11_SSUSB_S_3
M17
VDDCR_11_SSUSB_S_4
Hudson-M2-A13
Hudson-M2-A13
HUDSON-M3
HUDSON-M3
L81
L81
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
MAIN
MAIN
GBE
GBE
POWER
POWER
PCI/GPIO I/O
PCI/GPIO I/O
PCI
PCI
LINK
LINK
LAN
LAN
SERIAL
SERIAL
CLKGEN
CLKGEN
EXPRESS
EXPRESS
Part 3 of 5
Part 3 of 5
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
CORE
S0
CORE
S0
VDDCR_11_8
VDDCR_11_9
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
I/O
I/O
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
ATA
ATA
VDDAN_11_SATA_9
VDDAN_11_SATA_10
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
3.3V_S5 I/O
3.3V_S5 I/O
USB
USB
VDDXL_33_S
VDDCR_11_S_1
VDDCR_11_S_2
VDDPL_11_SYS_S
VDDAN_33_HWM_S
VDDIO_AZ_S
USB
SS
USB
SS
+VDDPL_3.3V +3V
C1014
C1014
2.2U/6.3V_4
2.2U/6.3V_4
3
T14
T17
T20
U16
U18
V14
V17
V20
Y17
340mA
H26
J25
K24
L22
M22
N21
N22
P22
1088mA
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
1337mA
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
59mA
N18
L19
M18
V12
V13
Y12
Y13
W11
5mA
G24
187mA
N20
M20
70mA
J24
12mA
M8
26mA
AA4
Trace width >=20 mil
VGA_POWER_DOWN 6
C1015
C1015
0.1U/10V_4
0.1U/10V_4
1007mA for M3
902mA for M2
TRACE WIDTH >=100mil
C932
C932
0.1U/10V_4
0.1U/10V_4
TRACE WIDTH >=30mil
C942
C942
1U/6.3V_4
1U/6.3V_4
+1.1V_PCIE_VDDR
C951
C951
0.1U/10V_4
0.1U/10V_4
+1.1V_AVDD_SATA
C963
C963
1U/6.3V_4
1U/6.3V_4
TRACE WIDTH >=20mil
+VDDXL_3.3V
+VDDCR_1.1V
TRACE WIDTH >=15mil
+VDDPL_1.1V
+VDDAN_3.3V_HWM
+VDDIO_AZ
VGA will power down
when CRT no i nsert
VGA_POWER_DOWN
VGA_PD is
generated
from FCH
2
+1.1V_VDDCR
VDDCR-- S/B CORE power
+1.1V
C935
C935
C934
C934
C933
C933
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
+1.1V_CKVDD
VDDAN_11_CLK-- Internal clock
Generator I/O power
C943
C943
C944
C944
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
C945
C945
0.1U/10V_4
0.1U/10V_4
C936
C936
10U/6.3V_8
10U/6.3V_8
C946
C946
22U/6.3VS_8
22U/6.3VS_8
VDDAN_11_PCIE --PCIE/UMI analog power
C954
C953
C953
1U/6.3V_4
1U/6.3V_4
C954
1U/6.3V_4
1U/6.3V_4
C955
C955
22U/6.3VS_8
22U/6.3VS_8
C952
C952
0.1U/10V_4
0.1U/10V_4
VDDAN_11_SATA--SATA PHY analog/IO power
C967
C964
C964
1U/6.3V_4
1U/6.3V_4
C965
C965
0.1U/10V_4
0.1U/10V_4
C966
C966
0.1U/10V_4
0.1U/10V_4
C967
22U/6.3VS_8
22U/6.3VS_8
VDDIO_33_S-- 3.3v S5 I/O power
C978
C978
C979
C975
C975
*0.1U/10V_4
*0.1U/10V_4
C977
C977
2.2U/6.3V_4
2.2U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C979
1U/6.3V_4
1U/6.3V_4
VDDXL_33_S-- 25MHZ XTAL IO power
VDDCR_1.1_S-- 1.1V S5 Core power
+1.1VS5
C995
C995
C994
C994
2.2U/6.3V_4
2.2U/6.3V_4
1U/6.3V_4
1U/6.3V_4
next stage should be
change to +1.2VS5 from
AMD Errta 1.2
+12VALW
R716
R716
330K_6
330K_6
1 2
+FCH_VGA_PWR_EN
3
Q63
Q63
2N7002E
2N7002E
2
R717
R717
2.2K_4
2.2K_4
C1011
C1011
1U/6.3V_4
1U/6.3V_4
1
C1012
C1012
0.022U/25V_4
0.022U/25V_4
2 1
2
L64
L64
BLM18PG181SN1D(180,1.5A)_6
BLM18PG181SN1D(180,1.5A)_6
TRACE WIDTH >=100mil
L66
L66
BLM18PG181SN1D(180,1.5A)_6
BLM18PG181SN1D(180,1.5A)_6
TRACE WIDTH >=50mil
L69
L69
BLM18PG181SN1D(180,1.5A)_6
BLM18PG181SN1D(180,1.5A)_6
if support USB
3.0 wake up
should be
change pull hi
to S5 power
+VDDIO_3.3V
C980
C980
C981
C981
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C990
C989
C989
*0.1U/10V_4
*0.1U/10V_4
+3V
3
2
1
+FCH_VDDAN_33_DAC
2
C990
2.2U/6.3V_4
2.2U/6.3V_4
Q62
Q62
AO3404
AO3404
+1.1V
3
Q64
Q64
AO3404
AO3404
1
+VDDAN_11_MLDAC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
+1.1V
VDDPL_11_SYS_S : System Clock Gen
+1.1V
+1.1V
+3VS5
PLLs analog power
L68
L68
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
VDDAN_33_HWM_S -- Hardware
monitor interface I/O power
L72
L72
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
if support USB
3.0 wake up
should be
change pull hi
to S5 power
+1.1V
+3VS5
L74
L74
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
This circuit is
for switch DAC and
UMI analog power
L79
L79
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
R718 *0_8/S R718 *0_8/S
233 mA Max
L67
L67
PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Hudson-M3 POWER/GND
Hudson-M3 POWER/GND
Hudson-M3 POWER/GND
Wednesday, May 04, 2011
Wednesday, May 04, 2011
Wednesday, May 04, 2011
1
+VDDPL_1.1V
C961
C961
2.2U/6.3V_4
2.2U/6.3V_4
+VDDAN_3.3V_HWM
C973
C973
2.2U/6.3V_4
2.2U/6.3V_4
+3V
32 mA Max
+FCH_VDDAN_33_DAC_R
C999
C999
2.2U/6.3V_4
2.2U/6.3V_4
+FCH_VDDPL_33_MLDAC +FCH_VDDAN_33_DAC_R
C1009
C1009
2.2U/6.3V_4
2.2U/6.3V_4
+FCH_VDDAN_11_MLDAC
R23
R23
R23
94 0
94 0
1
94 0
09
C962
C962
0.1U/10V_4
0.1U/10V_4
C974
C974
0.1U/10V_4
0.1U/10V_4
C1000
C1000
0.1U/10V_4
0.1U/10V_4
of
C1010
C1010
0.1U/10V_4
0.1U/10V_4
1A
1A
1A
5
4
3
2
1
STRAPS PINS
OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.
+3V +3VS5 +3VS5 +3VS5
D D
R724
R735
R735
10K/F_4
10K/F_4
R724
10K/F_4
10K/F_4
R725
R725
10K/F_4
10K/F_4
SI
R737
R737
*2.2K/J_4
*2.2K/J_4
R720
R720
10K/F_4
10K/F_4
PCI_CLK1 7
PCI_CLK3 7
PCI_CLK4 7
LPC_CLK0 7
LPC_CLK1 7
EC_PWM2 6
CLK_RTC 7,29
C C
PCI_CLK1
PCI_CLK3
PCI_CLK4
LPC_CLK0
LPC_CLK1
EC_PWM2
CLK_RTC
R732
R732
*10K/J_4
*10K/J_4
R733
R733
10K/F_4
10K/F_4
R734
R734
10K/F_4
10K/F_4
R742
R742
10K/F_4
10K/F_4
R738
R738
*2.2K_4
*2.2K_4
MV
DEBUG STRAPS
FCH has 15K Internal Pull Up for PCI_AD[27:23]
PCI_AD27 7
PCI_AD26 7
PCI_AD25 7
PCI_AD24 7
PCI_AD23 7
PULL
HIGH
PULL
LOW
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD27 PCI_AD26
USE PCI
PLL
DEFAULT
BYPASS
PCI PLL
DISABLE ILA
AUTORUN
DEFAULT
ENABLE ILA
AUTORUN
TP193 TP193
TP194 TP194
TP195 TP195
TP196 TP196
TP197 TP197
PCI_AD25 PCI_AD24
USE FC
PLL
DEFAULT
BYPASS FC
PLL
USE DEFAULT
PCIE STRAPS
DEFAULT
USE EEPROM
PCIE STRAPS
remove reserve pull low resistor
reserve test point only.
PCI_AD23
DISABLE PCI
MEM BOOT
DEFAULT
ENABLE PCI
MEM BOOT
10
REQUIRED STRAPS
PULL
HIGH
PULL
LOW
--------
--------
--------
ALLOW
PCIE Gen2
DEFAULT
FORCE
PCIE Gen1
--------
PCI_CLK3 PCI_CLK4
USE
DEBUG
-------STRAP
IGNORE
--------
DEBUG
STRAP
DEFAULT
non_Fusion
CLOCK MODE
FUSION
CLOCK MODE
DEFAULT
LPC_CLK0
AMD internal EC
ENABLED
EC
DISABLED
DEFAULT
LPC_CLK1
CLKGEN
ENABLED
DEFAULT
CLKGEN
DISABLED
EC_PWM2
LPC ROM
DEFAULT
SPI ROM
CLK_RTC PCI_CLK1
S5 PLUS MODE
DISABLED
DEFAULT
S5 PLUS MODE
ENABLED
B B
FCH PWRGD
+3V
R739
R739
10K/F_4
D17 BAT54A D17 BAT54A
CPU_VRM8380_PG 34,35
ECPWROK 4,17,29
A A
5
2
3
1
4
C1017
C1017
*2.2U/6.3V_6
*2.2U/6.3V_6
10K/F_4
+3V
2 4
U37
U37
3 5
*74AUP1G17GW
*74AUP1G17GW
R740 0_4 R740 0_4
C1016
C1016
*0.1U/10V_4
*0.1U/10V_4
3
FCH_PWRGD 6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Wednesday, May 04, 2011
Wednesday, May 04, 2011
2
Wednesday, May 04, 2011
PROJECT :
Hudson-M3 STRAP/PWRGD
Hudson-M3 STRAP/PWRGD
Hudson-M3 STRAP/PWRGD
R23
R23
R23
1A
1A
1A
of
10 40
10 40
1
10 40
5
ANX3110 Power Up Sequence
D D
+TRAVIS3.3V
+TRAVIS1.2V
4
3
+TRAVIS1.2V
+1.2V
R851 *0_8/s R851 *0_8/s
PV change to short-pad
250mA
PV change to short-pad
PV change to short-pad
R741 *0_8/s R741 *0_8/s
R744 *0_8/s R744 *0_8/s
2
+ANXDVDD1.2
+ANXAVDD1.2
C1018
C1018
2.2U/6.3V_4
2.2U/6.3V_4
C1026
C1026
2.2U/6.3V_4
2.2U/6.3V_4
C1019
C1019
0.1U/10V_4
0.1U/10V_4
C1027
C1027
0.1U/10V_4
0.1U/10V_4
C1020
C1020
0.1U/10V_4
0.1U/10V_4
C1028
C1028
C1021
C1021
0.1U/10V_4
0.1U/10V_4
C1029
C1029
0.1U/10V_4
0.1U/10V_4
C1022
C1022
0.1U/10V_4
0.1U/10V_4
0.01U/25V_4
0.01U/25V_4
1
C1023
C1023
0.01U/25V_4
0.01U/25V_4
11
C1024
C1024
0.01U/25V_4
0.01U/25V_4
150mA
DPST_PWM 20 INT_eDP_AUXN 4
LVDS_BLON 20
DISP_ON 20
+TRAVIS3.3V
2
+TRAVIS3.3V
R747 *0_8/s R747 *0_8/s
PV change to short-pad
R749 *0_8/s R749 *0_8/s
PV change to short-pad
EDIDDATA 20
+ANXAVDD3.3
+ANXDVDD3.3
EDIDCLK 20
C1031
C1031
2.2U/6.3V_4
2.2U/6.3V_4
C1038
C1038
2.2U/6.3V_4
2.2U/6.3V_4
C1034
C1033
C1033
0.1U/10V_4
0.1U/10V_4
C1034
0.1U/10V_4
0.1U/10V_4
C1035
C1035
0.01U/25V_4
0.01U/25V_4
TRAVIS_DDC_DATA EDIDDATA
TRAVIS_DDC_CLK EDIDCLK
C1032
C1032
0.1U/10V_4
0.1U/10V_4
C1039
C1039
0.1U/10V_4
0.1U/10V_4
remove level shift
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
ANX3110
ANX3110
ANX3110
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
11 40 Tuesday, May 03, 2011
11 40 Tuesday, May 03, 2011
11 40 Tuesday, May 03, 2011
C1036
C1036
0.01U/25V_4
0.01U/25V_4
1A
1A
1A
TRAVIS_RST#
10ms >=10ms
+TRAVIS3.3V
LAN_PCIE_RST# 7,27
C C
GPIO_0 : Define VAR_BL &
BL_EN & DIGON H/W or S/W
control power up timming
Pull Hi for H/W mode
---chip have defined power
up timing
Pull Low for S/W mode -APU through DPRX port to
program it
R852 *1M/F_4 R852 *1M/F_4
INT_eDP_AUXP 4
B B
A A
APU_BLPWM 4
+3V
R853 *1M/F_4 R853 *1M/F_4
1 3
MMBT3904-7-F
MMBT3904-7-F
PV change for brightness issue
PWM_VADJ 29
5
PV change to short-pad
+TRAVIS3.3V
CLK_SEL:
Pull Hi for 100MHZ clk source input
Pull Low for 27MHZ crystal input
SI
+3V +1.5V
R762
R762
R771
R771
2.2k_4
2.2k_4
10K_4
10K_4
2
Q50
Q50
R748 1M/F_4 R748 1M/F_4
C1037 0.1U/10V_4 C1037 0.1U/10V_4
R750 *0_4/s R750 *0_4/s
GPIO_1 & GPIO_2 can
let it to NC from
vendor review
CLK_ANX_N 7
CLK_ANX_P 7
C1054 0.1U/10V_4 C1054 0.1U/10V_4
C1055 0.1U/10V_4 C1055 0.1U/10V_4
INT_eDP_TXP0 4
INT_eDP_TXN0 4
INT_eDP_TXP1 4
INT_eDP_TXN1 4
FCH_LVDS_HPD 4
POWER_ON_RESET
TRAVIS_RST#
TP28TP28
TP29TP29
TP30TP30
TP31TP31
R753 10K/F_4 R753 10K/F_4
R756 10K/F_4 R756 10K/F_4
CLK_ANX_N
CLK_ANX_P
TP42TP42
ANX_eDP_AUXP
ANX_eDP_AUXN
TP43TP43
INT_eDP_TXP0
INT_eDP_TXN0
INT_eDP_TXP1
INT_eDP_TXN1
ANX_PWM
R765
R765
*0/J_4
*0/J_4
DPRX_HPD :
It will transfer to
Hi when power enable
ANX_TDO
ANX_TDI
ANX_TMS
ANX_TCK
CLK_SEL
DPRX_HPD
FCH_LVDS_HPD
+ANXDVDD3.3 +ANXDVDD1.2 +ANXAVDD1.2 +ANXAVDD3.3
120mA 120mA 100mA 50mA
U38
U38
34
POR
12
RESET_L
54
TDO
55
TD1
57
TMS
56
TCK
16
GPIO_0
17
GPIO_1
18
GPIO_2
10
CLK_SEL
31
OSC_IN/100MHZ_P
30
OSC_OUT/100MHZ_N
61
DPRX_AUX_P
60
DPRX_AUX_N
3
DPRX_LN0_P
4
DPRX_LN0_N
6
DPRX_LN1_P
7
DPRX_LN1_N
48
CPU_VARY_BL
58
DPRX_HPD
ANX3110
ANX3110
+1.5V
4
3
1
R766
R766
10K/F_4
10K/F_4
Q60
Q60
DMN601K-7
DMN601K-7
2
13
9
53
DVDD33
DVDD33
ANALOGIX ANX3110
+5V
R767
R767
100K/F_4
100K/F_4
3
Q61
Q61
DMN601K-7
DMN601K-7
1
25
33
AVSS
AVSS
2
5
+TRAVIS3.3V
R768
R768
*10K/J_4
*10K/J_4
DPRX_HPD
R769
R769
100K/F_4
100K/F_4
8
AVDD33
AVDD33
AVSS
GND
62
65
R764 47K_4 R764 47K_4
32
46
59
DVDD12
DVDD12
DVDD12
DVDD12
TEST_EN : internal pull
low
1:scan test mode
0:normal mode
2
39
63
AVDD33
AVDD33
1
TXUCLKOUT+
LVDS_U3_P
LVDS_U3_N
LVDS_U2_P
LVDS_U2_N
LVDS_U1_P
LVDS_U1_N
LVDS_U0_P
LVDS_U0_N
LVDS_L3_P
LVDS_L3_N
LVDS_L2_P
LVDS_L2_N
LVDS_L1_P
LVDS_L1_N
LVDS_L0_P
LVDS_L0_N
DDC_DATA
DDC_CLK
VAR_BL
BL_EN
DIGON
CFG_SCL
CFG_SDA
R_BIAS
43
42
45
44
41
40
38
37
36
35
27
26
29
28
24
23
22
21
20
19
50
49
47
15
14
51
52
C1042
C1042
100P/50V_4
100P/50V_4
TXUCLKOUT-
TXUOUT2+
TXUOUT2TXUOUT1+
TXUOUT1TXUOUT0+
TXUOUT0-
TXLCLKOUT+
TXLCLKOUT-
TXLOUT2+
TXLOUT2TXLOUT1+
TXLOUT1TXLOUT0+
TXLOUT0-
TRAVIS_DDC_DATA
TRAVIS_DDC_CLK
VADJ
LVDS_BLON
DISP_ON
CFG_SCL
CFG_SDA
That is for debug
only,can let it to
NC
LVDS_CLKU_P
11
3
TEST_EN
AVDD12
LVDS_CLKU_N
LVDS_CLKL_P
LVDS_CLKL_N
R_BIAS
64
R763
R763
12K/F_4
12K/F_4
AVDD33
R850 *0_8/s R850 *0_8/s
+3V
PV change to short-pad
R757 1K/F_4 R757 1K/F_4
R759 *4.7K_4 R759 *4.7K_4
R760 *4.7K_4 R760 *4.7K_4
TXUCLKOUT+ 20
TXUCLKOUT- 20
TXUOUT2+ 20
TXUOUT2- 20
TXUOUT1+ 20
TXUOUT1- 20
TXUOUT0+ 20
TXUOUT0- 20
TXLCLKOUT+ 20
TXLCLKOUT- 20
TXLOUT2+ 20
TXLOUT2- 20
TXLOUT1+ 20
TXLOUT1- 20
TXLOUT0+ 20
TXLOUT0- 20
1
2
3
4
5
6
7
8
JDIM2A
M_A_A[15:0] 3
A A
M_A_BS#0 3
M_A_BS#1 3
M_A_BS#2 3
M_A_CS#0 3
M_A_CS#1 3
M_A_CLKP0 3
M_A_CLKN0 3
M_A_CLKP1 3
M_A_CLKN1 3
M_A_CKE0 3
M_A_CKE1 3
M_A_CAS# 3
M_A_RAS# 3
M_A_WE# 3
CGCLK_SMB 6,13
CGDAT_SMB 6,13
M_A_ODT0 3
M_A_ODT1 3
B B
C C
M_A_DM[7:0] 3
M_A_DQSP0 3
M_A_DQSP1 3
M_A_DQSP2 3
M_A_DQSP3 3
M_A_DQSP4 3
M_A_DQSP5 3
M_A_DQSP6 3
M_A_DQSP7 3
M_A_DQSN0 3
M_A_DQSN1 3
M_A_DQSN2 3
M_A_DQSN3 3
M_A_DQSN4 3
M_A_DQSN5 3
M_A_DQSN6 3
M_A_DQSN7 3
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDR3-DIMM2
DDR3-DIMM2
H9.2mm
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
(204P)
(204P)
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ[0..63] 3
+VREF_DQ
+3V
M_A_EVENT# 3
M_A_RST# 3
PV change to short-pad
R770 *0_6/s R770 *0_6/s
+VREF_CA0
+VREF_CA0
R865 *1K_4 R865 *1K_4
+VREF_DQ0
+VREF_CA0
+1.5VSUS
R864 *0_4/S R864 *0_4/S
R866 *1K_4 R866 *1K_4
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199
77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
JDIM2B
JDIM2B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
DDR3-DIMM2
DDR3-DIMM2
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DDR_VTTREF 3,13,36
+1.5VSUS
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
VSS53
VSS54
12
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
204
205
206
C378
C378
*15P/50V_4
*15P/50V_4
C379
C379
for WiMAX
*15P/50V_4
*15P/50V_4
+0.75V_DDR_VTT
Place these Caps near So-Dimm0.
+1.5VSUS
C210 10U/6.3VS_6 C210 10U/6.3VS_6
C185 10U/6.3VS_6 C185 10U/6.3VS_6
C166 10U/6.3VS_6 C166 10U/6.3VS_6
C221 10U/6.3VS_6 C221 10U/6.3VS_6
C254 10U/6.3VS_6 C254 10U/6.3VS_6
C232 10U/6.3VS_6 C232 10U/6.3VS_6
C156 0.1U/10V_4 C156 0.1U/10V_4
C197 0.1U/10V_4 C197 0.1U/10V_4
C172 0.1U/10V_4 C172 0.1U/10V_4
C192 0.1U/10V_4 C192 0.1U/10V_4
C267 0.1U/10V_4 C267 0.1U/10V_4
C152 150P/50V_4 C152 150P/50V_4
C244 150P/50V_4 C244 150P/50V_4
C245 150P/50V_4 C245 150P/50V_4
C251 150P/50V_4 C251 150P/50V_4
+3V
D D
1
C352 2.2U/6.3V_4 C352 2.2U/6.3V_4
C368 *0.1U/10V_4 C 368 *0.1U/10V_4
C358 *0.047U/10V_4 C358 *0.047U/10V_4
1 2
SI EMI
2
+0.75V_DDR_VTT
C365 1U/6.3V_4 C365 1U/6.3V_4
C381 1U/6.3V_4 C381 1U/6.3V_4
C380 1U/6.3V_4 C380 1U/6.3V_4
C366 1U/6.3V_4 C366 1U/6.3V_4
C360 *10U/6.3V_8 C 360 *10U/6.3V_8
C387 *10U/6.3V_8 C 387 *10U/6.3V_8
C370 10U/6.3VS_6 C370 10U/6.3VS_6
C367 *0.047U/10V_4 C367 *0.047U/10V_4
C382 *0.047U/10V_4 C382 *0.047U/10V_4
+VREF_DQ0
C33 0.1U/10V_4 C33 0.1U/10V_4
C29 2.2U/6.3V_4 C29 2.2U/6.3V_4
+VREF_CA0
C308
C308
C334
C334
C324
C324
1 2
1 2
1 2
0.1U/10V_4
0.1U/10V_4
2.2U/6.3V_4
2.2U/6.3V_4
*0.047U/10V_4
*0.047U/10V_4
3
150P/50V_4
150P/50V_4
SI EMI
for WiMAX
+1.5VSUS
150P/50V_4
150P/50V_4
C253
C253
C261
C261
150P/50V_4
150P/50V_4
C173
C173
C234 *100P/50V_4 C234 *100P/50V_4
C222 *100P/50V_4 C222 *100P/50V_4
4
+1.5VSUS
R773
R773
1K/F_4
1K/F_4
R775
R775
1K/F_4
1K/F_4
Reserved for AMD suggest
R772 0/J_6 R772 0/J_6
+3VS5
C1049 *.1U/10V_4 C1049 *.1U/10V_4
5 2
U40
5
U40
3
+
+
4
-
-
*OPA343NA/3K
*OPA343NA/3K
R777 *0_4 R777 *0_4
R778 *0_4 R778 *0_4
+VREF_DQ_L
C1043
C1043
*0.47u/6.3V_4
*0.47u/6.3V_4
1
R774 *10_4 R774 *10_4
1 2
R776
R776
*10K/F_4
*10K/F_4
+0.75V_DDR_VTT 13,36
+1.5VSUS 2,3,4,5,13,36,37,39
+VREF_DQ
+VREF_DQ
352-(&75
352-(&75
352-(&75
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
+3V 2,4,6,8,9,10,11,13,14,17,20,22,23,24,25,27,28,29,30,34,37,39
6
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
DDR3 DIMM-0
DDR3 DIMM-0
DDR3 DIMM-0
8
1A
1A
1A
of
of
of
12 40 Tuesday, May 03, 2011
12 40 Tuesday, May 03, 2011
12 40 Tuesday, May 03, 2011