HP Pavilion G4 Schematics
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R18D INTEL UMA/DISCRETE SYSTEM DIAGRAM
+3V/+5V
A A
+1.05VTT
CPU Core
VGAC
+1.
B B
Charger
Discharger
UMA V
C C
D D
PG.34
PG.35
PG.36
ore/+1.1V
PG.37
5VSUS
PG.38
PG.39
P
G.40
GACORE
PG.41
d reader
Car
RTS
5219-GR
10/100
KB TP
1
/+1.8V
LAN3
PG.27
En
SOD
Max. 4GB
SOD
Max. 4GB
HDD
D
OD
3&,([
LAN
RTS
8165EH
PG.30 P
10/100
KBC
E KB3930QF D2
ROM FAN
2
IMM1
G.15
P
IMM2
PG.16
PG.26
PG.26
LAN1LAN2
WLAN
BT COMB
PG.32
DDR3
Channel A
DDR3
Channel B
SATA
SATA
O
G.33
LPC
USB 2.0
3
INTEL
Arrandale
34mm X 28mm
1288pin BGA
5W
TDP 3
PG.3~9
FDI
DMI
PCI-E x8
Nvidia
N12P-GV
PP;PP
7'3
PG.17~21
DDR3
900M
CLOCK GE
Hz
14.318MHz
N
PG.2
VRAM
64Mx16x4,64bit
0
1
INTEL PCH
Ibex Peak-m
DP Po
CRT
rt B
LVDS
27mm X 25mm
1071pin F
TDP 5W
CBGA
USB2.
X2
USB 2.
0
0 Ports
G.29
PORT0,1
PG.21
HDMI
Leve
l
Shifter
PG.24
Webcam
PG.23P
PORT4PORT10
S
oftbre
BT
e
G.29
P
PORT13
ze
HDMI
CRT
LVDS
PG.24
PG.25
G.23
P
Stackup
PG.10~14
TOP
GND
Azalia
AUDI
CODEC
T92H
ID
4
O
D80B1
PG.28
Speaker
IC
HP/M
Anal
og MIC
5
PG.28
PG.29
PG.28
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
hursday, January 13, 2011
Date: Sheet
hursday, January 13, 2011
Date: Sheet
hursday, January 13, 2011
6
Date: Sheet
7
IN1
IN2
VCC
BOT
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1A
1A
1A
of
of
of
142T
142T
142T
8
WWW.AliSaler.Com
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WWW.AliSaler.Com
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3
4
5
6
7
8
02
25mA 150mA
+1.0
A A
Place each 0.1uF cap close to pin
B B
C C
+VDDIO
-181T15/1.5A_6
-181T15/1.5A_6
+3V
_CLK
C742 0.
C742 0.
C723 0.1U/10V_4C723 0.1U/10V_4
C747 10U
C747 10U
C746
C746
+VDDCO
CLK_IC
H_14M
C708 *
C708 *
1U/10V_4
1U/10V_4
/6.3VS_6
/6.3VS_6
*10U/6.3V_8
*10U/6.3V_8
+VDDS
+VDDIO_CLK
CGDAT_SMB<11,15,16>
CGCLK
10P/50V_4
10P/50V_4
E_CLK
RE_CLK
C722 *
C722 *
C737 *
C737 *
_SMB<11,15,16>
R494 10K_4R494 10K_4
R478 33_4R478 33_4
5V
L56
L56
1 2
HCB1608KF
HCB1608KF
CLK_
ICH_14M<11>
Place R8044 within 0.5" of C/G
1 2
HCB1608KF
HCB1608KF
L57
L57
-181T15/1.5A_6
-181T15/1.5A_6
+VDDS
E_CLK
C704 4.
C704 4.
C731 0.1U/10V_4C731 0.1U/10V_4
C705 0.
C705 0.
7U/6.3V_6
7U/6.3V_6
1U/10V_4
1U/10V_4
+3V
Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin
U29
U29
5
VDD_L
CD
29
VDD_REF
1
VDD_US
12
0.047U/10V_4
0.047U/10V_4
12
0.047U/10V_4
0.047U/10V_4
CK_PW
XTAL_OUT
XTAL_I
CPU_
SEL
RGD_R
N
Vender
ICS
RealtekRTM
Sil
B
17
VDD_S
RC
24
VDD_CPU
18
U_IO
VDD_CP
15
VDD_S
RC_IO
31
SDATA
890N-632
890N-632
RTM
RTM
32
SCLK
16
CPU_STOP#
30
/CPU_SEL
REF_0
25
CK_PWR
GD/PD#_3.3
27
XOUT
28
XIN
QFN32
9
2
8
ego
QFN32
VSS_SATA
VSS_USB
VSS_LCD
RT
RT
M890N-632
M890N-632
AL000890000
AL000890000
IC OTHER(32P) RTM890N-632-GRT(QFN)
IC OTHER(32P) RTM890N-632-GRT(QFN)
Part Part Number
ICS
9LVS3197 AL003197001
890N-632 AL000890000
SLG8LV
595VTR AL000595000
DOT
DOT9
27MHz
CPU-0
CPU-0#
CPU-1
CPU-1
96T_LPR
6C_LPR
SRC-1
SRC-1
SATA
SATA#
_nonSS
27MHz_SS
VSS_REF
VSS_CPU
VSS_SRC
+3V
1 2
*HCB1608KF-181T15/1.5A_6
*HCB1608KF-181T15/1.5A_6
V
+1.5
1 2
HCB1608KF
HCB1608KF
_BCLK_P
CLK_BUF
23
22
20
19
#
3
4
13
14
#
10
11
6
7
33
GND
26
21
12
Part Description
IC OTHER(3
IC OTHER(32P) RTM890N-632-GRT(QFN)
IC O
150mA
+VDDCO
-181T15/1.5A_6
-181T15/1.5A_6
C714 * 3.3P/50 V_4C71 4 *3.3P/ 50V_4
CLK_BUF
_BCLK_P
CLK_BUF
_BCLK_N
_PCIE_3GPLL
_PCIE_3GPLL#
_DREFSSCLK
_DREFSSCLK#
A_27M_NOSS
A_27M_SS
CLK_VG
RE_CLK
C733 4.
C733 4.
C729 0.1U/10V_4C729 0.1U/10V_4
C711 0.
C711 0.
C716 0.
C716 0.
_BCLK_N
CLK_BUF
L53
L53
L54
L54
0510 add for WiMAX
close to U13
CLK_BUF_DREFCLK
BUF_DREFCLK#
CLK_
CLK_BUF
CLK_BUF
CLK_BUF
CLK_BUF
CLK_VG
2P) ICS9LVS3197AKLFT(MLF)
THER(32P)SLG8LV595VTR(QFN)
7U/6.3V_6
7U/6.3V_6
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
Y6
Y6
_IN
XTAL
12
C702
C702
33P/
33P/
50V_4
50V_4
1 2
14.318MH
14.318MH
_OUT
XTAL
12
Z
Z
C703
C703
33
33
P/50V_4
P/50V_4
+3V
R474
R474
*10K_4
*10K_4
_SEL
CPU
R476
R476
10K_4
10K_4
01
CPU_SEL
CPU0/1=133MHz
(de
CLK_BUF
_BCLK_P <11>
_BCLK_N <11>
CLK_BUF
CLK_BUF_DREFCLK <11>
BUF_DREFCLK# <11>
CLK_
CLK_BUF_PCIE_3GPLL < 11>
CLK_BUF
_PCIE_3GPLL# <11>
CLK_BUF
_DREFSSCLK <11>
_DREFSSCLK# <11>
T47T47
T46T46
CLK_BUF
VR_P
WRGD_CLKEN#<35>
fault)
CPU0/1=100MHz
+3V
R493
R493
1K_4
1K_4
RGD_R
CK_PW
3
Q39
Q39
2N7002E
2N7002E
R495
2
R495
100K_4
100K_4
1
<10,11,12,14,41>
+1.05V
+1.5V
<6,32>
3,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
+3V <
D D
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Docume n t Number Rev
Size Docume n t Number Rev
Size Document Number Rev
Custom
Custom
Custom
Clock G
Clock G
Clock G
en(9LRS3197)
en(9LRS3197)
en(9LRS3197)
uesday, February 15, 2011
Date: Sheet
uesday, February 15, 2011
Date: Sheet
uesday, February 15, 2011
1
2
3
4
5
6
Date: Sheet
7
1A
1A
1A
of
of
of
242T
242T
242T
8
WWW.AliSaler.Com
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WWW.AliSaler.Com
U3018A
U3018A
F7
DMI_
TXN0<12>
DMI_RX#[
0]
D D
2.7GT/s data rate
FDI
_TXN[7:0]<12>
C C
TXP[7:0]<12>
FDI_
FDI_
FDI_
FDI
FDI
B B
Discrete O
R3361 *1K/F_4R3361 *1K/F_4
R3355 *
R3355 *
R3350 *
R3350 *
R3356 *
R3356 *
1K/F_4
1K/F_4
R3351 *
R3351 *
FDI_FSYNC can
gang all these
4 signals
A A
together and
tie them with
only one 1K
resistor to GND
( Check list
1.0 ).
J8
TXN1<12>
DMI_
DMI_
DMI_
_TXP0<12>
DMI
_TXP1<12>
DMI
DMI
_TXP2<12>
DMI
_TXP3<12>
DMI_
DMI_
DMI_
DMI_
DMI_
DMI_
DMI_
DMI_
FSYNC0<12>
FSYNC1<12>
FDI_
_LSYNC0<12>
_LSYNC1<12>
nly
DMI_RX#[
1]
K8
TXN2<12>
TXN3<12>
RXN0<12>
RXN1<12>
RXN2<12>
RXN3<12>
RXP0<12>
RXP1<12>
RXP2<12>
RXP3<12>
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_TXP3
FDI_
FDI_
FDI_
FDI_
INT<12>
0_4
0_4
0_4
0_4
0_4
0_4
2]
DMI_RX#[
J4
3]
DMI_RX#[
F9
DMI_RX[
0]
J6
DMI_RX[
K9
DMI_RX[
J2
DMI_RX[
H17
DMI_TX#[0]
K15
DMI_TX
J13
DMI_TX
F10
DMI_TX
G17
DMI_TX
M15
DMI_TX
G13
DMI_TX
J11
DMI_TX[3]
TXN0
L2
FDI_T
TXN1
N7
FDI_T
TXN2
M4
FDI_T
TXN3
P1
FDI_T
TXN4
N10
FDI_T
TXN5
R7
FDI_T
TXN6
U7
FDI_T
TXN7
W8
FDI_T
TXP0
K1
FDI_
TXP1
N5
FDI_
TXP2
N2
FDI_TX[2]
R2
FDI_
TXP4
N9
FDI_
TXP5
R8
FDI_
TXP6
U6
FDI_TX[6]
TXP7
W10
FDI_
AC7
FDI_
AC9
FDI_FSYNC[1]
5
AB
FDI_INT
AA1
FDI_LSYNC[0]
AB2
FDI_LS
IC
IC
,ARD_BGA,R1P0
,ARD_BGA,R1P0
FDI_INT
FDI_
FSYNC0
FDI_
FSYNC1
LSYNC0
FDI_
LSYNC1
FDI_
#[1]
#[2]
#[3]
[0]
[1]
[2]
X#[0]
X#[1]
X#[2]
X#[3]
X#[4]
X#[5]
X#[6]
X#[7]
TX[0]
TX[1]
TX[3]
TX[4]
TX[5]
TX[7]
FSYNC[0]
YNC[1]
1]
2]
3]
DMI Intel(R) FDI
DMI Intel(R) FDI
For S3 leakage issue
PCI
PCI
E_CLK_REQ7#<13>
+3VS5
E_CLK_REQ7#
R346910K/
R346910K/
F_4
F_4
1 2
5
COMPI
PEG_I
COMPO
PEG_I
PEG_R
COMPO
PEG_R
BIAS
X#[0]
PEG_R
PEG_R
X#[1]
PEG_R
X#[2]
X#[3]
PEG_R
X#[4]
PEG_R
PEG_R
X#[5]
PEG_R
X#[6]
PEG_RX#[7]
X#[8]
PEG_R
PEG_R
X#[9]
PEG
_RX#[10]
PEG_RX#[11]
_RX#[12]
PEG
_RX#[13]
PEG
PEG
_RX#[14]
PEG_RX#[15]
_RX[0]
PEG
PEG
_RX[1]
PEG_RX[2]
_RX[3]
PEG
_RX[4]
PEG
PEG
_RX[5]
PEG
_RX[6]
_RX[7]
PEG
_RX[8]
PEG
PEG
_RX[9]
PEG
_RX[10]
_RX[11]
PEG
_RX[12]
PEG
PEG
_RX[13]
PEG
_RX[14]
PEG_RX[15]
PEG_T
X#[0]
PEG_T
X#[1]
PEG_TX#[2]
X#[3]
PEG_T
PEG_T
X#[4]
PEG_T
X#[5]
PEG_TX#[6]
X#[7]
PEG_T
X#[8]
PEG_T
PEG_T
X#[9]
PEG_TX#[10]
X#[11]
PEG_T
X#[12]
PEG_T
PEG_T
X#[13]
PEG_T
X#[14]
X#[15]
PEG_T
PEG
_TX[0]
PEG
_TX[1]
_TX[2]
PEG
_TX[3]
PEG
PEG
_TX[4]
PEG
_TX[5]
PEG_TX[6]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
_TX[7]
PEG
PEG
_TX[8]
PEG
_TX[9]
PEG_TX[10]
X[11]
PEG_T
PEG_T
X[12]
PEG_T
X[13]
PEG_TX[14]
X[15]
PEG_T
3
Q3006
Q3006
DMN60
DMN60
1K-7
1K-7
2
1
7
7
C303
C303
DDR3_DRAMRST#_C
0.047U 10V_4
0.047U 10V_4
R304
R304
7 100K/F_4
7 100K/F_4
B12
A13
D12
B11
G40
G38
H34
P34
G28
H25
H24
D29
B26
D26
B23
D22
A20
D19
A17
B14
F40
J38
G34
M34
J28
G25
K24
B28
A27
B25
A24
B21
B19
B18
B16
D15
N40
L38
M32
D40
A38
G32
B33
B35
L30
A31
B32
L28
N26
M24
G21
J20
L40
N38
N32
B39
B37
H32
A34
D36
J30
B30
D33
N28
M25
N24
F21
L20
PEG_C
PEG_R
PEG_R
PEG_RX#1
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
PEG_R
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG_TX#4
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG
C_PEG_TX7
DDR3_DRA
OMP
BIAS
X#0
X#2
X#3
X#4
X#5
X#6
X#7
X0
X1
X2
X3
X4
X5
X6
X7
_TX#0
C3751 0.
C3751 0.
C3744 0.
C3744 0.
_TX#1
C3740 0.
C3740 0.
_TX#2
C3733 0.1U/10V_4C3733 0.1U/10V_4
_TX#3
C3728 0.1U/10V_4C3728 0.1U/10V_4
C3724 0.
C3724 0.
_TX#5
C3722 0.
C3722 0.
_TX#6
_TX#7
C3717 0.
C3717 0.
C3747 0.
C3747 0.
_TX0
C3741 0.1U/10V_4C3741 0.1U/10V_4
_TX1
_TX2
C3735 0.
C3735 0.
C3729 0.
C3729 0.
_TX3
C3725 0.
C3725 0.
_TX4
_TX5
C3723 0.
C3723 0.
C3718 0.
C3718 0.
_TX6
C3715 0.1U/10V_4C3715 0.1U/10V_4
MRST# <15,16>
4
R3062 49.9/F_4R3062 49.9/F_4
F_4
F_4
R3060 750/
R3060 750/
PEG_R
X#[0..7] <17>
PEG_RX[0..7] <17>
PEG_T
PEG_T
20,31,33,34,37,40,41>
X#[0..7] <17>
X[0..7] <17>
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
PEG_T
PEG_T
PEG_T
PEG_T
PEG_TX#4
PEG_T
PEG_T
PEG_T
PEG_T
PEG_T
PEG_T
PEG_T
PEG_T
PEG_T
PEG_T
PEG_TX7
X#0
X#1
X#2
X#3
X#5
X#6
X#7
X0
X1
X2
X3
X4
X5
X6
For S3 leakage issue
R320
R320
*10K/F_4
*10K/F_4
1.1<34>
STAT_
Use a voltage divider with VDDQ (1.5 V) rail
ON in S3) and resistor combination of 1.5K ±1%
(to VDDQ)/750±1% (to GND) to convert to
processor VTT level.
4
3
R3152 20/F_4R3152 20/F_4
H_COM
R3151 20/
R3151 20/
F_4
F_4
H_COMP2
9/F_4
9/F_4
H_COM
R3150 49.
R3150 49.
H_COMP0
R3149 49.9/F_4R3149 49.9/F_4
H_CAT
I<13>
H_PEC
H_PRO
CHOT#<31,35>
PM_
THRMTRIP#<13,31>
T3055T3055
H_CPURS
PM_SY
NC<12>
H_P
WRGOOD<13>
PLTR
3 5
ST#<11,17,26,29,31,32>
U3010
U3010
MC
MC
4
3
R3212 *
R3212 *
PM_DRAM_PWRGD
R3140 1.5K/F_4R3140 1.5K/F_4
R3144 750/F
R3144 750/F
74VHC1G08DFT2G
74VHC1G08DFT2G
HWPG
_1
4
H_V
0_4
0_4
TTPWRGD
T3057T305
CPU_P
R318
R318
2K/F_4
2K/F_4
+1.5
VSUS
PM_DRAM_PWRGD<12>
+3V
2
HWPG<
1
+3VS5
6
6
5
R3215
R321
.25K/F_4
*8.25K/F_4
*8
2
1
3 5
U3012
U3012
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
P3
AD71
AC70
P1
AD69
AE66
M71
ERR#
N61
N19
N67
N17
T#
N70
M17
AM7
Y67
AM5
H15
7
Y70
LTRST#
G3
_4
_4
7
7
H_VT
H_VT
TPWRGDH_VTTPWRGD
TPWRGDH_VTTPWRGD
R3180
R3180
F_4
F_4
1K/
1K/
8
R3178
R317
4
*0_4
*0_
R3213 *
R3213 *
R3211
R3211
/F_4
/F_4
1.5K
1.5K
PM_DRAM_PWRGD
R314
R314
7
7
750/F_4
750/F_4
11,12,13,14,17,28,33,34,36,38,40>
U3018B
U3018B
3
COMP
COMP
2
1
COMP
COMP
0
_DETECT
PROC
CATERR#
PECI
PROCHOT#
THERMTRIP#
OBS#
RESET_
PM_SYN
C
VCCPWRGOOD_1
VCC
PWRGOOD_0
SM_DRA
MPWROK
PWRGOOD
VTT
TAPPWRGOOD
N#
RSTI
IC
IC
,ARD_BGA,R1P0
,ARD_BGA,R1P0
_1
0_4/S
0_4/S
HWPG
2
+3VS5<10,
+1.5V_CPU<5,6>
Misc
Misc
Thermal Power Management
Thermal Power Management
DDR3
DDR3
R3155 51/J
R3155 51/J
XDP_T
DO_R
ERR#
H_CAT
R3142 49.9/
R3142 49.9/
H_PRO
R3138 68_4R3138 68_4
CHOT#
LTRST#
CPU_P
R3135 *68/
R3135 *68/
R3146 *51/
R3146 *51/
XDP_T
MS
R3162 *51/
R3162 *51/
DI_R
XDP_T
XDP_PR
R3153 *51/
R3153 *51/
EQ#
CLK
XDP_T
R3145 *51/
R3145 *51/
2
BCLK#
BCLK_
BCLK_
PEG_C
_CLK#
PEG
DPLL_R
EF_SSCLK
DPLL
_REF_SSCLK#
Clocks
Clocks
SM_D
RAMRST#
SM_RCO
SM_RCO
SM_RCO
XT_TS#[0]
PM_E
XT_TS#[1]
PM_E
Misc
Misc
PRDY#
PREQ#
TRST#
TDI_
TDO_M
DBR#
BPM
BPM
BPM
BPM#[3]
BPM
BPM
BPM
BPM#[7]
JTAG & MBP
JTAG & MBP
+1.05V_VTT
_4
_4
F_4
F_4
J_4
J_4
J_4
J_4
J_4
J_4
J_4
J_4
J_4
J_4
1
+1.05
V_VTT<5,6,13,14,31,34,35,36,40>
+1.5VSUS<6,15,16,36,37,38>
+3V<2,10,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
03
A
DIS UM
NA
Rc
F_4
F_4
F_4
F_4
/F_4
/F_4
0_4/S
0_4/S
/F_4
/F_4
T3052T3052
T3028T3028
7
T3027T302
T3030T3030
T3031T3031
11/6
T3029T3029
must
T3054T3054
T3056T3056
test point.
G MAPPING
6
6
R317
R317
*0_4/S
*0_4/S
R3161 51/J_4R3161 51/J_4
Scan Chain
(Default)
Ra
Rb
Rc 0 oh
+1.05
+1.05
add
7
AK
BCLK
AK
8
K71
ITP
J70
ITP#
L21
LK
J21
Y2
W4
BJ12
SM_RCOMP_0
BV33
MP[0]
SM_RCOMP_1
BP39
MP[1]
SM_
BV40
MP[2]
PM_EXT
AV66
PM_EXT
AV64
U7
1
U6
9
T67
TCK
N65
TMS
P6
9
T69
TDI
T71
TDO
P71
M
T70
W71
J69
#[0]
J67
#[1]
J62
#[2]
K65
K62
#[4]
J64
#[5]
K69
#[6]
M69
DREFS
DREFS
RCOMP_2
_TS#0
_TS#1
XDP_PR
XDP_PR
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_T
XDP_TRST#
CPU_BCLK <13>
CLK_
CLK_CPU_BCLK# <13>
CLK_
PCIE_3GPLL <11>
CLK_PCIE_3GPLL# <11>
SCLK
SCLK#
Rb
MRST#_C
DDR3_DRA
R3393 100/
R3393 100/
R3401 24.9/F_4R3401 24.9/F_4
R3403 130/
R3403 130/
R3181 10K
R3181 10K
R3177 *
R3177 *
R3175 *0_4/SR3175 *0_4/S
R3188 10K
R3188 10K
DY#
EQ#
CLK
MS
RST#
DI_R
DO_R
DI_M
DO_M
XDP_DBRESET# <12>
JTA
DI_R
DO_M
DI_M
DO_R
Ra
Ra
Rb
Rc
Rd
Re
CPU Only
GMCH Only
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
e Document Number Rev
Siz
Size D ocument N umber R ev
Size D ocument N umber R ev
Custo
Custo
Custo
m
m
m
ESSER 1/7(HOST&PEX)
ESSER 1/7(HOST&PEX)
ESSER 1/7(HOST&PEX)
PROC
PROC
PROC
Date: Sheet
Date: Sheet
Date: Sheet
1
0 ohm
m NA
DREF
SSCLK <11>
SSCLK# <11>
DREF
V_VTT
PM_EXTTS#0 <15,16>
TS#1 <16>
PM_EXT
V_VTT
STUFF -> Ra, Rc, Re
NO STUFF -> Rb, Rd
STUFF -> Ra, Rb
NO ST
UFF -> Rc, Rd, Re
STUFF -> Rd, Re
NO ST
UFF -> Ra, Rb, Rc
3
3
3
of
of
of
0 ohm
NA
42Tuesday, Febru a ry 15, 2011
42Tuesday, Febru a ry 15, 2011
42Tuesday, Febru a ry 15, 2011
1A
1A
1A
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2
1
ARRANDALE/CLARKSFIELD PROCESSOR (DDR3)
U3018D
U3018C
U3018C
34
BM
SA_CK[0]
D D
C C
B B
M_A_DQ[63:0]<15>
M_A_DQ0
AT8
SA_DQ[
BM43
BM53
BF11
BE11
BH13
BN11
BG17
BK15
BG15
BH17
BK17
BN20
BN17
BK25
BH25
BJ20
BH21
BG24
BG25
BJ40
BF47
BF48
BN40
BH43
BN44
BN47
BN48
BN51
BH53
BJ55
BH48
BJ48
BN55
BF55
BN57
BN65
BJ61
BF57
BJ57
BK64
BK61
BJ63
BF64
BB64
BB66
BJ66
BF65
AY64
BC70
BT38
BH38
BF21
BK43
BL38
BF38
0]
AT6
SA_DQ[
1]
BB5
2]
SA_DQ[
BB9
SA_DQ[3]
AV7
SA_DQ[4]
AV6
SA_DQ[
5]
BE6
SA_DQ[
6]
BE8
7]
SA_DQ[
8]
SA_DQ[
SA_DQ[9]
BK5
SA_DQ[
10]
SA_DQ[
11]
BF9
SA_DQ[
12]
BF6
13]
SA_DQ[
BK7
SA_DQ[14]
BN8
SA_DQ[
15]
16]
SA_DQ[
BN9
SA_DQ[
17]
18]
SA_DQ[
SA_DQ[19]
BK9
SA_DQ[
20]
21]
SA_DQ[
SA_DQ[
22]
23]
SA_DQ[
24]
SA_DQ[
25]
SA_DQ[
26]
SA_DQ[
SA_DQ[
27]
28]
SA_DQ[
SA_DQ[
29]
30]
SA_DQ[
31]
SA_DQ[
SA_DQ[
32]
SA_DQ[33]
SA_DQ[
34]
35]
SA_DQ[
36]
SA_DQ[
37]
SA_DQ[
SA_DQ[38]
SA_DQ[
39]
40]
SA_DQ[
SA_DQ[
41]
42]
SA_DQ[
SA_DQ[43]
SA_DQ[
44]
45]
SA_DQ[
SA_DQ[
46]
47]
SA_DQ[
SA_DQ[48]
SA_DQ[
49]
SA_DQ[
50]
DDR SYSTEM MEMORY A
SA_DQ[
SA_DQ[
SA_DQ[53]
SA_DQ[54]
SA_DQ[
SA_DQ[
SA_DQ[
SA_DQ[
SA_DQ[
SA_DQ[
SA_DQ[
SA_DQ[
SA_DQ[
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
51]
52]
55]
56]
57]
58]
59]
60]
61]
62]
63]
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS#0<15>
M_A_BS#1<15>
M_A_BS#2<15>
M_A_CAS#< 15>
M_A_RAS#< 15>
M_A_WE#<15>
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[
SA_DM[
SA_DM[
SA_DM[
SA_DM[
SA_DM[
SA_DM[
SA_DM[
SA_DM[
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[
SA_DQS[
SA_DQS[2]
SA_DQS[
SA_DQS[
SA_DQS[
SA_DQS[
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
BP35
BF
20
BK36
BH36
BK24
BH40
BJ
47
BF43
BL47
1]
M_A_DM0
BB10
0]
M_A_DM1
BJ10
1]
M_A_DM2
BM15
2]
M_A_DM3
BN24
3]
M_A_DM4
BG44
4]
M_A_DM5
BG53
5]
M_A_DM6
BN62
6]
M_A_DM7
BH59
7]
M_A_DQS#0
AY5
M_A_DQS#1
7
BJ
M_A_DQS#2
13
BN
M_A_DQS#3
BL21
M_A_DQS#4
BH44
M_A_DQS#5
BK51
M_A_DQS#6
BP58
M_A_DQS#7
BE62
M_A_DQS0
AY7
0]
M_A_DQS1
BJ5
1]
M_A_DQS2
BL13
M_A_DQS3
BN21
3]
M_A_DQS4
BK44
4]
M_A_DQS5
BH51
5]
M_A_DQS6
BM60
6]
M_A_DQS7
BE64
M_A_A0
36
BT
M_A_A1
BP33
M_A_A2
BV36
M_A_A3
BG34
M_A_A4
BG32
M_A_A5
32
BN
M_A_A6
BK32
M_A_A7
BJ
30
M_A_A8
30
BN
M_A_A9
BF
28
M_A_A10
BH
34
M_A_A11
30
BH
M_A_A12
BJ
28
M_A_A13
40
BF
M_A_A14
BN28
M_A_A15
BN
25
M_A_CLK0 <15>
M_A_CLK0# <15>
M_A_CKE0 <15>
M_A_CLK1 <15>
M_A_CLK1# <15>
M_A_CKE1 <15>
M_A_CS#0 <15>
M_A_CS#1 <15>
M_A_ODT0 <15>
M_A_ODT1 <15>
M_A_DM[7:0] <15>
M_A_DQS#[7:0] <15>
M_A_DQS[7:0] <15>
M_A_A[15:0] <15>
M_B_DQ[63:0]<16>
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS#0<16>
M_B_BS#1<16>
M_B_BS#2<16>
M_B_CAS#<16>
M_B_RAS#<16>
M_B_WE#<16>
U3018D
33
BU
SB_CK[0]
BV34
SB_CK#[0]
BA2
SB_DQ[0]
AW
2
SB_DQ[1]
BD
1
SB_DQ[2]
BE4
SB_DQ[3]
AY1
SB_DQ[4]
BC2
SB_DQ[5]
BF
2
SB_DQ[6]
BH
2
SB_DQ[7]
BG4
SB_DQ[8]
BG1
SB_DQ[9]
BR6
SB_DQ[10]
BR
8
SB_DQ[11]
BJ
4
SB_DQ[12]
BK2
SB_DQ[13]
9
BU
SB_DQ[14]
BV10
SB_DQ[15]
BR
10
SB_DQ[16]
12
BT
SB_DQ[17]
BT
15
SB_DQ[18]
BV15
SB_DQ[19]
BV12
SB_DQ[20]
BP12
SB_DQ[21]
BV17
SB_DQ[22]
BU
16
SB_DQ[23]
BP15
SB_DQ[24]
19
BU
SB_DQ[25]
BV22
SB_DQ[26]
22
BT
SB_DQ[27]
BP19
SB_DQ[28]
BV19
SB_DQ[29]
BV20
SB_DQ[30]
20
BT
SB_DQ[31]
48
BT
SB_DQ[32]
BV48
SB_DQ[33]
BV50
SB_DQ[34]
BP49
SB_DQ[35]
47
BT
SB_DQ[36]
BV52
SB_DQ[37]
BV54
SB_DQ[38]
BT54
SB_DQ[39]
BP53
SB_DQ[40]
53
BU
SB_DQ[41]
BT
59
SB_DQ[42]
57
BT
SB_DQ[43]
BP56
SB_DQ[44]
BT
55
SB_DQ[45]
60
BU
SB_DQ[46]
BV59
SB_DQ[47]
BV61
SB_DQ[48]
BP60
SB_DQ[49]
BR
66
SB_DQ[50]
BR
64
SB_DQ[51]
BR
62
SB_DQ[52]
61
BT
SB_DQ[53]
BN68
SB_DQ[54]
BL69
SB_DQ[55]
BJ
71
SB_DQ[56]
BF
70
SB_DQ[57]
BG71
SB_DQ[58]
67
BC
SB_DQ[59]
BK70
SB_DQ[60]
BK67
SB_DQ[61]
BD
71
SB_DQ[62]
BD
69
SB_DQ[63]
BV43
SB_BS[0]
BV41
SB_BS[1]
BV24
SB_BS[2]
BU46
SB_CAS#
BT40
SB_RAS#
BT41
SB_WE#
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[
SB_DM[
SB_DM[
SB_DM[
SB_DM[
SB_DM[
SB_DM[
SB_DM[
SB_DM[
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
BT
26
BV38
BU39
BT24
BP46
BT
43
BV45
BU49
1]
M_B_DM0
BB4
0]
M_B_DM1
BL4
1]
M_B_DM2
BT13
2]
M_B_DM3
BP22
3]
M_B_DM4
BV47
4]
M_B_DM5
BV57
5]
M_B_DM6
BU65
6]
M_B_DM7
BF67
7]
M_B_DQS#0
BE2
M_B_DQS#1
BM
3
M_B_DQS#2
12
BU
M_B_DQS#3
19
BT
M_B_DQS#4
52
BT
M_B_DQS#5
BV55
M_B_DQS#6
BU
63
M_B_DQS#7
BG69
M_B_DQS0
4
BD
M_B_DQS1
BN4
M_B_DQS2
BV13
M_B_DQS3
BT
17
M_B_DQS4
BT
50
M_B_DQS5
56
BU
M_B_DQS6
BV62
M_B_DQS7
BJ69
M_B_A0
BT
34
M_B_A1
BP30
M_B_A2
BV29
M_B_A3
BU
30
M_B_A4
BV31
M_B_A5
BT
33
M_B_A6
BT
31
M_B_A7
BP26
M_B_A8
BV27
M_B_A9
27
BT
M_B_A10
BU42
M_B_A11
BU
26
M_B_A12
29
BT
M_B_A13
45
BT
M_B_A14
BV26
M_B_A15
BU23
M_B_CLK0 <16>
M_B_CLK0# <16>
M_B_CKE0 <16>
M_B_CLK1 <16>
M_B_CLK1# <16>
M_B_CKE1 <16>
M_B_CS#0 <16>
M_B_CS#1 <16>
M_B_ODT0 <16>
M_B_ODT1 <16>
M_B_DM[7:0] <16>
DM signals are not present on Clarkfield
processor. All DM signal can br left as
NC on Clarkfield and connect directly to
GND on So-DIMM side for Clarkfield
design only
M_B_DQS#[7:0] <16>
M_B_DQS[7:0] <16>
M_B_A[15:0] <16>
04
IC,ARD_BGA,R1P0
A A
5
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
4
3
2
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PROCESSER 2/7(DDR3)
PROCESSER 2/7(DDR3)
PROCESSER 2/7(DDR3)
Date: Sheet
Date: Sheet
Date: Sheet
4
4
4
of
of
of
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
1
42Tuesday, February 15, 2011
1A
1A
1A
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2
+1.5V_CPU<6>
+1.05V_VTT<3,6,13,14,31,34,35,36,40>
+VCORE<7,35>
1
+1.8V<14,34>
05
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_43
VTT0_44
VTT0_45
VTT0_46
VTT0_47
VTT0_48
VTT0_49
VTT0_50
VTT0_51
VTT0_52
VTT0_53
VTT0_54
VTT0_55
VTT0_56
VTT0_57
VTT0_58
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT0_63
VTT0_64
VTT0_65
VTT0_66
VTT0_67
VTT0_68
VTT0_69
VTT0_70
VTT0_71
VTT0_72
VTT0_73
AW
AW
AU60
AU59
AU
AR
AR
AR
AN60
AN
AN
AN
AN
AN15
AN
AN
AM
AL60
AL59
AL17
AL15
AL14
AL12
AK35
AK33
AF
AF
AF
AF
AF
AF
AD
BF60
BF
BD
BD
BB60
BB59
AY60
AW
AW
AW
AD37
AD
AD
AD
AD
W35
W3
W3
W3
W2
W26
W24
W2
U3
U3
U3
U3
U2
U2
U2
U2
R3
R3
R3
R3
R2
R2
R2
R2
AY10
AN
14
12
12
60
59
12
59
35
33
17
14
12
10
39
37
35
33
32
30
39
59
60
59
60
35
33
35
33
32
30
3
2
0
8
3
5
3
2
0
8
6
4
3
5
3
2
0
8
6
4
3
9
+1.05V_VTT
$
3ODFHXQGHU&38
C3239
C3239
C3228
C3228
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3238
C3129
C3129
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3135
C3135
C3223
C3223
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3198
C3198
C3171
C3171
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3202
C3202
C3218
C3218
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3240
C3240
1U/6.3V_4
1U/6.3V_4
C3136
C3136
1U/6.3V_4
1U/6.3V_4
C3162
C3162
1U/6.3V_4
1U/6.3V_4
C3185
C3185
1U/6.3V_4
1U/6.3V_4
C3242
C3242
1U/6.3V_4
1U/6.3V_4
C3217
C3217
1U/6.3V_4
1U/6.3V_4
C3227
C3227
1U/6.3V_4
1U/6.3V_4
C3149
C3149
1U/6.3V_4
1U/6.3V_4
C3208
C3208
1U/6.3V_4
1U/6.3V_4
C3216
C3216
1U/6.3V_4
1U/6.3V_4
D D
C C
B B
+1.05V_VTT
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V
H_PSI#
R3449*1K/F_4 R3449*1K/F_4
R34461K/F_4 R34461K/F_4
CPU_VID0
R34311K/F_4 R34311K/F_4
R3422*1K/F_4 R3422*1K/F_4
CPU_VID1
R34301K/F_4 R34301K/F_4
R3421*1K/F_4 R3421*1K/F_4
CPU_VID2
R34361K/F_4 R34361K/F_4
R3438*1K/F_4 R3438*1K/F_4
CPU_VID3
R3437*1K/F_4 R3437*1K/F_4
R34391K/F_4 R34391K/F_4
CPU_VID4
R3440*1K/F_4 R3440*1K/F_4 C3238
R34421K/F_4 R34421K/F_4
CPU_VID5
R34481K/F_4 R34481K/F_4
R3445*1K/F_4 R3445*1K/F_4
CPU_VID6
R3441*1K/F_4 R3441*1K/F_4
R34431K/F_4 R34431K/F_4
DPRSLPVR
R34521K/F_4 R34521K/F_4
R3450*1K/F_4 R3450*1K/F_4
VCCSENSE<35>
VSSSENSE<35>
+VCORE
R3129
R3129
100/F_4
100/F_4
R3134
R3134
100/F_4
100/F_4
CPU_VID0<35>
CPU_VID1<35>
CPU_VID2<35>
CPU_VID3<35>
CPU_VID4<35>
CPU_VID5<35>
CPU_VID6<35>
H_VTTVID1<34>
DPRSLPVR<35>
Zo=27.4/Space=50mil
Zo=27.4/Space=50mil
VTT_SENSE<34>
VSS_SENSE_VTT<34>
H_PSI#< 35>
I_MON<35>
H_VTTVID1
VTT_SENSE
VSS_SENSE_VTT
$
+1.8V
U3018F
U3018F
F68
PSI#
A61
0]
VID[
D61
1]
VID[
D62
VID[2]
A62
VID[
3]
B63
VID[
4]
D64
VID[
5]
D66
6]
VID[
AN1
VTT_
SELECT[1]
F66
PROC_D
PRSLPVR
A41
ISENSE
F64
VCC_SEN
F63
VSS_SENSE
N13
VTT_SENSE
2
R1
VSS_SENSE_VTT
W39
VCCPL
C336810U/6.3V_6 C336810U/6.3V_6
C33694.7U/6.3V_6 C33694.7U/6.3V_6
C33662.2U/6.3V_6 C33662.2U/6.3V_6
C32711U/6.3V_4 C32711U/6.3V_4
C32571U/6.3V_4 C32571U/6.3V_4
L1
W37
VCCPL
L2
U37
L3
VCCPL
R39
VCCPLL4
R37
VCCPLL5
SENSE LINESCPU VIDS
SENSE LINESCPU VIDS
SE
1.8V
1.8V
1.1V RAIL POWER
1.1V RAIL POWER
POWER
POWER
$
MPZ2012S221A_8
MPZ2012S221A_8
L3017
+1.5V_CPU
L3017
C3122
C3122
1U/6.3V_4
1U/6.3V_4
BB14
VDDQ
_CK[1]
BB12
_CK[2]
VDDQ
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
A A
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PROCESSER 3/7(POWER1)
PROCESSER 3/7(POWER1)
PROCESSER 3/7(POWER1)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
5
5
5
of
of
of
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
WWW.AliSaler.Com
5
WWW.AliSaler.Com
ues are
Max 22A
D D
C C
B B
A A
VTT Rail Val
Auburndal VTT=1.05V
Clarksfield VTT=1.1V
+VGACORE_IGPU
Please note that +VCC_GFX_CORE
should be 1.05V in Arrandale
C3191
C3191
C3190
C3190
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
C3169
C3169
C3157
C3157
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3215
C3215
C3201
C3201
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3123
C3123
C3131
C3131
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3163
C3163
C3124
C3124
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
+1.05V_VTT
+VCCTTG
C3422
C3422
1U/6.3V_4
1U/6.3V_4
9&$3
9&$3
9&$3
C3424
C3424
1U/6.3V_4
1U/6.3V_4
C3151
C3151
10U/6.3V_6
10U/6.3V_6
C3200
C3200
1U/6.3V_4
1U/6.3V_4
C3138
C3138
1U/6.3V_4
1U/6.3V_4
C3199
C3199
1U/6.3V_4
1U/6.3V_4
C3168
C3168
1U/6.3V_4
1U/6.3V_4
C3130
C3130
1U/6.3V_4
1U/6.3V_4
C3421
C3421
1U/6.3V_4
1U/6.3V_4
4
C3056
C3056
1U/6.3V_4
1U/6.3V_4
C3213
C3213
1U/6.3V_4
1U/6.3V_4
C3049
C3049
1U/6.3V_4
1U/6.3V_4
C3137
C3137
1U/6.3V_4
1U/6.3V_4
C3154
C3154
1U/6.3V_4
1U/6.3V_4
C3420
C3420
1U/6.3V_4
1U/6.3V_4
DI
SNAUMA
Ra 0 ohm
AN32
AN30
AN28
AN26
AN24
AN23
AN21
AN19
AL32
AL30
AL28
AL26
AL24
AL23
AL21
AL19
AK14
AK12
AJ10
AH14
AH12
AF28
AF26
AF24
AF23
AF21
AF19
AF17
AF15
AF14
AD28
AD26
AD24
AD23
AD21
AD19
AD17
W2
W19
U2
U1
U1
U1
U14
U1
R2
R1
R1
R15
AK62
AK60
AK59
AH60
AH59
AF60
AF59
AD60
AD59
AB60
AB59
AA60
AA59
W60
W59
U60
U59
R60
R59
C3423
C3423
1U/6.3V_4
1U/6.3V_4
Ra
U3018G
U3018G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
1
VTT1_1
VTT1_2
1
VTT1_3
9
VTT1_4
7
VTT1_5
5
VTT1_6
VTT1_7
2
VTT1_8
1
VTT1_9
9
VTT1_10
7
VTT1_11
VTT1_21
VCAP2_1
VCAP2_2
VCAP2_3
VCAP2_4
VCAP2_5
VCAP2_6
VCAP2_7
VCAP2_8
VCAP2_9
VCAP2_10
VCAP2_11
VCAP2_12
VCAP2_13
VCAP2_14
VCAP2_15
VCAP2_16
VCAP2_17
VCAP2_18
VCAP2_19
R3032*0_8 R3032*0_8
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
GRAPHICS
GRAPHICS
PEG & DMI
PEG & DMI
POWER
POWER
3
AF12
VAXG_SENSE
AF10
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GFX_VR_EN
GFX_DPR
VTT0_
VTT0_
VTT0_
VTT0_
VTT0_
VTT0_
VTT0_
VTT0_
VTT0_
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID[4]
GFX_VID
GFX_VID
SLPVR
GFX_IM
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ1
VDDQ1
VDDQ1
VDDQ1
VDDQ1
VDDQ15
VDDQ1
VDDQ1
VDDQ1
VDDQ1
VDDQ20
VDDQ2
VDDQ2
VDDQ2
VDDQ2
VDDQ25
VDDQ2
VDDQ2
VDDQ2
VDDQ2
VDDQ30
VDDQ3
VDDQ3
VDDQ3
VDDQ3
VDDQ35
VDDQ36
VTT0_
DDR[1]
DDR[2]
DDR[3]
DDR[4]
DDR[5]
DDR[6]
DDR[7]
DDR[8]
DDR[9]
VTT1_12
VTT1_13
VTT1_14
VTT1_15
VTT1_16
VTT1_17
VTT1_18
VTT1_19
VTT1_20
AF71
[0]
AG67
[1]
AG70
[2]
AH71
[3]
AN71
AM67
[5]
AM70
[6]
AH69
AL71
AL69
ON
BU40
BU
BU
BN
BM
BL30
BJ
BH
BH
BG43
0
BF16
1
BF15
2
BD35
3
BD33
4
BD32
BD30
6
BD28
7
BD26
8
BD24
9
BD23
BD21
1
BD19
2
BD17
3
BD15
4
BB35
BB33
6
BB32
7
BB30
8
BB28
9
BB26
BB24
1
BB23
2
BB21
3
BB19
4
BB17
BB15
AW32
DDR
AW30
AW28
AW26
AW24
AW23
AW21
AW19
AW17
AW15
AD
AD
AD
AB12
AA12
W1
W1
W1
W1
35
28
38
38
32
28
15
14
12
25
7
5
4
2
GFX_VR_EN
Rd
Rf
Rc
Rd
Re
R3182 *1K/J_4R3182 *1K/J_4
Rf
C3153
C3153
1U/6.3V_4
1U/6.3V_4
C3345
C3345
*10U/6.3V_6
*10U/6.3V_6
$
DISNAUMA
NA
NA
NA
R3451 4.7K_4R3451 4.7K_4
$
C3127
C3127
1U/6.3V_4
1U/6.3V_4
C3206
C3206
1U/6.3V_4
1U/6.3V_4
C3121
C3121
10U/6.3V_6
10U/6.3V_6
2
4.7KNARc
0 ohm
0 ohmRe
VCC_AXG_SENSE <40>
VSS_AXG_SENSE <40>
GFXVR_VID_0 <40>
GFXVR_VID_1 <40>
GFXVR_VID_2 <40>
GFXVR_VID_3 <40>
GFXVR_VID_4 <40>
GFXVR_VID_5 <40>
GFXVR_VID_6 <40>
GFXVR_EN <40>
GFXVR_DPRSLPVR <40>
GFXVR_IMON <40>
C3119
C3119
1U/6.3V_4
1U/6.3V_4
C3186
C3186
C3344
C3344
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
10U/6.3V_6
C3116 0.1U/10V_4C3116 0.1U/10V_4
+1.5VSUS
C3113 0.1U/10V_4C3113 0.1U/10V_4
C3181
C3181
C3212
C3212
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3141
C3141
C3214
C3214
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3139
C3139
1U/6.3V_4
1U/6.3V_4
C3172
C3172
1U/6.3V_4
1U/6.3V_4
12
C3211
C3211
+
+
*330U/2.5V_3528
*330U/2.5V_3528
+1.05V_VTT
+1.05V_VTT
+1.5V_CPU
1
+VCORE<5,7,35>
+1.05V_VTT<3,5,13,14,31,34,35,36,40>
+1.5VSUS<3,15,16,36,37,38>
+1.8V<5,14,34>
+VGACORE_IGPU<40>
+1.5V_CPU<5>
+VCC TTG
for S3 power reduction
Q3010
Q3010
AON6718L
AON6718L
MAIND<38>
MAINON_G<15,38>
+1.5V_CPU +1.5V
2
1
Q3011 2N7002EQ3011 2N7002E
+1.5V_CPU
R394 *0_8/SR394 *0_8/S
3
R3127 220/F_4R3127 220/F_4
06
+1.5VSUS
5
R3097
R3097
D
D
G
G
4
S
S
*0/F_2512
*0/F_2512
213
ile routing
40m
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PROCESSER 4/7(POWER2)
PROCESSER 4/7(POWER2)
PROCESSER 4/7(POWER2)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
6
6
6
of
of
of
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
WWW.AliSaler.Com
5
WWW.AliSaler.Com
+VCC0
+VCC2
XI
C3339
C3339
1U/6.3V_4
1U/6.3V_4
C3286
C3286
1U/6.3V_4
1U/6.3V_4
C3314
C3314
1U/6.3V_4
1U/6.3V_4
C3313
C3313
1U/6.3V_4
1U/6.3V_4
C3312
C3312
1U/6.3V_4
1U/6.3V_4
C3341
C3341
1U/6.3V_4
1U/6.3V_4
D D
C C
XI
C3273
C3273
C3283
C3283
C3236
C3236
1U/6.3V_4
1U/6.3V_4
C3235
C3235
1U/6.3V_4
1U/6.3V_4
B B
A A
1U/6.3V_4
1U/6.3V_4
C3262
C3262
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C3284
C3284
1U/6.3V_4
1U/6.3V_4
C3338
C3338
1U/6.3V_4
1U/6.3V_4
C3342
C3342
1U/6.3V_4
1U/6.3V_4
C3310
C3310
1U/6.3V_4
1U/6.3V_4
C3261
C3261
1U/6.3V_4
1U/6.3V_4
C3246
C3246
1U/6.3V_4
1U/6.3V_4
C3237
C3237
1U/6.3V_4
1U/6.3V_4
4
C3290
C3290
1U/6.3V_4
1U/6.3V_4
C3315
C3315
1U/6.3V_4
1U/6.3V_4
C3340
C3340
1U/6.3V_4
1U/6.3V_4
C3263
C3263
1U/6.3V_4
1U/6.3V_4
C3247
C3247
1U/6.3V_4
1U/6.3V_4
C3274
C3274
1U/6.3V_4
1U/6.3V_4
+VCC0
+VCC2
BD55
BD51
BD48
AW57
AW53
AW50
AU55
AU51
AU48
AR55
AR51
AR48
AN57
AN53
AN50
BD44
BD41
BD37
AW46
AW42
AW39
AU44
AU41
AU37
AR44
AR41
AR37
AN46
AN42
AN39
BB55
BB51
BB48
AY57
AY53
AY50
AL57
AL53
AL50
AK57
AK53
AK50
BB44
BB41
BB37
AY46
AY42
AY39
AL46
AL42
AL39
AK46
AK42
AK39
U3018H
U3018H
VCAP0_1
VCAP0_2
VCAP0_3
VCAP0_4
VCAP0_5
VCAP0_6
VCAP0_7
VCAP0_8
VCAP0_9
VCAP0_10
VCAP0_11
VCAP0_12
VCAP0_13
VCAP0_14
VCAP0_15
VCAP0_16
VCAP0_17
VCAP0_18
VCAP0_19
VCAP0_20
VCAP0_21
VCAP0_22
VCAP0_23
VCAP0_24
VCAP0_25
VCAP0_26
VCAP0_27
VCAP1_1
VCAP1_2
VCAP1_3
VCAP1_4
VCAP1_5
VCAP1_6
VCAP1_7
VCAP1_8
VCAP1_9
VCAP1_10
VCAP1_11
VCAP1_12
VCAP1_13
VCAP1_14
VCAP1_15
VCAP1_16
VCAP1_17
VCAP1_18
VCAP1_19
VCAP1_20
VCAP1_21
VCAP1_22
VCAP1_23
VCAP1_24
VCAP1_25
VCAP1_26
VCAP1_27
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
3
POWER
POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_1
VCC_1
VCC_1
VCC_1
VCC_16
VCC_1
VCC_1
VCC_1
VCC_2
VCC_21
VCC_2
VCC_2
VCC_2
VCC_2
VCC_26
VCC_2
VCC_2
VCC_2
VCC_3
VCC_3
VCC_3
VCC_3
VCC_3
VCC_3
VCC_3
VCC_3
VCC_3
VCC_3
VCC_40
VCC_4
VCC_4
VCC_4
VCC_4
VCC_45
VCC_4
VCC_4
VCC_4
VCC_4
VCC_50
VCC_5
VCC_5
VCC_5
VCC_5
VCC_55
VCC_5
VCC_5
VCC_5
VCC_5
VCC_60
VCC_61
VCC_6
VCC_6
VCC_6
VCC_6
VCC_6
VCC_6
VCC_6
VCC_6
VCC_7
VCC_7
VCC_7
VCC_7
VCC_7
VCC_7
VCC_7
VCC_7
VCC_7
VCC_79
VCC_8
VCC_8
VCC_8
VCC_8
VCC_84
VCC_8
VCC_8
VCC_8
VCC_8
VCC_89
2
+VCORE
AF
57
55
AF
AF
53
C3267 10U/6.3V_6C3267 10U/6.3V_6
51
AF
C3297 10U/6.3V_6C3297 10U/6.3V_6
AF50
C3330 10U/6.3V_6C3330 10U/6.3V_6
AF
48
C3296 10U/6.3V_6C3296 10U/6.3V_6
AF
46
C3266 10U/6.3V_6C3266 10U/6.3V_6
AF
44
C3331 10U/6.3V_6C3331 10U/6.3V_6
42
AF
C3268 10U/6.3V_6C3268 10U/6.3V_6
AF41
C3298 10U/6.3V_6C3298 10U/6.3V_6
AD55
C3332 10U/6.3V_6C3332 10U/6.3V_6
AD51
2
C3333 10U/6.3V_6C3333 10U/6.3V_6
AD48
3
C3099 10U/6.3V_6C3099 10U/6.3V_6
AD44
4
C3106 10U/6.3V_6C3106 10U/6.3V_6
AD41
5
C3336 10U/6.3V_6C3336 10U/6.3V_6
AB55
C3048 10U/6.3V_6C3048 10U/6.3V_6
AB51
7
C3094 10U/6.3V_6C3094 10U/6.3V_6
AB48
8
C3104 10U/6.3V_6C3104 10U/6.3V_6
AB44
9
C3044 10U/6.3V_6C3044 10U/6.3V_6
AB41
0
C3351 10U/6.3V_6C3351 10U/6.3V_6
AA55
C3334 10U/6.3V_6C3334 10U/6.3V_6
AA51
2
C3335 10U/6.3V_6C3335 10U/6.3V_6
AA48
3
C3299 10U/6.3V_6C3299 10U/6.3V_6
AA44
4
C3301 10U/6.3V_6C3301 10U/6.3V_6
AA41
5
C3300 10U/6.3V_6C3300 10U/6.3V_6
W55
C3111 0.1U/10V_4C3111 0.1U/10V_4
W51
7
C3108 0.1U/10V_4C3108 0.1U/10V_4
W48
8
W44
9
W41
0
U55
1
U51
2
U48
3
U44
4
U41
5
R55
6
R51
7
R48
8
+VCORE
R44
9
R41
P60
1
N55
2
N51
3
N48
4
N44
N42
6
M60
7
M51
8
M44
9
L55
K60
1
K51
2
K44
3
J55
4
H60
H51
6
H44
7
G60
8
G55
9
G51
G44
F55
2
E60
3
E57
4
E53
5
E50
6
E46
7
E42
8
D59
9
D57
0
D55
1
D54
2
D52
3
D50
4
D48
5
D47
6
D45
7
D43
8
B60
B56
0
B53
1
B49
2
B46
3
B42
A57
5
A54
6
A50
7
A47
8
A43
C3065
C3065
1U/6.3V_4
1U/6.3V_4
C3061
C3061
1U/6.3V_4
1U/6.3V_4
C3270
C3270
1U/6.3V_4
1U/6.3V_4
C3039
C3039
1U/6.3V_4
1U/6.3V_4
C3071
C3071
1U/6.3V_4
1U/6.3V_4
C3068
C3068
1U/6.3V_4
1U/6.3V_4
C3060
C3060
1U/6.3V_4
1U/6.3V_4
C3772
C3772
1U/6.3V_4
1U/6.3V_4
C3035
C3035
1U/6.3V_4
1U/6.3V_4
C3776
C3776
1U/6.3V_4
1U/6.3V_4
C3067
C3067
1U/6.3V_4
1U/6.3V_4
C3064
C3064
1U/6.3V_4
1U/6.3V_4
C3063
C3063
1U/6.3V_4
1U/6.3V_4
C3059
C3059
1U/6.3V_4
1U/6.3V_4
C3780
C3780
1U/6.3V_4
1U/6.3V_4
C3774
C3774
1U/6.3V_4
1U/6.3V_4
C3075
C3075
1U/6.3V_4
1U/6.3V_4
C3081
C3081
1U/6.3V_4
1U/6.3V_4
C3078
C3078
1U/6.3V_4
1U/6.3V_4
C3087
C3087
1U/6.3V_4
1U/6.3V_4
C3771
C3771
1U/6.3V_4
1U/6.3V_4
C3036
C3036
1U/6.3V_4
1U/6.3V_4
C3092
C3092
1U/6.3V_4
1U/6.3V_4
C3066
C3066
1U/6.3V_4
1U/6.3V_4
C3750
C3750
1U/6.3V_4
1U/6.3V_4
1
+VCORE<5,35>
+VCC2
+VCC0
07
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PROCESSER 5/7(POWER3)
PROCESSER 5/7(POWER3)
PROCESSER 5/7(POWER3)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
7
7
7
of
of
of
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
42Tuesday, February 15, 2011
WWW.AliSaler.Com
5
WWW.AliSaler.Com
4
3
2
1
U3018E
U3018E
D D
CFG0
AL4
CFG[0
]
AM2
CFG[1
]
AK1
]
AK2
AK4
AJ2
AT2
AG7
AF4
AG2
AH1
AC2
AC4
AE2
AD1
AF8
AF6
AB7
AU1
T4
T2
U1
V2
AV71
AW
70
AY69
BB69
D8
B7
A10
B9
C5
A6
E3
F1
CFG[2
]
CFG[3
CFG[4]
CFG[5
]
CFG[6
]
CFG[7
]
]
CFG[8
CFG[9]
CFG[
10]
11]
CFG[
CFG[
12]
13]
CFG[
CFG[14]
CFG[
15]
16]
CFG[
CFG[
17]
P[0]
RSVD_T
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD26
RSVD27
CTF[7]
RSVD_N
RSVD_NCTF[8]
RSVD_N
CTF[6]
RSVD_N
CTF[5]
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
RSVD
RSVD
RSVD
RSVD_NCTF[1]
RESERVED
RESERVED
DC_T
DC_TEST_BV69
DC_T
DC_T
DC_T
DC_T
DC_TEST_BT71
DC_TES
DC_TES
DC_TES
DC_TES
DC_TEST_BR1
DC_TEST_E71
DC_T
DC_T
DC_TES
DC_TES
DC_TES
CFG3
CFG4
CFG7
C C
TP_RSVD17_R
TP_RSVD18_R
VSS_NCTF7
T3002T3002
VSS_NCTF8
T3003T3003
VSS_NCTF6
T3004T3004
VSS_NCTF5
B B
T3036T3036
VCAP0 Voltage Sense Rails
CPU_RSVD32
6
W6
RSVD32
CPU_RSVD33
W6
4
RSVD33
AC
69
RSVD34
AC
71
RSVD35
AA71
RSVD36
AA69
RSVD37
R6
6
RSVD38
R6
4
RSVD39
VSS_NCTF3
BT5
RSVD_T
RSVD_T
EST_BV71
EST_BV68
DC_TES
DC_TES
DC_TES
_NCTF[3]
_NCTF[4]
_NCTF[2]
EST_BV5
EST_BV3
EST_BV1
EST_C71
EST_C69
VSS_NCTF4
BR5
VSS_NCTF2
BV6
VSS_NCTF1
BV8
AV69
RSVD45
AK71
RSVD46
69
AN
RSVD47
AP66
RSVD48
AH
66
RSVD49
AK66
RSVD50
AR
71
RSVD51
66
AM
RSVD52
AK69
RSVD53
71
AU
RSVD54
70
AT
RSVD55
AR
69
RSVD56
69
AU
RSVD57
AT
67
RSVD58
RSVD_TP2
AP2
P[2]
AN7
P[1]
AV4
RSVD62
2
AU
RSVD63
RSVD64_R
BE69
RSVD64
RSVD65_R
BE71
RSVD65
BV71
BV69
BV68
T3047T3047
BV5
T3042T3042
BV3
BV1
BT71
BT69
T_BT69
BT3
T_BT3
BT1
T_BT1
BR71
T_BR71
T_E1
T_C3
T_A71
T_A69
T_A68
T_A5
Add for Daisy Chain function support
T3051T3051
BR1
T3039T3039
E71
T3053T3053
E1
C71
C69
C3
T3001T3001
A71
A69
A68
T3025T3025
A5
T3005T3005
T3049T3049
T3050T3050
T3041T3041
T3040T3040
T3043T3043
T3044T3044
T3038T303 8
CFG0
R3349 3.01K/F_4R3349 3.01K/F_4
CFG3
CFG4
CFG7
RSVD64_R
RSVD65_R
TP_RSVD17_R
TP_RSVD18_R
R3354 *3.01K/F_4R3354 *3.01K/F_4
R3346 *3.01K/F_4R3346 *3.01K/F_4
R3347 *3.01K/F_4R3347 *3.01K/F_4
R3160 *0_4R3160 *0_4
R3159 *0_4R3159 *0_4
R3358 *0_4R3358 *0_4
R3357 *0_4R3357 *0_4
CFG[ 1:0 ] - PC
* 11= 1 x 16 PEG
* 10= 2 x 8 PEG
10
4
CFG
(Display Port Presence)
0
CFG
(PCI-Epress Configuration Select)
CFG3
(PCI-Epress Static Lane Reversal)
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resisto
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.
Disabled; No Physical Display Port
attached to Embedded Diplay Port
PEG
Single
al Operation
Norm
I_Epress Configuration Select
Enabled; An external Display port device is
connected to the Embedded Display port
urcati on enabled
Bif
Lane Num
15 -> 0 , 14 -> 1
r to
bers Reversed
08
A A
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PROCESSER 6/7(CFG)
PROCESSER 6/7(CFG)
PROCESSER 6/7(CFG)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
1A
1A
1A
8
8
8
of
of
of
42Friday, January 14, 2011
42Friday, January 14, 2011
42Friday, January 14, 2011
WWW.AliSaler.Com
5
WWW.AliSaler.Com
ARRANDALE PROCESSOR (GND)
D D
C C
B B
A A
5
BM70
BM51
BM44
BM32
BM24
BM17
BK63
BK60
BK53
BK34
BK10
BH70
BH57
BH55
BH47
BH24
BH20
BH15
BG51
BG36
BE70
BE65
BD57
BD53
BD50
BD46
BD42
BD39
BD14
BB71
BB62
BB57
BB53
BB50
BB46
BB42
BB39
BA70
AY71
AY66
AY62
AY59
AY55
AY51
AY48
AR42
AR39
AR35
AR33
AR32
AR30
AR28
AR26
AR24
AR23
AR21
AR19
AR17
AR15
AR14
AP70
AP64
AN62
AN55
AY44
AY41
AY37
AY35
AY33
AY32
AY30
AY28
AY26
BU62
BU58
BU55
BU51
BU48
BU44
BU37
BU32
BU25
BU21
BU18
BU14
BU11
BP42
BN64
BL57
BL55
BL48
BL40
BL28
BL20
BJ64
BJ21
BF62
BF30
BF13
BU7
BN6
BJ9
BJ1
BF8
BE9
BE1
BB7
BB1
AR4
AR1
4
U3018I
U3018I
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
4
VSS
VSS
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
AY24
AY23
AY21
AY19
AY17
AY15
AY14
AY12
AY8
AY4
AW67
AW62
AW59
AW55
AW51
AW48
AW44
AW41
AW37
AV9
AV1
AU70
AU62
AU57
AU53
AU50
AU46
AU42
AU39
AU35
AU33
AU32
AU30
AU28
AU26
AU24
AU23
AU21
AU19
AU17
AU15
AU14
AU4
AT64
AT10
AR62
AR57
AR53
AR50
AR46
AN51
AN48
AN44
AN41
AN37
AN5
AN4
AM64
AM8
AL62
AL55
AL51
AL48
AL44
AL41
AL37
AL35
AL33
AL1
AK70
AK64
AK55
AK51
AK48
AK44
AK41
AK37
AK32
AK30
AK28
AK26
AK24
AK23
AK21
AK19
AK17
AK15
AJ70
AH62
AH57
AH55
BV66
BV64
BT68
BR69
BR68
BR3
BN71
BN1
BL71
BL1
R14
H71
F71
E69
E68
A66
A64
E5
C68
3
3
AH53
AH51
AH50
AH48
AH46
AH44
AH42
AH41
AH39
AH37
AH35
AH33
AH32
AH30
AH28
AH26
AH24
AH23
AH21
AH19
AH17
AH15
AH4
AG64
AG9
AG6
AF69
AF62
AF1
AE70
AE64
AD62
AD57
AD53
AD50
AD46
AD42
AD4
AC67
AC64
AC10
AC5
AC1
AB70
AB62
AB57
AB53
AB50
AB46
AB42
AB39
AB37
AB35
AB33
AB32
AB30
AB28
AB26
AB24
AB23
AB21
AB19
AB17
AB15
AB14
AB9
AA66
AA64
AA62
AA57
AA53
AA50
AA46
AA42
AA39
AA37
AA35
AA33
AA32
AA30
AA28
AA26
AA24
AA23
AA21
AA19
F20
F4
E37
E33
E30
E16
E12
D41
D38
D34
D31
D27
D24
D20
D17
D13
D10
D6
B65
B40
U3018J
U3018J
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS374
VSS375
VSS376
VSS377
VSS378
VSS379
VSS380
VSS381
VSS382
VSS383
VSS384
VSS385
VSS386
VSS387
VSS388
VSS389
VSS390
VSS391
VSS392
VSS415
IC,ARD_BGA,R1P0
IC,ARD_BGA,R1P0
VSS
VSS
VSS404
VSS405
VSS406
VSS407
VSS408
VSS409
VSS410
VSS411
VSS412
VSS413
VSS393
VSS394
VSS395
VSS396
VSS397
VSS398
VSS399
VSS400
VSS401
VSS402
VSS403
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS361
VSS362
VSS363
VSS364
VSS365
VSS366
VSS367
VSS368
VSS369
VSS370
VSS371
VSS372
VSS373
2
A40
A36
A33
A29
A26
A22
A19
A15
A12
A8
B62
B58
B55
B51
B48
B44
A59
A55
A52
A48
A45
AA17
AA15
AA14
AA4
W69
W62
W57
W53
W50
W46
W42
W6
W1
V70
U64
U62
U57
U53
U50
U46
U42
U39
U9
U4
T1
R70
R62
R57
R53
R50
R46
R42
R5
P4
N63
N57
N53
N50
N46
N30
N21
N15
M53
M42
M36
M1
L70
L57
L48
L47
L13
K64
K53
K43
K36
K34
K32
K25
K17
K11
K6
K4
J65
J57
J48
J47
J40
J9
H53
H43
H36
H1
G70
G57
G53
G48
G47
G43
G30
G24
G20
G15
F61
F48
F47
F28
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
09
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PROCESSER 7/7(GND)
PROCESSER 7/7(GND)
PROCESSER 7/7(GND)
942Thursday, January 13, 2011
942Thursday, January 13, 2011
942Thursday, January 13, 2011
of
of
1
of
1A
1A
1A
WWW.AliSaler.Com
1
WWW.AliSaler.Com
INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs
2
3
4
5
6
7
8
10
C663 18P/50V_4C663 18P/50V_4
23
Y4
A A
MV add for connect EC to PCH (GPIO33_E)
B B
+3V
C C
UMA HDMI signals
DPB_
DPB_
DPB_L
DPB_L
DPB_L
DPB_L
DPB_L
DPB_L
DPB_L
DPB_L
For AUDIO
D D
Y4
32.768KH
32.768KH
Z
Z
4 1
C665 18P
C665 18P
/50V_4
/50V_4
R445 330K
R445 330K
+RTC
_CELL
ACZ_SPKR<13,27>
SDIN0<27>
ACZ_
R249 0_4R249 0_4
33_E<13,31>
GPIO
TP12TP12
TP10TP10
TP9TP9
TP8TP8
TP1TP1
must add test point.
TP13TP13
1205 The SATALED# signal is
open-collector and requires a
weak external pull-up (8.2 k
to 10 k ) to +V3.3.
CTRL_CLK
CTRL_DATA
ANE0_N
ANE0_P
ANE1_N
ANE1_P
ANE2_N
ANE2_P
ANE3_N
ANE3_P
R411 10K
R411 10K
R223 10K
R223 10K
R410 10K
R410 10K
R251 *10K_4R251 *10K_4
R459 *
R459 *
R458 *
R458 *
C474 0.1U/10V_4C474 0.1U/10V_4
C478 0.
C478 0.
C471 0.
C471 0.
C472 0.
C472 0.
C480 0.
C480 0.
C482 0.1U/10V_4C482 0.1U/10V_4
C465 0.
C465 0.
C467 0.
C467 0.
ACZ_RST#_AUDIO<27>
SDOUT_AUDIO<27>
ACZ_
ACZ
_SYNC_AUDIO<27>
CLK_AUDIO<27>
BIT_
_4
_4
_4
_4
_4
_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
0_4/S
0_4/S
0_4/S
0_4/S
PCH_JT
PCH_JT
PCH_JT
PCH_JT
PCH_
SATA_L
For MDC
1
IBEX PEAK-M (HDA,JTAG,SATA)
R444
R444
10M
10M
_4
_4
RTC_RS
SRTC
SM_
_6
_6
PCH_INV
ACZ_
ACZ_
ACZ_
ACZ_
PCH_G
AG_TCK
AG_TMS
AG_TDI
AG_TDO
JTAG_RST#
SPI
SPI_C
SPI_C
SPI_SI
SPI_SO
ED#
SATA_D
SATA_D
GPIO
33_E
10/25 PV modify
R452 33_4R452 33_4
R450 33_4R450 33_4
C666 *
C666 *
R451 33_4R451 33_4
C667 *
C667 *
R453 33_4R453 33_4
C464 *
C464 *
1
RTC_X
RTC_X
2
T#
_RST#
INTRUDER#
RMEN
BCLK
SYNC
RST#
SDOUT
PIO33_R
_CLK_R
S0#_R
S1#
_R
ET0#
ET1#
SDVO_
CLK <23>
SDVO_DATA <23 >
2# <23>
IN_D
2 <23>
IN_D
IN_D
1# <23>
IN_D
1 <23>
IN_D0# <23>
0 <23>
IN_D
LK# <23>
IN_C
IN_C
LK <23>
10P/50V_4
10P/50V_4
10P/50V_4
10P/50V_4
10P/50V_4
10P/50V_4
U24A
U24A
3
B1
RTCX1
D1
3
RTCX2
C14
RTCRST
D17
SRTCRS
A16
INTRUDER#
A14
INTVRM
0
A3
HDA_BCLK
D29
HDA_SY
P1
SPKR
C30
HDA_RST
G30
HDA_SDIN0
F30
HDA_S
E32
HDA_S
F32
HDA_S
B2
9
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOC
M3
JTAG_TCK
K3
_TMS
JTAG
K1
JTAG
_TDI
J2
_TDO
JTAG
J4
TRST#
BA2
_CLK
SPI
AV3
SPI_C
S0#
AY3
S1#
SPI_C
AY1
SPI_M
OSI
AV1
ISO
SPI_M
Ibex
Ibex
Peak-M_Rev1_0
Peak-M_Rev1_0
ACZ_
RST#
ACZ_
SDOUT
SYNC
ACZ_
BCLK
ACZ_
2
#
T#
EN
NC
#
DIN1
DIN2
DIN3
K_RST# / GPIO13
DPB_
+3VPCU
Ibex-M
Ibex-M
1 OF 10
1 OF 10
RTC
RTC
IHDA
IHDA
JTAG
JTAG
SPI
SPI
HPD_Q
R287
R287
100K
100K
_4
_4
RTC
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
1
R286 *
R286 *
+3VRT
LPC
LPC
(+3V)
(+3V)
SATA
SATA
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
R433 51_4R433 51_4
+3V
Q18
Q18
2
*2N7002K
*2N7002K
0_4/S
0_4/S
10/25 PV modify
CR1RB500V-40 CR1RB500V-40
C_2
CR2RB500V
CR2RB500V
-40
-40
R254 1K
R254 1K
8/25 SI fo
FWH0
FWH1
FWH2
FWH3 / LAD3
FWH4 /
LDRQ
SATA
SATA
SATA0GP / GPIO21
1GP / GPIO19
SATA
PCH_JT
3
1mA
+RTC
_CELL
C438 1U/6.3 V_4C438 1U/6.3V_4
R242 20K
R242 20K
R241
R241
R243 1M_4R243 1M_4
_4
_4
+3VRT
r M/E.
3
/ LAD0
/ LAD1
/ LAD2
LFRAME#
LDRQ0
1# / GPIO23
SERIR
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
ICOMPO
ICOMPI
SATA
AG_TCK
20K/F_4
20K/F_4
C_1
0RXN
0RXP
0TXN
0TXP
1RXN
1RXP
1TXN
1TXP
2RXN
2RXP
2TXN
2TXP
3RXN
3RXP
3TXN
3TXP
4RXN
4RXP
4TXN
4TXP
5RXN
5RXP
5TXN
5TXP
LED#
D33
B33
C32
A32
C34
A34
#
F34
AB9
Q
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
SATA_C
AF15
SATA_L
T3
SATA_D
Y9
SATA_D
V1
HDMI_HPD_CON <23>
/F_4
/F_4
C428 1U
C428 1U
C429 1U
C429 1U
CN24
CN24
1 2
CONN
CONN
BAT_
BAT_
DFWF02MS022
DFWF02MS022
50273-0027N-001-2P-L
50273-0027N-001-2P-L
LAD0
<31,32>
LAD1
<31,32>
LAD2 <31,32>
<31,32>
LAD3
ME# <31,32>
LFRA
R230
R230
10K_4
10K_4
+3V
Q <31>
SERIR
SATA_R
XN0 <25>
SATA_L
XP0 <25>
XP0 <2 5>
XN4 <25>
XP4 <25>
XP4 <2 5>
ED# <30>
*0_4
*0_4
HDD
ODD
V
+1.05
ODD
_PRSNT# <25>
SATA_R
SATA_TXN0 <25>
SATA_T
SATA_R
SATA_R
SATA_TXN4 <25>
SATA_T
R237 37.4/F_4R237 37.4/F_4
OMP
ED#
ET0#
R409
R409
ET1#
For ES1 ONLY.NI for ES2.
For E
S1 ONLY.NI for ES2.
T#
RTC_RS
/6.3V_4
/6.3V_4
_RST#
SRTC
/6.3V_4
/6.3V_4
SM_
INTRUDER#
4
UMA CRT,LVDS&HDMI signals
_BLON<22>
LVDS
DISP_
ON<22>
DPST_PWM<2 2>
K<22>
EDIDCL
EDIDDA
TA<22>
R266 10K_4R266 10K_4
R269 10K_4R269 10K_4
100_4
100_4
R415
R415
200_4
200_4
R414
R414
+3VS5
200_4
200_4
100_4
100_4
4>
4>
>
4>
R413
R413
R412
R412
+3V
CRT_B<24>
CRT_G<2
CRT_R<2
DDCCLK<24
DDCDATA<2
HSYNC_
VSYNC_COM<24>
R192
R192
R416
R416
20K
20K
/F_4
/F_4
200_4
200_4
R197
R197
R436
R436
10K
10K
_4
_4
100_4
100_4
Part
Part Number
Part Description
HDD0 (SAT
COM<24>
R259 2.
R259 2.
TXLCLKOUT-<22>
LKOUT+<22>
TXLC
TXLO
TXLO
TXLOUT2-<2 2>
TXLO
TXLO
TXLOUT2+<22>
TXUCL
TXUCLKOUT+<22>
TXUO
TXUO
TXUO
TXUOUT0+<22>
TXUO
TXUO
R272 1K
R272 1K
PCH_
JTAG_RST#
PCH_JT
AG_TDO
AG_TDI
PCH_JT
AG_TMS
PCH_JT
37K/F_4
37K/F_4
TP7TP7
A3 6.0Gb/s)
UT0-<2 2>
UT1-<2 2>
UT0+<22>
UT1+<22>
KOUT-<22>
UT0-<22>
UT1-<22>
UT2-<22>
UT1+<22>
UT2+<22>
R455 150/F_4R455 150/F_4
R457 150/
R457 150/
R456 150/
R456 150/
4M byte SPI ROM
U22
U22
1
+3V
R422 10K
R422 10K
C659 0.
C659 0.
3,11,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
SPI_H
_4
_4
1U/10V_4
1U/10V_4
5
OLD#
8
CE#
VDD
6
SCK
5
SI
2
7
SO
HOLD#
3
4
WP#
VSS
5Q32BVSSIG
5Q32BVSSIG
W2
W2
AKE391P0N00
AKE391P0N00
IC FLASH(8P) W25Q32BVSSIG(SO IC)
IC FLASH(8P) W25Q32BVSSIG(SO IC)
2,11,12,14,41>
22,30,31,33,39>
L_CT
L_CT
LVDS
LVDS
/F_4
/F_4
SPI_W
+3VPCU<
RL_CLK
RL_DATA
P#
+1.05V<
_IBG
_VBG
F_4
F_4
F_4
F_4
DAC_IRE
+3V<2,
R440 10K
R440 10K
IBEX PEAK
U24D
U24D
T48
L_BKLTEN
T47
DD_EN
L_V
Y48
L_BKL
TCTL
AB48
L_DDC_CLK
Y45
L_DDC_DA
AB46
L_CTR
L_CLK
V48
L_CTR
L_DATA
39
AP
LVD_IBG
AP41
BG
LVD_V
AT43
LVD_V
REFH
AT42
LVD_VREFL
AV53
LVDS
A_CLK#
AV51
LVDS
A_CLK
BB47
A_DATA#0
LVDS
BA52
A_DATA#1
LVDS
AY48
LVDS
A_DATA#2
AV47
LVDS
A_DATA#3
BB48
A_DATA0
LVDS
BA50
A_DATA1
LVDS
AY49
LVDS
A_DATA2
AV48
LVDS
A_DATA3
AP48
SB_CLK#
LVD
AP47
LVD
SB_CLK
AY53
LVDSB_DATA#0
AT49
B_DATA#1
LVDS
AU52
B_DATA#2
LVDS
AT53
LVDS
B_DATA#3
AY51
LVDSB_DATA0
AT48
SB_DATA1
LVD
AU50
SB_DATA2
LVD
AT51
LVD
SB_DATA3
AA52
CRT_BLUE
AB53
CRT_GRE
53
AD
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSY
Y51
CRT_VS
F
AD48
DAC_IREF
51
AB
CRT_IRTN
I
I
bexPeak-M_Rev1_0
bexPeak-M_Rev1_0
_CS0#_R
SPI
SPI
_CLK_R
SPI_SI
_R
SPI_SO
_4
_4
6
TA
LVDS--A
LVDS--A
LVDS--B
LVDS--B
EN
CRT
CRT
NC
YNC
+3V
-M (LVDS,DDI)
Ibex-M
Ibex-M
4 OF 10
4 OF 10
SDVO
SDVO
DISPLAY PORT BDISPLAY PORT CDISPLAY PORT D
DISPLAY PORT BDISPLAY PORT CDISPLAY PORT D
Digital Display Interface
Digital Display Interface
Vender
Socket
DG008000031
EON - EN25F32-100HIP
AKE39FN0Q00
WINBOND - W25Q32BVSSIG
AKE391P0N00
7
BJ46
SDVO_TVCLK INN
BG46
_TVCLKINP
SDVO
BJ48
SDV
O_STALLN
BG48
SDVO
_STALLP
BF45
_INTN
SDVO
BH45
_INTP
SDVO
DPB_
CTRL_CLK
T51
SDV
O_CTRLCLK
SDVO_CTRL DATA
B_AUXN
DDP
DDP
B_AUXP
DDPB_
DDP
DDP
DDP
DDP
DDPB_2N
DDP
DDP
DDP
DDPC_CTRLCLK
RLDATA
DDPC_CT
DDPC_A
DDPC_A
DDPC_HPD
DDPC_0
DDPC_0
DDPC_1
DDPC_1P
DDPC_2
DDPC_2
DDPC_3
DDPC_3
DDPD_CT
RLDATA
DDPD_CT
DDPD_A
DDPD_AUXP
DDPD_HP
DDPD_0
DDPD_0
DDPD_1N
DDPD_1
DDPD_2
DDPD_2
DDPD_3
DDPD_3P
RLCLK
CTRL_DATA
DPB_
T53
BG44
BJ44
DPB_
HPD_Q
AU38
HPD
B_0N
B_0P
B_1N
B_1P
B_2P
B_3N
B_3P
UXN
UXP
UXN
_LANE0_N
DPB
BD42
_LANE0_P
DPB
BC42
DPB
_LANE1_N
BJ42
DPB
_LANE1_P
BG42
_LANE2_N
DPB
BB40
_LANE2_P
DPB
BA40
DPB
_LANE3_N
AW38
DPB
_LANE3_P
BA38
Y49
AB49
BE44
BD44
AV40
BE40
N
BD40
P
BF41
N
BH41
BD38
N
BC38
P
BB36
N
BA36
P
U50
U52
BC46
BD46
AT38
D
BJ40
N
BG40
P
BJ38
BG38
P
BF37
N
BH37
P
BE36
N
BD36
IC FLASH(8P) EN25F32-100HIP (SOIC)
IC FLASH(8P) W25Q32BVSSIG(SOIC)
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
e Document Number Rev
Siz
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PCH 1/5
PCH 1/5
PCH 1/5
uesday, February 15, 2011
uesday, February 15, 2011
uesday, February 15, 2011
(SATA,HDA,LPC)
(SATA,HDA,LPC)
(SATA,HDA,LPC)
TP16TP16
TP15TP15
1A
1A
1A
of
of
of
10 42T
10 42T
10 42T
8
WWW.AliSaler.Com
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4
3
2
1
IBEX PEAK-M (GND)
U24I
U24I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
B39
D D
C C
B B
A A
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BC10
BC14
BC18
BC22
BC32
BC36
BC40
BC44
BC52
BD48
BD49
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BF49
BF51
BG18
BG24
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
AF39
B43
B47
B7
BB5
BC2
BH9
BD5
BE6
BE8
BF3
BG4
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
H16
H20
H30
H34
H38
H42
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
5
PCIE_CLKREQ_WLAN#
CLK_PCIE_REQ2#
PCIE_CLK_REQ0#
PCIE_CLKREQ_LAN#
PCIE_CLK_REQ4#
PCIE_CLK_REQB#_R
PCIE_CLK_REQ5#
PEG_CLKREQ#
SMB_CLK_ME1
SMB_DATA_ME1
PDAT_SMB
PCLK_SMB
R429 10K_4R429 10K_4
R198 10K_4R198 10K_4
R231 10K_4R231 10K_4
R215 10K_4R215 10K_4
R193 10K_4R193 10K_4
R240 10K_4R240 10K_4
R217 10K_4R217 10K_4
R417 *10K_4R417 *10K_4
Ra
R418 *10K_4R418 *10K_4
Rb
Ra: UMA
: Muxless
Rb
Q36 2N7002EQ36 2N7002E
3
2
+3V
2
Q37
Q37
3
Q12 2N7002EQ12 2N7002E
3
2
+3V
2
Q13 2N7002EQ13 2N7002E
3
2N7002E
2N7002E
+3V
+3VS5
1
R446
R446
2.2K_4
2.2K_4
R448
R448
2.2K_4
2.2K_4
1
1
R191
R191
10K_4
10K_4
R190
R190
10K_4
10K_4
1
4
Cardreader
Mini
MBCLK2 <16,31>
MBDATA2 <16,31>
CGDAT_SMB <2,15,16>
CGCLK_SMB <2,15,16>
[WLAN]
[
LAN]
WLAN
LAN
PCIE_RXN1<32>
PCIE_RXP1<32>
PCIE_TXN1<32>
PCIE_TXP1<32>
PCIE_RXN2_LAN<29>
PCIE_RXP2_LAN<29>
PCIE_TXN2_LAN<29>
PCIE_TXP2_LAN<29>
PCIE_RXN3_CARD<26>
PCIE_RXP3_CARD<26>
PCIE_TXN3_CARD<26>
PCIE_TXP3_CARD<26>
CLK_PCIE_WLANN<32>
CLK_PCIE_WLANP<32>
PCIE_CLKREQ_WLAN#<32>
CLK_PCIE_CARDN<26>
CLK_PCIE_CARDP<26>
CLK_PCIE_REQ2#<26>
CLK_PCIE_LANN<29>
CLK_PCIE_LANP<29>
PCIE_CLKREQ_LAN#<29>
C450 0.1U/10V_4C450 0.1U/10V_4
C449 0.1U/10V_4C449 0.1U/10V_4
C458 0.1U/10V_4C458 0.1U/10V_4
C459 0.1U/10V_4C459 0.1U/10V_4
C460 0.1U/10V_4C460 0.1U/10V_4
C461 0.1U/10V_4C461 0.1U/10V_4
PLT_R ST-R#< 12>
3
PCIE_RXN2_LAN
PCIE_RXP2_LAN
PCIE_TXN3_CARD_C
PCIE_TXP3_CARD_C
PCIE_CLK_REQ0#
PCIE_CLK_REQ4#
PCIE_CLK_REQ5#
PCIE_CLK_REQB#_R
*MC74VHC1G08DFT2G
*MC74VHC1G08DFT2G
PLT_RS T-R#
R439
R439
100K_4
100K_4
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C
IBEX PEA
BG30
BJ30
BF
29
BH29
30
AW
BA30
BC30
BD30
30
AU
AT30
AU32
AV32
BA32
BB32
BD32
BE32
BF
33
BH33
BG32
BJ32
BA34
AW34
34
BC
BD34
AT
34
AU34
AU
36
AV36
BG34
BJ34
BG36
BJ36
AK48
AK47
P9
AM43
AM45
U4
AM47
AM48
N4
AH42
AH41
A8
AM51
AM53
M9
AJ50
AJ52
H6
AK53
AK51
P13
+3VS5
U21
U21
2
1
3 5
R423 *0_4/SR423 *0_4/S
10/25 PV modify
U24B
U24B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PCI-E*
PCI-E*
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
UT_PCIE0N
CLKO
UT_PCIE0P
CLKO
PCIE
CLKRQ0# / GPIO73
UT_PCIE1N
CLKO
CLKO
UT_PCIE1P
PCIECLKRQ1# / GPIO18
UT_PCIE2N
CLKO
CLKO
UT_PCIE2P
PCIECLKRQ2# / GPIO20
CLKO
UT_PCIE3N
CLKO
UT_PCIE3P
PCIECLKRQ3# / GPIO25
CLKO
UT_PCIE4N
CLKO
UT_PCIE4P
CLKRQ4# / GPIO26
PCIE
CLKO
UT_PCIE5N
CLKO
UT_PCIE5P
CLKRQ5# / GPIO44
PCIE
CLKOUT
_PEG_B_N
CLKOUT
_PEG_B_P
PEG_B_CLKRQ# /
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
C658
C658
*0.1U/10V_4
*0.1U/10V_4
4
(PCI-E,SM
K-M
Ibex-M
Ibex-M
2 OF 10
2 OF 10
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
GPIO56
(+3V_S5)
(+3V_S5)
PLTRST# <3,17,26,29,31,32>
R421
R421
*100K_4
*100K_4
+1.05V<2,10,12,14,41>
2
SMBus
SMBus
(+3V_S5)
(+3V_S5)
SMBALERT# / GPIO11
(+3V_S5)
(+3V_S5)
SML0ALERT
(+3V_S5)
(+3V_S5)
SML1ALERT# / GPIO74
(+3V_S5)
(+3V_S5)
SML
(+3V_S5)
(+3V_S5)
Controller
Controller
Link
Link
PEG
PEG
PEG_A_CLKRQ# /
(+3V_S5)
(+3V_S5)
UT_DP_N / CLKOUT_BCLK1_N
CLKO
UT_DP_P / CLKOUT_BCLK1_P
CLKO
CLKIN
_SATA_N / CKSSCD_N
_SATA_P / CKSSCD_P
CLKIN
CLKIN_PCILOOPBACK
From CLK BUFFER
From CLK BUFFER
(+3V)
(+3V)
CLKO
CLKO
(+3V)
(+3V)
(+3V)
(+3V)
CLKO
(+3V)
(+3V)
CLKO
Clock Flex
Clock Flex
+3V<2,3,10,12,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
BUS,CLK)
SMBCLK
SMBDAT
# / GPIO60
SML0CLK
SML0DATA
SML1CLK /
GPIO58
1DATA / GPIO75
CL_CLK1
CL_DAT
CL_RST
GPIO47
_PEG_A_N
CLKOUT
_PEG_A_P
CLKOUT
UT_DMI_N
CLKO
CLKO
UT_DMI_P
CLKI
N_DMI_N
N_DMI_P
CLKI
CLKIN_BCLK_N
CLKI
N_BCLK_P
_DOT_96N
CLKIN
CLKIN_DOT_96P
REFC
LK14IN
XTAL25_IN
XTAL25_OUT
_RCOMP
XCLK
UTFLEX0 / GPIO64
UTFLEX1 / GPIO65
UTFLEX2 / GPIO66
UTFLEX3 / GPIO67
UMA only
XTAL25_IN
XTAL25_OUT
SMBALERT#
B9
PCLK_SMB
H1
4
PDAT_SMB
C8
A
SMBL0ALERT#
J14
SMB_CLK_ME0
C6
SMB_DATA_ME0
G8
SML1ALERT#
M14
SMB_CLK_ME1
E10
SMB_DATA_ME1
G12
T1
3
T11
A1
T9
1#
PEG_CLKREQ#
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
CLK_PCI_FB
J42
XTAL25_IN
AH
51
XTAL25_OUT
53
AH
XCLK_RCOMP
AF38
CLK_FLEX0
T45
CLK_FLEX1
P43
CLK_FLEX2
T42
CLK_FLEX3CLK_FLEX3
N50
R454
R454
1M_4
1M_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DREFSSCLK# <3>
DREFSSCLK <3>
CLK_BUF_PCIE_3GPLL# <2>
CLK_BUF_PCIE_3GPLL <2>
CLK_BUF_BCLK_N <2>
CLK_BUF_BCLK_P <2>
CLK_BUF_DREFCLK# <2>
CLK_BUF_DREFCLK <2>
CLK_BUF_DREFSSCLK# <2>
CLK_BUF_DREFSSCLK <2>
C473 *5.6P/50V_4C473 *5.6P/50V_4
CLK_PCI_FB <12>
R262 90.9/F_4R262 90.9/F_4
Y5
25MHZY525MHZ
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 2/5 (PCIE, SMBUS, CK)
PCH 2/5 (PCIE, SMBUS, CK)
PCH 2/5 (PCIE, SMBUS, CK)
+3VS5
R44210K_4 R44210K_4
R1892.2K_4 R1892.2K_4
R2082.2K_4 R2082.2K_4
R23810K_4 R23810K_4
R2292.2K_4 R2292.2K_4
R2122.2K_4 R2122.2K_4
R23910K_4 R23910K_4
R2164.7K_4 R2164.7K_4
R2274.7K_4 R2274.7K_4
PEG_CLKREQ# <17>
CLK_PCIE_VGA# <17>
CLK_PCIE_VGA <17>
CLK_PCIE_3GPLL# <3>
CLK_PCIE_3GPLL <3>
+1.05V
T36T3 6
T35T3 5
T34T3 4
T37T3 7
C668 27P/50V_4C668 27P/50V_4
or TXC.
8/25 SI f
C669 33P/50V_4C669 33P/50V_4
11 42Tuesday, February 15, 2011
11 42Tuesday, February 15, 2011
11 42Tuesday, February 15, 2011
1
11
CLK_ICH_14M <2>
DIS only
of
of
of
1A
1A
1A
WWW.AliSaler.Com
1
WWW.AliSaler.Com
2
3
4
5
6
7
8
SLP_M#
AC_PRESENT_R
PCH_SUSCLK_L
SLP_S5#
PM_BATLOW#
+3V
+3VS5
12
TP4TP4
12 42Tuesday, February 15, 2011
12 42Tuesday, February 15, 2011
12 42Tuesday, February 15, 2011
8
FDI_TXN0 <3>
FDI_TXN1 <3>
FDI_TXN2 <3>
FDI_TXN3 <3>
FDI_TXN4 <3>
FDI_TXN5 <3>
FDI_TXN6 <3>
FDI_TXN7 <3>
FDI_TXP0 <3>
FDI_TXP1 <3>
FDI_TXP2 <3>
FDI_TXP3 <3>
FDI_TXP4 <3>
FDI_TXP5 <3>
FDI_TXP6 <3>
FDI_TXP7 <3>
FDI_INT < 3>
FDI_FSYNC0 <3>
FDI_FSYNC1 <3>
FDI_LSYNC0 <3>
FDI_LSYNC1 <3>
SUSB# <31>
SUSC# <31>
SUS_PWR_ACK <31>
CLKRUN# <31>
SLP_S5 <31>
1A
1A
1A
of
of
of
IBEX PEAK-M (DMI,FDI,GPIO)
U24C
U24C
BC
DMI_COMP
odify
PCH_PWROK
PM_RI#
CLKRUN#
XDP_DBRESET#
RSMRST#
RSV_ICH_LAN_RST#
PCH_PWROK
BT_COMBO_EN#
AW20
BJ
BJ
BD
BG22
BA20
BG20
BE22
BF
BD
BE18
BD
BH
BC
BD18
BH25
BF
BJ10
24
22
20
24
21
20
22
21
20
25
T6
M6
B17
K5
A10
D9
C16
P5
F14
J12
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOM
P
DMI_IRCOMP
System Power Management
System Power Management
SYS_RESET#
K
SYS_PWRO
PWROK
OK
MEPWR
LAN_
RST#
K
DRAMPWRO
RSMRST
#
N#
PWRBT
RI#
#
WAKE
H
PMSYNC
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
R425 8.2K_4R425 8.2K_4
R236 10K_4R236 10K_4
R443 10K_4R443 10K_4
R447 10K_4R447 10K_4
R260 *1K_4R260 *1K_4
+1.05V<2,10,11,14,41>
+3V<2,3,10,11,13,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
+3VS5<3,10,11,13,14,17,28,33,34,36,38,40>
6
DMI_RXN0<3>
PM_DRAM_PWRGD<3>
XDP_DBRESET#<3>
DNBSWON#<31>
PCIE_WAKE#<29,32>
5
DMI_RXN1<3>
DMI_RXN2<3>
DMI_RXN3<3>
DMI_RXP0<3>
DMI_RXP1<3>
DMI_RXP2<3>
DMI_RXP3<3>
DMI_TXN0<3>
DMI_TXN1<3>
DMI_TXN2<3>
DMI_TXN3<3>
DMI_TXP0<3>
DMI_TXP1<3>
DMI_TXP2<3>
DMI_TXP3<3>
+1.05V
R247 49.9/F_4R247 49.9/F_4
R200 *0_4/SR200 *0_4/S
R199 *0_4R199 *0_4
RSMRST#<31>
PM_SYNC<3>
10/25 PV m
RSV_ICH_LAN_RST#
R194 *0_4/SR194 *0_4/S
A A
+3V
RP5
RP5
6
5
PCI_STOP#
PCI_IRDY#
PCI_PIRQA#
PCI_PIRQC#
+3VS5
USB_OC4#
USB_OC5#
USB_OC6# USB_OC3#
USB_OC7#
+3V
PCI_DEVSEL#
PCI_TRDY# PCI_PIRQB#
B B
INTH#
C C
CLK_33M_DEBUG<32>
CLK_33M_KBC<31>
CLK_PCI_FB<11>
D D
4
3
2
1
10P8R-8.2K
10P8R-8.2K
RP2
RP2
5
4
3
2
1
10P8R-8.2K
10P8R-8.2K
RP6
RP6
5
4
3
2
1
10P8R-8.2K
10P8R-8.2K
CLK_33M_KBC
1
BT_COMBO_EN#<32>
8/25 SI f
C673
C673
*5.6P/50V_4
*5.6P/50V_4
7
8
9
10
6
7
8
9
10
6
7
8
9
10
GNT0#<13>
GNT1#<13>
GNT3#<13>
PCI_SERR#<31>
PLT_RST-R#<11>
R460 33_4R460 33_4
R462 33_4R462 33_4
R274 22_4R274 22_4
IBEX PEAK-M (PCI,USB,NVRA
U24E
U24E
H40
Ibex-M
Ibex-M
AD0
N34
5 OF 10
5 OF 10
AD1
C44
PCI_PIRQD#
PCI_SERR#
PCI_FRAME#
USB_OC0#
USB_OC1#
USB_OC2#
PCI_PLOCK#
PCI_PERR#REQ3#
REQ0#
or H/W.
TP2TP2
REQ1#
+3V
+3VS5
+3V
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
REQ0#
REQ1#
REQ2#
REQ3#
PIRQE#
PIRQF#
PIRQG#
INTH#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
PME#
PLT_RS T-R#
CLK_33M_DEBUG_R
CLK_33M_KBC_R
CLK_PCI_FB_C
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
J5
0
G42
7
H4
G34
G38
H51
B37
A44
F51
A46
B45
M53
F48
K45
F36
H53
B41
K53
A36
A48
K6
E44
E50
A42
H44
F46
C46
D49
D41
C48
M7
D5
N52
P53
P46
P51
P48
2
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PIRQ
A#
B#
PIRQ
PIRQ
C#
D#
PIRQ
REQ0
#
# / GPIO50
REQ1
REQ2
# / GPIO52
# / GPIO54
REQ3
GNT0
#
GNT1# /
GPIO51
GNT2# /
GPIO53
GPIO55
GNT3# /
PIRQE# / GPIO2
PIRQ
F# / GPIO3
PIRQG# /
GPIO4
H# / GPIO5
PIRQ
ST#
PCIR
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAM
E#
PLOCK#
STOP#
TRDY#
PME#
PLTRST#
CLKO
UT_PCI0
UT_PCI1
CLKO
UT_PCI2
CLKO
CLKOUT_PCI3
CLKOUT_PCI4
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
PCI
PCI
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
(+5V)
NVRAM
NVRAM
NV_DQ0 / NV_IO0
NV_D
NV_D
NV_D
NV_D
NV_DQ5 / NV_IO5
NV_D
NV_D
NV_D
NV_D
NV_DQ10 / NV_IO10
NV_DQ11 /
NV_DQ12 /
NV_DQ13 /
NV_DQ14 /
NV_DQ15 /
USB
USB
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
Q1 / NV_IO1
Q2 / NV_IO2
Q3 / NV_IO3
Q4 / NV_IO4
Q6 / NV_IO6
Q7 / NV_IO7
Q8 / NV_IO8
Q9 / NV_IO9
NV_RCO
NV_W
NV_W
NV_WE#_C
NV_WE#_CK1
USBRBI
OC0# / GPI
OC1# / GPIO40
OC2# / GPI
OC3# / GPI
OC4# / GPI
OC5# / GPI
OC6# / GPIO10
OC7# / GPIO14
3
NV_CE
NV_CE
NV_CE#2
NV_CE#3
NV_DQ
NV_DQ
NV_IO11
NV_IO12
NV_IO13
NV_IO14
NV_IO15
NV_ALE
NV_CLE
NV_RB
R#0_RE#
R#1_RE#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBI
M)
AY9
#0
BD1
#1
AP15
BD8
AV9
S0
BG8
S1
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
MP
AV7
#
AY8
AY5
AV11
K0
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
AS#
D25
AS
N16
O59
J16
F16
O41
L16
O42
E14
O43
G16
O9
F12
T15
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USBP0- <28>
USBP0+ <28>
USBP1- <28>
USBP1+ <28>
USBP4- <22>
USBP4+ <22>
USBP8- <28>
USBP8+ <28>
USBP10- <32>
USBP10+ <32>
USBP2- <28>
USBP2+ <28>
R449 22.6/F_4R449 22.6/F_4
>&d^/h^ηϬ
>&d^/h^ηϭ
tĞďĐĂŵ
ydh^ηϯ
Z
ůƵĞƚŽŽƚŚ
4
IMVP_PWRGD<35>
SI Modify
Change Port2 to Port4
Change Port4 to Port12
change Port5 to Port13
t>E
EC_PWROK<31>
Ibex-M
Ibex-M
3 OF 10
3 OF 10
DMI FDI
DMI FDI
(+3V_S5)
(+3V_S5)
SUS_PWR
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
10/25 PV modify
PCH_SUSCLK_L
R438 *0_4/SR438 *0_4/S
+3V
AC_PRESENT_R
R201 *0_4R201 *0_4
_DN_ACK / GPIO30
ACPRESEN
CLKRUN#
SUS_STAT
SUSCLK /
SLP_S5# / GPIO63
BAT
SLP_LAN# / GPI
REQ2#
PIRQE#
PIRQF#
PIRQG#
PM_RI#
PM_BATLOW#
PCIE_WAKE#
SUS_PWR_ACK
AC_PRESENT_R
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
BA18
FDI_RXN0
BH
17
FDI_RXN1
16
BD
FDI_RXN2
BJ16
FDI_RXN3
BA16
FDI_RXN4
BE14
FDI_RXN5
BA14
FDI_RXN6
12
BC
FDI_RXN7
BB18
FDI_RXP0
BF17
FDI
_RXP1
BC16
FDI
_RXP2
BG16
_RXP3
FDI
AW16
_RXP4
FDI
BD14
FDI_RXP5
BB14
FDI
_RXP6
BD12
FDI
_RXP7
BJ14
FDI_INT
BF13
FDI_FSY
NC0
BH13
NC1
FDI_FSY
BJ12
FDI_LS
YNC0
BG14
YNC1
FDI_LS
P12
SLP_S3#
H7
SLP_S4#
K8
SLP_M#
N2
TP23
M1
P7
T / GPIO31
Y1
/ GPIO32
P8
# / GPIO61
F3
GPIO62
E4
A6
LOW# / GPIO72
F6
O29
PCH_SUSCLK <31>
R268 8.2K_4R268 8.2K_4
R267 8.2K_4R267 8.2K_4
R461 8.2K_4R461 8.2K_4
R257 8.2K_4R257 8.2K_4R220 1K_4R220 1K_4
R233 10K_4R233 10K_4
R441 10K_4R441 10K_4
R211 1K_4R211 1K_4
R209 10K_4R209 10K_4
R210 10K_4R210 10K_4
AC_PRESENT <31>
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
PCH 3/5 (PCI,ONFI,USB,DMI)
PCH 3/5 (PCI,ONFI,USB,DMI)
PCH 3/5 (PCI,ONFI,USB,DMI)
WWW.AliSaler.Com
1
WWW.AliSaler.Com
SIO_EXT_SMI#<31>
SIO_EXT_SCI#<31>
TP3TP3
BT_OFF#<28,32>
A A
DGPU_PWROK<17,19,31>
GPIO27 left NC for
internal VR.
DGPU_PWR_EN<36>
GPIO49<26>
10/25 PV m
DGPU_HOLD_RST#<17>
10/25 PV m
PCIE_CLK_REQ7#<3>
10/25 PV modify
odify
RF_OFF#<32>
R264 0_4R264 0_4
UMA re
TP6TP6
odify
R420 *0_4/SR420 *0_4/S
UMA remove
LCD_BK<22>
R434 *0_4/SR434 *0_4/S
R258 *0_4/SR258 *0_4/S
UMA re
move
PCIE_CLK_REQ7#
move
8/25 SI for H/W.
B B
+3VS5
R235 10K_4R235 10K_4
C C
80$
31R12MB0000 (P
31R12MB0010 (PDT)00
6H\PRXU;7
+\QL[
31R12MB0020 (P
31R12MB0030 (PDT)
6DPVXQJ
31R12MB0040 (P
31R12MB0050 (PDT)
+\QL[*
31R12MB0060 (P
31R12MB0070 (PDT)
6DPVXQJ*
31R12MB0080 (PIM)
31R12MB0090 (PDT)
TP_PCH_GPIO28
IM)
1
IM)
1
IM)
1
10
1
IM)
1
1
1
2
IBEX PEAK-M (G
U24F
BMBUSY#
PCH_GPIO7
LAN_DISABLE_R#
PCH_GPIO17
BIOS_REC
GPIO27
TP_PCH_GPIO28
SATA2GP
SATA3GP
LCD_BK
SV_SET_UP
SATA5GP
PCH_GPIO35
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
U24F
Y3
BMBUSY# /
C38
TACH1 / GPIO1
D37
TACH2 / G
J32
TACH3 / G
F10
GPIO8
K9
LAN_
T7
GPIO15
F38
TACH0 / G
Y7
SCLOCK / GPIO22
AB12
GPIO27
V13
GPIO28
AB7
SATA2GP / GPI
AB13
SATA3GP / GPI
P3
SDATAOUT0 / GPIO39
F1
PCIE
AB6
SDATAOU
AA4
SATA5GP / GPI
V6
SATACLKR
H10
GPIO24
H3
PCIE
F8
GPIO57
M11
STP
AA2
SATA4GP / GPI
V3
SLOAD / GPIO38
A4
VSS_NCT
A49
VSS_NCT
A5
VSS_NCT
A50
VSS_NCT
A52
VSS_NCTF_5
A53
VSS_NCT
B2
VSS_NCT
B4
VSS_NCT
B52
VSS_NCT
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCT
BF1
VSS_NCT
BF53
VSS_NCT
BH1
VSS_NCT
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
PHY_PWR_CTRL / GPIO12
CLKRQ7# / GPIO46
CLKRQ6# / GPIO45
_PCI# / GPIO34
000000000
0
000
000
0
0
0
0
000
0
000
0
0
000
0
PIO,VSS_NCTF,RSVD)
Ibex-M
Ibex-M
6 OF 10
6 OF 10
(+3V)
(+3V)
GPIO0
(+3V)
(+3V)
(+3V)
(+3V)
PIO6
(+3V)
(+3V)
PIO7
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
PIO17
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
T1 / GPIO48
EQ# / GPIO35
F_1
F_2
F_3
F_4
F_6
F_7
F_8
F_9
F_12
F_13
F_14
F_15
,',',','50%31 ,','
0
0
00000000
0
0000
0
GPIO
GPIO
MISC
MISC
(+3V_S5)
(+3V_S5)
CLKO
(+3V)
(+3V)
CLKOUT
(+3V)
(+3V)
(+3V)
(+3V)
O36
O37
(+3V)
(+3V)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
O49
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
O16
(+3V)
(+3V)
NCTF
NCTF
%RDUG,'
80$',6
5HVHUYH
5HVHUYH
5HVHUYH
5HVHUYH
BOARD_ID1姕ㆸHIGHẋ堐Rockey 1.1
3
CLKO
UT_PCIE6N
UT_PCIE6P
CLKO
CLKO
UT_PCIE7N
UT_PCIE7P
CLKO
A20GATE
UT_BCLK0_N/CLKOUT_PCIE8N
_BCLK0_P/CLKOUT_PCIE8P
CPU
CPU
RSVD
RSVD
PECI
RCIN#
PROCPW
THRMTRIP#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INI
T3_3V#
TP24
VSS_NCT
VSS_NCT
VSS_NCT
VSS_NCT
VSS_NCTF_20
VSS_NCT
VSS_NCT
VSS_NCT
VSS_NCT
VSS_NCTF_25
VSS_NCTF_26
VSS_NCT
VSS_NCT
VSS_NCT
VSS_NCT
VSS_NCT
R222 10K_4R222 10K_4
BIOS RECOVERY
HIGH : DISABLE
LOW : ENABLE
80$
'LV
RGD
F_16
F_17
F_18
F_19
F_21
F_22
F_23
F_24
F_27
F_28
F_29
F_30
F_31
4
AH45
AH46
AF48
AF47
U2
AM3
AM1
PCH_PECI_R
BG10
T1
BE10
PCH_THRMTRIP#_R
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N1
AJ
AK41
AK42
M3
N3
M3
N30
H1
AA23
AB45
AB38
AB42
AB41
T39
P6
C1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
R232 56.2/F_4R232 56.2/F_4
+1.05V_VTT
R228 56.2/F_4R228 56.2/F_4
8
24
2
2
0
2
0
+3V +3VS5
EC_RCIN#
EC_A20GATE
SATA2GP
PCH_GPIO35
SATA3GP
SATA5GP
BMBUSY#
SIO_EXT_SMI#
SIO_EXT_SCI#
BT_OFF#
LCD_BK
PCH_GPIO17
RF_OFF#BIOS_REC
LAN_DISABLE_R#
,','
1R
<HV
1R
<HV
1R
<HV
EC_A20GATE <31>
CLK_CPU_BCLK# < 3>
CLK_CPU_BCLK < 3>
H_PECI <3>
EC_RCIN# <31>
H_PWRGOOD <3>
PM_THRMTRIP# <3,31>
or H/W.
8/25 SI f
R203 10K_4R203 10K_4
R426 10K_4R426 10K_4
R224 *10K_4R224 *10K_4
R205 10K_4R205 10K_4
R234 10K_4R234 10K_4
R435 10K_4R435 10K_4
R427 10K_4R427 10K_4
R261 10K_4R261 10K_4
R263 10K_4R263 10K_4
R255 10K_4R255 10K_4
R432 10K_4R432 10K_4
R265 10K_4R265 10K_4
R221 1K_4R221 1K_4
R196 10K_4R196 10K_4
,',',','
*3,2*3,2 *3,2 *3,2*3,2*3,2
1R
<HV
5
+3V
+3VS5
58 5'
R207 10K_4R207 10K_4
58
R419 10K_4R419 10K_4
58
+3V
58
R202 *10K_4R202 *10K_4
58
R424 *10K_4R424 *10K_4
58
R428 *10K_4R428 *10K_4
8/25 SI for H/W.
6
IBEX PEA
U24H
U24H
AB16
VSS[0]
AA19
VSS[1]
AA20
VSS[2]
AA22
VSS[3]
AM19
VSS[4]
AA24
VSS[5]
AA26
VSS[6]
AA28
VSS[7]
AA30
VSS[8]
AA31
VSS[9]
AA32
VSS[10]
AB11
VSS[11]
AB15
VSS[12]
AB23
VSS[13]
AB30
VSS[14]
AB31
VSS[15]
AB32
VSS[16]
AB39
VSS[17]
AB43
VSS[18]
AB47
VSS[19]
AB5
VSS[20]
AB8
VSS[21]
AC2
VSS[22]
AC52
VSS[23]
AD11
VSS[24]
AD12
VSS[25]
AD16
VSS[26]
AD23
VSS[27]
AD30
VSS[28]
AD31
VSS[29]
AD32
VSS[30]
AD34
VSS[31]
AU22
VSS[32]
AD42
VSS[33]
AD46
VSS[34]
AD49
VSS[35]
AD7
VSS[36]
AE2
VSS[37]
AE4
VSS[38]
AF12
VSS[39]
Y13
VSS[40]
AH49
VSS[41]
AU4
VSS[42]
AF35
VSS[43]
AP13
VSS[44]
AN34
VSS[45]
AF45
VSS[46]
AF46
VSS[47]
AF49
VSS[48]
AF5
VSS[49]
AF8
VSS[50]
AG2
VSS[51]
AG52
VSS[52]
AH11
VSS[53]
AH15
VSS[54]
AH16
VSS[55]
AH24
VSS[56]
AH32
VSS[57]
AV18
VSS[58]
AH43
VSS[59]
AH47
VSS[60]
AH7
VSS[61]
AJ19
VSS[62]
AJ2
VSS[63]
AJ20
VSS[64]
AJ22
VSS[65]
AJ23
VSS[66]
AJ26
VSS[67]
AJ28
VSS[68]
AJ32
VSS[69]
AJ34
VSS[70]
AT5
VSS[71]
AJ4
VSS[72]
AK12
VSS[73]
AM41
VSS[74]
AN19
VSS[75]
AK26
VSS[76]
AK22
VSS[77]
AK23
VSS[78]
AK28
VSS[79]
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
BOARD_ID0
R206 *10K_4R206 *10K_4
BOARD_ID1
R437 *10K_4R437 *10K_4
BOARD_ID2
R213 10K_4R213 10K_4R214 *10K_4R214 *10K_4
BOARD_ID3
R218 10K_4R218 10K_4
BOARD_ID4
R204 10K_4R204 10K_4
BOARD_ID5
R431 10K_4R431 10K_4
K-M
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
5'
5'
5'
5'
5'
(GND)
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
7
GNT3#<12>
A16 swap override Strap/Top-Block
Swap Override jumper
GNT3#
SV_SET_UP
Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
R464 *10K_4R464 *10K_4
R219 10K_4R219 10K_4
8
13
SV_SET_UP 1-X High = Strong (Default)
GNT0#
GNT0#<12>
GNT1#<12>
Boot BIOS Strap
PCI_GNT0# GNT#1
00
0
1
11
Danbury Technology Enabled
NV_ALE
R271 * 1K_4R271 *1K_4
GNT1#
R463 * 1K_4R463 *1K_4
Boot BIOS Location
LPC
Reserved (NAND)
1
PCI
0
SPI
High = Enable
Low = Disable
DMI Termination Voltage
Set to Vcc when LOW
NV_CLE
Set to Vcc/2 when HIGH
No Reboot Strap
ACZ_SPKR<10,27>
GPIO33_E<10,31>
R430*1K_4 R430*1K_4
R253 *100K_4R253 * 100K _4
+1.05V_VTT<3,5,6,14,31,34,35,36,40>
+1.8V<5,14,34>
+3V<2,3,10,11,12,14,15,16,17,19,22,23,24,25,26,27,29,30,31,32,35,36,38>
+3VS5<3,10,11,12,14,17,28,33,34,36,38,40>
+3V
+3V
D D
352-(&75'
352-(&75'
352-(&75'
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
PCH 4/5 (GPIO & Strap)
PCH 4/5 (GPIO & Strap)
PCH 4/5 (GPIO & Strap)
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
1A
1A
1A
of
of
of
13 42Tuesday, February 15, 2011
13 42Tuesday, February 15, 2011
13 42Tuesday, February 15, 2011
8
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