Page 1
THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC
CORPORATION AND SHALL NOT BE REPODUCED, COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION, ALL RIGHT RESERVED.
8
7 6 5 4 3 2 1
2012
HSF Proper ty:ROHS or Halogen-Free
E
D
F F
E
COMET DIS
D
SI1 BUILD
2012.11.30
C
B
A
21-OCT-2002
DATE CHANGE NO.
8
REV
7 6 5 4 3
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE=
FILE NAME:
P/N
COMET DIS
6050A2559101
EDI CHEN
EDI CHEN
EDI CHEN
EDI CHEN
C
B
A
POWER
DATE DATE EE
2012/10/24
IRAY CHEN
2012/10/24
2012/10/24
IRAY CHEN
2012/10/24
2012/10/24
IRAY CHEN
2012/10/24
2012/10/24
XXX
IRAY CHEN
2
2012/10/24
VER:
X01 A3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
COMET
CODE
SIZE
C
CS
SHEET
DOC.NUMBER REV
1310xxxxx-0-0
1
1
X01
of
77
Page 2
8
7 6 5 4 3 2 1
EDP PANEL
DP
CRT
E
KEYBOARD
TOUCH PAD
SPI FLASH
DP RE-DRIVER
DP / CRT
CONTROLLER
EC
CONTROLLER
STICK POINT
TPM
EDP
DP
LPC
HASWELL
ULT
DDR3 / DDR3L
HD
USB20
DDR3 / DDR3L
SODIMMX2
AUDIO CODEC
SMART CARD CONTROLLER
WEB CAMERA
FINGERPRINT
BLUETOOTH
WWAN
USB CHARGE PORT
USB2 PORT X3
F F
HP/MIC
HP/MIC DOCK
SMART CARD
E
USB2 DOCK X1
USB30
D
MEDIA CARD
SD/MMC
MINICARD(W LAN)
PCIE
SATA
RJ45
RJ45 DOCK
NIC
SMBUS
C
USB CHARGE PORT
USB3 HUB
USB3 DOCK X1
2.5" HDD
MSATA MODULE
ACCELEROMETER
THERMAL SENSOR
USB3 PORT X3
D
C
DOCK DP
B
PRIMARY LI-LON BATTERY
A
SECOND LI-LON BATTERY
SIDE DOCK CONNECTOR
8
7 6 5 4 3
PCIE
MARS
DP
DOCK
NFC
CHANGE by
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
C
XXX
DATE
21-OCT-2002
2 1
CS
SHEET
REV
X01
of
2
77
Page 3
8 7
6 5
4
3 2 1
D
01.PROJECT NAME 26.XDP & ME CONN.
02.BLOCK DIAGRAM
03.TABLE OF CONTENTS
04.POWER BLOCK DIAGRAM
05.SYSTEM POWER(CHARGER)
06.SYSTEM POWER(BATT SELECTOR)
07.SYSTEM POWER(OCP)
08.SYSTEM POWER(P3V3A&P5V0A)
09.P3V3A&P5V0A_CHG PORT
10.SYSTEM POWER(P1V5)
11.SYSTEM POWER(P1V05_M)
12.SYSTEM POWER(P1V05S)
13.USB HUB POWER (P1V2A)
14.SYSTEM POWER(PVCORE&PVAXG-1)
B
15.SYSTEM POWER(PVCORE&PVAXG-2)
16.POWER SEQUENCE (SLEEP)
17.DC JACK & BATTERT CONN.
18.HP_OCP
19.PVCORE_DGPU
20.PVDDCI
21.P1V35S_DGPU
22.P1V8S
23.PVPCIE
24.POWER (SEQUENCE)
25.FAN & THERMAL
TABLE OF CONTENTS
51.KBC, SPI
27.HASWELL_1 (MISC,JTAG)
28.HASWELL_2 (LPC,SPI,SMBUS,CLINK,PM)
29.HASWELL_3 (GPIO)
30.HASWELL_4 (DP,EDP)
31.HASWELL_5 (DDR)
32.HASWELL_6 (PCIE,USB)
33.HASWELL_7 (RTC,AUDIO,SATA,JTAG)
34.HASWELL_8 (CLK)
35.HASWELL_9 (POWER)
36.HASWELL_10 (POWER)
37.HASWELL_11 (GND)
38.SYSTEM MEMORY (DIMM0)
39.SYSTEM MEMORY (DIMM1)
40.EMPTY
41.EMPTY
43.DISPLAY PORT
44.LCM & WEBCAM CONN
45.SATA HDD, MSATA
46.USB HUB
47.USB3 PORTS
48.USB & CRT DB
49.FINGERPRINT READER, NFC
50.ACCELEMETER
52.KEYBOARD
53.TPM
54.LAN
55.WLAN/BT SLOT
56.WWAN SLOT, SIM SLOT
57.DOCKING
58.B TO B CONN, POINT STICK CONN
59.AUDIO CODEC
60.AUDIO JACK, MIC AMP.
61.CARD READER
62.BUTTON, LED
63.SMART CARD DAUGHTER BOARD
64.CRT DB WTB CONN
65.MIC DB
66.SCREW
67.EMPTY 42.DP TO VGA CONVERTER
68.MARS-1
69.MARS-2
70.MARS-3
71.MARS-4
72.MARS-5
73.MARS-6
74.MARS-7
75.MARS-8
D
C C
B
A A
76.VRAM-1
77.VRAM-2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
TABLE OF CONTENTS
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
CHANGE by
8
7 6
5 4
XXX
DATE
21-OCT-2002
2 3
of
3
1
REV
X01
77
Page 4
8 7
6 5
4
3 2 1
EN1V2A
P5V0DS
ADP_EN
LIMIT_SIGNAL
D
ADAPTER
(90W)
2ND BATTERY
OCP
ICS
CHARGER
BQ24736
OCP_OC#
CHARGER_DAT
CHARGER_CLK
MAIN BATTERY
ADP_PRES
KBC_PW_ON
SLP_S3#_3R
EN0
5/3.3V
(TPS51225)
DDR3 / 1.5V
P3V3DS
VRP5V0A_LDO
VRP3V3A_LDO
SPWON
KBC_PWR_ON
SLP_LAN#
EN1V5S
DDR3L/1.35V
ENP1V5
EN_DGPU
PVBAT
TPS51362
TPS51728
P1V5
EN_VRPVTT
VRPVCORE_DGPU
KBC_PWR_ON
SLP_S3#_5R
AO6424L
FDMC7692
FDC638APZ
RT8068
G2997BF61U
RT8068
FDC7692
AO6424L
P3V3S
P3V3A
P3V3M
P1V5S
0V75S
P1V2A
P5V0A
P5V0S
D
C C
B
CPU
8
PVCCIO_OUT_R
PAD
7 6
P1V05S_VCCP
PAD
PVCCIO_OUT
5 4
EN_VDDCI
EN_1V35S_DGPU
EN_1V8S
EN1V05A
EN_CPU
TPS51367
TPS51367
TPS51312
TPS51362
IMVP VI
TPS51622
VRPVDDCI
VRP1V35S_DGPU
VRP1V8S
P1V05A
PWRCTL_P1V05
PVCORE
VGATE
CHANGE by
XXX
AO6424L
P1V05M
DATE
21-OCT-2002
2 3
SPWON
FDMS0310AS
(IAMT)
PAD
(NON-IAMT)
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
BLOCK DIAGRAM POWER
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
B
P1V05S
P1V05S
A A
REV
of
4
1
X01
77
Page 5
8 7
6 5
4
3 2 1
VADPBL
G
3
1
1
2
2
3
3
4 5
4 5
OUT
Q6010
ALPHA_AON7403L_DFN_8P
DS
8
8
7
7
6
6
R6017
Q6009
R6005
Q6019
1
21
3
DS
1
2
2
G
D
SSM3K7002BFU
B
P5V0S
R6029
18.2K_1%_2
21
21
DA2J10100L
R6030
CHG_RST
10K_1%_2
21
D6018
21
IN
SSM3K7002BFU
8
PVADPTR
C6019
21
220K_5%_2
0.1UF_16V_2
R6016
21
220K_5%_2
1
G
3
100K_5%_2
2
DS
G
Q6013
SSM3K7002BFU
1
P3V3DS
IN
OUT
ADP_DET
PVADPTR P3V3DS
R6021
127K_1%
R6022
1M_5%_2
ACDET>0.6V:SMBUS OK
ACDET>2.4V&<3.1V:ACOK
C6022
21
20K_1%_2
3
DS
R6023
2
21
21
100PF_50V_2
7 6
ADP_EN
R6028
4.3K_5%_2
21
2 1
R6024
2 1
5
SDA_BAT_CHG
SCL_BAT_CHG
3
CHR_ILIM
3
V_3.9K
D
6
6
7
7
8
8
D S
R6000
2 1
4 3
C6028
2 1
21
1UF_25V_3
3
214
CMSRC
ACP
ACN
PHASE
HIDRV
BTST
REGN
LODRV
GND
SRP
13
12
15
14
0.01UF_50V_2
PVPACK
C6030
CSC0402_DY
5
VADP_DEBUG
1UF_25V_3
21
TML
20
VCC
19
18
17
16
C6025
21
1UF_10V_2
SHORT_0402_15
IN
R6027
21
C6027
21
VRPVPACK_HG
VRPVPACK_PH
R6015
0_5%_2
D6016
2 1
0.047UF_16V_2
C6015
21
DB2J31300L
VRPVPACK_LG
R6025
2 1
R6020
SHORT_0402_15
PVBAT
12
PAD6015
21
LQ3E080BNFU7TB
678
NMOS_4D3S
10_5%_5
G
3
2 1
678
LQ3E080BNFU7TB
NMOS_4D3S
G
3
2 1
POWERPAD_2_0610
Q6000
D
C6001
C6000
21
21
10UF_25V_5
S
10UF_25V_5
2145
ETQP3W4R7WFN
Q6001
D
R7600
S
2145
21
RSC_0603_DY
C7600
CSC0402_DY
21
CHANGE by
XXX
L6000
IN
PVBAT_CHG
2 1
C6024
21
R6001
0.02_1%_6
C6023
0.1UF_16V_2
0.1UF_25V_2
DATE
2 1
4 3
2 1
21-OCT-2002
2 3
C6011
C6010
21
21
10UF_25V_5
C6021
21
0.1UF_25V_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
PVPACK
C6012
D6049
21
10UF_25V_5
CSC0805_DY
of
77
5
1
C C
B
21
LITEON_B0530W_DIODE
A A
REV
X01
Q6012
ALPHA_AON7403L_DFN_8P
Q6011
1
S
2
3
45
G
2 1
D6017
DB2J31300 L
NMOS_4D3S
RQ3E080BNFU7TB
R6018
4.3K_5%_2
21
8
D
7
6
G
45
45
3
3
2
2
1
1
0.01_1%_6
0.1UF_16V_2
2 1
C6029
5
ACPRES
ACDET
IOUT
SDA
SCL
ILIM
ACDRV
DLIM
SRN
11
TI_BQ24736RGRR_QFN_20P
U6000
6
7
8
9
10
22K_5%_2
R6049
10K_5%_2
C6032
21
0.01UF_50V_2
2 1
C6049
21
100PF_50V_2
OUT
ICS
BI
BI
IN
IN
C6031
21
5 4
Page 6
8 7
6 5
4
3 2 1
PVPACK
SS3040HE
Q6050
1
PVPACK P3V3DS
IN
3V3REF
43
P5V0DS
D
R6928
R6929
R6927
21
200K_1%_2
15K_5%_2
21
5
2 1
133K_1%_2
6
C6905
R6997
21
3
64.9K_1%_2
Q6999
DS
G
SSM3K7002BFU
2
V+
U6903
+IN
+
OUT
-
-IN
V-
BCD_AZV393MTR_G1_SOIC_8P
48
21
0.1UF_16V_2
1
R6926
1M_5%_2
7
R6932
21
2 1
100K_5%_2
OUT
2
LATCHED_ALARM
R6064
21
3
21
D6058
BAV99W_7_F
1
2
2
3
3
45
45
ALPHA_AON7403L_DFN_8P
470K_5%_2
R6099
100_5%_2
R6097
2 1
10K_5%_2
2 1
2 1
D S
8
8
8
7
7
7
6
6
6
G
ALPHA_AON7403L_DFN_8P
2 1
Q6051
DS
8
7
6
G
OUT
MFET_A
IN
MFET_B
L2N7002DW1T1G
1
2
3
4 5
2
5
D6060
D6050
PVPACK
SS3040HE
Q6060
1
1
2
2
3
3
45
45
B
ALPHA_AON7403L_DFN_8P
R6066
470K_5%_2
21
3
21
D6059
BAV99W_7_F
R6096
10K_5%_2
R6098
100_5%_2
2 1
2 1
2 1
D S
8
8
8
7
7
7
6
6
6
G
ALPHA_AON7403L_DFN_8P
2 1
Q6061
DS
8
7
6
G
OUT
MFET_B
IN
MFET_A
1
2
3
4 5
2
2
LATCHED_ALARM
OUT
5
L2N7002DW1T1G
1
2
3
4 5
Q6053
G1
G2
1
2
3
4 5
Q6063
G1
G2
PVBATA
R6079
R6080
2
2
1
S1
6
D1
3
D2
4
S2
PVBATB
R6070
R6069
2
2
1
S1
6
D1
3
D2
4
S2
21
220K_5%_2
10K_5%_2
2 1
21
R6081
470K_5%_2
3
Q6054
DS
G
SSM3K7002BFU
2
FET_A
IN
21
220K_5%_2
2 1
10K_5%_2
21
R6082
470K_5%_2
3
Q6064
DS
G
SSM3K7002BFU
2
1
1
P3V3DS
IN
D
C C
B
P3V3DS
A A
FET_B
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
6
1
DOC.NUMBER
CODE
REV
X01
77
Page 7
8 7
R6933
1
VADPBL
IN
2 1
274K_1%_2
P5V0DS P3V3DS
R6931
21
D
200K_1%_2
2 1
R6930
C6906
R6934
22K_5%_2
21
86.6K_1%_2
IN
V+
3
2
21
U6903
+IN
+
OUT
-
-IN
V-
BCD_AZV393MTR_G1_SOIC_8P
48
CSC0402_DY
3V3REF
4
2
6 5
2 1
R6935
47K_5%_2
1
OUT
ADP_PRES
OCP_MAIN#
OCP_TRAVEL#
LIMIT_SIGNAL_100R
3
LIMIT_SIGNAL
3
1
VBIAS
V_3.9K
4
P5V0S
665K_1%_2
200K_1%_2
21
IN
118K_1%_2
21
IN
118K_1%_2
OUT
IN
IN
OUT
1
R6920
2 1
R6922
2 1
R6924
R6925
R6921
R6918
100_5%_2
LES_LBSS84LT1G_SOT23_3P
P3V3DS
CHR_ILIM
1
2
21
200K_1%_2
BCD_AZV321KTR_E1_SOT23_5P
R6923
1M_1%_2
21
Q6902
2
2 1
R6916
21
21
47K_5%_2
S
G
1
C6902
21
RSC_0402_DY
R6914
LMBT3904WT1G
D
3900PF_16V_2
3
R6915
Q6901
OUT
3 2 1
C6904
2 1
1UF_10V_2
U6902
IN+
VEE
D6902
3
BAV70W
R6937
21
0_5%_2_DY
R6917
21
1
B
CE
21
100K_5%_2
2 3
D6901
21
VCC
OUTPUT IN-
619_1%_2
BZT52-B4V7S_DY
P5V0S
5
C6903
4 3
R6919
2K_5%_2
21
2 1
P3V3DS
1
B
23
CE
PMBT3906
2 1
R6936
21
0.1UF_16V_2
Q6903
3.24K_1%_2
OUT
OCP_A_IN
D
C C
REV
X01
B
A A
B
3
LIMIT_SIGNAL_100R
PVADPTR
R6902
21
220K_5%_2 130K_1%_2
VBIAS
OUT
R6903
21
8
7 6
5 4
LIMIT_SIGNAL_100R
IN
VBIAS
P3V3DS
BASE
1
R6910
21
8.06K_1%_2 8.66K_1%_2 45.3K_1%_2
23
EMITTER COLLECTOR
R6909
21
3
ADP_A_ID
R6904
21
CHANGE by
Q6900
LES_LMBT3906WT1G_SOT323_3P
OUT
ADP_A_ID
XXX
3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
DATE
21-OCT-2002
2 3
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77
7
1
Page 8
8 7
6 5
4
3 2 1
D
VRP3V3A
OCP=8AMP
P3V3DS
PAD6100
21
POWERPAD_2_0610
B
P15V0A
VRPVBAT_3V
OUT
12
C6100
VO=((6.8K/10 K)+1)*2
VRP5V0A_VCLK
4
IN
OUT
POWERPAD_2_0610
PAD6110
IN
C6110
21
L6100
ETQP3W3R3WFN
R6100
21
+
21
150UF_6.3V
6.8K_1%_2
R6101
21
10K_1%_2
C6157
21
0.1UF_25V_2
3
21
D6151
PVBAT
12
21
C6111
21
10UF_25V_5
CSC0805_DY
TI_CSD87381P_XSON_5P
2
Control
2 1
5
R7610
21
RSC_0603_DY CSC0402_DY
C7610
21
C6156
21
0.1UF_25V_2
3
21
D6150
BAV99W_7_F BAV99W_7_F
Q6100
VIN
FET
VSW
Sync
FET
PGND
3
TG
BG
IN
VRP5V0A
TPS51285 IS NOT READY FOR DB0 USE TPS51225 FOR FIRST BUILD
5
IN
TI_TPS51225CRUKR_QFN_20P
9
10
8
11
4
5
6
7
3
C6121
21
1UF_6.3V_2
IN
DRVH2
SW2
DRVL2
VFB2
CS2
EN2
PGOOD
VREG3
VBST2
EN_5V
U6100
VIN
VBST1
DRVH1
SW1
DRVL1
VO1
VFB1
CS1
EN1
VCLK
VREG5
TMD
21
1
4
IN
EN_3V
4
C6115
R6110
2 1
VRP3V3A_HG
VRP3V3A_PH
VRP3V3A_LG
2 1
54.9K_1%_2
2
3
2.2_5%_3 0.1UF_16V_2
3V3REF
OUT
VRP5V0A_VIN
R6115
2 1
OUT
VRP3V3A_LDO
4
OUT
2 1
R6117
5V_PG
0_5%_2
21
12
17
16
18
15
14
2
1
20
19
VRP5V0A_HG
VRP5V0A_PH
VRP5V0A_LG
13
VRP5V0A_LDO
C6120
21
1UF_6.3V_2
C6122
1UF_25V_3
R6165
2.2_5%_3
OUT
0.1UF_16V_2
2 1
R6160
4
VRP5V0A_VCLK
C6165
2 1
OUT
PVBAT
PAD6160
POWERPAD_2_0610
12
21
Control
FET
VSW
Sync
FET
VIN
IN
4
2
VRP5V0A_PH
5
C6160
21
10UF_25V_5
L6150
ETQP3W4R7WFN
21
21
2 1
R7615
RSC_0603_DY CSC0402_DY
C7615
C6161
21
10UF_25V_5
R6150
21
15.4K_1%_2
+
C6150
21
150UF_6.3V
R6151
10K_1%_2
21
R6161
SHORT_0402_15
PAD6150
12
POWERPAD_2_0610
VR_VDD5
2 1
VRP5V0A
2 1
OUT
OUT
OCP=8AMP
P5V0DS
1213
67
4
D
C C
VRPVBAT_5V
VRP5V0A_PH
2 1
OUT
Q6150
TI_CSD87381P_XSON_5P
1
TG
4
BG
PGND
3
60.4K_1%_2
B
VO=((15.4K/1 0K)+1)*2
4
VRP5V0A_LDO
4
IN
POWERPAD1X1M_DY
12
PAD6105
P5V0DS
2 1
P3V3DS
PAD6103
2 1
12
POWERPAD1X1M_DY
VRP3V3A_LDO
4
IN
A A
C6159
21
0.1UF_25V_2
8
C6158
21
0.1UF_25V_2
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77
8
1
REV
X01
Page 9
8 7
6 5
4
3 2 1
D
PVADPTR
R6996
R6995
21
49.9K_1%_2
576K_1%_3
C6999
21
100PF_50V_2
2 1
C6998
R6994
21
21
49.9K_1%_2
D
R6913
46.4K_1%_2
2 1
C6900
21
0.22UF_6.3V_2
OUT IN
2 1
CURRENT_ADC
R6990
RSC_0402_DY
OUT
VOLTAGE_ADC
1
ICS
0.22UF_6.3V_2
C C
PVBAT
2 1
R6999
B
VRP5V0A_VIN
4
SHORT_0603_25
R6983
SHORT_0603_25
2 1
OUT OUT
VADP_DEBUG
1
B
D6997
21
PANJIT_MMSZ5252 A
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
9
1
DOC.NUMBER
CODE
REV
X01
77
Page 10
8 7
6 5
4
3 2 1
1
Q6202
0_5%_2_DY
G
DDR3L_SEL
2 1
R6208
332K_1%_2
SSM3K7002BFU
3
DS
R6213
P3V3DS
2 1
R6212
D
IN
DDR3L_DET
R6217
0_5%_2
2 1
2
2 1
R6211
200K_5%_2_DY
B
OUT
2 1
0_5%_2_DY
DDR3L_SEL
EN_VRPVDDQ
6
IN
6
IN
EN_VRPVDDQ
EN_VRPVTT
VRPVTT_REF
1213
VR_VDD5
VRPVDDQ
R6201
154K_1%_2
0.22UF_6.3V_2
VRPPM_SLP_S0_N
IN
IN
OUT
SHORT_0402_15
IN
IN
R6200
2 1
C6218
21
2 1
49.9K_1%_2
VRPVDDQ_PG
7
IN
R6204
C6216
2 1
R6203
0_5%_2
U6200
24
REFIN2
25
REFIN
26
VREF
27
RA
28
EN
29
TML
OUT
C6243
21
C6217
21
21
2700PF_50V_2
2 1
1918171615
232221
20
V5
VIN
GND
TRIP
VSNS
GSNS
SLEW
LP#
PGOOD
2
1
2 1
R6206
2 1
0_5%_2_DY
C6215
R6215
2.2_5%_3
1UF_6.3V_2
2.2UF_6.3V_3
C6211
21
0.1UF_25V_2
VIN
VIN
10
PGND
11
PGND
12
PGND
13
PGND
14
PGND
SWSWSWSWBSTNCMODE
TI_TPS51362RVER_QFN_28P
9876543
VRPVDDQ_PH
RSC_0603_DY
R7620
2 1
21
0.1UF_16V_2
C7620
21
CSC0402_DY
P3V3A
12
PAD6241
21
POWERPAD1X1M
U6240
10 1
VIN VDDQSNS
9
S5
8
GND
7 4
S3 PGND
11
TML
GMT_G2997BF61U_MSOP_10P
C6242
21
1UF_6.3V_2
POWERPAD_2_0610
C6210
21
10UF_25V_5
L6200
2 1
12
4 3
34
PAN_ETQP3W1R0WFN_4P
VLDOIN
VTT
VTTSNS VTTREF
PAD6210
2 1
12
2 1
2 1
C6200
C6201
22UF_6.3V_5
MODE= OPEN FSW= 800K
MODE= GND FSW= 400K
TRIP =5V OCL=12A
REFIN =GND VOUT=1.05V
VREF=2V
VOUT=(107K)X2V/(107K+51K)=1.354V
PVBAT
2 1
2 1
C6203
C6202
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
P1V5
2
3
5 6
C6241
21
10UF_6.3V_3
VRPVTT
C6240
21
10UF_6.3V_3
OUT
VRPVDDQ
6 6
OUT
VRPVDDQ
VRPVTT
IN
IN
PAD6200
12
POWERPAD_2_0610
PAD6240
12
POWERPAD1X1M
D
C C
P1V5
2 1
B
P0V75S
2 1
A A
VRPVTT_REF
8
PAD6242
IN
12
POWERPAD1X1M_DY
P0V75M_VREF
2 1
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
1
REV
X01
77 10
Page 11
8 7
6 5
4
3 2 1
D
D
PVBAT
PAD6310
C6317
R6304
1213
VR_VDD5
VRP1V05A
EN_1V05A
VRPPM_SLP_S0_N
IN
1V05A_PG
SHORT_0402_15
IN
IN
C6318
21
0.22UF_6.3V_2
R6300
0_5%_2
OUT
IN
B
C6316
2 1
2 1
0_5%_2
24
25
26
27
28
29
R6303
U6300
REFIN2
REFIN
VREF
RA
EN
TML
2700PF_50V_2
2 1
232221
GSNS
PGOOD
1
2.2UF_6.3V_3
21
21
1918171615
20
V5
VIN
VIN
VIN
GND
TRIP
VSNS
SLEW
LP#
2
2 1
PGND
PGND
PGND
PGND
PGND
SWSWSWSWBSTNCMODE
TI_TPS51362RVER_QFN_28P
9876543
VRP1V05A_PH
R6306
0_5%_2_DY
C6315
2 1
21
0.1UF_16V_2
R6315
2.2_5%_3
C6311
21
0.1UF_25V_2
10
11
12
13
14
RSC_0603_DY
R7630
2 1
C7630
21
CSC0402_DY
POWERPAD_2_0610
C6310
21
10UF_25V_5
L6300
2 1
12
4 3
34
PAN_ETQP3W1R0WFN_4P
2 1
12
2 1
2 1
2 1
C6300
C6302
C6301
22UF_6.3V_5
MODE=GND FSW=400K
MODE= FLOAT FSW= 800K
TRIP =5V OCL=12A
REFIN =GND VOUT=1.05V
22UF_6.3V_5
22UF_6.3V_5
OUT
VRP1V05A
VRP1V05A
IN
PAD6300
12
POWERPAD_2_0610
C C
P1V05A
2 1
IOUT=5A
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
11
1
DOC.NUMBER
CODE
REV
X01
77
Page 12
8 7
6 5
4
3 2 1
D
P3V3DS
PAD6360
12
POWERPAD_2_0610
2 1
C6360
21
EN_1V5S
U6350
11
TML
10 1
PVIN
9
PVIN
8
SVIN
10UF_6.3V_3
IN
7
NC
65
FB
RICHTEK_RT8068AZQW_WDFN_10P
PGOOD
LX
LX
LX
EN
VRP1V5S_PH
2
3
4
OUT
ELL5PR1R2N
1V5S_PG
L6350
2 1
C6352
21
CSC0402_DY
R6350
R6351
VREF=0.6V
15K=1.5V
10K=1.2V
20.5K=1.83V
IOUT=0.67A
2 1
15K_1%_2
C6350
21
22UF_6.3V_5
21
10K_1%_2
OUT
VRP1V5S
VRP1V5S
IN
POWERPAD_2_0610
PAD6350
12
P1V5S
2 1
B
D
C C
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 12
Page 13
8 7
6 5
4
3 2 1
D
D
P5V0DS
PAD6460
2 1
12
POWERPAD_2_0610
C6460
21
10UF_6.3V_3
EN_1V2A
IN
B
U6450
11
TML
10 1
PVIN
9
PVIN
8
SVIN
7
NC
65
FB
VRP1V2A_PH
LX
2
LX
3
LX
4
PGOOD
RICHTEK_RT8068AZQW_WDFN_10P
OUT
EN
L6450
ELL5PR1R2N
1V2A_PG
2 1
C6452
21
VREF=0.6V
15K=1.5V
10K=1.2V
11K=1.25V
20.5K=1.83V
MODE= FLOAT=SKIP MODE
MODE=VIN=FCCM MODE
2 1
R6450
11K_1%_2
CSC0402_DY
C6450
R6451
21
10K_1%_2
IOUT=1.68A
21
22UF_6.3V_5
VRP1V2A
OUT
VRP1V2A
IN
PAD6450
12
POWERPAD_2_0610
C C
P1V2A
2 1
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 13
Page 14
8 7
6 5
4
3 2 1
P5V0A
2 1
PVCCIO_OUT
R6665
VREF_CPU
10
D
OUT
C6644
11
11
CPU_CSP2
CPU_CSN2
CPU_CSN1
CPU_CSP1
C6639
21
0.0015UF_50V_2
P3V3A
R6663
IN
IN
IN
IN
R6664
RSC_0402_DY
2 1
VCCSENSE
0_5%_2
VSSSENSE
21
R6662
21
0_5%_2
R6633
10K_1%_2
R6656
10K_1%_2
C6640
100PF_50V_2
IN
IN
PVBAT
R6657
10K_5%_2
2 1
2 1
2 1
R6651
2.21K_1%_2
24
23
22
21
20
19
18
17
2 1
VFB
GFB
N/C
PU3
CSP2
CSN2
CSN1
CSP1
B
2 1
2 1
R6660
39K_1%_2
RSC_0402_DY
C6646
21
0.1UF_16V_2_DY
R6661
CPU_IMON
OUT
VREF_CPU
10
IN
R6659
10_5%_2
C6643
21
2 1
21
0.33UF_10V_3
1UF_6.3V_2
3032928272625
V5A
GND
VCLK
VREF
COMP
DROOP
VBAT
SLEWA
16151413121110
ALERT#
VR_HOT#
IMON
THERM
OCP-I
B-RAMP
F-IMAX
O-USR
9
2 1
2 1
R6658
10K_1%_2
R6654
75K_1%_2
2 1
2 1
R6655
100K_5%_NTC
C6645
333231
U6600
PWPD
1
VDIO
2
VDD
PGOOD
N/C
PWM2
PWM1
SKIP#
VR_ON
TI_TPS51622RSM_QFN_32P
4
5
6
7
8
R6612
RSC_0402_DY
2 1
R6650
R6653
150K_1%_2
2 1
R6649
R6652
412K_1%_2
RSC_0402_DY
21
4700PF_50V_2
OUT
IN
IN
IN
2 1
2 1
150K_1%_2
2 1
1.02M_1%_2
CPU_PROCHOT#
VR_SVID_CLK
VR_SVID_ALERT#
VR_SVID_DATA
OUT
OUT
OUT
OUT
IN
2 1
R6647
150K_1%_2 RS C_0402_DY
2 1
R6646
VREF_CPU
IN
10
10
PVCORE_PG
CPU_PWM2
CPU_PWM1
CPU_SKIP#
VR_ON
10
D
P3V3A
C6618
CSC0402
130_1%_2
21
54.9_1%_2
R6640
R6641
VR_SVID_DATA
2 1
VR_SVID_CLK
2 1
OUT
OUT
10
10
2 1
R6645
10_5%_2
C C
IN
EN_PVCORE
C6642
21
1UF_6.3V_2
11
11
10
10
VR_ON
OUT
2 1
0_5%_2
R6643
2 1
R6644
RSC_0402_DY
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 14
Page 15
8 7
6 5
4
3 2 1
D
D
PVBAT
12
PAD6600
POWERPAD_2_0610
21
+
C6699
21
PVCORE
10
CPU_SKIP#
IN
P5V0S
2.2UF_6.3V_3
VRPVCORE_PH
R6605
2 1
0_5%_2_DY
C6623
21
OUT
U6610
1
SKIP#
2
VDD
3
PGND
8
PWM
7
BOOT
BOOT_R
PGND
9
0_5%_3
6
21
0.1UF_16V_2
5 4
VIN VSW
TI_CSD97374CQ4M_SON_8P
R6615
VRPVCORE_PH
2 1
C6615
IN
IN
CPU_PWM1
PVBAT_VCORE
OUT
10
2 1
R6601
3.01K_1%_2
B
L6600
2 1
PCME063T-R24MS1R195
2.32K_1%
18.7K_1%_2
R6603
0.1UF_25V_2
4 3
R6600
2 1
R6602
2 1
10K_1%_NTC
C6605
21
2 1
OUT
OUT
CPU_CSN1
CPU_CSP1
10
10
15UF_25V_DY
PVBAT_VCORE
C6600
C6601
21
21
10UF_25V_5
11
OUT
10UF_25V_5
C C
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 15
Page 16
8 7
REFERENCE NUMER : 7000~7350
P3V3DS P3V3S P5V0DS P5V0S
Q7050
1
D
2
D
8
18
P15V0A
SLP_S3_5R
B
SLP_S3#_3R
5
ALPHA_AO6424L_TSOP_6P
R7101
IN
470K_5%_2
OUT
IN
SSM3K7002BFU
S
G
NMOS_4D1S
2 1
SPWON
Q7051
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
P5V0DS
R7005
Q7002
1
G
4
3 6
C7050
R7050
21
47_5%_2
21
1
6
3
4
21
200K_5%_2
3
DS
SSM3K7002BFU
2
IN
25
68
EN_5V_3V
2 1
10K_5%_2
100K_5%_2
2 1
IN OUT
R7110
R7111
C7110
21
0.1UF_16V_2
8
Q7100
1
D
2
5
ALPHA_AO6424L_TSOP_6P
NMOS_4D1S
SPWON
10UF_6.3V_3
SSM3K7002BFU
PVPCIE
R7302
47_5%_2
3
21
Q7302
DS
1
G
2
VRP3V3A_LDO
7 6
NON-IAMT
MAX 2.0A MAX 4.5A
4
S
3 6
G
R7100
100_5%_2
21
Q7101
C7302
DIODE-BAT54-TAP-PHP
3
DS
1
G
24
51
26
2
28
21
10UF_6.3V_3_DY
2
D7001
NC
R7031
0_5%_2
R7032
8.66K_1%_2
6 5
PAD2990
IAMT
C7100
P1V8S
POWERPAD_2_0610
SSM3K7002BFU
2 1
2 1
C7032
INSTALL
UN-INSTALL
16 18
21
10UF_6.3V_3
PM_SLP_A#
IN
P1V8S_DGPU
PAD2991
2 1
12
R7300
Q7301
1
G
1 3
OUT
EN_DGPU DGPU_PWR_EN
C7031
21
CSC0402_DY
OUT
EN_1V35S_DGPU
21
0.1UF_16V_2
P1V05A
ALPHA_AO6424L_TSOP_6P
8
IN
P5V0DS
Q7152
G
1
MAX 1.5A
C7301
47_5%_2
21
3
DS
2
Q7151
UN-INSTALL
Q7151
1
D
2
5
NMOS_4D1S
200K_5%_2
L2N7002DW1T1G
10UF_6.3V_3_DY
R7151
470K_5%_2
Q7150
2
G1
5
G2
24
64
26
38
P15V0A
R7154
21
PM_SLP_A
3
DS
SSM3K7002BFU
2
21
19
Q7152 Q7150
UN-INSTALL
INSTALL INSTALL
S
G
2 1
1
S1
6
D1
3
D2
4
S2
VR_EN_HASWELL
PWR_GOOD_3
36
PVCORE_PG
8
EN_3V
8
EN_5V
64 27
26
28
31
51 16
57 59 28
43
DDR_VTT_PG_CTRL
UN-INSTALL
P1V05M
P1V05A
4
3 6
C2990
R7150
21
220_5%_2
21
VGATE
OUT
OUT
SLP_S4#_3R
EN_P1V5
27
SLP_S3#_3R
POWERPAD_2_0610_DY
8
7
6
FDMS0310AS
SPWON
10UF_6.3V_3
IN
IN
OUT
IN
R7112
0_5%_2
R7113
0_5%_2
IN
IN
IN
IN
Q7153
D
2 1
2 1
PAD2990
INSTALL INSTALL INSTALL
12
0_5%_2
RSC_0402_DY
POWER TO EE NET NAME CONNECTION
5 4
4
UN-INSTALL UN-INSTALL
P1V05S
2 1
1
S
2
3
4 5
G
21
CSC0402_DY
C7152
R7152
220_5%_2
21
3
Q7154
DS
1
G
SSM3K7002BFU
2
R7016
0_5%_2
R7000
0_5%_2_DY
R7430
2 1
IN
EN_5V_3V
R7014
21
0_5%_2
R7013
2 1
R7015
2 1
RSC_0402_DY
R7018
2 1
0_5%_2
3 2 1
R7154 R7150 R7151
UN-INSTALL
INSTALL
C2995
C2994
C7153
21
21
10UF_6.3V_3
22UF_6.3V_5_DY
1
2 1
2 1
D7000
21
1N4148WS_7_F
251668
SLP_SUS#_3R
OUT
EN_VRPVDDQ
OUT
CHANGE by
DGPU_PWR_EN EN_PVPCIE
21
22UF_6.3V_5_DY
P0V75S
2 1
R7153
22_5%_2
3
Q7155
DS
G
SSM3K7002BFU
2
OUT
8
18
SLP_S3#_3R
IN
KBC_PWR_ON
EN_VRPVTT
XXX
R7034
DGPU_PWR_EN EN_1V8S
2 1
13.7K_1%_2
OUT IN
2 1
C7034
0.1UF_16V_2
R7044
EN_PVCORE
5V_PG
R7022
0_5%_2_DY
10
10
28
51
14
0_5%_2_DY
21
IN
0_5%_2
2 1
IN
2 1
5.1K_1%_2
SLP_LAN#
R7010
R7020
R7019
21
0_5%_2
R7021
21
0_5%_2
IN
P1V05S_VCCP
2 1
C7037
21
2 1
OUT IN
C7039
0.1UF_16V_2
P3V3DS
CSC0402_DY
R2971
47K_5%_2
21
Q7056
2
G1
5
G2
L2N7002DW1T1G
R7012
21
0_5%_2
OUT IN
RSMRST#
C7036
C7035
21
21
CSC0402_DY
CSC0402_DY
C2970
S1
D1
D2
S2
OUT
OUT
CSC0402_DY
1
6
3
4
OUT
OUT
2 1
R2970
28
EN_1V5S
EN_1V05A
EN_1V2A
23
P3V3DS
Q2971
4
S
36
G
PMOS_4D1S
TPC6111
330K_5%_2
21
R2972
PVCCIO_OUT
51
12
11
13
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
DATE
21-OCT-2002
2 3
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
16 77
1
22
D
P3V3M
1
D
2
5
C2971
21
10UF_6.3V_3
47_5%_2
21
C C
B
A A
REV
X01
Page 17
8 7
PVADPTR
D
C6037
C6038
21
100PF_50V_2
L6035
NFE31PT222Z1E9L
4
3
21
1000PF_50V_2
2 1
C6036
21
D6035
C6035
21
100PF_50V_2
1000PF_50V_2
1
2
1
2
3
3
PANJTT_PJSOT24 C_SOT23_3P
6 5
JACK6000
654
1
2
3
987
SINGA_2DC3092_000111F_9P
OUT
LIMIT_SIGNAL
7
TMP121018007
57
4
PVBATA
100_5%_2
51
17 51
5
SCL_BAT_CHG
BI
BI
SDA_BAT_CHG
5
17
R6051
R6053
100_5%_2
3 2 1
1
D7504
1 2
C7500
21
100PF_50V_2
2 1
2 1
C7501
21
PHP_PESD5V0S1BB_S OD523_2P
R6057
2 1
1K_5%_2
P3V3DS
C7503
21
R6058
100K_5%_2
D7505
1 2
21
100PF_50V_2
21
PHP_PESD5V0S1BB_S OD523_2P
P3V3DS
21
100PF_50V_2
1
2 1
R6055
2
3
D7503
BAV99W_7_F_DY
D7506
100_5%_2_DY
OUT
BATTERY OCP PWM#
1 2
2
2 1
C7502
PHP_PESD5V0S1BB_S OD523_2P_DY
OCP_MAIN#
0.1UF_25V_2
7
CN6050
1
1
2
2
3
3
4
4
5
5
6
7
8
G
6
G
7
8
FOX_BP02083_B24B1_9H_8P
6012B0335005
D
G1
G2
C C
OUT
MAIN_BAT_DET#
B
PVBATB
51
17
5
SDA_BAT_CHG
5
SCL_BAT_CHG
BI
BI
R6078
100_5%_2
P3V3DS
R6077
100_5%_2
2 1
2 1
2 1
3
3
D7507
BAV99W_7_F
D7509
D7508
BAV99W_7_F
2 1
C7504
12
21
100PF_50V_2
D7511
2 1
2 1
R6073
1K_5%_2
P3V3DS
3
21
R6074
BAV99W_7_F
100K_5%_2
2 1
C7505
PHP_PESD5V0S1BB_S OD523_2P
2 1
P3V3DS
OUT
8
7 6
5 4
CHANGE by
XXX
51
2 1
12
100PF_50V_2
D7512
PHP_PESD5V0S1BB_S OD523_2P
2 1
21
3
D7510
BAV99W_7_F_DY
TRAVEL_BAT_DET#
DATE
2 1
C7506
100PF_50V_2
R6076
100_5%_2_DY
OUT
51
21-OCT-2002
2 3
2 1
2 1
C7507
12
R6083
0.1UF_25V_2
D7513
CN6051
PHP_PESD5V0S1BB_S OD523_2P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
FOX_BR0208C_Z58ABH1_9H_8P
21
G1
G2
RSC_0603_DY
OCP_TRAVEL#
7
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
TRAVEL BATTERY
6012B0449801
G1
G2
of
77 17
1
REV
X01
B
A A
Page 18
8 7
6 5
4
3 2 1
P3V3DS
D
8
16
5V_PG
IN
24
2 1
8
6
3V3REF
7
R7017
100K_5%_2
TSB_TC7SZ07FU_SSOP_5P
C7001
21
0.1UF_16V_2
IN
U7000
1
NC
2
IN-A
3
GND
OUT-Y
5
VCC
4
P3V3DS
R7001
10K_5%_2
21
OUT
DPWROK
28
D
C C
P5V0DS P5V0A P3V3DS
Q7353
8
7
6
RQ3E100BNFU7TB
Q7352
1
G
D
NMOS_4D3S
21
100_5%_2
3
DS
10UF_6.3V_3
2
P5V0DS
P15V0A
8
IN
2 1
R7350
100K_5%_2
21
R7354
470K_5%_2
B
Q7350
1
S1
51
16
28
SLP_SUS#_3R
IN
IN
R7356
0_5%_2_DY
2 1
KBC_PWR_ON
16
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
6
3
4
16
Q7355
1
Q7351
8
D
7
6
NMOS_4D3S
RQ3E100BNFU7TB
21
100_5%_2
3
DS
G
10UF_6.3V_3
2
S
G
R7355
1
2
3
4 5
C7355
21
SSM3K7002BFU SSM3K7002BFU
G
R7353
1
S
2
3
4 5
C7352
P3V3A
B
21
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 18
Page 19
8 7
6 5
4
3 2 1
D
B
DGPU_VID1
DGPU_VID2
DGPU_VID3
DGPU_VID4
DGPU_VID5
IN
SHORT_0402_5
IN
SHORT_0402_5
IN
SHORT_0402_5
IN
SHORT_0402_5
IN
SHORT_0402_5
8
R6766
R6767
R6768
R6769
R6770
2 1
2 1
2 1
2 1
2 1
P3V3S
U6751
ANPEC_APL6502A8I_TRG_8P
5
VID0
2
VID1
1
VID2
8
VID3
76
VID4 GND
3
VDA
4
VDD
C6773
21
7 6
R6752
0_5%_2
C6770
21
0.033UF_16V_2
1UF_6.3V_3
2 1
R6750
R6751
0_5%_2_DY
21
C6768
C6769
0_5%_2_DY
21
21
100PF_50V_2
EN_DGPU
OUT
51219VREF
DGPU_PG
1
2
3
4
C6767
0.1UF_16V_2
0.01UF_50V_2
21
21
VSNS
GSNS
C6774
1000PF_50V_2
21
IN
R6755=100K , FSW=300KHZ
R6755
21
OUT
17
U6750
PWPD
VREF
REFIN
TI_TPS51219RTER_QFN_16P
GSNS
VSNS
COMP
5
R6755=200K , FSW=400KHZ
1K_5%_2
R6755=1K , FSW=500KHZ
14
16815
6
13
EN
BST
MODE
PGOOD
TRIP
SW
DH
DL
V5
GND
PGND
7
2.2_5%_3 0.1UF_16V_2
12
11
10
9
C6766
R6756
21
42.2K_1%_2
R6759
10_1%_2
2 1
2 1
R6760
SHORT_0402_15
5 4
R6765
C6765
2 1
VRPVCORE_DGPU_PH
VRPVCORE_DGPU_HG
VRPVCORE_DGPU_LG
IN
VR_VDD5
21
2.2UF_6.3V_3
IN
GPU_VCC_SENSE
IN
GPU_VSS_SENSE
D
PVCORE_DGPU
MAX=50A
OCP=42A
VRPVCORE_DGPU
PVBAT
PAD6750
2 1
IN
12
POWERPAD_2_0610
C C
+
C6799
21
Q6750
TI_CSD87588N_LGA_5P
2 1
1
2 1
4
R6762
SHORT_0603_25
4
6
7
13
CSC0402_DY
2 1
TI_CSD87588N_LGA_5P
R6763
1
SHORT_0603_25
4
TG
BG
C6775
Q6751
TG
BG
VIN
Control
FET
VSW
Sync
FET
PGND
3
2 1
VIN
Control
FET
VSW
Sync
FET
PGND
3
12
PAD6760
15UF_25V_DY
21
POWERPAD_2_0610
2
5
VRPVBAT_DGPU
C6760
2
21
5
21
C6762
C6761
21
21
10UF_25V_5
10UF_25V_5
L6750
PCMC104T_R36MN
2 1
4 3
R7675
RSC_0603_DY
C7675
CSC0402_DY
C6763
21
21
10UF_25V_5
0.1UF_25V_2
1
+
C6750
470UF_2V
3
2
OUT
B
VRPVCORE_DGPU
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
1
REV
X01
77 19
Page 20
8 7
6 5
4
3 2 1
D
D
C C
EMPTY
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 20
Page 21
8 7
6 5
4
3 2 1
D
D
PVBAT
PAD6260
C6255
2 1
2 1
R6258
0_5%_2
24
25
26
27
28
29
R6253
U6250
REFIN2
REFIN
VREF
RA
EN
TML
C6256
2700PF_50V_2
2 1
232221
VSNS
GSNS
LP#
PGOOD
2
1
R6256
2.2UF_6.3V_3
21
21
1918171615
20
V5
VIN
VIN
VIN
GND
TRIP
SLEW
PGND
PGND
PGND
PGND
PGND
SWSWSWSWBSTNCMODE
VRP1V35S_DGPU_PH
9876543
2 1
0_5%_2_DY
C6265
2 1
21
0.1UF_16V_2
R6265
C7625
2.2_5%_3
C6261
10
11
12
13
14
TI_TPS51362RVER_QFN_28P
RSC_0603_DY
R7625
C6260
0.1UF_25V_2
L6250
PAN_ETQP3W1R0WFN_4P
21
12
34
21
2 1
21
CSC0402_DY
POWERPAD_2_0610
10UF_25V_5
2 1
4 3
R6254
SHORT_0402_15
IN
IN
R6251
R6250
2 1
21K_1%_2
10K_1%_2
C6257
21
0.22UF_6.3V_2
OUT
VRP1V35S_DGPU
EN_1V35S_DGPU
7
12
VR_VDD5
IN
1V35S_DGPU_PG
B
P3V3DS
21
0_5%_2_DY
2 1
12
2 1
2 1
2 1
2 1
C6253
C6250
MODE=GND FSW=400K
MODE= FLOAT FSW= 800K
TRIP =5V OCL=12A
REFIN =GND VOUT=1.05V
C6252
C6251
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
OUT
VRP1V35S_DGPU
VRP1V35S_DGPU
IN
PAD6250
12
POWERPAD_2_0610
2 1
C C
P1V35S_DGPU
IOUT=8A
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 21
Page 22
8 7
6 5
4
3 2 1
D
D
P5V0DS
PAD6971
2 1
12
POWERPAD_2_0610
C6972
21
10UF_6.3V_3
EN_1V8S
IN
RICHTEK_RT8068AZQW_WDFN_10P
B
U6970
11
TML
10 1
PVIN
9
PVIN
8
SVIN
7
NC
65
FB
PGOOD
LX
LX
LX
EN
VRP1V8S_PH
2
3
4
OUT
L6970
ELL5PR1R2N
1V8S_PG
2 1
C6971
21
VREF=0.6V
15K=1.5V
10K=1.2V
20.5K=1.83V
MODE= FLOAT=SKIP MODE
MODE=VIN=FCCM MODE
2 1
R6970
C6970
20.5K_1%_2
CSC0402_DY
R6971
21
10K_1%_2
IOUT=1.68A
21
22UF_6.3V_5
VRP1V8S
OUT
VRP1V8S
IN
PAD6970
12
POWERPAD_2_0610
P1V8S
2 1
C C
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 22
Page 23
8 7
6 5
4
3 2 1
D
D
P5V0DS
PAD6951
2 1
12
POWERPAD_2_0610
OUT
VRPVPCIE
OCP=4.5AMP
PVPCIE
C C
C6955
21
10UF_6.3V_3
11
TML
10 1
PVIN
9
PVIN
8
SVIN
7
NC
65
FB
RICHTEK_RT8068AZQW_WDFN_10P
C6952
B
21
0.1UF_16V_2
U6950
PGOOD
LX
LX
LX
EN
VRPVPCIE_PH
2
3
4
PVPCIE_PG
OUT
IN
EN_PVPCIE
L6950
ELL5PR1R2N
2 1
R6950
5.9K_1%_2
21
R6951
10K_1%_2
21
C6950
C6954
21
21
CSC0402_DY
22UF_6.3V_5
PAD6950
2 1
12
POWERPAD_2_0610
VOUT=((5.9K/10 K)+1)*0.6
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 23
Page 24
8 7
REFERENCE NUMER : 7400~7450
VRPVDDQ_PG
D
1V35S_DGPU_PG
22
1V8S_PG
23
PVPCIE_PG
51
57
31
43
51
P3V3S
R7434
R7433
10K_5%_2
10K_5%_2
21
21
IN
IN
IN
SLP_S3#_3R
16
26 28
59 64
24 28
R7435
10K_5%_2
21
0_5%_2
0_5%_2
0_5%_2
12
M_PWROK
R7429
R7431
R7432
1V5S_PG
2 1
2 1
2 1
P5V0S
IN
IN
IN
P1V05S
GPWR_GOOD
P3V3S
IN
6 5
R7405
2 1
38.3K_1%_2
R7416
2 1
3.3K_5%_2
R7414
2 1
3.3K_5%_2
D7400
1
1
3
2
2
PANASONIC_DB3X313J0L_SOT_3P
3.3K_5%_2
R7426
16.2K_1%_2
R7415
2 1
2 1
NEED CHECK
R7427
2 1
3.3K_5%_2_DY
R7425
2 1
51.1K_1%_2
R7428
2 1
3.3K_1%_2
4
C7402
21
1000PF_50V_2
5
6
2 1
R7412
31.6K_1%_2
3
2
R7407
1M_5%_2
P5V0A
R7406
1M_5%_2
P5V0A
R7409
10K_5%_2
3300PF_50V_2
R7408
10K_5%_2
3300PF_50V_2
R7410
57.6K_1%_2
2 1
2 1
2 1
24
7
18
3
3V3REF
6
IN
8
R7418
C7403
21
21
13.7K_1%_2
R7401
C7401
21
21
53.6K_1%_2
3 2 1
P3V3S
2 1
2 1
R7404
21
3.3K_5%_2
OUT
PWR_GOOD_3
V+
U7400
+IN
+
-
-IN
V-
48
V+
+IN
+
-
-IN
V-
48
7
OUT
ON_LMV393DMR2G_SOP_8P
2 1
C7400
0.1UF_16V_2
U7400
1
OUT
ON_LMV393DMR2G_SOP_8P
D
51
28 26
16
C C
B
18
7
8
24
6
3V3REF
IN
FOR IAMT
P3V3M
P1V05M
PANASONIC_DB3X313J0L_SOT_3P
51
28 26
16
PM_SLP_A#
IN
46.4K_1%_2
41.2K_1%_2
R2957
3.3K_5%_2
R2950
R2959
R2958
13K_1%_2
2 1
2 1
R2951
C2950
21
1000PF_50V_2
2 1
2 1
3
3
D2951
1
2
2
1
2 1
P3V3A
R2953
35.7K_1%_2
2 1
R2960
0_5%_2_DY
R2955
2 1
10K_5%_2
C2952
21
3300PF_50V_2
1M_5%_2
1
3
P5V0A
5 2
+
+
OUT
-
-
AZV331KTR_E1
0.068UF_10V_2
2 1
U2950
1M_5%_2
4
R2956
C2951
R2954
21
3.3K_5%_2
R2952
1K_1%_2
21
2 1
2 1
OUT
M_PWROK
51
28
24
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
POWER(SEQUENCE)
REFERENCE NUMER : 2950~2999
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
1
REV
X01
77 24
Page 25
8 7
6 5
4
3 2 1
D
REFERENCE NUMBER:4400~4349
P3V3S
D
2 1
P5V0S
R4301
10K_5%_2
CN4300
1
1
2
2
3
51
TACH_FAN_IN
51
PWM_3S_FAN#
68
THERM#
IN
IN
1
2
B
P5V0S
5
U4300
+
-
TC7SET00F_DY
3
OUT
4
R4300
22_5%_2
R4302
22_5%_2_DY
2 1
2 1
C4300
21
0.1UF_16V_2_DY
AMBIENT TEMP SENSE
WILL BE NOT USED IN 2013?
3
4
4
ACES_50271_0040N_001_4P
6012B0194003
P5V0DS
R4412
150_1%_2_DY
2 1
C4411
51
VCC SET
GMT_G708T1U_SOT23_5P_DY
U4411
G1
G
G2
G
C C
B
25.5K_1%_2_DY
R4411
2
GND
3 4
EN_5V_3V
OT HYST
2 1
OUT
16
68
21
0.1UF_16V_2_DY
A A
RSET (K OHM) = 0.0012T^2 - 0.9308T + 96.147
THERMAL SHUTDOWN AT 85 DEG.
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
FAN & THERMAL
REFERENCE NUMBER:4411~4449
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
25
of
1
REV
X01
77
Page 26
D
51
26
16
24
28
PWR_GOOD_3
8 7
U4926
1
NC
2
IN
36
OUT
28
51
28
IN-A
3
GND
TSB_TC7SZ07FU_SSOP_5P
VCCST_PWRGD
PWR_BTN_OUT#
PM_PWROK
OUT-Y
IN
5
VCC
4
C4937 PLACE IT NEAR XDP
P1V05S_VCCP
P3V3A
P1V05S_VCCP
R4923
IN
C4937
21
33
0.1UF_16V_2_DY
27
27
34
34
10K_5%_2
21
1K_5%_2
28
28
PCH_JTAG
34
26
34
27
H_BPM0_XDP#
27
H_BPM1_XDP#
34
34
34
34
R4926
2 1
VCCST_PWRGD_XDP
36
PWR_DEBUG
PCH_3S_SMDATA
PCH_3S_SMCLK
33
IN
R4823
2 1
1K_5%_2
6 5
P1V05S_VCCP
PCH_TCK
H_TCK
R4822
0_5%_2
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
BI
BI
IN
IN
2 1
H_PREQ#
H_PRDY#
CFG<0>
CFG<1>
CFG<2>
CFG<3>
CFG<4>
CFG<5>
CFG<6>
CFG<7>
27
4
CN4920
GND0
3
OBSFN_A0
5
OBSFN_A1
GND2
9
OBSDATD_A0
11
OBSDATD_A1
GND4
15
OBSDATD_A2
17
OBSDATD_A4
GND6
21
OBSFN_B0
23
OBSFN_B1
GND8
27
OBSDATA_B0
29
OBSDATA_B1
GND10
33
OBSDATA_B2
35
OBSDATA_B3
GND12
39
PWRGOOD_HOOK0
41
HOOK1
VCC_OBS_AB
45
HOOK2
47
HOOK3
GND14
51
SDA
53
SCL
TCK1
57
TCK0
GND16
SAMTEC_BSH_030_01_L_D_A_TR_60P
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK_H OOK4
ITPCLK#_ HOOK5
VCC_OBS_CD
RESET#_HOOK6
DBR#_HOOK7
GND1
GND3
GND5
GND7
GND9
GND11
GND13
GND15
TRSTn
GND17
2 1
4
6
8 7
10
12
14 13
16
18
20 19
22
24
26 25
28
30
32 31
34
36
38 37
40
42
44 43
46
XDP_RST_R_N
48
50 49
52
TDO
54
56 55
TDI
58
TMS
60 59
MSR_ENABLE_N
CPU XDP CONNECTOR
3 2 1
IN
CFG<17>
IN
CFG<16>
IN
CFG<8>
IN
CFG<9>
IN
CFG<10>
IN
CFG<11>
IN
CFG<19>
IN
CFG<18>
IN
CFG<12>
IN
CFG<13>
IN
CFG<14>
IN
CFG<15>
IN
CLK_PCIE_XDP_DP_R
IN
CLK_PCIE_XDP_DN_R
R4921
R4939
CLK_PCIE_XDP_DP_R
OUT IN
26
CLK_PCIE_XDP_DN_R
OUT
34
34
34
34
34
34
P1V05S_VCCP
34
34
34
34
34
34
2 1
1K_5%_2
2 1
1K_5%_2
P3V3S
21
26
26
R4937
0_5%_2_DY
R4938
0_5%_2_DY
R4922
1K_5%_2
2 1
CLK_PCIE_XDP_DP
2 1
CLK_PCIE_XDP_DN
IN
BUF_PLT_RST#
OUT
XDP_DBRESET#
IN
PCH_TDO
IN
XDP_TRST#
IN
PCH_TDI
IN
PCH_TMS
IN
CFG<3>
26
26
26
26 33
26
IN
D
28
33
51
53 55 56
61
26
28
33
33
34
34
34
C C
B
16
2628
51
24
IN
PWR_GOOD_3
Q4921
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
Q4920
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
1
6
3
4
1
6
3
4
R4526
IN
IN
IN
IN
IN
IN
IN
IN
R4526 PLACE IT NEAR XDP
21
51_5%_2_DY
H_TDI
PCH_TDI
PCH_TMS
H_TMS
H_TDO
PCH_TDO
XDP_TRST#
H_TRST#
27
33
26
26
33
27
27
26
33
26
27
33
IN
IN
IN
IN
IN
IN
IN
SLP_S3#_3R
SLP_S5#_3R
SLP_S4#_3R
PM_SLP_A#
RTCRST#
ON_OFF#
XDP_DBRESET#
16
64
59
51
57
31
43
51
24
28
28
27
28 64
28
62
16
24
16
51
57
26
28
P3V3A
ACES_50501_0144N_001_14P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CN4941
G1
G
G2
G
B
A A
INVENTEC
FOR ME TEST
NEED TO BE PLACE BETWEEN KEYBOARD OR BOTTOM DOOR
8
7 6
5 4
CHANGE by
6012B0218415
XXX
DATE
21-OCT-2002
2 3
TITLE
MODEL,PROJECT,FUNCTION
CODE
SIZE
CS
A3
XDP & ME CONN.
DOC.NUMBER
1310xxxxx-0-0
SHEET
REV
of
X01
77 26
1
Page 27
8 7
P1V05S_VCCP
D
21
47PF_50V_2
C4514
14
CPU_PROCHOT#
BI
3
DS
SSM3K7002BFU
2
2 1
R4517
62_5%_2
27
DDR3_DRAMRST#_CPU
38
Q4501
1
G
TP24
TP4501
TP24
TP4502
51
R4515
2 1
56_5%_2
RCOMP NEED CLOSED TO CPU AT 500MIL
R4518
R4541
R4540
DDR_PG_CTRL
IN
KBC_PROCHOT
2 1
R4516
100K_5%_2
B
6 5
1
PROC_DETECT_N
1
CATERR_N
H_PECI
BI
CPU_PROCHOT#_R
R4527
H_PWRGD
2 1
10K_5%_2_DY
2 1
200_1%_2
2 1
120_1%_2
2 1
OUT
OUT
100_1%_2
51
4
U4555
D61
PROC_DETECT*
K61
CATERR*
PECI
K63 E59
PROCHOT*
C61
PROCPWRGD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST*
AV61
SM_PG_CNTL1
ITL_HSW_ULT_2C_BGA_1168P
HASWELL_MCP _E
MISC
THERMAL
PWR
DDR3
JTAG
PRDY*
PREQ*
PROC_TCK
PROC_TMS
PROC_TRST*
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
J62 N62
K62
E60
E61
F63
F62
H_BPM0_XDP#
J60
H_BPM1_XDP#
H60
H_BPM2_XDP#
H61
H_BPM3_XDP#
H62
H_BPM4_XDP#
K59
H_BPM5_XDP#
H63
H_BPM6_XDP#
K60
H_BPM7_XDP#
J61
OUT
OUT
3 2 1
TP4560
TP4561
H_PRDY#
H_PREQ#
TP30
26
26
OUT
OUT
1
TP4552
1
TP4553
1
TP4554
1
TP4555
1
TP4556
1
TP4557
TP4570
1
TP30
26
26
TP30
TP4558
1
TP30
TP4559
1
1
TP30
1
OUT
OUT
OUT
OUT
OUT
H_TCK
H_TMS
H_TRST#
H_TDI
H_TDO
26
26
PLACE NEAR CPU
26
27
27
26
26
27
26
27
H_TDI
H_TMS
H_TDO
H_TCK
IN
IN
IN
IN
27
27 26
P1V05S_VCCP
27 26
273326
2 1
R4508
51_5%_2_DY
2 1
PLACE NEAR CPU
R4509
51_5%_2
D
2 1
2 1
R4507
R4920
51_5%_2
51_5%_2_DY
C C
B
P1V5
28
PCH_DDR_RST
51
KBC_DS3_EN
REFERENCE:4500~4949
8
7 6
P3V3A
IN
IN
R4580
20K_5%_2
R4585
20K_5%_2
2 1
2 1
R4581
20K_5%_2
1
Q4580
G
2 1
3
DS
SSM3K7002BFU
2
R4583
20K_5%_2_DY
OUT
D4581
BAT54C
P3V3DS
2 1
DDR_RST_EN
R4586
20K_5%_2
3
C
A2 A1
31
R4587
0_5%_2
R4588
0_5%_2_DY
2 1
2 1
2 1
2 1
5 4
C4570
470PF_50V_2
21
SSM3K7002BFU
R4550
4.99K_1%_2
OUT
EN_P1V5
OUT
SLP_S4#_KBC
IN
SLP_S4#_3R
R4553
470_1%_2
3
21
Q4502
DS
1
G
2 1
16
2
51
57
OUT
DDR3_DRAMRST#
IN
DDR3_DRAMRST#_CPU
38
39
27
A A
FOR DEEP S3
16
64 28 26
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP1-MISC
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
1
REV
X01
77 27
Page 28
8 7
53
51
LPC_3S_AD(0)
53
51
LPC_3S_AD(1)
53
51
LPC_3S_AD(2)
53
51
51
67
51
LPC_3S_AD(3)
LPC_3S_FRAME#
51
SPI_CLK_FLH
SPI_CS0#_FLH
51
SPI_SI_FLH
51
SPI_SO_FLH
51
51
SPI_HOLD#_DB
SPI_WP#
53
D
B
BI
BI
BI
BI
OUT
R4794
OUT
R4790
OUT
R4796
OUT
IN
R4793
IN
R4795
IN
PCH_PWROK
26
51
51
26
51
51
68
11
10
55
PCH_SLP_WLAN_N
33_5%_2
21
R_SPI_CLK_FLH
21
R_SPI_CS0#_FLH
0_5%_2
33_5%_2
R_SPI_SI_FLH
21
21
33_5%_2
21
33_5%_2
R4925
XDP_DBRESET#
26
PM_PWROK
51
24
M_PWROK
70
54
PLT_RST#
28
16
51
VRPPM_SLP_S0_N
RSMRST#
SUS_PWR_ACK
PWR_BTN_OUT#
ADP_PRES_OUT
GPIO72
R_SPI_WP#
R_SPI_HOLD#_DB
6 5
U4555
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME*
AA3
SPI_CLK
Y7
SPI_CS0*
1
Y4
SPI_CS1*
1
AC2
SPI_CS2*
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
ITL_HSW_ULT_2C_BGA_1168P
IN
R4815
R4802
R4722
R4723
0_5%_2
R4799
2 1
VRPPM_SLP_S0_N_R
0_5%_2
PWR_GOOD_3
IN
IN
IN
OUT
IN
OUT
IN
IN
IN
OUT
OUT
21
TP4503
TP4504
0_5%_2
HASWELL_MCP _E
LPC
21
0_5%_2
21
0_5%_2
21
0_5%_2_DY
21
APWROK
SMBALERT*/GPIO11
SMBUS
SML0ALERT*/GPIO60
SML1ALERT*/PCHHOT*/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74
C-LINK SPI
51
24
26
16
U4555
AK2
AC3
AG2
AY7
AB5
AG7
AW6
AV4
AL7
AN4
AF3
AM5
AJ8
SYSTEM POWER MANAGEMENT
SUSACK*
SYS_RESET*
SYS_PWROK
PCH_PWROK
APWROK
PLTRST*
RSMRST*
SUSWARN*/SUSPWRDNACK/GPIO30
PWRBTN*
ACPRESENT/GPIO31
BATLOW*/GPIO72
SLP_S0*
SLP_WLAN*/GPIO29
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK
CL_DATA
CL_RST*
4
AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3
AF2
AD2
AF4
HASWELL_MCP _E
IN
FPR_OFF
OUT
PCH_3A_SMCLK
BI
PCH_3A_SMDATA
OUT
PCH_DDR_RST
OUT
PCH_3M_SMCLK
BI
PCH_3M_SMDATA
OUT
PCH_SML1CLK
BI
PCH_SML1DATA
BI
CL_CLK1
BI
CL_DATA1
OUT
CL_RST#1
DSWVRMEN
DPWROK
WAKE*
CLKRUN*/GPIO3 2
SUS_STAT*/GPIO61
SUSCLK/GPIO62
SLP_S5*/GPIO63
SLP_S4*
SLP_S3*
SLP_A*
SLP_SUS*
SLP_LAN*
3 2 1
49
2.2K_5%_2
27
54
54
R4840
2 1
10K_5%_2
55
55
55
P3V3S
P3V3A
Q4759
S1
2
G1
D1
D2
5
G2
L2N7002DW1T1G_DY
S2
1
NFC_3S_SMCLK
6
PCH_3M_SMCLK
3
PCH_3M_SMDATA
4
NFC_3S_SMDATA
R4776
21
49
IN
2.2K_5%_2
R4797
21
21
2.2K_5%_2
R4884
49
IN
R4783
21
2.2K_5%_2
P3V3S
P3V3A
P3V3S
D
P3V3A
AW7
AV5
AJ5
V5
AG4
AE6
AP5
AJ6
AT4
AL5
AP4
AJ7
0_5%_2_DY
SLP_A
R4719
P3V3S
R4936
2 1
P3V3_RTC
R4742
330K_5%_2
21
2 1
R4928
0_5%_2
R4718
2 1
0_5%_2
0_5%_2_DY
21
Q4753
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
Q4752
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
IN
DPWROK
IN
RSMRST#
IN
PCH_WAKE#
R4940
BI
PCI_3S_CLKRUN#
OUT
BT_OFF
OUT
SUSCLK32_PCH
OUT
SLP_S5#_3R
OUT
OUT
OUT
OUT
OUT
1
PCH_SML1CLK
6
PCH_KBC_SMCLK
3
PCH_KBC_SMDATA
4
PCH_SML1DATA
1
PCH_3S_SMCLK
6
PCH_3A_SMCLK
3
PCH_3A_SMDATA
4
PCH_3S_SMDATA
18
2 1
10K_5%_2
55
SLP_S4#_3R
SLP_S3#_3R
PM_SLP_A#
SLP_SUS#_3R
SLP_LAN#
28
29
28
26
16
16
64
16
16
R4827
21
2.2K_5%_2
68
51
IN
68
51
IN
2 1
2.2K_5%_2
R4856
R4835
2 1
0_5%_2_DY
R4913
21
26
IN
R4830
21
21
R4792
26
IN
21
R4828
R4836
2 1
0_5%_2_DY
51 16
51
16
18
51
IN
2.2K_5%_2
2.2K_5%_2
2.2K_5%_2
2.2K_5%_2
IN
P3V3A
64 27 26
31
43 26 24
P3V3A
P3V3A
I2C_CLK
P3V3S
39
P3V3A
39
P3V3S
I2C_DATA
51
57
C C
58 50 38
58
50 38
57
B
57
59
TSB_TC7SH17F_SSOP_5P
P3V3A
10K_5%_2_DY
R4746
21
P3V3DSW
10K_5%_2
R4743
R4744
21
10K_5%_2
21
REFERENCE:4500~4949
8
7 6
SUS_PWR_ACK
ADP_PRES_OUT
GPIO72
P3V3S
1
5
U4700
5
1
2
4
4
2
3
3
OUT
BUF_PLT_RST#
R4713
21
100K_5%_2
26
ITL_HSW_ULT_2C_BGA_1168P
33
51
55 53
61
56
R4718
R4723
R4722
5 4
IAMT
INSTALL
INSTALL
UNINSTALL
NON-IAMT
UNINSTALL
UNINSTALL
INSTALL
CHANGE by
XXX
R4727
8.2K_5%_2
2 1
A A
28
51
PCI_3S_CLKRUN#
OUT
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP2-SPI,SMBUS,SYSTEM SRQUENCE
P3V3S
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
28 77
1
REV
X01
Page 29
8 7
R4779
19
P3V3S
R4729
R4751
R4706
R4709
R4907
R4753
R4769
D
R4880
R4726
R4767
R4728
200K_5%_2
21
10K_5%_2_DY
21
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
DGPU_PG
KBL_DET#
DGPU_HOLD_RST#
FPR_LOCK#
DGPU_PRSNT#
DGPU_PWROK
MPHY_PRW_EN
LPC_RESET#
A_3S_ICHSPKR
DEVSLP1
DEVSLP0
DOCK_ID1
R4919
10K_5%_2_DY
55
P3V3A
R4714
R4733
R4720
R4725
R4736
R4741
R4908
R4911
R4914
R4915
R4916
R4917
R4918
R4960
R4961
10K_5%_2
21
1K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
GPIO8
TLS_ENCRYTION
GPIO57
NFC_RST#
DGPU_HPD_INTR#
GPIO14
GPIO24
GPIO44
GPIO45
GPIO46
GPIO47
GPIO58
WWANSSD_M12DET
GPIO10
GPIO13
2 1
0_5%_2
BRD_ID1
54
2 1
WLAN_TRANSMIT_OFF#
59
LAN_DIS#
TLS_ENCRYTION
52
KBL_DET#
DGPU_PWROK
29
INTLWAKE#
49
NFC_RST#
49
NFC_INT
GPIO57
49
FPR_LOCK#
DGPU_PRSNT#
MPHY_PRW_EN
10
DDR3L_DET
45
51
LPC_RESET#
45
29
A_3S_ICHSPKR
GPIO58
GPIO44
GPIO47
GPIO13
GPIO14
GPIO45
GPIO46
GPIO10
DEVSLP0
DEVSLP1
OCP_OC#
WWANSSD_M12DET
DGPU_HOLD_RST#
DGPU_HPD_INTR#
6 5
OUT IN
DGPU_PWROK
IN
OUT
GPIO8
OUT
IN
IN
IN
IN
GPIO24
IN
IN
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
IN
IN
IN
IN
OUT IN
OUT
OUT
IN
IN
IN
OUT
29
U4555
P1
BMBUSY*/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPI O33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPI O38
N5
DEVSLP2/GPI O39
V2
SPKR/GPIO81
ITL_HSW_ULT_2C_BGA_1168P
HASWELL_MCP _E
GPIO
4
PCH_OPI_COMP GPIO15
CPU/
MISC
LPIO
GSPI0_CS*/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS*/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO9 1
UART0_TXD/GPI O92
UART0_RTS*/ GPIO93
UART0_CTS*/ GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPI O1
UART1_RST*/ GPIO2
UART1_CTS*/ GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
THRMTRIP*
RCIN*/GPIO82
SERIRQ
RSVD
RSVD
3 2 1
REFERENCE NUMBER:4500~4699
D60
THRMTRIP#
V4
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
R4748
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
IN
IN
IN
IN
IN
2 1
49.9_1%_2
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
PLT_ID1
PLT_ID2
PLT_ID3
TOUCH_RST#
SG_IN
DOCK_ID1
SC_PWRSV#
GPIO3
GPIO4
GPIO5
RUNSCI_EC#
THERM_SCI#
GPIO64
GPIO65
1
TP4531
GPIO67
GPIO68
GPIO69
64
TP24
58
OUT
IN
44
57 54
51
68
R4732
GPS_XMIT_OFF#
PCI_3S_SERIRQ
2 1
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
TOUCH_RST#
GPIO5
GPIO3
GPS_XMIT_OFF#
PCI_3S_SERIRQ
OCP_OC#
SC_PWRSV#
RUNSCI_EC#
GPIO64
GPIO65
GPIO67
GPIO68
GPIO69
GPIO4
1K_5%_2
P1V05S_VCCP
56
53
51
R4764
R4754
R4806
R4809
R4810
R4813
R4814
R4755
R4763
R4735
R4906
R4708
R4912
R4780
R4757
R4785
R4738
R4745
R4749
R4750
R4752
R4859
10K_5%_2
21
10K_5%_2
21
10K_5%_2_DY
21
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
P3V3S
D
C C
P3V3DSW
B
R4721
R4909
R4717
R4724
PCIE_WAKE#
29
INTLWAKE#
28
PCH_WAKE#
51
KBC_WAKE#
REFERENCE:4500~4949
8
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
OUT
OUT
OUT
OUT
LAN_DIS#
DDR3L_DET
INTLWAKE#
NFC_INT
R4934
R4930
R4932
0_5%_2_DY
0_5%_2_DY
0_5%_2
2 1
2 1
2 1
7 6
R4716
10K_5%_2
B
P3V3S
PLT_ID1
PLT_ID2
PLT_ID3
P3V3DSW
2 1
SG_IN
R4730 SWITCHABLE GRAPHICS ENABLE
R4731 SWITCHABLE GRAPHICS DISABLE
R4730
R4731
10K_5%_2
2 1
10K_5%_2_DY
2 1
5 4
P3V3S
29
OCP_OC#
OUT
CHANGE by
3
Q4700
DS
1
G
SSM3K7002BFU
2
XXX
IN
OCP_PWM_OUT
DATE
21-OCT-2002
2 3
R4760
R4803
R4761
R4804
R4762
R4805
R4760 R4761
R4803
PLT_ID2 PLT_ID1
0
0
BOARD ID GPIO
51
SIZE
A3
10K_5%_2_DY
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2_DY
21
10K_5%_2
2 1
10K_5%_2_DY
2 1
PLT_ID3
R4804
R4762
R4805
1
11
H
L
01 4 "
15"
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP3-GPIO
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
SHEET
of
77 29
1
REV
X01
A A
Page 30
8 7
6 5
4
3 2 1
D
B
P3V3S
R4781
R4924
R4929
R4770
P3V3S
DPB0_PORT_DN
DPB0_PORT_DP
DPB1_PORT_DN
DPB1_PORT_DP
DPB2_PORT_DN
DPB2_PORT_DP
DPB3_PORT_DN
DPB3_PORT_DP
DPC0_PORT_DN
DPC0_PORT_DP
DPC1_PORT_DN
DPC1_PORT_DP
8.2K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
R4571
R4572
R4573
R4574
R4575
R4576
R4577
R4578
8
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
21
21
21
21
21
21
ACCEL_INT#
MUX_SELECT#
DGPU_PWR_EN#
CAMERA_ON
10K_5%_2_DY
10K_5%_2
8.2K_5%_2_DY
8.2K_5%_2
8.2K_5%_2_DY
8.2K_5%_2
8.2K_5%_2
2 1
8.2K_5%_2_DY
2 1
44
OUT
BRD_ID1
BRD_ID2
50 30
30
ACCEL_INT#_R
30
56
WWAN_TRANSMIT_OFF#
44
BRD_ID3
BRD_ID4
58
OUT
30
50
U4555
C54
DDI1_TXN0
C55
DDI1_TXP0
B58
DDI1_TXN1
C58
DDI1_TXP1
B55
DDI1_TXN2
A55
DDI1_TXP2
A57
DDI1_TXN3
B57
DDI1_TXP3
C51
DDI2_TXN0
C50
DDI2_TXP0
C53
DDI2_TXN1
B54
DDI2_TXP1
C49
DDI2_TXN2
B50
DDI2_TXP2
A53
DDI2_TXN3
B53
DDI2_TXP3
ITL_HSW_ULT_2C_BGA_1168P
7 6
1
2 1
2 1
2 1
2 1
TP24
R4866
B8
A9
C6
U6
P4
N4
N2
AD4
2 1
U7
L1
L3
R5
L4
HDD_HALTLED_R
BRD_ID4
R4577
0
44
INV_PWM
44
L_BKLT_EN
LVDS_VDD_EN
HDD_HALTLED_R
MUX_SELECT#
DGPU_PWR_EN#
CAMERA_ON
HDD_HALTLED
ACCEL_INT#
BRD_ID1
R4571
R4572 R4574 R4576
0
OUT
OUT
OUT
IN
IN
IN
OUT
OUT
BRD_ID2
R4573
BRD_ID2
BRD_ID3
BRD_ID4
TP4509
OUT
R4867
1K_5%_2
R4868
1K_5%_2_DY
R4870
0_5%_2
R4871
0_5%_2_DY
BRD_ID3
SHORT_0402_5
R4575
COMMON PLATFORMS SYSTEM BOARD ID GPIO
HASWELL_MCP _E
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
EDP DDI
U4555
HASWELL_MCP _E
eDP SIDEBAND
eDP_BKLCTL
eDP_BKLEN
eDP_VDDEN
PIRQA*/GPIO77
PIRQB*/GPIO78
PIRQC*/GPIO79
PIRQD*/GPIO80
PME*
GPIO55
GPIO52
GPIO54
GPIO51
GPIO53
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
PCI DISPLAY
ITL_HSW_ULT_2C_BGA_1168P
ACCEL_INT#_R
OUT
30
30
IN IN
DPB_PORT_DDCDATA
H
L R4578
DB0 0 0
DB1 0 1 0 0
DPB_PORT_DDCCLK
DPB_PORT_AUX_DN
DPB_PORT_AUX_DP
DP_UTIL
OUT
EDP_TX0_DN
OUT
EDP_TX0_DP
OUT
EDP_TX1_DN
OUT
EDP_TX1_DP
OUT
EDP_AUX_DN
OUT
EDP_AUX_DP
21
R4544
1
TP24
44
44
44
44
44
44
24.9_1%_2
TP4500
REFERENCE:4500~4949
5 4
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
BI
BI
VCCIOA_OUT
P3V3S
BI
BI
C4756
0.1UF_16V_2
0.1UF_16V_2
B9
BI
C9
D9
D11
C5
B6
B5
A6
C8
A8
D6
R4851
21
2.2K_5%_2
DPB_PORT_DDCCLK
BI
DPB_PORT_DDCDATA
BI
DPC_PORT_DDCCLK
BI
DPC_PORT_DDCDATA
BI
DPB_PORT_AUX_DN
BI
DPC_PORT_AUX_DN
BI
DPB_PORT_AUX_DP
BI
DPC_PORT_AUX_DP
IN
DPD_HPD
IN
DPC_PORT_HPD
IN
EDP_HPD#
R4900
21
2.2K_5%_2
30
DDC_EN
P3V3S
30
43
DDC_EN
R4853
21
100K_5%_2_DY
2 1
DPB_PORT_AUX#_C
30 43
C4757
DP_EN
2 1
R4854
21
100K_5%_2_DY
CHANGE by
30
30
43
Q4701
L2N7002DW1T1G
IN
Q4702
L2N7002DW1T1G
IN
Q4703
L2N7002DW1T1G
IN
DPB_PORT_AUX_C
Q4704
L2N7002DW1T1G
IN
DP_EN
XXX
DPC_PORT_DDCCLK
DPC_PORT_DDCDATA
1
4
3
6
S1
S2
D2
D1
G2
G1
5
2
1
4
3
6
S1
S2
D2
D1
G2
G1
5
2
1
4
3
6
S1
D2
D1
G2
G1
5
2
1
3
6
S1
D2
D1
G2
G1
5
2
DATE
43 30
DPD_HPD
DPC_PORT_HPD
P3V3S
R4899
21
100K_5%_2
R4895
S2
4
S2
21-OCT-2002
2 3
R4788
OUT
R4789
OUT
R4758
OUT
R4759
OUT
BI
DPB_PORT_DATA_AUX_DN
43
BI
DPB_PORT_CLK_AUX_DP
21
100K_5%_2
INVENTEC
TITLE
CODE
SIZE
CS
A3
2.2K_5%_2
2 1
2.2K_5%_2
2 1
100K_5%_2
2 1
100K_5%_2
2 1
MODEL,PROJECT,FUNCTION
MCP4-GPIO,DP
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
30 77
1
P3V3S
REV
X01
D
C C
B
A A
Page 31
8 7
U4555
M_A_DQ<63..0>
38
D
B
BI
AH63
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HASWELL_MCP _E
6 5
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS*
SA_WE*
SA_CAS*
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
39
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
TP24
1
OUT
OUT
OUT
OUT
OUT
OUT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
DDR_WR_VREF01
DDR_WR_VREF02
M_B_DQ<63..0>
M_CLK_DDR0_DN
M_CLK_DDR0_DP
M_CLK_DDR1_DN
M_CLK_DDR1_DP
38
M_CKE0
38
M_CKE1
38
M_CS#0
38
M_CS#1
TP90665
M_A_RAS#
38
M_A_WE#
M_A_CAS#
38
M_A_BS0
38
M_A_BS1
38
M_A_BS2
OUT
M_A_A<15..0>
M_A_DQS0_DN
M_A_DQS1_DN
M_A_DQS2_DN
M_A_DQS3_DN
M_A_DQS4_DN
M_A_DQS5_DN
M_A_DQS6_DN
M_A_DQS7_DN
M_A_DQS0_DP
M_A_DQS1_DP
M_A_DQS2_DP
M_A_DQS3_DP
M_A_DQS4_DP
M_A_DQS5_DP
M_A_DQS6_DP
M_A_DQS7_DP
P0V75M_VREF_H
4
U4555
BI
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
AY31
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
3 2 1
HASWELL_MCP _E
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS*
SB_WE*
SB_CAS*
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
AN28
AN25
AW22
AV18
AN21
AN18
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
TP24
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
OUT
M_CLK_DDR2_DN
OUT
M_CLK_DDR2_DP
OUT
M_CLK_DDR3_DN
OUT
M_CLK_DDR3_DP
OUT
M_CKE2
OUT
M_CKE3
OUT
M_CS#2
OUT
M_CS#3
1
OUT
M_B_RAS#
OUT
M_B_WE#
OUT
M_B_CAS#
OUT
M_B_BS0
OUT
M_B_BS1
OUT
M_B_BS2
OUT
BI
M_B_DQS0_DN
BI
M_B_DQS1_DN
BI
M_B_DQS2_DN
BI
M_B_DQS3_DN
BI
M_B_DQS4_DN
BI
M_B_DQS5_DN
BI
M_B_DQS6_DN
BI
M_B_DQS7_DN
BI
M_B_DQS0_DP
BI
M_B_DQS1_DP
BI
M_B_DQS2_DP
BI
M_B_DQS3_DP
BI
M_B_DQS4_DP
BI
M_B_DQS5_DP
BI
M_B_DQS6_DP
BI
M_B_DQS7_DP
TP90664
M_B_A<15..0>
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
D
C C
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
B
P0V75S_DIMM0_VREF_DQ
R4105
2_1%_2
2 1
C4121
21
0.022UF_16V_2
2 1
P0V75S_DIMM1_VREF_DQ
R4110
24.9_1%_2
REFERENCE:4500~4949
8
DDR CHANNEL A
ITL_HSW_ULT_2C_BGA_1168P
31
27
R4112
2_1%_2
R4111
24.9_1%_2
7 6
DDR_RST_EN
IN
2 1
C4122
2 1
21
0.022UF_16V_2
DIODES_DMG2302U_7_3P
31
DDR CHANNEL B
ITL_HSW_ULT_2C_BGA_1168P
R4538
2 1
0_5%_2_DY
DS
D
G
Q4503
G
IN
DDR_RST_EN
DIODES_DMG2302U_7_3P
27
DDR_WR_VREF01
S
R4539
21
1K_5%_2_DY
0_5%_2_DY
D
Q4504
R4560
641659 24
DS
G
G
57
2 1
DDR_WR_VREF02
S
R4561
21
1K_5%_2_DY
51
43
26 28
5 4
P0V75S_DIMM0_VREF_CA
R4503
2_1%_2
R4136
24.9_1%_2
SLP_S3#_3R
IN
CHANGE by
2 1
C4124
2 1
XXX
Q4500
21
0.022UF_16V_2
R4511
3.3K_5%_2
R4506
2 1
0_5%_2_DY
D
DS
G
G
2 1
C4500
21
DIODES_DMG2302U_7_3P
470PF_50V_2
DATE
S
2 1
R4505
21-OCT-2002
P0V75M_VREF_H
C4501
C4502
21
21
100K_5%_2
2.2UF_6.3V_3_DY
2 3
0.1UF_16V_2_DY
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP5-DDR
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 31
1
REV
X01
A A
Page 32
8 7
6 5
4
3 2 1
D
U4555
F10
70
PEG_RX0_C_DN
70
PEG_RX0_C_DP
70
PEG_TX0_C_DN
70
PEG_TX0_C_DP
70
PEG_RX1_C_DN
70
PEG_RX1_C_DP
70
PEG_TX1_C_DN
70
PEG_TX1_C_DP
70
PEG_RX2_C_DN
70
PEG_RX2_C_DP
70
PEG_TX2_C_DN
70
PEG_TX2_C_DP
70
PEG_RX3_C_DN
70
PEG_RX3_C_DP
70
PEG_TX3_C_DN
70
PEG_TX3_C_DP
54
PCIE_RX3_C_DN
54
NIC
WLAN
B
PCIE_RX3_C_DP
54
PCIE_TX3_C_DN
54
PCIE_TX3_C_DP
55
PCIE_RX4_C_DN
55
PCIE_RX4_C_DP
55
PCIE_TX4_C_DN
55
PCIE_TX4_C_DP
USB3 HUB
CHARGER PORT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
46
USB30_RX2_DN
46
USB30_RX2_DP
46
USB30_TX2_DN
46
USB30_TX2_DP
64
USB30_RX3_DN
64
USB30_RX3_DP
64
USB30_TX3_DN
64
USB30_TX3_DP
C4835
C4836
C4837
C4838
C4839
C4840
C4841
C4842
C4834
C4831
C4832
C4833
21
21
21
21
P1V05S
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
IN
IN
OUT
OUT
IN
IN
OUT
OUT
PEG_TX0_DN
PEG_TX0_DP
PEG_TX1_DN
PEG_TX1_DP
PEG_TX2_DN
PEG_TX2_DP
PEG_TX3_DN
PEG_TX3_DP
PCIE_TX3_DN
PCIE_TX3_DP
PCIE_TX4_DN
PCIE_TX4_DP
3K_1%_2
R4811
R4812
2 1
2 1
0_5%_3
RCOMP NEED CLOSED TO CPU AT 500MIL
PERn5_L0
E10
PERp5_L0
C23
C22
PETp5_L0
F8
PERn5_L1
E8
PERp5_L1
B23
PETn5_L1
A23
PETp5_L1
H10
PERn5_L2
G10
PERp5_L2
B21
PETn5_L2
C21
PETp5_L2
E6
PERn5_L3
F6
PERp5_L3
B22
PETn5_L3
A21
PETp5_L3
G11
PERn3
F11
PERp3
C29
PETn3
B30
PETp3
F13
PERn4
G13
PERp4
B29
PETn4
A29
PETp4
G17
PERn1/USB3Rn2
F17
PERp1/USB3Rp2
C30
PETn1/USB3Tn2
C31
PETp1/USB3Tp2
F15
PERn2/USB3Rn3
G15
PERp2/USB3Rp3
B31
PETn2/USB3Tn3
A31
PETp2/USB3Tp3
E15
RSVD
E13
RSVD
A27
PCIE_RCOMP
B27
PCIE_IREF
ITL_HSW_ULT_2C_BGA_1168P
HASWELL_MCP _E
PCI
USB
USB2n0
USB2p0
USB2n1 PETn5_L0
USB2p1
USB2n2
USB2p2
USB2n3
USB2p3
USB2n4
USB2p4
USB2n5
USB2p5
USB2n6
USB2p6
USB2n7
USB2p7
USB3Rn0
USB3Rp0
USB3Tn0
USB3Tp0
USB3Rn1
USB3Rp1
USB3Tn1
USB3Tp1
USBRBIAS*
USBRBIAS
RSVD
RSVD
OC0*/GPIO40
OC1*/GPIO41
OC2*/GPIO42
OC3*/GPIO43
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
R4756
22.6_1%_2
OUT
LANLINK_STATUS
OUT
ISO_PREP#
OUT
GPIO42
OUT
GPIO43
BI
USB_P0_DN
BI
USB_P0_DP
BI
USB_P1_DN
BI
USB_P1_DP
BI
USB_P2_DN
BI
USB_P2_DP
BI
USB_P3_DN
BI
USB_P3_DP
BI
USB_P4_DN
BI
USB_P4_DP
BI
USB_P5_DN
BI
USB_P5_DP
BI
USB_P6_DN
BI
USB_P6_DP
BI
USB_P7_DN
BI
USB_P7_DP
IN
USB30_RX0_DN
IN
USB30_RX0_DP
OUT
USB30_TX0_DN
OUT
USB30_TX0_DP
IN
USB30_RX1_DN
IN
USB30_RX1_DP
OUT
USB30_TX1_DN
OUT
USB30_TX1_DP
2 1
RCOMP NEED CLOSED TO CPU AT 500MIL
32
32
USB3 DOCK
USB3 PORT 1 (DEBUGPORT)
USB3 HUB
46
46
CHARGER PORT
FINGER PRINTER
TOUCH
CAMERA
SMART CARD
USB3 DOCK
64
64
USB3 PORT 1
64
64
LANLINK_STATUS
ISO_PREP#
32
GPIO42
32
GPIO43
57
57
64
64
64
64
49
49
44
44
44
44
58
58
57
57
57
57
P3V3A
OUT
OUT
OUT
OUT
R4734
R4857
R4737
R4778
21
21
21
21
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
D
C C
B
REFERENCE:4700~4949
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP6-PCIE,USB
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 32
1
REV
X01
A A
Page 33
8 7
6 5
4
3 2 1
D
D4750
BAT54C
P3V3AL_RTC_BAT
R4832
21
CN4750
3
4
GG2
ACES_50224_0020N_001_2P
1K_5%_2
1
1
2
6012B0069907
R4807,R4886,R4 891
CAN BE OPENED FOR POWER CONSUMPTI ON
P3V3_RTC
B
WWAN_DET#
61
56 55 53 28
IN
R4831
1M_5%_2
Q4831
21
1
SSM3K7002BFU
51
G
58
REFERENCE:4500~4949
8
P3V3DS
2 1
A2 A1
3
C
R4845
21
C4768
21
1UF_6.3V_2
P1V05A
R4807
21
26
26
26
26
26
OUT
3
DS
2
51
IN
26
IN
P3V3_RTC
C4766
2 1
1UF_6.3V_2
R4834
2 1
20K_5%_2
C4764
2 1
330K_5%_2
51_5%_2
IN
IN
OUT
IN
IN
21
1UF_6.3V_2
67
59
AZ_R3S_BITCLK
59
AZ_R3S_SYNC
59
AZ_R3S_RST#
59
AZ_R3S_SDIN0
59
67
AZ_R3S_SDOUT
33
56
R4863
10K_5%_2
330K_5%_2_DY
R4833
20K_5%_2
1M_5%_2
21
R4842
R4891
R4886
51_5%_2
51_5%_2
21
21
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
PCH_JTAG
INTRUDER#
BAT_GRNLED#
BUF_PLT_RST#
HDA_SDO_R
7 6
C4767
2 1
Q4755
Q4754
X4750
OUT
R4910
R4903
R4901
R4905
R4869
TP30
TP4568
4
2 1
1
21
51_5%_2_DY
TP30
1
TP4567
18PF_50V_2
32.768KHZ
C4788
18PF_50V_2
33 56
R4876
2 1
OUT
OUT
OUT
IN
OUT
26
H_TRST#
27
P3V3A
R4861
1K_5%_2
21
2
1
2 1
1
S
G
D
LES_LBSS84LT1G_SOT23_3P
3
2
S
G
D
LES_LBSS84LT1G_SOT23_3P
3
3 2
R4862
10M_5%_2
21
INTRUDER#
INTVRMEN_R
RTCRST#
2 1
2 1
2 1
2 1
2 1
HDA_SDO_R
IN
R4808
TP30
1
TP30
1
TP4566
RTC_X1
RTC_X2
33_5%_2
33_5%_2
33_5%_2
33_5%_2
33_5%_2
1
TP4569
U4555
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER*
AV7
INTVRMEN
AV6
SRTCRST*
AU7
RTCRST*
AW8
HDA_BCLK/I2S0 _SCLK
AV11
HDA_SYNC/I2S0_ SFRM
AU8
HDA_RST*/I2 S_MCLK
AY10
HDA_SDI0/I2S0 _RXD
AU12
HDA_SDI1/I2S1 _RXD
AU11
HDA_SDO/I2S0_ TXD
AW10
HDA_DOCK_EN*/ I2S1_TXD
AV10
HDA_DOCK_RST*/ I2S1_SFRM
AY8
I2S1_SCLK
HASWELL_MCP _E
RTC
AUDIO
AU62
PCH_TRST*
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
ITL_HSW_ULT_2C_BGA_1168P
JTAG
AMD_BIOS_SEL#
LAYOUT NOTE:PLACE R4808 NEAR PCH
LAYOUT NOTE:JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH
LAYOUT NOTE:JTAG_TDI TERMINATIONS NEED TO BE PLACED NEAR PCH
LAYOUT NOTE:JTAG_TDO TERMINATIONS NEED TO BE PLACED NEAR XDP
D
J5
SATA_Rn0/PERn6_L3
SATA_Rp0/PERp6_L3
SATA_Tn0/PETn6_L3
SATA_Tp0/PETp6_L3
SATA_Rn1/PERn6_L2
SATA_Rp1/PERp6_L2
SATA_Tn1/PETn6_L2
SATA_Tp1/PETp6_L2
SATA_Rn2/PERn6_L1
SATA_Rp2/PERp6_L1
SATA_Tn2/PETn6_L1
SATA_Tp2/PETp6_L1
SATA_Rn3/PERn6_L0
SATA_Rp3/PERp6_L0
SATA_Tn3/PETn6_L0
SATA_Tp3/PETp6_L0
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED*
SATA
1GB O
12 G B AMD_BIOS_SEL#
SATA_RX0_C_DN
H5
SATA_RX0_C_DP
B15
SATA_TX0_C_DN
A15
SATA_TX0_C_DP
J8
SATA_RX1_C_DN
H8
SATA_RX1_C_DP
A17
SATA_TX1_C_DN
B17
SATA_TX1_C_DP
J6
H6
B14
C15
F5
E5
PCIE_TX6_L0_DN
C17
PCIE_TX6_L0_DP
D17
V1
AMD_BIOS_SEL#
U1
V6
AC1
A12
L11
K10
C12
L2 MAX. = 100 MILS
U3
NMI_SMI_DBG#
33
OUT
C4818
C4819
R4818
21
R4826
3K_1%_2
R4816
21
10K_5%_2
GPIO37
45
IN
45
IN
45
OUT
45
OUT
45
IN
45
IN
45
OUT
45
OUT
21
0.1UF_16V_2
21
0.1UF_16V_2
2 1
P3V3S
10K_5%_2_DY
10K_5%_2
NMI_SMI_DBG#
GPIO37
R4852
2 1
L1 MAX. = 500 MILS
P3V3S
R4765
10K_5%_2
R4820
21
43.2K_1%_2
R4824
10K_5%_2_DY
HDD
MSATA
IN
IN
OUT
OUT
R4817
21
10K_5%_2
IN
IN
IN
OUT
LED_3S_SATA#
2 1
2 1
PCIE_RX6_L0_C_DN
PCIE_RX6_L0_C_DP
PCIE_TX6_L0_C_DN
PCIE_TX6_L0_C_DP
MSATA_DET#
51
33
P1V05S
P3V3S
P3V3S
P3V3S
58
61
61
C C
61
61
45
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP7-RTC,AUDIO,SATA
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
1
REV
X01
77 33
Page 34
8 7
6 5
4
3 2 1
U4555
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P 0
U2
P3V3S
R4707
21
D
R4711
R4798
R4705
R4712
R4715
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
21
21
21
21
21
GPIO18
GPIO19
CLKREQ_PCIE3_N
CLKREQ_PCIE4_N
CLKREQ_PCIE5_N
CLKREQ_PCIE6_L0_N
NIC
WLAN
MARS
SD/MMC
54
54
54
CLKREQ_PCIE3_N
55
55
55
CLKREQ_PCIE4_N
CLKREQ_PCIE5_N
61
CLK_PCIE6_L0_DN
61
CLK_PCIE6_L0_DP
CLKREQ_PCIE6_L0_N
61
CLK_PCIE3_DN
CLK_PCIE3_DP
CLK_PCIE4_DN
CLK_PCIE4_DP
CLK_PCIE5_DN
CLK_PCIE5_DP
GPIO18
GPIO19
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
IN
IN
IN
PCIECLKRQ0*/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P 1
Y5
PCIECLKRQ1*/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P 2
AD1
PCIECLKRQ2*/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P 3
N1
PCIECLKRQ3*/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P 4
U5
PCIECLKRQ4*/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P 5
T2
PCIECLKRQ5*/GPIO23
ITL_HSW_ULT_2C_BGA_1168P
HASWELL_MCP _E
XTAL24 _IN
XTAL24 _OUT
RSVD
DIFFCLK_BIASREF
CLKOUT_ITPXDP*
CLKOUT_ITPXDP_ P
RSVD
TESTLOW
TESTLOW
TESTLOW
TESTLOW
CLKOUT_LPC_0
CLKOUT_LPC_1
CLOCK
SIGNALS
XTAL24_IN
A25
B25
XTAL24_OUT
K21
M21
C26
XCLK_BIASREF
C35
CPU_TEST1
C34
CPU_TEST2
AK8
CPU_TEST3
AL8
CPU_TEST4
AN15
CLK_KBC_SIO
AP15
B35
A35
CLK_TPM_DEBUG
67
CLK_R3S_TPM
CLK_R3S_DEBUG
R4898
R4775
R4791
R4800
R4801
22_5%_2
IN
OUT
OUT
2 1
1M_5%_2
R4892
3K_1%_2
3
1
P1V05S
2 1
21
R4773
C4828
12PF_50V_2
C4826
12PF_50V_2
2 1
2 1
2
X4751
24MHZ_12PF
4
RCOMP NEED CLOSED TO CPU AT 500MIL
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
21
10K_5%_2
R4774
22_5%_2
R4777
OUT
OUT
OUT
OUT
2 1
CLK_R3S_TPM_R
2 1
CLK_R3S_DEBUG_R
22_5%_2
CLK_R3S_KBPCI
CLK_TPM_DEBUG
CLK_PCIE_XDP_DN
CLK_PCIE_XDP_DP
IDT_IDT5V60034DCG8_SOP_8P
D
51
67
26
26
P3V3S
U4560
1
FBIN
CLKIN
2
CLK4
CLK1
3
CLK3
CLK2
VDD
GND
8
7
6
5 4
R4950
22_5%_2
2 1
C C
C4581
21
0.1UF_16V_2
U4555
AC60
26
CFG<0>
26
CFG<1>
26
CFG<2>
26
26
CFG<4>
B
STRAPPING:
DP ENABLE/DISABLE
0 : ENABLED
IN
R4523
26
1K_5%_2
CFG<9>
21
IN
R4534
21
CFG<3>
26
CFG<5>
26
CFG<6>
26
CFG<7>
26
CFG<8>
26
CFG<10>
26
CFG<11>
26
CFG<12>
26
CFG<13>
26
CFG<14>
26
CFG<15>
1K_1%_2_DY
26
CFG<16>
26
CFG<18>
26
CFG<17>
26
CFG<19>
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
R4519
49.9_1%_2
2 1
RCOMP NEED CLOSED TO CPU AT 500MIL
2 1
TD_IREF
R4841
8.2K_5%_2
CFG0
AC62
CFG1
AC63
CFG2
AA63
CFG3
AA60
CFG4
Y62
CFG5
Y61
CFG6
Y60
CFG7
V62
CFG8
V61
CFG9
V60
CFG10
U60
CFG11
T63
CFG12
T62
CFG13
T61
CFG14
T60
CFG15
AA62
CFG16
U63
CFG18
AA61
CFG17
U62
CFG19
V63
CFG_RCOMP VSS
A5
RSVD
E1
RSVD
D1
RSVD
J20
RSVD
H18
RSVD
B12
TD_IREF
ITL_HSW_ULT_2C_BGA_1168P
HASWELL_MCP _E
RESERVED
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
EDP_SPARE
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
PROC_OPI_COMP
RSVD
RSVD
RSVD
VSS
RSVD
RSVD
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15
AV62
D58
P22
N21
P20
R20
R4520
49.9_1%_2
B
2 1
A A
REFERENCE:4500~4949
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP8-CLOCK,RESERVED
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
34
77
1
REV
X01
Page 35
8 7
R4902
D
Q4505
21
DS
G
G
1UF_6.3V_2
P1V05A
DIODES_DMG2302U_7_3P
MPHY_PRW_EN
P1V05A
D
L4854
2.2UH_20%
L4865
2.2UH_20%
2 1
2 1
IN
C4785
C4786
21
21
10UF_6.3V_3
P1V05S
C4760
21
1UF_6.3V_2_DY
P1V05A_USB3PLL
P1V05A_SATA3PLL
P1V05S_APLLOPI
C4790
C4792
21
21
10UF_6.3V_3
P1V05S
R4858
0_5%_3
2 1
C4787
C4789
21
21
10UF_6.3V_3_DY
P1V05S
L4850
2.2UH_20%
2 1
B
C4754
C4723
21
21
10UF_6.3V_3
P1V05A
1UF_6.3V_2 1UF_6.3V_2
P3V3DS
1UF_6.3V_2
P1V05S_AXCK_DCB
1UF_6.3V_2
C4730
2 1
1UF_6.3V_2
P3V3A
R4927
21
0_5%_2
R4935
21
0_5%_2_DY
21
C4935
21
22UF_6.3V_5
P1V05S_SSCF100
P1V05S
C4719
P1V05S
L4851
2.2UH_20%
2 1
C4755
21
10UF_6.3V_3
21
1UF_6.3V_2
C4724
21
1UF_6.3V_2
6 5
RSC_0603_DY
S
0.1UF_16V_2
21
C4765
P3V3S
P1V05A_MODPHY
2 1
C4761
R4850
0_5%_2_DY
R4875
0_5%_2_DY
P3V3DSW
C4728
1UF_6.3V_2
P1V05S
P3V3A
C4720
21
1UF_6.3V_2
C4700
21
22UF_6.3V_5
R4941
RSC_0603_DY
U4555
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCCIO
VCCIO
B18
VCCUSB3PLL
B11
VCCSATA3PLL
Y20
VCCAPLL
AA21
VCCAPLL
W21
VCCAPLL
2 1
J13
DCPSUS3
AH14
VCCHDA
2 1
AH13
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
AH10
VCCDSW3_3
V8
Vcc3_3
W9
Vcc3_3
J18
VCC1P05
K19
VCC1P05
A20
VCCACLKPLL
J17
VCCCLK
R21
VCCCLK
T21
VCCCLK
K18
VCCCLK
M20
VCCCLK
V21
VCCCLK
AE20
VCCSUS3_3
AE21
VCCSUS3_3
ITL_HSW_ULT_2C_BGA_1168P
P1V05S
2 1
mPHY
OPI
USB3
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
ICC
LPT LP POWER
HASWELL_MCP _E
SPI
THERMAL SENSO R
SDIO/PLSS
SUS OSCILLATOR
CORE
RTC
USB2
4
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1P05
VCC1P05
VCC1P05
VCC1P05
VCC1P05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
Vcc3_3
Vcc3_3
VCCSDIO
VCCSDIO
DCPSUS4
VCCAPLL
VCCIO
VCCIO
AH11
AG10 P9
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
0_5%_2_DY
1UF_6.3V_2
TP4703
1
TP24
P3V3A
P3V3A
R4877
P1V5S
P3V3S P3V3S
R4701
0_5%_2
3 2 1
C4746
1UF_6.3V_2
21
21
C4712
0.1UF_16V_2
21
C4753
C4758
21
P1V05A
2 1
0.1UF_16V_2
0.1UF_16V_2
P3V3S
2 1
2 1
C4762
0_5%_2_DY
P1V05S
1UF_6.3V_2
0.1UF_16V_2
P1V05M
1UF_6.3V_2
21
21
R4855
C4701
C4763
C4717
P1V05A
2 1
2 1
P1V05M
C4729
21
P3V3_RTC
C4709
C4710
21
0.1UF_16V_2
C4716
21
1UF_6.3V_2
22UF_6.3V_5_DY
21
1UF_6.3V_2
P1V05S
C4751
21
C4714
21
1UF_6.3V_2
C4718
10UF_6.3V_3
C4721
21
21
1UF_6.3V_2
1UF_6.3V_2
D
C C
B
REFERENCE:4500~4949
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP9-POWER
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 35
1
REV
X01
A A
Page 36
8 7
6 5
ROUTE VCCSENSE WITH 27.4OHM IMPEDANCE
4
3 2 1
D
B
16
PVCCIO_OUT_R
P1V05S
P1V05S_VCCP
C4555
P1V05S_VCCP
2 1
R4590
150_5%_2
VGATE
R4568
0_5%_2_DY
R4569
0_5%_2
21
4.7UF_6.3V_3
R4524 CLOSE TO CPU
14
VR_SVID_ALERT#
VR_SVID_CLK
14
14
VR_SVID_DATA
P1V05S
R4513
21
10K_5%_2_DY
2 1
2 1
P1V05S_VCCP
R4594
0_5%_2
P1V5
C4527
21
R4524
OUT
OUT
OUT
2 1
R4593
2 1
C4515
C4528
21
21
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
P1V05S_VCCP
14
VCCSENSE
R4821
130_1%_2
21
21
75_1%_2
36
PWR_DEBUG
IN
PWR_DEBUG
OUT
VR_EN_HASWELL
10K_5%_2
OUT IN
VR_READY_HASWELL
C4516
21
C4526
C4525
21
21
10UF_6.3V_3
10UF_6.3V_3
PVCORE
OUT
VCCIOA_OUT
R4525
43_5%_2
21
26
IN
16
IN
36
IN
26
36
P1V05S_VCCP
C4590
21
10UF_6.3V_3_DY
C4990
21
10UF_6.3V_3
10UF_6.3V_3
R4521
2 1
100_1%_2
PVCCIO_OUT_R
VCCST_PWRGD
VR_EN_HASWELL
VR_READY_HASWELL
TP4562
TP4563
TP4564
TP4565
PVCORE
36
16
36
U4555
L59
RSVD
J58
RSVD
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VDDQ
AY50
VDDQ
F59
VCC
N58
RSVD
AC58
RSVD
E63
VCC_SENSE
AB23
RSVD
A59
VCCIO_OUT
E20
VCCIOA_OUT
AD23
RSVD
AA23
RSVD
AE59
RSVD
L62
VIDALERT*
N63
VIDSCLK
L63
VIDSOUT
B59
VCCST_PWRGD
F60
VR_EN
C59
VR_READY
D63
VSS
H59
PWR_DEBUG
P62
1
1
1
1
VSS
P60
RSVD_TP
P61
RSVD_TP
N59
RSVD_TP
N61
RSVD_TP
T59
RSVD
AD60
RSVD
AD59
RSVD
AA59
RSVD
AE60
RSVD
AC59
RSVD
AG58
RSVD
U59
RSVD
V59
RSVD
AC22
VCCST
AE22
VCCST
AE23
VCCST
AB57
VCC
AD57
VCC
AG57
VCC
C24
VCC
C28
VCC
C32
VCC
ITL_HSW_ULT_2C_BGA_1168P
HASWELL_MCP _E
HSW ULT POWER
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
C4536
C4542
21
21
22UF_6.3V_5
22UF_6.3V_5
C4530
C4539
21
21
22UF_6.3V_5
22UF_6.3V_5
C4533
C4522
21
21
22UF_6.3V_5
22UF_6.3V_5
C4532
C4537
21
21
22UF_6.3V_5
22UF_6.3V_5
C4529
C4521
21
21
C4531
21
C4545
21
22UF_6.3V_5
22UF_6.3V_5
C4535
21
22UF_6.3V_5
22UF_6.3V_5
C4559
21
22UF_6.3V_5
22UF_6.3V_5
C4540
21
C4544
21
C4534
21
C4560
21
PVCORE
C4547
21
22UF_6.3V_5
22UF_6.3V_5
C4538
21
22UF_6.3V_5
22UF_6.3V_5
C4549
21
22UF_6.3V_5
22UF_6.3V_5
C4561
21
22UF_6.3V_5
22UF_6.3V_5
C4548
21
22UF_6.3V_5
D
C C
B
A A
REFERENCE:4500~4949
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP10-POWER
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 36
1
REV
X01
Page 37
8 7
6 5
4
3 2 1
U4555
HASWELL_MCP _E
U4555
A11
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
D
B
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
AB22
VSS
AB7
VSS
AC61
VSS
AD21
VSS
AD3
VSS
AD63
VSS
AE10
VSS
AE5
VSS
AE58
VSS
AF11
VSS
AF12
VSS
AF14
VSS
AF15
VSS
AF17
VSS
AF18
VSS
AG1
VSS
AG11
VSS
AG21
VSS
AG23
VSS
AG60
VSS
AG61
VSS
AG62
VSS
AG63
VSS
AH17
VSS
AH19
VSS
AH20
VSS
AH22
VSS
AH24
VSS
AH28
VSS
AH30
VSS
AH32
VSS
AH34
VSS
AH36
VSS
AH38
VSS
AH40
VSS
AH42
VSS
AH44
VSS
AH49
VSS
AH51
VSS
AH53
VSS
AH55
VSS
AH57
VSS
AJ13
VSS
AJ14
VSS
AJ23
VSS
AJ25
VSS
AJ27
VSS
AJ29
VSS
ITL_HSW_ULT_2C_BGA_1168P
VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR5
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU1
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
AP3
HASWELL_MCP _E
U4555
VSS VSS
VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ITL_HSW_ULT_2C_BGA_1168P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D5
D50
D51
D53
D54
D55
D57
D59
D62
D8
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
G18
G22
G3
G5
G6
G8
H13
HASWELL_MCP _E
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ITL_HSW_ULT_2C_BGA_1168P
VSS_SENSE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H17
H57
J10
DC_TEST_AY2_AW2
J22
DC_TEST_AY3_AW3
J59
TP_DC_TEST_AY60
J63
DC_TEST_AY61_AW61
K1
DC_TEST_AY62_AW62
K12
DC_TEST_A3_B3
L13
DC_TEST_A3_B3
L15
DC_TEST_A61_B61
L17
DC_TEST_B62_B63
L18
L20
DC_TEST_C1_C2
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
OUT
ROUTE VSSSENSE WITH 27.4OHM IMPEDANCE
R4522
100_1%_2
21
U4555
AY2
AY3
AY60
AY61
AY62
B2
B3
B61
B62
B63
C1
C2
VSSSENSE
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
ITL_HSW_ULT_2C_BGA_1168P
14
HASWELL_MCP _E
U4555
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
ITL_HSW_ULT_2C_BGA_1168P
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
DAISY_CHAIN_NCTF_
HASWELL_MCP _E
SPARE
A3
DC_TEST_A3_B3
A4
TP_DC_TEST_A4
A60
TP_DC_TEST_A60
A61
DC_TEST_A61_B61
A62
DC_TEST_B62_B63
AV1
TP_DC_TEST_AV1
AW1
DC_TEST_AY2_AW2
AW2
DC_TEST_AY2_AW2
AW3
DC_TEST_AY3_AW3
AW61
DC_TEST_AY61_AW61
AW62
DC_TEST_AY62_AW62
AW63
DC_TEST_AY62_AW62
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
D
C C
B
A A
REFERENCE:4500~4949
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP11-GND,DAISY CHAIN,RESERVE
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 37
1
REV
X01
Page 38
8
7 6 5 4 3 2 1
31
M_A_A<15..0>
31
31
31
31
P1V5
P3V3A
C4550
21
E
27
DDR_PG_CTRL
IN
U4100
1
VCC
n.c.
2
A
Y
GND
NXP_74AUP1G07GW_TSSOP5_5P
0.1UF_16V_2
5
4 3
P1V5
R4114
21
220K_5%_2
R4115
21
2M_5%_2_DY
2
3
DS
G
Q4100
BSS138LT1
1
OUT
R4117
64.9_1%_2
R4118
64.9_1%_2
R4119
64.9_1%_2
R4120
64.9_1%_2
DDR_VTT_PG_CTRL
2 1
OUT
2 1
OUT
2 1
OUT
2 1
OUT
16
M_ODT0
M_ODT1
M_ODT2
M_ODT3
38
38
39
39
58 50 39
28
26
D
31
31
31
31
31
26
PCH_3S_SMCLK
PCH_3S_SMDATA
31
M_A_DQS1_DP
31
M_A_DQS3_DP
31
M_A_DQS5_DP
31
M_A_DQS6_DP
31
M_A_DQS0_DP
31
M_A_DQS2_DP
31
M_A_DQS4_DP
31
M_A_DQS7_DP
31
M_A_DQS1_DN
31
M_A_DQS3_DN
31
M_A_DQS5_DN
31
M_A_DQS6_DN
31
M_A_DQS0_DN
31
M_A_DQS2_DN
31
M_A_DQS4_DN
31
M_A_DQS7_DN
31
M_CLK_DDR0_DP
M_CLK_DDR0_DN
M_CLK_DDR1_DP
M_CLK_DDR1_DN
31
31
31
31
38
38
38
38
M_A_BS0
M_A_BS1
M_A_BS2
M_CS#0
M_CS#1
M_CKE0
M_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
SA0_DIM0
SA1_DIM0
M_ODT0
M_ODT1
BI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
P1V5
P0V75M_VREF
P1V5
2 1
R4106
C
2 1
R4122
1.8K_1%_2 1.8K_1%_2
P0V75S_DIMM0_VREF_CA
R4104
2 1
0_5%_2_DY
P1V5
R4108
R4109
2 1
2 1
P0V75M_VREF
1.8K_1%_2 1.8K_1%_2
P0V75S_DIMM0_VREF_DQ
R4107
2 1
0_5%_2_DY
P3V3S
C4105
C4104
21
21
2.2UF_6.3V_3
0.1UF_16V_2
+
C4146
C4106
21
21
330UF_2.5V
C4113
21
10UF_6.3V_3
2.2UF_6.3V_3
C4108
21
1UF_6.3V_2
C4117
C4118
21
21
10UF_6.3V_3
C4114
C4116
21
21
1UF_6.3V_2
27
C4115
21
10UF_6.3V_3
10UF_6.3V_3
C4112
21
1UF_6.3V_2
1UF_6.3V_2
39
PM_EXTTS#1_R
DDR3_DRAMRST#
C4109
21
10UF_6.3V_3
C4107
21
10UF_6.3V_3
OUT
OUT
P0V75S_DIMM0_VREF_DQ
B
P3V3S
NOTE:
IF SA0_DIM0=0 , SA1_DIM0=0
SO-DIMMA SPD ADDRESS IS 0XA0
SO-DIMMA TS ADDRESS IS 0X30
IF SA0_DIM0=1 , SA1_DIM0=0
SO-DIMMA SPD ADDRESS IS 0XA2
SO-DIMMA TS ADDRESS IS 0X32
A
8
R4103
21
10K_5%_2_DY
R4100
R4101
10K_5%_2
21
21
IN
IN
10K_5%_2
SA0_DIM0
SA1_DIM0
38
38
7 6 5 4 3
C4120
C4119
21
21
2.2UF_6.3V_3
0.1UF_16V_2
P0V75S_DIMM0_VREF_CA
C4111
C4110
21
2.2UF_6.3V_3
21
0.1UF_16V_2
REFERENCE NUMBER:4100~4299
CN4100
98
DQ0
A0
97
DQ1
A1
96
DQ2
A2
95
DQ3
A3
92
DQ4
A4
91
DQ5
A5
90
DQ6
A6
86
DQ7
A7
89
DQ8
A8
85
DQ9
A9
107
DQ10
A10_AP
84
DQ11
A11
83
DQ12
A12
119
DQ13
A13
80
DQ14
A14
78
DQ15
A15
DQ16
109
DQ17
BA0
108
DQ18
BA1
79
DQ19
BA2
114
S0#
DQ20
121
S1#
DQ21
101
DQ22
CK0
103
DQ23
CK0#
102
DQ24
CK1
104
DQ25
CK1#
73
DQ26
CKE0
74
DQ27
CKE1
115
DQ28
CAS#
110
RAS#
DQ29
113
WE#
DQ30
197
SA0
DQ31
201
SA1
DQ32
202
SCL
DQ33
200
SDA
DQ34
DQ35
116
ODT0
DQ36
120
ODT1
DQ37
DQ38
11
DQ39
DM0
28
DQ40
DM1
46
DQ41
DM2
63
DQ42
DM3
136
DQ43
DM4
153
DQ44
DM5
170
DQ45
DM6
187
DQ46
DM7
DQ47
12
DQS0
DQ48
29
DQS1
DQ49
47
DQS2
DQ50
64
DQS3
DQ51
137
DQS4
DQ52
154
DQS5
DQ53
171
DQS6
DQ54
188
DQS7
DQ55
10
DQS#0
DQ56
27
DQS#1
DQ57
45
DQS#2
DQ58
62
DQS#3
DQ59
135
DQS#4
DQ60
152
DQS#5
DQ61
169
DQS#6
DQ62
186
DQS#7
DQ63
FOX_AS0A626_U4R6_7H_HP_204P
6026B0216701
CN4100
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
FOX_AS0A626_U4R6_7H_HP_204P
CHANGE by
XXX
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
203
VTT1
204
VTT2
G1
G1
G2
G2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
C4100
21
1UF_6.3V_2
M_A_DQ<8>
M_A_DQ<9>
M_A_DQ<10>
M_A_DQ<11>
M_A_DQ<12>
M_A_DQ<13>
M_A_DQ<14>
M_A_DQ<15>
M_A_DQ<24>
M_A_DQ<25>
M_A_DQ<26>
M_A_DQ<27>
M_A_DQ<28>
M_A_DQ<29>
M_A_DQ<30>
M_A_DQ<31>
M_A_DQ<40>
M_A_DQ<41>
M_A_DQ<42>
M_A_DQ<43>
M_A_DQ<44>
M_A_DQ<45>
M_A_DQ<46>
M_A_DQ<47>
M_A_DQ<50>
M_A_DQ<51>
M_A_DQ<55>
M_A_DQ<49>
M_A_DQ<52>
M_A_DQ<53>
M_A_DQ<54>
M_A_DQ<48>
M_A_DQ<0>
M_A_DQ<1>
M_A_DQ<2>
M_A_DQ<3>
M_A_DQ<4>
M_A_DQ<5>
M_A_DQ<6>
M_A_DQ<7>
M_A_DQ<20>
M_A_DQ<18>
M_A_DQ<17>
M_A_DQ<16>
M_A_DQ<21>
M_A_DQ<19>
M_A_DQ<22>
M_A_DQ<23>
M_A_DQ<32>
M_A_DQ<33>
M_A_DQ<35>
M_A_DQ<39>
M_A_DQ<36>
M_A_DQ<37>
M_A_DQ<38>
M_A_DQ<34>
M_A_DQ<63>
M_A_DQ<62>
M_A_DQ<60>
M_A_DQ<61>
M_A_DQ<58>
M_A_DQ<59>
M_A_DQ<57>
M_A_DQ<56>
C4102
C4103
21
21
1UF_6.3V_2
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
P0V75S
C4101
21
1UF_6.3V_2
1UF_6.3V_2
F F
E
D
C
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DDR3_SO-DIMM0
DOC.NUMBER
SIZE
DATE
21-OCT-2002
2 1
C
CODE
CS
1310xxxxx-0-0
SHEET
of
38 77
REV
X01
Page 39
8
7 6 5 4 3 2 1
31
M_B_A<15..0>
31
31
M_CLK_DDR2_DP
31
M_CLK_DDR2_DN
31
M_CLK_DDR3_DP
31
M_CLK_DDR3_DN
31
31
31
39
39
26 28
PCH_3S_SMCLK
PCH_3S_SMDATA
31
M_B_DQS1_DP
31
M_B_DQS3_DP
31
M_B_DQS5_DP
31
M_B_DQS7_DP
31
M_B_DQS0_DP
31
M_B_DQS2_DP
31
M_B_DQS4_DP
31
M_B_DQS6_DP
31
M_B_DQS1_DN
31
M_B_DQS3_DN
31
M_B_DQS5_DN
31
M_B_DQS7_DN
31
M_B_DQS0_DN
31
M_B_DQS2_DN
31
M_B_DQS4_DN
31
M_B_DQS6_DN
31
31
31
31
31
31
M_B_CAS#
M_B_RAS#
M_B_WE#
SA0_DIM1
SA1_DIM1
38
38
P0V75M_VREF
P1V5
2 1
E
R4132
1.8K_1%_2
P0V75S_DIMM1_VREF_DQ
R4134
2 1
0_5%_2_DY
2 1
38
R4131
1.8K_1%_2
58 50
D
M_B_BS0
M_B_BS1
M_B_BS2
M_CS#2
M_CS#3
M_CKE2
M_CKE3
26
M_ODT2
M_ODT3
BI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
P1V5
+
C4131
C
C4143
C4147
21
21
2.2UF_6.3V_3
330UF_2.5V_DY
C4136
C4141
C4140
21
21
10UF_6.3V_3
10UF_6.3V_3
C4135
21
21
0.1UF_16V_2
0.1UF_16V_2
C4142
C4133
C4134
21
21
10UF_6.3V_3
10UF_6.3V_3
C4132
C4139
21
21
0.1UF_16V_2
0.1UF_16V_2
21
10UF_6.3V_3
21
10UF_6.3V_3
C4130
21
2.2UF_6.3V_3
38
27
38
P3V3S
C4129
21
0.1UF_16V_2
P3V3S
PM_EXTTS#1_R
DDR3_DRAMRST#
R4200
10K_5%_2
OUT
OUT
2 1
P3V3S
P0V75S_DIMM1_VREF_DQ
B
NOTE:
SO-DIMMB SPD ADDRESS IS 0XA4
SO-DIMMB TS ADDRESS IS 0X34
R4126
10K_5%_2
21
IN
IN
R4125
10K_5%_2
21
SA1_DIM1
SA0_DIM1
39
39
C4145
C4144
21
21
2.2UF_6.3V_3
0.1UF_16V_2
P0V75S_DIMM0_VREF_CA
C4137
C4138
21
21
2.2UF_6.3V_3
0.1UF_16V_2
CN4125
98
DQ0
A0
97
DQ1
A1
96
DQ2
A2
95
DQ3
A3
92
DQ4
A4
91
DQ5
A5
90
DQ6
A6
86
DQ7
A7
89
DQ8
A8
85
DQ9
A9
107
DQ10
A10_AP
84
DQ11
A11
83
DQ12
A12
119
DQ13
A13
80
DQ14
A14
78
DQ15
A15
DQ16
109
DQ17
BA0
108
DQ18
BA1
79
DQ19
BA2
114
S0#
DQ20
121
S1#
DQ21
101
DQ22
CK0
103
DQ23
CK0#
102
DQ24
CK1
104
DQ25
CK1#
73
DQ26
CKE0
74
DQ27
CKE1
115
DQ28
CAS#
110
RAS#
DQ29
113
WE#
DQ30
197
SA0
DQ31
201
SA1
DQ32
202
SCL
DQ33
200
SDA
DQ34
DQ35
116
ODT0
DQ36
120
ODT1
DQ37
DQ38
11
DQ39
DM0
28
DQ40
DM1
46
DQ41
DM2
63
DQ42
DM3
136
DQ43
DM4
153
DQ44
DM5
170
DQ45
DM6
187
DQ46
DM7
DQ47
12
DQS0
DQ48
29
DQS1
DQ49
47
DQS2
DQ50
64
DQS3
DQ51
137
DQS4
DQ52
154
DQS5
DQ53
171
DQS6
DQ54
188
DQS7
DQ55
10
DQS#0
DQ56
27
DQS#1
DQ57
45
DQS#2
DQ58
62
DQS#3
DQ59
135
DQS#4
DQ60
152
DQS#5
DQ61
169
DQS#6
DQ62
186
DQS#7
DQ63
FOX_AS0A626_U4R6_7H_HP_204P
6026B0216701
CN4125
75
VSS16
VDD1
76
VSS17
VDD2
81
100
105
106
111
112
117
118
123
124
199
122
125
198
126
31
VSS18
VDD3
82
VSS19
VDD4
87
VSS20
VDD5
88
VSS21
VDD6
93
VSS22
VDD7
94
VSS23
VDD8
99
VSS24
VDD9
VSS25
VDD10
VSS26
VDD11
VSS27
VDD12
VSS28
VDD13
VSS29
VDD14
VSS30
VDD15
VSS31
VDD16
VSS32
VDD17
VSS33
VDD18
VSS34
VSS35
VDDSPD
VSS36
77
VSS37
NC1
VSS38
NC2
VSS39
NCTEST
VSS40
VSS41
EVENT#
30
VSS42
RESET#
VSS43
VSS44
1
VSS45
VREF_DQ
VSS46
VREF_CA
VSS47
VSS48
2
VSS49
VSS1
3
VSS50
VSS2
8
VSS51
VSS3
9
VSS52
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
FOX_AS0A626_U4R6_7H_HP_204P
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
203
VTT1
204
VTT2
G1
G1
G2
G2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
M_B_DQ<8>
M_B_DQ<14>
M_B_DQ<10>
M_B_DQ<11>
M_B_DQ<12>
M_B_DQ<9>
M_B_DQ<13>
M_B_DQ<15>
M_B_DQ<29>
M_B_DQ<28>
M_B_DQ<26>
M_B_DQ<27>
M_B_DQ<25>
M_B_DQ<24>
M_B_DQ<30>
M_B_DQ<31>
M_B_DQ<40>
M_B_DQ<41>
M_B_DQ<47>
M_B_DQ<43>
M_B_DQ<44>
M_B_DQ<45>
M_B_DQ<46>
M_B_DQ<42>
M_B_DQ<56>
M_B_DQ<57>
M_B_DQ<58>
M_B_DQ<59>
M_B_DQ<60>
M_B_DQ<61>
M_B_DQ<62>
M_B_DQ<63>
M_B_DQ<0>
M_B_DQ<1>
M_B_DQ<7>
M_B_DQ<3>
M_B_DQ<4>
M_B_DQ<5>
M_B_DQ<2>
M_B_DQ<6>
M_B_DQ<20>
M_B_DQ<21>
M_B_DQ<22>
M_B_DQ<23>
M_B_DQ<16>
M_B_DQ<17>
M_B_DQ<19>
M_B_DQ<18>
M_B_DQ<32>
M_B_DQ<33>
M_B_DQ<34>
M_B_DQ<35>
M_B_DQ<36>
M_B_DQ<37>
M_B_DQ<38>
M_B_DQ<39>
M_B_DQ<55>
M_B_DQ<51>
M_B_DQ<50>
M_B_DQ<53>
M_B_DQ<52>
M_B_DQ<49>
M_B_DQ<54>
M_B_DQ<48>
C4127
C4128
21
21
1UF_6.3V_2
1UF_6.3V_2
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
P0V75S
C4125
C4126
21
1UF_6.3V_2
21
1UF_6.3V_2
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
REFERENCE NUMBER:4100~4299
8
7 6 5 4 3
CHANGE by
DATE
XXX
21-OCT-2002
2 1
SIZE
C
DDR3_SO-DIMM0
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 77
F F
E
D
C
B
A
REV
X01
Page 40
8 7
6 5
4
3 2 1
D
D
C C
RESERVED
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DPB DEMUX1 TO DP
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 40
Page 41
8 7
6 5
4
3 2 1
D
D
C C
RESERVED
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DPC DEMUX2 TO VGA
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 41
Page 42
D
B
8 7
3393
PIN 2
R3062
C3069
C3070
R3065
PIN 5
PIN 8
PIN 11
C3073
PIN 14
R3064
C3074
PIN 15
PIN 16
PIN 17
L3066
PIN 27
C3087
PIN 35
C3068
PIN 36
R3077
PIN 37 R3074
PIN 38
10K_DY
PIN 39
PIN 40
8
6 5
4
3355
R3061
P1V5_VDD
C3091
C3085
21
21
1UF_6.3V_2
0.01UF_50V_2
2 1
2 1
2 1
2 1
40
VDDA33_AUX
LDOCAP_AUX
AUX_P
AUX_N
PRX
ML0_P
ML0_N
NC1
ML1_P
ML1_N
393837363534333231
S3
CLK_O
RST_N
12
11
U3065
1
3
4
5
6
7
8
9
C3073
21
R3071
21
100K_5%_2
2 1
2 1
2 1
OSC_OUT
0.1UF_16V_2
OSC_IN
S0S1S2
NC4
RED
OSC_IN
OSC_OUT
LDOCAP_DIG
VDDD33_CORE
DDC_SCL
TDI
TRSTn
TMS
TDO
TCK
VDDA33_DP
HPD
20219181716151413
1
1
TP30681TP3067
1UF_6.3V_2_DY
10K_5%_2
1
10K_5%_2
TP30
TP30
TP30661TP3065
C3074
21
0.1UF_16V_2_DY
2
X3065
27MHZ
4
C3067
21
0.1UF_16V_2
C3068
21
2.2UF_6.3V_3_DY
30
RSET
29
NC3
28
GRN
27
VDDA33_DAC
26
BLU
25
HSYNC
24
VSYNC
23
NC2
22
DDC_SDA
21
VDDD33_IO
GND
NXP_PTN3393BS_HVQFN_40P
41
TP3069
TP30
TP30
TP30
P3V3S_DVDD33
R3067
2 1
2 1
R3078
C3071
3
20PF_50V_2
1
C3072
20PF_50V_2
R3068
21
1.2K_1%_2
CRT_HSYNC_R
CRT_VSYNC_R
P3V3S_DVDD33
C3093
21
0.1UF_16V_2
2 1
C3065
21
L3067
C3075
C3076
2.2UF_6.3V_3_DY
P3V3S_DVDD33 P3V3S
C3066
21
1UF_6.3V_2
0.01UF_50V_2
P3V3S_AVDD33
2 1
C3089
C3088
21
1UF_6.3V_2
21
0.1UF_16V_2
21
0.1UF_16V_2
41C3
IN
41C3
IN
41B3
IN
41B3
IN
C3070
2 1
P3V3S_DVDD33
SWF2520CF_4R7K_M
21
0.01UF_50V_2
DPC_PORT_CLK_AUX_C1_DP
DPC_PORT_DATA_AUX_C1_DN
DPC0_PORT_DP
DPC0_PORT_DN
DPC1_PORT_DP
DPC1_PORT_DN
R3061
2 1
10K_5%_2
C3069
2 1
0.01UF_50V_2_DY
R3062
2 1
0_5%_2_DY
21
21
R3065
12K_5%_DY
R3063
2 1
0_5%_2
21
C3077
0.1UF_16V_2
P1V5_VDD
L3068
P3V3S_DVDD33
2 1
C3092
21
4.7UF_6.3V_3
41C3
IN
C3090
21
R3074
10K_5%_2_DY
R3075
0_5%_2
R3076
10K_5%_2
R3077
0_5%_2_DY
R3092
2 1
0_5%_2
10
DPC_PORT_HPD
R3063
C3077
C3061
C3062
L3065
BLM15BB470SS1
R3080
R3078
R3067
R3079
R3081
P3V3S_DVDD33
R3076
R3075
C3090
C3091
L3068
C3092
BLM15BB470SS1
R3092
41A1 42A6
41A1 42A6
DPC_PORT_CLK_AUX_DP
IN
DPC_PORT_DATA_AUX_DN
IN
P1V5_VDD
C3061
C3062
21
21
0.1UF_16V_2
0.01UF_50V_2
P3V3S_DVDD33
R3064
0_5%_2_DY
42C8
41A1
41A1 42C8
DPC_PORT_CLK_AUX_DP
IN
DPC_PORT_DATA_AUX_DN
IN
R3080
0_5%_2
R3079
0_5%_2
CHECK IF DEMUX NOT NEED R3079,R3080
7 6
5 4
3 2 1
R7500
CSC0402_DY
CSC0402_DY CSC0402_DY
0_5%_2
R7501
0_5%_2
2 1
C7548
21
2 1
C7549
21
CRT_R
C7571
21
2 1
CRT_G
2 1
C7572
21
P1V5_VDD
R3081
0_5%_2
2 1
R3090
R3091
CHANGE by
CRT_R
CRT_G
CRT_B
2 1
33_1%_2
2 1
33_1%_2
CRT_DDCDATA
CRT_DDCCLK
XXX
CRT_HSYNC
CRT_VSYNC
OUT
OUT
64C5
64C5
CRT_B
DATE
R7502
0_5%_2
C7573
21
64C5
OUT
64C5
OUT
21-OCT-2002
2 3
2 1
C7550
21
SIZE
A3
OUT
CRT_R_L
CSC0402_DY CSC0402_DY
FOR EMI
OUT
CRT_G_L
CSC0402_DY
OUT
CRT_B_L
P3V3S_DVDD33
L3066
21
BLM15BB470SS1_DY
C3087
21
0.1UF_16V_2_DY
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DP TO VGA CONVERTER
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
SHEET
of
77 42
1
REV
X01
D
C C
B
A A
Page 43
8 7
6 5
P5V0A
4
3 2 1
D
30
DDC_EN
IN
P5V0A
R3303
10K_5%_2
21
30
DP_EN
R3305
10K_5%_2
21
IN
Q3300
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
L2N7002DW1T1G
30
DPB0_PORT_DP
30
DPB0_PORT_DN
30
DPB1_PORT_DP
30
DPB1_PORT_DN
30
DPB2_PORT_DP
30
DPB2_PORT_DN
30
DPB3_PORT_DP
30
DPB3_PORT_DN
30
DPB_PORT_CLK_AUX_DP
30
DPB_PORT_DATA_AUX_DN
43
DPB_PORT_HPD
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
C3307
C3306
C3305
C3304
0.1UF_16V_2
2 1
0.1UF_16V_2
2 1
0.1UF_16V_2
2 1
0.1UF_16V_2
2 1
P3V3S_DP
2 1
2 1
2 1
2 1
C3300
C3301
C3302
C3303
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
DPB0_PORT_C_DP
DPB0_PORT_C_DN
DPB1_PORT_C_DP
DPB1_PORT_C_DN
DPB2_PORT_C_DP
DPB2_PORT_C_DN
DPB3_PORT_C_DP
DPB3_PORT_C_DN
P3V3S
59
64 57 24 28
51 31
26
16
SLP_S3#_3R
U3300
1
GND
2
VIN
3
IN
VIN
ROHM_BD82022FVJ_E2_MSOP_8P
VOUT
VOUT
VOUT
FLG# EN_EN#
8
7
6
5 4
R3304
1M_5%_2
21
R3302
21
5.1M_5%_2
CN3300
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
TAIWIN_DP004_206CRL_TW_20P
TMP121112006
G1
G1
G2
G2
G3
G3
G4
G4
D
C C
DGND_CHASSIS3
C3311
21
1UF_6.3V_2
B
IN
P5V0S
BSS138LT1
3
Q3301
DS
1
G
2
R3306
21
100K_5%_2_DY
C3308
C3310
21
21
10UF_6.3V_3
1UF_6.3V_2
DPB_PORT_HPD
DISPLAY PORT
B
43
REFERENCE NUMBER:3300~3399
8
7 6
DPD_HPD
30
IN
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CRT & DP
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 43
1
REV
X01
A A
Page 44
8 7
P3V3S P3V3S_LCDVDD
R3001
100_5%_2
U3000
43
D
C3006
21
DIS EN
NUVO_NCT3521U_SOT23_5P
1UF_6.3V_2
B
6 5
2 1
OUT IN
GND
1 5
2
C3003
4.7UF_6.3V_3
21
IN
R3003
100K_5%_2
21
LVDS_VDD_EN
30
CHECK IF TOUCH PANEL NEED OTHER POWER RAIL
TOUCH PANEL
2
D3000
NC
R3009
2K_5%_2
1 3
2 1
62
51
30
LID_SW#_3
L_BKLT_EN
IN
BAT54_30V_0.2A
IN
BKLT_EN
4
32
32
30
30
30
30
30
30
P3V3S
USB_P5_DN
USB_P5_DP
EDP_TX1_DN
EDP_TX1_DP
EDP_TX0_DN
EDP_TX0_DP
EDP_AUX_DP
EDP_AUX_DN
P5V0S
R3008
21
100K_5%_2
C2255
21
0.1UF_16V_2
C2251
C2250
21
21
4.7UF_6.3V_3
3 2 1
IN
IN
IN
IN
IN
IN
IN
IN
L7501
WCM_2012_900T
C3014
21
C3013
21
C3012
21
C3011
21
C3010
21
C3009
21
3 4
2 1
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
USB_P5_DN_L
USB_P5_DP_L
EDP_TX1_C_DN
EDP_TX1_C_DP
EDP_TX0_C_DN
EDP_TX0_C_DP
EDP_AUX_C_DP
EDP_AUX_C_DN
P3V3S_LCDVDD
32
USB_P6_DP
32
USB_P6_DN
C2256
21
1UF_6.3V_2
0.1UF_16V_2
30
59
59
INV_PWM
DMIC_CLK
DMIC_DAT
TOUCH_RST#
30
30
CAMERA_ON
BI
BI
EDP_HPD#
IN
OUT
OUT
IN
IN
L7500
WCM_2012_900T
OUT
0_5%_2_DY
USB_P6_DP_L
3 4
USB_P6_DN_L
2 1
PVBAT
R3023
2 1
ACES_50203_0400T_001_40P
6012B0431203
CN3000
G1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
G
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
G2
G
D
C C
B
R3021
21
100K_5%_2
25~34 WEBCAM
35~36 LOGO LIGHT
A A
INVENTEC
REFERENCE NUMBER:3000~3049
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
TITLE
MODEL,PROJECT,FUNCTION
CODE
SIZE
CS
A3
LCM & WEBCAM
DOC.NUMBER
1310xxxxx-0-0
SHEET
REV
of
X01
77 44
1
Page 45
8 7
6 5
4
3 2 1
P1V5S
CN1700
R1702
R1701
R1703
C1710
2 1
1UF_6.3V_2
D
SATA_RX0_C_DP
SATA_RX0_C_DN
SATA_TX0_C_DN
SATA_TX0_C_DP
OUT
IN
IN
C1706
C1707
C1708
C1709
0.01UF_50V_2
2 1
0.01UF_50V_2
2 1
0.01UF_50V_2
2 1
0.01UF_50V_2
2 1
SATA_RX0_DP
SATA_RX0_DN
SATA_TX0_DN
SATA_TX0_DP
5
4
3
GND
2
1
21
21
21
0_5%_2_DY
4.7K_5%_2_DY
4.7K_5%_2_DY
10
9
6
7178
U1700
PARADE_PS8520ATQFN20GTR_TQFN_20P
VDD_15
I2C_EN#
B_OUTP
B_INP
B_PRE-I2C_ADDR0
A_PRE-I2C_ADDR1
B_OUTN
B_INN
GND
A_OUTN
A_INN
A_OUTP
A_INP
0_5%_2_DY
11
12
13
14
15
C1712
C1711
21
21
0.01UF_50V_2
R1704
2 1
OUT OUT
OUT
0.01UF_50V_2
C1714
C1713
21
0.01UF_50V_2
SATA_C_RXP0_O
SATA_C_RXN0_O
SATA_C_TXN0_O
IN
SATA_C_TXP0_O
IN
21
0.01UF_50V_2
45
45
45
45
45
SATA_C_TXP0_O
45
SATA_C_TXN0_O
45
SATA_C_RXN0_O
45
SATA_C_RXP0_O
29
DEVSLP0
OUT
OUT
OUT
IN
IN
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
C1705
21
C1704
21
21
C1702
21
C1703
SATA_TXP0_O
SATA_TXN0_O
SATA_RXN0_O
SATA_RXP0_O
1.3A
P5V0S
C1701
21
4.7UF_6.3V_3
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V3.3
9
V3.3
10
V3.3
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
RESERVED
19
GND
20
V12
21
V12
22
V12
ALLTOP_C166CS_12201_L_22P
G1
G
G2
G
D
6012B0323101
REFERENCE NUMBER:1700~1749
B
33
SATA_RX1_C_DP
33
SATA_RX1_C_DN
33
SATA_TX1_C_DN
33
SATA_TX1_C_DP
REFERENCE NUMBER:1950~1999
8
7 6
OUT
OUT
IN
IN
C1950
C1951
C1952
C1953
4.3K_1%_2
33
EPADENB_PRE1-SDA_CTL
21
R1709
2 1
2 1
0.01UF_50V_2
2 1
0.01UF_50V_2
2 1
0.01UF_50V_2
2 1
0.01UF_50V_2
MSATA_DET#
REXT
20
TEST
A_PRE1-SCL_CTL
19
18
VDD_15
16
4.7K_5%_2_DY
4.7K_5%_2_DY
4.7K_5%_2_DY
R1708
4.7K_5%_2_DY
OUT
R1705
R1706
R1707
P1V5S
2 1
2 1
2 1
2 1
SATA_RX1_DP
SATA_RX1_DN
SATA_TX1_DN
SATA_TX1_DP
R1953
1
0_5%_2_DY
R1951
0_5%_2_DY
CN1951
1
GND1
3 2
GND2 3.3VAUX1
5 4
PERn3 3.3VAUX2
7
PERp3 NC1
9 8
GND3 NC2
11 10
PETp3 DAS/DSS#
13 12
PETn3 3.3VAUX3
15 14
GND4 3.3VAUX4
17 16
PERn2 3.3VAUX5
19 18
PERp2 3.3VAUX6
21 20
GND5 NC3
23 22
PETp2 NC4
25
PETn2
27
GND6
29
PERn1
31
PERp1
33
GND7 NC9
35
PETn1 NC10
37 36
PETp1 NC11
39 38
GND8 DEVSLP
41
PERn0/SATA-B+ NC12
43
PERp0/SATA-B- NC13
45 44
GND9 NC14
47 46
PETn0/SATA-A- NC15
49 48
PETp0/SATA-A+ NC16
51
GND10 PERST#/NC
53 52
REFCLKN CLKREQ#/NC
55
REFCLKP PEWake#/NC
57
GND11 NC17
2
69
71
73
75
GND14
67
1
R1952
0_5%_2_DY
2 21
G1
5 4
SLOT C_KEY M
GND16
GND15
LOTES_APCI0020_P001A01_75P
G2
M TYPE
6026B0240301
NGFF SSD
SATA HDD CONNECTOR
C C
P3V3S
6
1
C1956
2
24
NC5
26
NC6
28
NC7
30
NC8
32
34
40
42
4.7UF_6.3V_3
B
DEVSLP1
29
IN
50
54
56
58
NC18
KEY KEY
KEY KEY
KEY KEY
KEY KEY
TP1951
SUSCLK NC19
3.3VAUX7 PEDET
3.3VAUX8 GND12
3.3VAUX9 GND13
68
70
72
74
1
TP30
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
SATA HDD & M-SATA CONN.
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
1
REV
X01
77 45
Page 46
D
R2581
B
8 7
21
10K_5%_2_DY
1
2
3
4
ATMEL_AT24C08BN_SOIC_8P_DY
P1V2A
(885.6MA)
C2558
C2557
21
21
0.1UF_16V_2
0.1UF_16V_2
8
C2590
21
U2551
8
VCC
A0
7
WP
A1
6
SCL
A2
5
SDA
GND
C2559
C2560
21
21
0.1UF_16V_2
0.1UF_16V_2
P3V3A
R2570
21
21
10K_5%_2
0.1UF_16V_2_DY
C2562
C2561
21
C2563
21
0.1UF_16V_2
0.1UF_16V_2
32
USB_P2_DN
32
USB_P2_DP
32
USB30_RX2_DN
32
USB30_RX2_DP
32
USB30_TX2_DN
32
USB30_TX2_DP
13
1V2A_PG
R2580
10K_5%_2_DY
P1V2A
C2551
21
4.7UF_6.3V_3
C2564
21
21
0.1UF_16V_2
0.1UF_16V_2
7 6
6 5
P3V3A
0.01UF_50V_2
IN
IN
0.1UF_16V_2
0.1UF_16V_2
C2567
2 1
IN
IN
OUT
OUT
0.1UF_16V_2
C2569
R2557
0_5%_2_DY
R2558
10K_5%_2
C2568
2 1
2 1
C2570
0.1UF_16V_2
2 1
2 1
P3V3A
2 1
R2550
IN
R2571
0_5%_2
100K_5%_2
2 1
C2565
21
C2566
P3V3A
0_5%_2_DY
R2590
0_5%_2_DY
R2575
R2573
0_5%_2_DY
R2572
0_5%_2_DY
21
10PF_50V_2
21
10PF_50V_2
2 1
2 1
2 1
2 1
C2550
3
2
X2500
4
1
R2591
10K_5%_2_DY
P3V3A
L2550
2 1
SWF2520CF_4R7K_M
P3VA_D_L
C2554
C2553
21
21
0.1UF_16V_2
P3V3A
+
C2571
21
100UF_6.3V_DY
10K_5%_2
R2560
2 1
C2578
2 1
USB30_RX2_C_DN
USB30_RX2_C_DP
USB30_TX2_C_DN
2 1
USB30_TX2_C_DP
R2559
2 1
10K_5%_2
R2556
2 1
0_5%_2_DY
2 1
R2553
R2554
12K_1%_2
0.1UF_16V_2_DY
HUB_XTAL_IN
HUB_XTAL_OUT
P3V3A
10K_5%_2
21
48
54
53
56
55
59
58
37
38
50
64
49
60
R2555
10K_5%_2
21
62
61
25MHZ_10PF
2 1
(89.5MA)
C2556
C2555
21
21
0.1UF_16V_2
0.1UF_16V_2
40
41
42
39
5
8
13
21
28
31
51
57
16
34
52
63
65
C2552
21
0.1UF_16V_2
4.7UF_6.3V_3
5 4
4
U2550
GPIO2(VBUS)
Upstream
USB2UP_DM
USB2UP_DP
USB3UP_TXDM
USB3UP_TXDP
USB3UP_RXDM
USB3UP_RXDP
GPIO12/SM_DAT
GPIO13/SM_CLK
Reset
RESET#
Bias/Test
RBIAS
TEST
ATEST
Clock
XTALI/CLK_IN
XTALO
SPI_CLK/GPIO4
SPI_DO/GPIO5
SPI_DI
SPI_CE_N
Power
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD33
VDD33
VDD33
VDD33
GND(FLAG)
SMSC_USB5534B_4100JZX_TR_QFN_64P
Downstream
Port Power Control
OCS / JTAG / UART
USB2DN_DM1
USB2DN_DP1
USB3DN_RXDM1
USB3DN_RXDP1
USB3DN_TXDM1
USB3DN_TXDP1
USB2DN_DM2
USB2DN_DP2
USB3DN_RXDM2
USB3DN_RXDP2
USB3DN_TXDM2
USB3DN_TXDP2
USB2DN_DM3
USB2DN_DP3
USB3DN_RXDM3
USB3DN_RXDP3
USB3DN_TXDM3
USB3DN_TXDP3
USB2DN_DM4
USB2DN_DP4
USB3DN_RXDM4
USB3DN_RXDP4
USB3DN_TXDM4
USB3DN_TXDP4
PRT_CTL1/GPIO8
PRT_CTL2/GPIO9
PRT_CTL3/GPIO10
PRT_CTL4/GPIO11
TCK/GP IO1
TMS/GP IO3
TDI/GPI O6
TDO/GP IO7
TRST/GP IO0
2
1
7
6
4
3
10
9
15
14
12
11
18
17
23
22
20
19
25
24
30
29
27
26
36
35
33
32
46
47
44
43
45
C2569 RESEVE FOR THAT IF USB3.0 SSC FAIL
CHANGE by
3 2 1
OUT
USB_D_P1_DN
OUT
USB_D_P1_DP
OUT
USB30_D_RX1_DN
OUT
USB30_D_RX1_DP
OUT
USB30_D_TX1_DN
OUT
USB30_D_TX1_DP
OUT
USB_D_P2_DN
OUT
USB_D_P2_DP
OUT
USB30_D_RX2_DN
OUT
USB30_D_RX2_DP
OUT
USB30_D_TX2_DN
OUT
USB30_D_TX2_DP
OUT
USB_D_P3_DN
OUT
USB_D_P3_DP
OUT
USB30_D_RX3_DN
OUT
USB30_D_RX3_DP
OUT
USB30_D_TX3_DN
OUT
USB30_D_TX3_DP
OUT
USB_D_P4_DN
OUT
USB_D_P4_DP
OUT
USB30_D_RX4_DN
OUT
USB30_D_RX4_DP
OUT
USB30_D_TX4_DN
OUT
USB30_D_TX4_DP
56
WWAN(USB2)
56
55
BT(USB2)
55
47
47
47
47
47
47
47
47
47
47
47
47
USB UP3
USB UP4
P3V3A
PRTPWR1
OUT
PRTPWR2
OUT
PRTPWR3
OUT
PRTPWR4
OUT
1
1
1
TP2552
TP2550
TP2551
TP30
TP30
TP30
1
TP25531TP2554
TP30
10K_5%_2
TP30
47
47
R2574
R2561
21
2 1
C2580
21
R2563
R2562
10K_5%_2
10K_5%_2
21
C2582
C2581
21
0.1UF_16V_2_DY
0.1UF_16V_2_DY
R2564
10K_5%_2
10K_5%_2
21
21
IN
IN
IN
IN
C2583
21
21
0.1UF_16V_2_DY
0.1UF_16V_2_DY
REF
2550~2599
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
USB3.0 HUB
DOC.NUMBER
CODE
XXX
DATE
21-OCT-2002
2 3
SIZE
1310xxxxx-0-0
CS
A3
SHEET
OCS_N1
OCS_N2
OCS_N3
OCS_N4
of
1
D
C C
B
47
47
A A
REV
X01
77 46
Page 47
8 7
6 5
4
3 2 1
P5V0A_USB1
D
P5V0A_USB1
1.8A
D
PRTPWR3
P5V0A
U2400
1
2
IN
46
C2405
C2404
21
21
1UF_6.3V_2
22UF_6.3V_5_DY
3
ROHM_BD82022FVJ_E2_MSOP_8P
8
VOUT
GND
7
VOUT
VIN
6
VOUT
VIN
5 4
FLG# EN_EN#
OUT
OCS_N3
C2403
21
46
22UF_6.3V_5
46
46
46
46
46
46
USB_D_P3_DN
USB_D_P3_DP
USB30_D_RX3_DN
USB30_D_RX3_DP
USB30_D_TX3_DN
USB30_D_TX3_DP
OUT
OUT
IN
IN
BI
BI
WCM_2012_900T
0.1UF_16V_2
C2401
C2402
0.1UF_16V_2
L2400
C2400
21
0.1UF_16V_2
3 4
USB_D_P3_L_DN
2 1
USB_D_P3_L_DP
USB30_D_TX3_C_DN
2 1
USB30_D_TX3_C_DP
2 1
CN2400
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9G
SINGA_2UB4006_180101F_9P
TMP121023001
G1
G
G2
G
G3
G
G4
C C
USB WALK UP1
DGND_CHASSIS2
P5V0A_USB3
P5V0A_USB3
P5V0A
U2420
1
GND
B
PRTPWR4
IN
46
C2424
C2425
21
21
1UF_6.3V_2
22UF_6.3V_5_DY
2
VIN
3
VIN
ROHM_BD82022FVJ_E2_MSOP_8P
VOUT
VOUT
VOUT
8
7
6
5 4
FLG# EN_EN#
OUT
OCS_N4
46
C2423
21
22UF_6.3V_5
USB_D_P4_DN
USB_D_P4_DP
USB30_D_RX4_DN
USB30_D_RX4_DP
USB30_D_TX4_DN
USB30_D_TX4_DP
OUT
OUT
IN
IN
BI
BI
L2420
WCM_2012_900T
0.1UF_16V_2
C2421
C2422
0.1UF_16V_2
1.8A
C2420
3 4
USB_D_P4_L_DN
2 1
USB_D_P4_L_DP
2 1
USB30_D_TX4_C_DN
2 1
USB30_D_TX4_C_DP
21
0.1UF_16V_2
USB WALK UP3
CN2420
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9G
SINGA_2UB4006_180101F_9P
G1
G
G2
G
G3
G
G4
TMP121023001
B
DGND_CHASSIS2
DGND_CHASSIS3
A A
REFERENCE NUMBER:2400~2499
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
USB & USB CHARGER
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 47
1
REV
X01
Page 48
D
B
TPS2540/A
PI5USB2543
USB_P3_DN_DB
USB_P3_DP_DB
S3051
SCREW300_600_1P
1
DGND_USB
DGND_USB
64
CRT_R_DB
64
CRT_G_DB
64
CRT_B_DB
SLP_S3#_3R_DB
8 7
TPS2543
R2511
20K
NI
P5V0DS_DB
R2515 R2514
10K
NI
P5V0DS_DB
2 1
R2515
C2513
10K_5%_2
R2514
DGND_USB
2 1
P5V0DS_DB
BI
0_5%_2_DY
DGND_USB
S3052
SCREW280_0_0_1P
1
S3050
SCREW300_600_1P
1
DGND_USB
S3053
SCREW280_0_0_1P
1
DGND_USB
IN
IN
IN
R3053
R3052
R3051
75_1%_2
75_1%_2
21
DGND_USB DGND_USB
21
21
DGND_USB
P5V0DS_DB
IN
48
64
C3357
21
DGND_USB
8
NI
0
DGND_USB
21
0.1UF_16V_2
C2514
21
DGND_USB
75_1%_2
U2511
1
2
3
4
0.1UF_16V_2
USB_P3_CH_DN_DB
USB_P3_CH_DP_DB
USB30_RX3_DN_DB
USB30_RX3_DP_DB
USB30_TX3_DN_DB
USB30_TX3_DP_DB
DGND_USB
1716151413
IN
DM_OUT
DP_OUT
ILIM_SET
C3051
21
21
R2511
20K_5%_2
DGND_USB DGND_USB
GND
PWPD
ILIM_HI
FAULT#
ILIM_LO
OUT
DM_IN
DP_IN
STATUS#
CTL3
CTL2
CTL1
EN
876
5
OUT
OUT
IN
IN
C3053
C3052
21
21
12PF_50V_2
12PF_50V_2
DGND_USB
BI
BI
DGND_USB
P5V0S_CRTVDD
U3051
1
GND
2
VIN
3
VIN
ROHM_BD82022FVJ_E2_MSOP_8P
DGND_USB
1UF_6.3V_2
VOUT
VOUT
VOUT
8
7
6
5 4
FLG# EN_EN#
7 6
6 5
17.8K_1%_2
R2512
2 1
P5V0A_USB_CHARGE
C2512
2.5A
+
100UF_6.3V
12
11
10
9
TEXAS_TPS2546RTER_QFN_16P
IN
IN
IN
L2500
34
21
WCM_2012_900T
0.1UF_16V_2
C2500
C2501
0.1UF_16V_2
L3051
2 1
L3052
2 1
L3053
2 1
REFERENCE NUMBER:2500~2599
2 1
DGND_USB
BI BI
USB_P3_CH_DN_DB
BI
USB_P3_CH_DP_DB
CPPWR_EN_DB
SLP_S4#_3R_DB
SLP_S3#_3R_DB
USB_P3_L_DN_DB
USB_P3_L_DP_DB
2 1
USB30_TX3_C_DN_DB
2 1
USB30_TX3_C_DP_DB
120NH,5%
120NH,5%
120NH,5%
12PF_50V_2
DGND_USB
C3058
0.1UF_16V_2
21
DGND_USB
SLP_S4#_3R_DB
48
64
64
P5V0A_USB_CHARGE
64
C2503
21
0.1UF_16V_2
DGND_USB
SINGA_2UB4006_180101F_9P
USB CHARGER
DGND_USB
VGA_R_L2_DB
VGA_G_L2_DB
VGA_B_L2_DB
C3056
C3055
C3054
21
FIX2400
FIX_MASK
1
FIX2402
FIX_MASK
1
21
21
12PF_50V_2
12PF_50V_2
DGND_USB
12PF_50V_2
DGND_USB
FIX2401
FIX_MASK
1
FIX2403
FIX_MASK
1
5 4
IN
CN2500
1
1
2
2
3
3
4
4
5
5
6
7
8
9
G
6
G
7
G
8
9G
TMP121023001
CRT_DDCDATA_DB
CRT_HSYNC_DB
CRT_VSYNC_DB
CRT_DDCCLK_DB
REFERENCE NUMBER:3050~3099
4
P5V0DS_DB
C2414
C2415
21
22UF_6.3V_5_DY
DGND_USB
64
64
64
64
G1
G2
G3
G4
DGND_USB
BI
BI
BI
BI
1
2
3
21
1UF_6.3V_2
DGND_USB
USB_P1_DN_DB
64
USB_P1_DP_DB
64
USB30_RX1_DN_DB
USB30_RX1_DP_DB
USB30_TX1_DN_DB
USB30_TX1_DP_DB
R3059
21
R3060
21
3 2 1
P5V0A_USB2
U2410
GND
VIN
VIN
ROHM_BD82022FVJ_E2_MSOP_8P
VOUT
VOUT
VOUT
8
7
6
5 4
FLG# EN_EN#
BI
BI
OUT
OUT
C2411
IN
C2412
IN
P5V0S_CRTVDD
4.7K_5%_2
4.7K_5%_2
CHANGE by
XXX
C2413
21
22UF_6.3V_5
DGND_USB
P5V0A_USB2
1.8A
C2410
L2410
WCM_2012_900T
0.1UF_16V_2
0.1UF_16V_2
DGND_USB
USB_P1_L_DN_DB
2 1
USB_P1_L_DP_DB
3 4
2 1
USB30_TX1_C_DN_DB
2 1
USB30_TX1_C_DP_DB
P5V0S_CRTVDD
CRT
DATE
21
0.1UF_16V_2
DGND_USB
SUYIN_M195001HR015M205ZR_15P
DGND_USB
21-OCT-2002
2 3
CN2410
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9G
SINGA_2UB4006_180101F_9P
TMP121023001
G1
G
G2
G
G3
G
G4
CN3050
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
13
14
15
G1
G
12
G2
G
13
14
15
6012B0503901
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
USB CONN.
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
DGND_USB
DGND_USB
77 48
1
REV
X01
D
C C
B
A A
Page 49
8 7
6 5
P3V3A P3V3DS
2 1
R2210
0_5%_2
R2211
2 1
0_5%_2_DY
VCC_FPR
4
3 2 1
D
C2201
2 1
21
4.7UF_6.3V_3
C2200
21
0.1UF_16V_2
D
R2201
10K_5%_2
CN2200
28
29
32
32
FPR_OFF
FPR_LOCK#
USB_P4_DP
USB_P4_DN
IN
IN
BI
BI
D2201
2
3
1
PHP_PESD5V2S2UT_SOT23_3P_DY
R2200
21
1
2
3
4
5
6
ACES_51571_0064N_001_6P
10K_5%_2
6012B0481801
1
2
3
4
6
G1
G1 5
G2
G2
C C
FINGER PRINT CONN
P3V3S P3V3M P3V3DS
REFERENCE:2200~2249
B
NFC_HI_SEL
IN
P3V3S
R4350
21
10K_5%_2_DY 10K_5%_2_DY
NFC_RST#
IN
29
NFC_3S_SMDATA
BI
28
NFC_3S_SMCLK
IN
28
NFC_INT
IN
29
OUT
IN
OUT
NFC_SWP
NFC_RX
NFC_TX
49
51
51
R4354
R4353
21
21
0_5%_2_DY
R4351
21
R4355
21
0_5%_2_DY
0_5%_2_DY
CN4350
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
10
10
11
11
12
12
ACES_50501_01241_001_12P_DY
6012B0104502
0.5PITCH BOTTON CONTACT
NFC CONN
G1 9
G 9
G2
G
B
R4350
NFC_HI_SEL
HIGH (UART)
LOW (I2C)
INSTALL
R4351
INSTALL
REFERENCE:4350~4399
8
7 6
R4352
56
UIM_VPP
0_5%_2_DY
2 1
NFC_SWP
49
IN OUT
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
FINGER PRINTER & NFC
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
SIZE
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
1
REV
X01
77 49
Page 50
8 7
6 5
4
3 2 1
D
D
P3V3S
C1001
C1000
21
21
10UF_6.3V_3
14
16
15
U1000
13
RES
12
GND
IN
ACCEL_INT#
30
11
INT1
10
RES
9
INT2
P3V3S
R1001
B
0_5%_2_DY
VDD_IO
RES
RES
VDD
NC1
NC1
SCL_SPC
GND
CS
SDO_SA0
SDA_SDI_SDO
ST_HP3DC2TR_LGA_16P
8
7
6
2 1
R1000
21
0_5%_2_DY
1
2
3
PCH_3S_SMCLK_R
4
5
PCH_3S_SMDATA_R
0.1UF_16V_2
50
BI
50
BI
C C
B
ACCELEMETOR
REFERENCE NUMER : 1000~1099
8
7 6
50
50
PCH_3S_SMCLK_R
BI
PCH_3S_SMDATA_R
BI
5 4
R1002
0_5%_2
R1003
0_5%_2_DY
R1004
0_5%_2
R1005
0_5%_2_DY
2 1
PCH_3S_SMCLK
2 1
THERM_CLK_GPU
2 1
PCH_3S_SMDATA
2 1
THERM_DATA_GPU
CHANGE by
XXX
26 28 38 39 58
BI
68
BI
26 28 38 39 58
BI
68
BI
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
ACCELEMETOR
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 50
1
REV
X01
A A
Page 51
8
REFERENCE NUMER : 300~399
P3V3DS
E
D
29
51
53
51
51
285151
67
28
51
51
28
51
28
49
4
32
1
TP365
1
TP367
TP24
1
SPI_CS0#_FLH
SPI_SO_FLH
SPI_WP#
ļ¼
PVT_CS#
PVT_MISO
ļ¼
49
51
TP24
R367
6019B0988701
6019B0988601
INSTAL L C317 ,C318,X 300 FO R 1322 B VERSIO N TEST
C
B
51
51
A
C318
21
12PF_50V_2
X300
32.768KHZ
C317
21
12PF_50V_2
28
IN
28
28
IN
SPI BIOS
SOCKET : 6026B0150101
16M (128M) 8P
51
IN
51
OUT
2MB ROM FOR KBC
SOCKET : 6026B0150101
2M (16M) 8P
8
TP366
33_5%_2
R390
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
IN
IN
TP24
1
21
64
PCI_3S_SERIRQ
PVT_SCLK
PVT_MOSI
SPI_CLK_FLH
SPI_SO_FLH
SPI_SI_FLH
SPI_CS0#_FLH
NFC_RX
NFC_TX
KBC_XTAL2
SUSCLK32_KBC
SUSCLK32_PCH
KBC_XTAL1
21
R331
100K_5%_2_DY
SPI_SO_FLH_R
21
33_5%_2
7 6 5 4 3 2 1
P3V3AL_KBC
PAD300
2 1
12
POWERPAD_2_0610
R371
JTAG_RST#
51
OUT
OUT
51
OUT
51
OUT
51
OUT
59 57
P3V3DS
31
43
21
R333
R362
21
R396
R366
21
R365
21
R350
21
R348
21
R357
21
R380
21
R382
21
R358
43
R377
2 1
12
10K_5%_2
P3V3A
21
R369
CN365
3.3K_5%_2
1
CE#
2
SO
3
WP#
4
VSS
ACES_91960_0084L_8P
TP368
R370
0_5%_2_DY
1
21
P3V3DS
2 1
R355
R344
3.3K_5%_2
100K_5%_2
21
PVT_MISO_R
R345
21
WINBOND_W25Q16DVSSIQ_SOP_8P
0_5%_2_DY
7 6 5 4 3
P3V3AL_KBC
10MA
C303
C131
C314
C315
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
21
21
21
21
21
100K_5%_2
1
1
1
TP30
TP30
TP30
TP30
TP30
TP3431TP342
TP3401TP344
TP341
16
26 24
52
51
26
28
62
52
52
52
52
52
52
52
52
51
51
51
58
58
51
51
58
58
51
53
28
51 16
53
51
28
53
51
28
53
28
51
53
28
51
29
34
67
28
51
6
28
24
29
51
51
51
0_5%_2_DY
0_5%_2_DY
0_5%_2
0_5%_2_DY
SUSCLK32_KBC
TP371
21
TP369
1
R368
1
3.3K_5%_2
8
7
SPI_HOLD#_DB
6
SPI_CLK_FLH
5
C366
21
0.1UF_16V_2
TP24
28
33_5%_2
21
33_5%_2
33_5%_2
21
33_5%_2
33_5%_2
0_5%_2_DY
0_5%_2_DY
X301
VDD OUT
OE GND
32.768KHZ
TP24
VDD
HOLD#
SCK
SI
P3V3DS
C316
U366
1
2
3
8
VCC
CS#
7
DO(IO1)
HOLD#(IO3)
6
WP#(IO2)
CLK
5 4
GND
DI(IO0)
TP332
SCAN_3S_OUT(0)
SCAN_3S_OUT(1)
SCAN_3S_OUT(2)
SCAN_3S_OUT(3)
SCAN_3S_OUT(4)
OUT
SCAN_3S_OUT(5)
OUT
SCAN_3S_OUT(6)
OUT
SCAN_3S_OUT(7)
OUT
SCAN_3S_OUT(8)
OUT
SCAN_3S_OUT(9)
OUT
SCAN_3S_OUT(10)
OUT
SCAN_3S_OUT(11)
OUT
SLP_S3#_3R
IN
NUM_LOCK_LED#
OUT
PWR_BTN_OUT#
OUT
SCAN_3S_OUT(17)
OUT
SCAN_3S_IN(0)
IN
SCAN_3S_IN(1)
IN
SCAN_3S_IN(2)
IN
SCAN_3S_IN(3)
IN
SCAN_3S_IN(4)
IN
SCAN_3S_IN(5)
IN
SCAN_3S_IN(6)
IN
SCAN_3S_IN(7)
IN
EMCLK
BI
EMDAT
BI
SP_CLK
BI
SP_DATA
BI
IM_5S_CLK
BI
IM_5S_DATA
BI
TP301
TP302
LPC_3S_AD(0)
BI
LPC_3S_AD(1)
BI
LPC_3S_AD(2)
BI
LPC_3S_AD(3)
BI
LPC_3S_FRAME#
IN
LPC_RESET#
IN
CLK_R3S_KBPCI
IN
PCI_3S_CLKRUN#
IN
FET_A
OUT
M_PWROK
IN
RUNSCI_EC#
OUT
PVT_MISO
IN
PVT_CS#
OUT
PLT_DET
IN
SPI_CLK_FLH_KR
SPI_SI_FLH_KR
KBC_GPIO9
KBC_GPIO8
KBC_DS3_EN
OUT
OUT
TP370
TP24
TP372
1
TP24
TP24
1
SPI_SI_FLH
P3V3DS
2 1
21
R346
0.1UF_16V_2
3.3K_5%_2
PVT_SCLK
PVT_MOSI
TP24
P3V3_RTC
C308
C310
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
21
21
C312
1
1
TP24
1
TP24
51
28
IN OUT
28
51
IN
IN
IN
IN
67
28
51
51
51
C311
21
21
1UF_6.3V_2
0.1UF_16V_2
U300
49
JTAG_nRST
21
KSO00/GPIO000/JTAG_TCK
20
KSO01/GPIO100/JTAG_TMS
19
KSO02/GPIO101/JTAG_TDI
18
KSO03/GPIO102/JTAG_TDO
17
KSO04/GPIO103/TFDP_DATA/XNOR
16
KSO05/GPIO104/TFDP_CLK
13
KSO06/GPIO001
12
KSO07/GPIO002
10
KSO08/GPIO003
9
KSO09/GPIO106
8
KSO10/GPIO004
7
KSO11/GPIO107
6
KSO12/GPIO005
5
KSO13/GPIO006
81
GPIO007/ KSO14
83
GPIO010/ KSO15
4
GPIO011/ KSO16
108
GPIO012/ KSO17
29
KSI0/GPIO125/TRACEDATA3
28
KSI1/GPIO126/TRACEDATA2
27
KSI2/GPIO144/TRACEDATA1
26
KSI3/GPIO032/TRACEDATA0
25
KSI4/GPIO142/TRACECLK
24
KSI5/GPIO040
23
KSI6/GPIO042
22
KSI7/GPIO043
66
PS2_CLK0/GPIO046
67
PS2_DAT0/GPIO047
61
PS2_CLK1/GPIO050
62
PS2_DAT1/GPIO065
35
PS2_CLK2/GPIO051
32
PS2_DAT2/GPIO052
103
GPIO053/ PS2_ CLK3
105
46
LAD0/GPIO112
48
LAD1/GPIO114
50
LAD2/GPIO113
51
LAD3/GPIO111
52
nLFRAME/GPIO120
53
nLRESET/GPIO116
54
PCI_CLK/GPIO117
55
nCLKRUN/GPIO014
57
SER_IRQ/GPIO115
123
GPIO044/ nSMI
122
GPIO135/ KBRST
76
nEC_SCI/GPIO026
2
GPIO153/ PVT_S CLK
94
GPIO164/ PVT_MI SO
127
GPIO054/ PVT_MOS I
96
GPIO146/ PVT_n CS0
102
GPIO045/ A20M/ PVT_ nCS1
3
GPIO122/ SHD_S CLK
95
GPIO124/ SHD_MI SO
128
GPIO064/ SHD_MOS I
97
GPIO150/ SHD_n CS0
87
GPIO165/ TXD/ SHD_n CS1
86
GPIO162/ RXD
75
32KHZ_OUT/GPIO013
69
XTAL2
71
XTAL1
VBAT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
473656
82
11
117
104
8051_TX_LED_PWRSTBY#
51
IN
8051_RX_CAPS_LED#
51
IN
ONLY FOR DEBUG
REMOVE WITH SPI SCOKET
62 57 26
IN
8458371468
VCC1
VCC1
VCC1
VSS_VBAT
70
45
AGND_KBC
ON_OFF#
P3V3DS
119
106
40
VCC1
VCC1
VCC1
AVCC
CAP
AVSS
SMSC_MEC1322_NU_VTQFP_128P
15
2 1
12
PAD310
POWERPAD1X1M
R100
47_5%_2
2 1
C313
0.1UF_16V_2
I2C0_CLK0/GPIO015
I2C0_DAT0/GPIO016
I2C0_CLK1/GPIO134
I2C0_DAT1/GPIO017
GPIO022/ I2C 1_CL K0
GPIO023/ I2C 1_DA T0
GPIO020/ I2C 2_CL K0
GPIO021/ I2C 2_DA T0
GPIO024/ I2C 3_CL K0
GPIO025/ I2C 3_DA T0
GPIO157/ BC_C LK GPIO152/ PS2_ DAT3
GPIO160/ BC_D AT
GPIO161/ BC_n INT
GPIO133/ PW M0
GPIO136/ PW M1
GPIO034/ PW M2/TAC H2PW M_OUT
GPIO141/ PW M3/LE D3
GPIO105/ TACH1
GPIO140/ TACH2/ TACH2 PWM_ IN
LED0/GPIO154
LED1/GPIO155
LED2/GPIO156
GPIO143/ nRSMRST
nRESET_OUT/GPIO121
VCC_PWRGD/GPIO063
VCC1_nRST/GPIO131
GPIO127/ PECI _RDY
GPIO132/ PECI _DA T
ADC4/GPIO062
ADC3/GPIO061
ADC2/GPIO060
ADC1/GPIO057
ADC_TO_PWM_IN/ADC0/GPIO056
ADC_TO_PWM_OUT/GPIO041
C302
21
4.7UF_6.3V_3
P3V3DS
U302
6 1
1Y 1A
5 2
VCC GND
4 3
2Y 2A
NXP_74LVC2G07GW_SC88A_6P
P3V3DS
R101
100K_5%_2
2 1
PWRBTN#
21
C100
21
1UF_6.3V_2
64
GPIO027
107
GPIO030
30
GPIO031
65
GPIO033
63
GPIO035
1
GPIO036
124
GPIO066
73
GPIO110
74
GPIO130
93
GPIO145
33
GPIO147
34
GPIO151
116
GPIO163
41
GPIO206
112
111
110
109
89
88
91
90
126
125
98
99
100
120
118
121
78
92
101
113
114
115
85
60
72
77
31
80
79
VREF_PECI
38
39
42
43
44
59
LED_PWRSTBY#
CAPS_LED#
D100
DIODE-BAT54-TAP-PHP_DY
LID_SW#_3
CPPWR_EN
WLAN_OFF
TRAVEL_BAT_DET#
ADP_EN
LATCHED_ALARM
NMI_SMI_DBG#
PWRBTN#
ADP_PRES
PM_SLP_A#
WWAN_OFF
SLP_LAN#
FET_B
R319
21
0_5%_2
SCL_BAT_CHG
SDA_BAT_CHG
PCH_KBC_SMCLK
PCH_KBC_SMDATA
KBC_PROCHOT
SUS_PWR_ACK
ADP_PRES_OUT
KBC_PWR_ON_R
BAT_GRNLED#
MAIN_BAT_DET#
TACH_FAN_IN
BAT_AMBERLED#
8051_RX_CAPS_LED#
8051_TX_LED_PWRSTBY#
PWR_GOOD_3
VCC1_POR#_3
P1V05S_VCCP
SLP_S4#_KBC
OCP_PWM_OUT
OUT
10K_5%_2
52
OUT
10K_5%_2
2
NC
13
PWR_BTN_OUT#
OUT
OUT
OUT
OUT
OUT
OUT
A_SD#
CHG_RST
PWM#_LED
PM_PWROK
ADP_DET
21
21
P3V3A
62
51
44
IN
51
55
17
IN
5
6
IN
33
IN
7
IN
16
IN
56
16
IN
6
ISCT_LED#
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
P3V3DS
62 57 58
R303
R341
R103
21
1K_5%_2
51
BI
BI
BI
BI
IN
IN
IN
IN
IN
IN
64
51
24
28
51
59
27
28
68
28
0_5%_2
33
52
17
25
51
51
51
5
27
26
IN
5
17
5
17
28
68
28
51685
58
58
10K_5%_2
10K_5%_2
16
57
300_5%_2
2200PF_50V_2
300_5%_2
2200PF_50V_2
300_5%_2
2200PF_50V_2
300_5%_2
2200PF_50V_2
29
51
51
51
51
51
28
62
52
51
51
R323
0_5%_2
245128 26
43_5%_2
21
21
R352
CHANGE by
61
IN
IN
IN
IN
IN
53
56 55 28 26
SCAN_3S_OUT<0>
SCAN_3S_OUT<1>
SCAN_3S_OUT<3>
SCAN_3S_OUT<2>
JTAG_RST#
KBC_WAKE#
KBC_PWR_ON
R7510
0_5%_2
21
RSMRST#
R330
21
R329
21
H_PECI
R328
21
VOLTAGE_ADC
R302
21
C304
21
21
21
21
21
21
XXX
R300
C301
R316
C306
R315
C307
ADP_A_ID
CURRENT_ADC
OCP_A_IN
58
58
58
58
51
51
62
51
CLK_R3S_DEBUG
34
IN
53
53
33
53
53
53
53
P3V3DS
58
52
17
17
51
51
51
51
51
51
51
28
R339
R338
R337
R336
R335
OUT
OUT
2 1
PWM_3S_FAN#
C7530
OUT
BI
51
51
51
51
51
51
51
51
51
5
5
27
5
44
51
51
51
49
51
5
51
6
6
26
DATE
51
51
51
51
51
51
51
95
21
21-OCT-2002
LPC_3S_FRAME#
28
IN
PCI_3S_SERIRQ
29
IN
BUF_PLT_RST#
IN
NMI_SMI_DBG#
33
OUT
LPC_3S_AD(0)
28
IN
LPC_3S_AD(1)
28
BI
LPC_3S_AD(2)
28
BI
LPC_3S_AD(3)
28
BI
VADP_DEBUG
OUT
8051_TX_LED_PWRSTBY#
51
BI
8051_RX_CAPS_LED#
51
BI
NUM_LOCK_LED#
51
IN
VCC1_POR#_3
51
IN
21
15_5%_2
21
15_5%_2
21
15_5%_2
21
15_5%_2
21
0_5%_2
21
R343
29
18
OUT
RF SOLUTION
CSC0402_DY
28
16
27
9
IN
AGND_KBC
7
IN
AGND_KBC
9
IN
AGND_KBC
7
IN
AGND_KBC
NO 5V TOLERANT FOR MEC1322
IM_5S_CLK
BI
IM_5S_DATA
BI
SP_CLK
BI
SP_DATA
BI
EMCLK
OUT
EMDAT
OUT
BAT_AMBERLED#
OUT
PLT_DET
OUT
NUM_LOCK_LED#
OUT
KBC_PWR_ON_R
OUT
SDA_BAT_CHG
OUT
SCL_BAT_CHG
OUT
KBC_DS3_EN
IN
ADP_EN
IN
LID_SW#_3
IN
8051_TX_LED_PWRSTBY#
IN
8051_RX_CAPS_LED#
IN
VCC1_POR#_3
IN
NFC_TX
OUT
VCC1_POR#_3
OUT
CHG_RST
OUT
CPPWR_EN
OUT
FET_A
OUT
FET_B
OUT
PM_PWROK
OUT
2 1
SPI_CLK_FLH_R6_R
SPI_CS0#_FLH_R6_R
SPI_SI_FLH_R6_R
SPI_SO_FLH_R6_R
SPI_HOLD#_DB_R6_R
0_5%_2
25
10K_5%_2_DY
10K_5%_2_DY
200K_5%_2_DY
10K_5%_2_DY
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
KBC
CODE
SIZE
CS
C
CN375
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
ACES_50238_02471_001_24P
DEBUG PORT
6012B0073604
4.7K_5%_2
4.7K_5%_2
4.7K_5%_2
4.7K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
100K_5%_2
100K_5%_2
10K_5%_2
100K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
100K_5%_2
100K_5%_2
10K_5%_2
1K_5%_2
1K_5%_2
DOC.NUMBER
1310xxxxx-0-0
SHEET
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
of
51
25
26
P3V3DS
R385
R386
R387
R388
R312
R313
R318
R309
R320
R326
R306
R307
R340
R317
R314
R322
R324
R325
R334
R342
R308
R356
R305
R304
R321
77
F F
G1
G2
E
D
C
B
A
REV
X01
Page 52
8 7
6 5
4
3 2 1
REFERENCE NUMER : 300~399
P3V3S
P3V3DS
RS340
PWM#_LED
10 1
9
8
7
65
10K_5%
2
3
4
P3V3DS
Q301
1
IN
SSM3K7002BFU
G
NOTE:
KBL_DET# FOR KEYBOARD LIGHT DETECT
CHANGE by
SCAN_3S_IN(0)
SCAN_3S_IN(1)
SCAN_3S_IN(2)
SCAN_3S_IN(3)
SCAN_3S_IN(4)
SCAN_3S_IN(5)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
0
1
2
3
4
5
6
7
SCAN_3S_IN<7..0>
P5V0S
R351
2 1
G
S
S D
G
DIODES_DMP2305U_SOT23_3P
Q300
D
29
OUT
4.7K_5%_2
3
DS
2
KEYBOARD BACK LIGHT CONN
XXX
KBL_DET#
DATE
OUT
SCAN_3S_IN<7..0>
P5V0S_KBL
1
HIROSE_FH34SRJ_8S_0_5SH_50_8P
6012B0474701
SIZE
21-OCT-2002
2 3
51
52
CN301
1
2
2
3
3
4
4
5
5
G1
6
6
G
G2
7
7
G
8
8
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
KEYBOARD
DOC.NUMBER
CODE
1310xxxxx-0-0
CS
A3
SHEET
of
77 52
1
REV
X01
D
C C
B
A A
C305
0.1UF_16V_2
D
51
CAPS_LED#
51
NUM_LOCK_LED#
3
DS
G
2
3
DS
G
2
D303
1
2
BAW56DW_7_F
REC_MUTE_LED
52
52
52
52
51
52
52
52
5262
52
52
6252
52
52
52
52
6
SCAN_3S_IN(4)
5
KSCAN_3S_IN(5)
4 3
KSCAN_3S_IN(13)
KSCAN_3S_IN(9)
KSCAN_3S_IN(11)
KSCAN_3S_IN(13)
SCAN_3S_IN(7)
KSCAN_3S_IN(6)
KSCAN_3S_IN(5)
KSCAN_3S_IN(3)
KSCAN_3S_IN(1)
KSCAN_3S_IN(2)
KSCAN_3S_IN(4)
KSCAN_3S_IN(0)
KSCAN_3S_IN(10)
KSCAN_3S_IN(12)
KSCAN_3S_IN(8)
KSCAN_3S_IN(14)
Q321
SSM3K7002BFU
2 1
R383
1
Q320
1
ISCT_LED#
59
REC_MUTE_LED_CNTR
B
IN
SSM3K7002BFU
IN
10K_5%_2
KSCAN_3S_IN(4)
KSCAN_3S_IN(12)
SCAN_3S_IN(5)
R392
270_5%_2
R381
270_5%_2
2 1
2 1
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
21
SCAN_3S_OUT(9)
KSCAN_3S_IN(9)
KSCAN_3S_IN(11)
KSCAN_3S_IN(13)
SCAN_3S_IN(7)
KSCAN_3S_IN(6)
KSCAN_3S_IN(5)
SCAN_3S_OUT(1)
SCAN_3S_OUT(10)
SCAN_3S_OUT(6)
SCAN_3S_OUT(7)
SCAN_3S_OUT(4)
SCAN_3S_OUT(8)
SCAN_3S_OUT(3)
KSCAN_3S_IN(3)
KSCAN_3S_IN(1)
KSCAN_3S_IN(2)
KSCAN_3S_IN(4)
KSCAN_3S_IN(0)
KSCAN_3S_IN(10)
KSCAN_3S_IN(12)
KSCAN_3S_IN(8)
KSCAN_3S_IN(14)
SCAN_3S_OUT(5)
SCAN_3S_OUT(2)
SCAN_3S_OUT(0)
SCAN_3S_OUT(11)
IN
IN
C335
21
21
0.1UF_16V_2_DY
R391
0_5%_2
ACES_51510_0344N_001_34P
TMP121011001
CN300
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
31
32
33
34
G1
G
30
G2
G
31
32
33
34
51
KSCAN_3S_IN(14)
D304
6
KSCAN_3S_IN(2)
KSCAN_3S_IN(10)
SCAN_3S_IN(3)
KSCAN_3S_IN(0)
KSCAN_3S_IN(8)
SCAN_3S_IN(1)
8
1
2
BAW56DW_7_F
1
2
BAW56DW_7_F
D302
SCAN_3S_IN(2)
5
KSCAN_3S_IN(3)
4 3
KSCAN_3S_IN(11)
6
SCAN_3S_IN(0)
5
KSCAN_3S_IN(1)
4 3
KSCAN_3S_IN(9)
7 6
KSCAN_3S_IN(6)
SCAN_3S_IN(6)
3
D301
BAW56
21
5 4
Page 53
8 7
6 5
4
3 2 1
NO INSTALL FOR ST33
0_5%_2_DY
P3V3DS P3V3A
2 1
R3516
2 1
R3510
0_5%_2_DY
D
P3V3S
2 1
D
INSTALL FOR SLB9656
R3511
0_5%_2
P3V3_TPM
C3503
67
CLK_R3S_TPM
IN
C3501
10PF_50V_2_DY
51
51
51
51
61
21
29
51
PCI_3S_SERIRQ
28
28
28
283451
51
28 33
LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)
28
LPC_3S_FRAME#
26
BUF_PLT_RST#
55 56
21
0_5%_2
R3517
0_5%_2
0.1UF_16V_2
2 1
R3518
2 1
C3502
NO INSTALL FOR ST33
U3500
26
IN
IN
IN
IN
IN
IN
IN
R3507
21
0_5%_2
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
TEST
9
TESTBI_LRESET#
8
TESTI
INFINEON_SLB9656TT1_2_TSSOP_28P
5
VDD
10
VDD
19
VDD
24
VDD
4
GND
11
GND
18
GND
25
GND
7 28
PP NC
1
NC
3
NC
12
NC
13
NC
14
NC
6
GPIO
2
NC
P3V3S
C3506
C3504
21
21
21
0.1UF_16V_2
0.1UF_16V_2
P3V3S
0.1UF_16V_2
R3501
0_5%_2_DY
21
R3502
0_5%_2_DY
21
C C
TPM1.2
B
ST33
OPEN
OPENINSTALL
C3503
R3507
SLB9656TT1.2
INSTALL
OPEN R3511 INSTALL
R3517 INSTALL
R3518
INSTALL
OPEN
OPEN
B
REFERENCE NUMER : 3500~3549
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
TPM
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 53
1
REV
X01
A A
Page 54
8 7
6 5
4
3 2 1
34
CLKREQ_PCIE3_N
PLT_RST#
28
70
34
CLK_PCIE3_DP
34
CLK_PCIE3_DN
32
PCIE_RX3_C_DP
32
PCIE_RX3_C_DN
32
PCIE_TX3_C_DP
32
PCIE_TX3_C_DN
28
D
29 54
LAN_DIS#
LED_3S_LANLINK#_R
54
54
57 54
PCH_3M_SMCLK
28
PCH_3M_SMDATA
R405
21
IN
LED_3S_LANLINK#
LED_3S_LANACT#
10K_5%_2_DY
OUT
OUT
OUT
C404
10PF_50V_2
C400
10PF_50V_2
OUT
IN
IN
IN
OUT
OUT
IN
IN
BI
BI
REFERENCE NUMER : 400~469
B
REFERENCE NUMER : 470~499
54
54
54
54
C479
C478
C477
C476
C475
21
21
21
0.1UF_16V_2
0.1UF_16V_2
LAYOUT NOTE:
TO PLACE ONE 0.1UF AT EACH PIN 1 , 4 , 7 , 10
AND PLACE THE 1UF IN THE SPOT THAT
IS AS C LOSE AS POSS IBLE TO ALL 4 PINS
21
21
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
54
54
54
54
8
TD1_DP
TD1_DN
TD2_DP
TD2_DN
TD3_DP
TD3_DN
TD4_DP
TD4_DN
BI
BI
BI
BI
BI
BI
BI
BI
7 6
R402
2 1
NIC_XTAL_OUT
25MHZ_10PF
1
4
3
2
2 1
NIC_XTAL_IN
BOTH_GST5009_SOP_24P
6016B0000201
C408
C407
470_5%_2
2 1
R403
2 1
470_5%_2
X400
R400
21
RSC_0402_DY
R404
U470
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
0.1UF_16V_2
PCIE_RX3_DP
2 1
PCIE_RX3_DN
2 1
0.1UF_16V_2
LANWAKE_N
R401
1K_5%_2
21
21
3.01K_1%_2
24
MCT1
23
MX1+
22
MX1-
21
MCT2
20
MX2+
19
MX2-
18
MCT3
17
MX3+
16
MX3-
15
MCT4
14
MX4+
13
MX4-
C472
C473
21
0.01UF_100V_3
2 1
75_1%_2
R473
U400
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
2
LANWAKE_N
3
26
LED0
27
LED1
25
LED2
32
1
TP7
TP10
TP8
TP2
21
0.01UF_100V_3
2 1
75_1%_2
R472
JTAG_TDI
34
1
JTAG_TDO
33
1
JTAG_TMS
35
1
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
INTEL_CLARKVILLE_I218_LM_48P
C470
C471
21
21
0.01UF_100V_3
2 1
2 1
75_1%_2
R470
R471
100PF_3000V
13
PCIE
SMBUS
LED
JTAG
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
SVR_EN_N
RSVD1_VCC3P3
VDD3P3_5
VDD3P3_4 LAN_DISABLE_N
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD0P9_8
VDD0P9_11
VDD0P9_16
VDD0P9_22
VDD0P9_37
VDD0P9_40
VDD0P9_43
VDD0P9_46
VDD0P9_47
CTRL_0P9
GND_EPAD
14
17
18
20
21
23
24
6
1
P3V3M_R_RSVD
5
4
15
19
29
8
11
16
22
37
40
43
46
47
7
P1V05_NIC
49
R499
21
0_5%_2
P1V05_LAN_M_PHY
C409
21
21
0.1UF_16V_2
22UF_6.3V_5
L400
SWF2520CF_4R7K_M
2 1
BI
BI
BI
BI
BI
BI
BI
BI
P3V3M
C403
C401
21
0.1UF_16V_2
54
TD1_DP
54
TD1_DN
54
TD2_DP
54
TD2_DN
54
TD3_DP
54
TD3_DN
54
TD4_DP
54
TD4_DN
C402
21
1UF_6.3V_2
57
32
LANLINK_STATUS
29 54
PCIE_WAKE#
LAN_DIS#
P3V3M
OUT
IN
IN
4.7K_5%_2
3
Q487
2 1
R497
R407
DS
G
L2N7002WT1G
1
4.7K_5%_2_DY
2 1
2
2 1
R444
4.7K_5%_2_DY
P3V3M_R_RSVD
IN
R498
2 1
LANWAKE_N
0_5%_2
LED_3S_LANLINK#
D
54
C C
P3V3M
R485
P3V3A P3V3M
100K_5%_2
21
TD_DP
TD_DN
RD_DP
RD_DN
C_DP
C_DN
D_DP
D_DN
54
54
54
54
54
57
57 54
29
DOCK_ID1
57
57
57
57 54
57 54
57
IN
L2N7002WT1G
57 54
57 54
57 54
57 54
57 54
57 54
54 57
54 57
BI
BI
BI
BI
BI
BI
BI
BI
57
1
Q486
G
TD_DP
TD_DN
RD_DP
C_DP
C_DN
RD_DN
D_DP
D_DN
3
DS
2
BI
BI
BI
BI
BI
BI
BI
BI
0.01UF_100V_3
IN
75_1%_2
D486
C474
2 1
PHP_PESD5V0S1BB_SOD523_2P
2 1
12
LED_3S_LANACT#
CHANGE by
5 4
2
G
S
Q485
D
3
LES_LBSS84LT1G_SOT23_3P
JACK485
A2 A1
G2
G1
1
TX+
2
TX-
3
RX+
4
P4
5
P5
6
RX-
7
P7
8
P8
B2 B1
Y2
Y1
FOX_JM3611_SP51AB11_7H_12P
60260197001
54
57
XXX
D485
PHP_PESD5V0S1BB_SOD523_2P
BI
G1
G
G2
G
G3
G
G4
G
LED_3S_LANLINK#_R
BI
LED_3S_LANACT#
2 1
12
IN
LED_3S_LANLINK#_R
54
57
54
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
LAN (NIC,TRANSFORMER,RJ45)
DOC.NUMBER
CODE
DATE
21-OCT-2002
2 3
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
54 77
1
1
REV
X01
B
A A
Page 55
8 7
6 5
4
3 2 1
D
P3V3DS
C1308
R1302
21
51
28
WLAN_OFF
IN
PCH_SLP_WLAN_N
IN
R1311
0_5%_2
R1312
0_5%_2_DY
21
21
10K_5%_2
R1301
220K_5%_2
2 1
B
28
P3V3A_Q_WLAN
S
S D
DIODES_DMP2305U_SOT23_3P
G
Q1300
G
21
0.1UF_16V_2_DY
56
61
P3V3A
R1306
10K_5%_2_DY
BT_OFF
D
34
CLKREQ_PCIE4_N
29
54
34
34
32
PCIE_RX4_C_DN
32
PCIE_RX4_C_DP
32
PCIE_TX4_C_DN
32
PCIE_TX4_C_DP
2 1
IN
SSM3K7002BFU
576MA
SSM3K7002BFU
OUT
PCIE_WAKE#
CLK_PCIE4_DN
CLK_PCIE4_DP
28
CL_CLK1
28
CL_DATA1
28
CL_RST#1
3
Q1302
DS
1
G
2
Q1301
R1310
OUT
OUT
OUT
IN
IN
IN
IN
IN
3
IN
IN
1
G
DS
2 1
0_5%_2_DY
R1303
0_5%_2
TP1301
TP1302
BT_OFF#
R1304
21
2
CLKREQ_PCIE4_R_N
2 1
1
1
10K_5%_2
CN1300
1
WAKE#
3
RESERVED
5
RESERVED
7
CLKREQ#
9
GND
11
REFCLK-
13
REFCLK+
17
RESERVED
21
GND
23
PERN0
25
PERP0
27
29
GND
31
PETN0
33
PETP0
35
GND
37
RESERVED
39
RESERVED
41
RESERVED
43
RESERVED
45
RESERVED
47
49
RESERVED
51
FOX_AS0B226_S40QW_7H_52P
6026B0221501
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED RESERVE D
RESERVED
PERST#
+3.3VAUX
SMB_CLK
SMB_DATA
USB_D-
USB_D+
LED_WWAN#
LED_WLAN#
LED_WPAN#
C1307
C1305
21
C1301
21
21
2
4.7UF_6.3V_3
3.3V
4
GND
6
1.5V
8
10
12
14
16 15
18
GND RESERVED
20 19
22
24
26
GND
28
1.5V GND
30
32
34
GND
36
38
40
GND
42
44
46
48
1.5V RESERVED
50
GND
52
3.3V RESERVED
G2 G1
G2 G1
BI
BI
OUT
0.1UF_16V_2
0.01UF_50V_2
IN
USB_D_P2_DN
USB_D_P2_DP
WL_LED_ALL#
BUF_PLT_RST#
C1304
21
58
62
26
C1303
21
10UF_6.3V_3
0.1UF_16V_2
D1300
13
BAT54_30V_0.2A
R1300
10K_5%_2
2
NC
P3V3A
2 1
29
IN
WLAN_TRANSMIT_OFF#
D
C C
B
REFERENCE NUMBER:1300~1349
8
7 6
WLAN & BLUE TOOTH
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
WLAN & BLUE TOOTH
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 55
1
REV
X01
A A
Page 56
8 7
6 5
4
3 2 1
PVSIM
56
56
UIM_PWR
56
UIM_PWR
49
UIM_VPP
D
56
61
UIM_DATA
542929 55
BI BI
47K_5%_2_DY
BI
BI
33
INTRUDER#
USB_D_P1_DP
USB_D_P1_DN
WWANSSD_M12DET
PCIE_WAKE#
B
53 55
UIM_CD
R1451
51
OUT
BI
2 1
IN
BI
BI
IN
IN
28 33
R1452
2 1
100K_5%_2
5
6
7
8 4
G2 G1
R1405
21
0_5%_2_DY
WCM_2012_900T
21
34
L1400
0_5%_2
R1409
21
21
R1406
0_5%_2
26
BUF_PLT_RST#
61
CN1451
GND
VPP
I_O
RESERVED RESERVED
GG
TAI_PMPAT0_08GLBS7N14H1__8P
1
VCC
2
RST
3
CLK
CD
CD
6026B0180901
SIM CARD
WWAN_DET#
USB_D_P1_L_DP
USB_D_P1_L_DN
PVSIM
R1408
10K_5%_2
21
WWAN_NGFF_DPR
IN
CN1400
1
GND_PRESENC E_IND
3
GND3
5
GND5
7
USB_D+
9
USB_D-
11
GND11
21
WWAN/SSD IND GND-WWAN/OC-SSD
23
RESERVED_23
25
RESERVED_25
27
GND_27
29
PERN1/USB3.0-RX-
31
PERP1/USB3.0-RX+
33
GND_33
35
PETN1/USB3.0-TX-
37
PETP1/USB3.0-TX+
39
GND_39
41
PETN0/SATA-B+
43
PETN0/SATA-B-
45
GND_45
47
PETN0/SATA-A-
49
PETN0/SATA-A+
51
GND_51
53
REFCLKN
55
REFCLKP
57
GND_57
59
ANTCTL0
61
63
65
RESET#
69
PEDET_OC-PCIE/GND-SATA
71
GND_71
73
GND_73
75
USB3.0IND/GND-OTHER
D1451
DIODES_BAV99
3
21
C1453
C1452
C1451
21
CAP CLOSE TO SIM CARD
21
21
0.1UF_16V_2
4.7UF_6.3V_3
18PF_50V_2_DY
KEY B
UIM_PWR
BI
UIM_RST
BI
UIM_CLK
C1405
21
18PF_50V_2_DY
3P3VAUX_2
3P3VAUX_4
FULL_CARD_POW ER_OFF#
W_DISABLE#
LED1#/DAS/DSS#
AUDIO_0
AUDIO_1
AUDIO_2
AUDIO_3
UIM-RFU
UIM-RESET
UIM-CLK
UIM-DATA
UIM-PWR
DEVSLP
GNSS0
GNSS1
GNSS2
GNSS3
GNSS4
PERST#
CLKREQ#
PEWAKE#
NC_56
NC_58
COEX3 ANTCTL1
COEX2 ANTCTL2
COEX1 ANTCTL3
SIM DETECT
SSCLK
3P3VAUX_70
3P3VAUX_72
3P3VAUX_74
56
56
56
2.75A
C1414
C1413
21
C1415
21
0.1UF_16V_2
0.01UF_50V_2
PVSIM
Q1400
1
D
2
5
PMOS_4D1S
TPC6111
21
4.7UF_6.3V_3
4
S
3 6
G
C1402
21
PVSIM
R1407
10K_5%_2
2
4
6
8
10
PS CS
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66 67
68
70
72
74
OUT
LED_WWAN_LINK#
IN
GPS_XMIT_OFF#
BI
UIM_RST
BI
UIM_CLK
BI
UIM_DATA
BI
UIM_PWR
21
56
56
56
56
IN
UIM_CD
D1410
58
13
BAT54_30V_0.2A
29
56
P3V3DS
R1404
R1403
21
0.1UF_16V_2_DY
220K_5%_2
P3V3S
R1402
10K_5%_2
21
2
NC
10K_5%_2
21
IN
WWAN_OFF
30
IN
WWAN_TRANSMIT_OFF#
D
51
C C
B
REFERENCE NUMBER:1400~1499
8
7 6
GND_G1
GND_G2
LOTES_APCI0018_P005A_75P
G2
G1
6026B0243101
KEY B TYPE
NGFF WWAN
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
WWANNGFF
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 56
1
REV
X01
A A
Page 57
8 7
6 5
4
3 2 1
D
CN3601
54
RD_DP
54
RD_DN
54
TD_DP
54
TD_DN
54
32
LANLINK_STATUS
54
LED_3S_LANACT#
59
LINE_IN_SENSE
59
LINE_OUT_SENSE
59
A_LINEINL_DOCK
59
A_LINEINR_DOCK
59
PR_AOUT_L_DOCK
59
PR_AOUT_R_DOCK
51
LED_PWRSTBY#
70
68
DPB_DOCK_HPD
68
DPB_DOCK_DAT_AUX_DN
68
DPB_DOCK_CLK_AUX_DP
28
68
68
B
68
68
68
PVADPTR
C3600
DPA_DOCK_HPD
DPA_DOCK_DAT
DPA_DOCK_CLK
29
DPA_DOCK_AUX_DN
DPA_DOCK_AUX_DP
16
SLP_S3#_3R
27
SLP_S4#_KBC
26
32
32
7
LIMIT_SIGNAL
C3601
21
21
0.1UF_25V_3
0.1UF_25V_3
28
I2C_CLK
I2C_DATA
DOCK_ID1
ON_OFF#
USB_P0_DP
USB_P0_DN
TP3601
DETECT1#
IN
IN
IN
IN
IN
IN
TP24
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
IN
AGND_AUDIO
1
DETECT1#
2
RJ45_B+
3
RJ45_B-
4
GND
5
RJ45_A+
6
RJ45_A-
7
GND
8
Reserved
9
Reserved
10
GND
11
RJ45_LINKLED#
12
RJ45_ACTLED#
1
13
Reserved
14
LINE_IN_SENSE
15
LINE_OUT_SENSE
16
AUDIOAGND
17
LINE_IN_L
18
LINE_IN_R
19
AUDIOAGND
20
LINE_OUT_L
21
LINE_OUT_R
22
AUDIOAGND
23
PWRLED
24
Reserved DPB_HPD
25
GND
26
Reserved DPB_CTRLDATA
27
Reserved DPB_CTRLCLK
28
GND
29
Reserved DPB_AUX-
30
Reserved DPB_AUX+
31
GND
32
Reserved PCIe CLK1+
33
Reserved PCIe CLK1-
34
DPA_HPD
35
DPA_CTRLDATA
36
DPA_CTRLCLK
37
DOCK_ID1
38
DPA_AUX-
39
DPA_AUX+
40
SLP_S3#
41
RESERVED_SLP_S4#
42
VA_ON#
43
NBSWON#
44
RESERVED (I2C_CLK/USB1+)
45
RESERVED (I2C_Data/USB1-)
46
DOCK_ADP_SIGNAL
P1
G3 G2
GND GND
FOX_QL1046L_D262AR_7H_92P
6012B0449701
RJ45_D+
RJ45_D-
RJ45_C+
RJ45_C-
Reserved
Reserved
Reserved PCIe TX1+
Reserved PCIe TX1-
Reserved PCIe RX1+
Reserved PCIe RX1-
Reserved DPB_ML1+
Reserved DPB_ML0-
Reserved DPB_ML1+
Reserved DPB_ML1-
Reserved DPB_ML2+
Reserved DPB_ML2-
Reserved DPB_ML3+
Reserved DPB_ML3-
DP_ML0+
DP_ML0-
DP_ML1+
DP_ML1-
DP_ML2+
DP_ML2-
DP_ML3+
DP_ML3-
USB3_R X+
USB3_R X-
USB3_T X+
USB3_T X-
DETECT2#
47
PREP#
48
49
50
GND
51
52
53
GND
54
55
56
GND
57
58
59
GND
60
61
62
GND
63
64
65
GND
66
67
68
GND
69
70
71
GND
72
73
74
GND
75
76
77
GND
78
79
80
GND
81
82
83
GND
84
85
86
GND
87
88
89
GND
90
91
92
DETECT1#
G1
GND VA(120W)
G5 G4
GND GND
IN
IN
IN
IN
IN
IN
DPB0_DOCK_DP
IN
DPB0_DOCK_DN
IN
DPB1_DOCK_DP
IN
DPB1_DOCK_DN
IN
DPA0_DOCK_DP
IN
DPA0_DOCK_DN
IN
DPA1_DOCK_DP
IN
DPA1_DOCK_DN
IN
DPA2_DOCK_DP
IN
DPA2_DOCK_DN
IN
DPA3_DOCK_DP
IN
DPA3_DOCK_DN
OUT
OUT
IN
IN
ISO_PREP#
D_DP
D_DN
C_DP
C_DN
USB30_RX0_DP
USB30_RX0_DN
USB30_TX0_DP
USB30_TX0_DN
32
54
54
54
54
70
70
70
70
70
70
70
70
70
70
70
70
32
32
32
32
D
C C
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DOCKING CONN.
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 57
Page 58
8 7
6 5
4
3 2 1
D
30
WWAN_TRANSMIT_OFF#
IN
SSM3K7002BFU
WLAN_WWAN_BLUETOOTH_ LED
P3V3S
R118
Q112
2 1
R113
47K_5%_2
IN
WL_LED_ALL#
IN
LED_WWAN_LINK#
SC_PWRSV#
USB_P7_DN
USB_P7_DP
IM_5S_DATA
IM_5S_CLK
P3V3DS
55
62 58
51
51
LED_PWRSTBY#
33
BAT_GRNLED#
51
BAT_AMBERLED#
33
LED_3S_SATA#
30
HDD_HALTLED
55
WL_LED_ALL#
29
32
32
51
51
62 57
62 58
56
2 1
47K_5%_2
3
DS
1
G
2
P3V3S_ISCT
50 39 38 28
39 50
38 28
26
PCH_3S_SMDATA
26
PCH_3S_SMCLK
58
58
ST_RIGHT
ST_LEFT
BI
BI
BI
P5V0S
P3V3S
OUT
OUT
OUT
OUT
IN
OUT
OUT
BI
BI
BI
BI
IN
BI
CN200
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
ACES_50501_0264N_001_26P
G1
G
G2
G
D
C C
TMP121029001
P3V3S P5V0S
0_5%_2_DY
SP_DATA_Q
SP_CLK_Q
ST_LEFT
ST_RIGHT
R204
0_5%_2
21
BI
BI
BI
BI
P5V0S P3V3S
CN202
8
8
7
6
5
4
3
2
1
G2
7
G
G1
6
G
5
4
3
2
1
HIROSE_FH34SRJ_8S_0_5SH_50_8P
6012B0474701
SMART CARD AND TOUCHPAD D/B W TO B CONN
B
B
R203
21
58
58
58
58
STICK POINT
5V
R201 INSTALL
INSTALL UNINSTALL
R202
R204
INSTALL
8
3.3V
UNINSTALL
INSTALLR203 UNINSTALL
UNINSTALL
R202
R201
R205
21
P3V3S
2
5
L2N7002DW1T1G_DY
Q200
G1
G2
S1
D1
D2
S2
21
1
6
3
4
4.7K_5%_2_DY
4.7K_5%_2_DY
21
STICK POINT OPTION
7 6
R206
21
4.7K_5%_2_DY
4.7K_5%_2_DY
R207
0_5%_2
R208
0_5%_2
2 1
2 1
SP_DATA
SP_DATA_Q
SP_CLK_Q
SP_CLK
51
BI
58
BI
58
BI
51
BI
5 4
REFERENCE NUMBER:100~199
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
STICK POINT & B2B CNTR
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 58
1
REV
X01
A A
Page 59
8 7
6 5
4
3 2 1
D
57
LINE_IN_SENSE
59
SENSE_B
L2N7002DW1T1G
IN
R529
IN
R528
20K_1%_2
21
Q528
1
S1
2
G1
2 1
6
D1
3
D2
5
G2
4
S2
100K_5%_2
57
LINE_OUT_SENSE
AGND_AUDIO
IN
R531
39.2K_1%_2
21
R530
21
100K_5%_2
AGND_AUDIO
P3V3S
67
33
AZ_R3S_BITCLK
33
AZ_R3S_RST#
IN
R513
21
IN
4.7K_5%_2
B
R515
C522
21
21
0.01UF_50V_2
C523
21
52
REC_MUTE_LED_CNTR
62
PLAY_MUTE_LED_CNTR
P5V0S
43
24
28
57
1UF_6.3V_2_DY
64
31
16
SLP_S3#_3R
26
51
C500
21
IN
U500
1
OUT
IN
2
GND
N/C EN
TI_HPA01091DBVR_SOT23_5P
REFERENCE NUMBER:500~549
8
7 6
51
AGND_AUDIO
OUT
C504
67
33
33
33
AZ_R3S_SDIN0
0_5%_2_DY
44
DMIC_CLK
44
DMIC_DAT
10PF_50V_2_DY
OUT
OUT
P5V0S_AUDIO_AVDD
5
4 3
IN
A_SD#
SENSE_A
59
P3V3S
C503
21
21
0.1UF_16V_2
1UF_6.3V_2
AZ_R3S_SDOUT
AZ_R3S_SYNC
OUT
SPKR_EN_AB
OUT
IN
C501
21
10UF_6.3V_3
AGND_AUDIO
D500
1N4148WS_7_F
P3V3S
85MA
C502
C505
21
0.1UF_16V_2
IN
IN
R514
33_5%_2
R516
100_5%_2
C521
4.7UF_6.3V_3
X5R
59
PR_AOUT_L_AB
P3V3S
R517
10K_5%_2
21
2 1
59
PR_AOUT_R_AB
SPKR_EN_AB
C527
21
0.1UF_16V_2
21
U501
1
10UF_6.3V_3
DVDD_CORE
3
DVDD_IO
9
DVDD
6
HDA_BITCLK
5
HDA_SDO
10
HDA_SYNC
8
2 1
HDA_SDI
11
HDA_RST#
47
EAPD
2
2 1
DMIC_CLK/GPIO1
4
DMIC0/GPIO2
48
SPDIFOUT0/GPIO3
46
DMIC1/GPIO0/SPDIFOUT1
36
CAP+
35
2 1
CAP- V-
7
DVSS
42
PVSS
49
PAD
IDT_92HD91B2X5NLGXWCX_QFN_48P
R520
SHORT_0805_40
R521
SHORT_0805_40
5 4
VREFOUT_C/GPIO4
SPK_PORTD_+L
SPK_PORTD_+R
SPK_PORTD_-R
2 1
2 1
AGND_AUDIO
IN
150UF_6.3V
IN
150UF_6.3V
AVDD1
AVDD2
PVDD1
PVDD2
SENSE_A
SENSE_B
HP0_PORTA_L
HP0_PORTA_R
VREFOUT_A
HP1_PORTB_L
HP1_PORTB_R
PORTC_L
PORTC_R
PORTE_L
PORTE_R
PORTF_L
PORTF_R
SPK_PORTD_-L
MONO_OUT
PCBEEP
VREFFILT
CAP2
VREG(+2.5V)
AVSS1
AVSS2
AVSS3
X5R
C511
PR_AOUT_C_L_DOCK
21
+
C512
PR_AOUT_C_R_DOCK
21
+
X5R
R502
AGND_AUDIO
P5V0S_AUDIO_AVDD
27
38
45
AGND_AUDIO
39
13
14
28
29
23
31
32
C530
19
20
24
15
16
17
18
40
41
44
43
25
12
21
22
34
37
26
C515
30
33
AGND_AUDIO
30_1%_3
30_1%_3
R503
20K_1%_2
20K_1%_2
21
21
C507
C506
21
21
1UF_6.3V_2
0.1UF_16V_2
OUT
SENSE_A
OUT
SENSE_B
OUT
PR_AOUT_L_AB
OUT
PR_AOUT_R_AB
OUT
HP_OUT_L1
OUT
HP_OUT_R1
1UF_6.3V_3
21
IN
EXT_MIC_JACK
OUT
MIC_BIAS
IN
A_LINEINL
IN
A_LINEINR
OUT
SPK_OUT_L_DP
OUT
SPK_OUT_L_DN
OUT
SPK_OUT_R_DP
OUT
SPK_OUT_R_DN
0.1UF_16V_2
C529
C516
1UF_6.3V_2
21
21
21
4.7UF_6.3V_3
4.7UF_6.3V_3
R522
2 1
R523
2 1
59
59
C509
C508
21
1UF_6.3V_2
59
SENSE_A
59
SENSE_B
59
59
59
59
60
X7R
IN
A_MIC
59
59
C518
PCBEEP_IC_C
2 1
C519
21
C517
21
10UF_6.3V_3
AGND_AUDIO
PR_AOUT_L_DOCK
OUT
OUT
PR_AOUT_R_DOCK
A_LINEINR
A_LINEINL
P5V0S
750MA
C510
21
21
0.1UF_16V_2
10UF_6.3V_3
IN
IN
C524
60
60
60
60
AGND_AUDIO
59
59
59
59
R509
21
100K_5%_2
R510
10K_5%_2
21
0.01UF_50V_2
0.1UF_16V_2
0.1UF_16V_2
CHANGE by
57
57
X5R
OUT
2.2UF_6.3V_3
OUT
2.2UF_6.3V_3
X5R
P5V0S_AUDIO_AVDD
R512
21
2.49K_1%_2
21
1000PF_50V_2
PCBEEP_IC_CR
C7551
C7552
XXX
59
59
59
59
R511
21
2.49K_1%_2
C525
21
1000PF_50V_2
P5V0S_AUDIO_AVDD
C520
0.1UF_16V_2
EMI SOLUTION
2 1
2 1
AGND_AUDIO
C526
2 1
C514
2 1
AGND_AUDIO
SPK_OUT_R_DP
SPK_OUT_R_DN
SPK_OUT_L_DN
SPK_OUT_L_DP
R508
2 1
21
PCBEEP_CRC
3
DS
2
AGND_AUDIO
DATE
6.2K_1%_2
6.2K_1%_2
2 1
R5072 1R506
2K_5%_2_DY
2K_5%_2_DY
10K_5%_2
Q500
1
G
SSM3K7002BFU
21-OCT-2002
2 3
R504
2 1
IN
A_LINEINR_DOCK
R505
2 1
IN
A_LINEINL_DOCK
INT-SPEAKER CONN.
IN
IN
IN
IN
IN
A_3S_ICHSPKR
C640
21
2 1
R534
ACES_50271_0040N_001_4P
C642
C641
21
21
2200PF_50V_2
2200PF_50V_2602200PF_50V_2
2 1
2 1
R535
3.3_5%_2
R536
3.3_5%_2
29
C643
R537
3.3_5%_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AUDIO CODEC
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A4
SHEET
59
57
57
CN640
1
1
2
2
3
3
4
4
G1
G
G2
G
6012B0194003
21
2200PF_50V_2
2 1
3.3_5%_2
REV
of
1
X01
77
D
C C
B
A A
Page 60
8 7
6 5
4
3 2 1
IN
59
C616
2 1
21
AGND_AUDIO
100PF_50V_2
R617
21
10K_5%_2
C617
68PF_50V_2
21
D
60
59
EXT_MIC_JACK
IN
C620
0.47UF_10V_3
L627
BLM18PG600SN1D
2 1
X5R
VREF_EQ
A_MIC
REFERENCE NUMBER:600~649
B
SINGA_2SJ3005_023111F_7P
JACK600
7
5
4
3
1
2
6
TMP121022002
AGND_AUDIO
7
5
4
3
1
2
6
C602
C601
21
C603
21
21
0.033UF_16V_2
0.033UF_16V_2
L602
BLM18PG600SN1D
L600
FBM_11_160808_121T
L601
FBM_11_160808_121T
220PF_50V_2
2 1
2 1
2 1
AGND_AUDIO
REFERENCE NUMBER:600~610
60
R600
R601
21
15PF_50V_2
21
100K_5%_2
16_1%_2
2 1
16_1%_2
2 1
OUT
P5V0S_AUDIO_AVDD
R603
100K_5%_2
SSM3K7002BFU
C612
R612
AGND_AUDIO
1
2
1
TI_TLV2462CDGKR_MSOP_8P
IN
HP_OUT_L1
IN
HP_OUT_R1
OUT
JACK_DET
1
R604
20K_1%_2
2
3
Q600
DS
G
2
U610
1
2
3
4
VDD+
1OUT
2OUT
1IN-
2IN-
1IN+
GND
2IN+
59
59
OUT
P5V0S_AUDIO_AVDD
8
7
6
5
R619
21
100K_5%_2
X7R
R602
2.2K_5%_2
1UF_6.3V_2
SENSE_A
0.1UF_16V_2
R618
21
100K_5%_2
C614
C613
21
21
0.1UF_16V_2
X5R
2.2UF_6.3V_2
2 1
C600
21
59
AGND_AUDIO
X7R
OUT
C615
IN
IN
2 1
AGND_AUDIO
VREF_EQ
EXT_MIC_JACK
MIC_BIAS
60
D
C C
59
60
59
B
A A
AGND_AUDIO
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
EXT. MIC AMP. & AUDIO JACK
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 60
Page 61
8 7
6 5
4
3 2 1
D
271126
32
U800
33
55
56
26
28
53
51
34
33
33
34
34
33
33
BUF_PLT_RST#
IN
CLKREQ_PCIE6_L0_N
IN
PCIE_TX6_L0_C_DP
IN
PCIE_TX6_L0_C_DN
IN
CLK_PCIE6_L0_DP
IN
CLK_PCIE6_L0_DN
IN
PCIE_RX6_L0_C_DP
OUT
PCIE_RX6_L0_C_DN
OUT
C813
C811
0.1UF_16V_2
2 1
0.1UF_16V_2
2 1
PCIE_RX6_L0_DP
PCIE_RX6_L0_DN
1
3
4
5
6
7
8
33
PERST#
CLKREQ#
HSIP
HSIN
REFCLKP
REFCLKN
HSOP
HSON
GND
R801
6.2K_1%_2
31
WAKE#
RREF
9
10
2 1
25
29
30
28
NC
NC
SP7
GPIO
3V3aux
SD_CD#
MS_INS#
DV33_18
CARD_3V3
AV12
SP2
SP1
DV12S
3V3_IN
NC
14212
16
15
13
REALTEK_RTS5237_GR_QFN_32P
P1V2_CR
P3V3S
B
C806
21
0.1UF_16V_2
C804
21
P3V3S_VCC_READER
C805
21
0.1UF_16V_2
10UF_6.3V_3
C801
21
PCIE_WAKE#
SD_MMC_CD#
SD_MMC_WP
CR_GPIO
24
NC
23
NC
22
NC
21
SP6
20
SP5
19
SP4
18
17
SP3
SD_MMC_DATA0
SD_MMC_DATA1
P1V2_PHY_CR
C800
21
4.7UF_6.3V_3
0.1UF_16V_2
SD_MMC_DATA2
SD_MMC_DATA3
SD_MMC_CMD
P3V3D_P1V8D
SD_MMC_CLK
BI
IN
IN
R802
10K_5%_2
29
54
61
61
2 1
61
IN
61
IN
61
IN
61
IN
61
IN
61
IN
56 55
P3V3A
P3V3A
C803
C807
21
21
0.1UF_16V_2
C802
21
1UF_6.3V_2
61
61
61
61
61
61
61
61
4.7UF_6.3V_3
P3V3S_VCC_READER
C808
C810
21
21
0.1UF_16V_2
IN
IN
IN
IN
IN
IN
IN
IN
SD_MMC_CLK
SD_MMC_CMD
SD_MMC_DATA0
SD_MMC_DATA1
SD_MMC_DATA2
SD_MMC_DATA3
SD_MMC_WP
SD_MMC_CD#
10UF_6.3V_3
CN820
4
SD_VDD
5
SD_CLK
2
SD_CMD
7
SD_DATA0
8
SD_DATA1
9
SD_DATA2
1
SD_DATA3_CD
10
SD_WP
11
SD_CD_SW
12
SD_COM
3
SD_VSS1
GND1
6
SD_VSS2
GND2
PLAST_CS1R_211_H_N_12P
G1
G2
D
C C
B
TMP120912001
DGND_CHASSIS3
REFERENCE NUMBER:800~899
8
7 6
P1V2_CR
P1V2_PHY_CR
R800
2 1
0_5%_2
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CARD READER
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 61
1
REV
X01
A A
Page 62
8 7
6 5
4
3 2 1
P3V3DS
R131
MUTE BOTTON
SCAN_3S_OUT(17)
OUT
52
KSCAN_3S_IN(0)
IN
D
SW154
34
4 3
12
2 1
GND
MISAKI_NTC011_BA1J_A160T_4P
G1
6026B0239401
ISCT_LED#
IN
SSM3K7002BFU
Q126
1
G
21
3
DS
2
47K_5%_2
R132
330K_5%_2
2 1
C101
P3V3S
S
DIODES_DMP2305U_SOT23_3P
S D
Q127
G
G
D
21
CSC0402_DY
D
P3V3S_ISCT
EVL_23_22B_Y2ST3D_C30_2T_4P
Q125
1
WIRELESS BOTTON
SCAN_3S_OUT(17)
OUT
52
KSCAN_3S_IN(1)
IN
SW152
34
4 3
12
2 1
GND
MISAKI_NTC011_BA1J_A160T_4P
G1
6026B0239401
59
PLAY_MUTE_LED_CNTR
OUT
R124
10K_5%_2
21
MUTE LED
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
6
3
4
D126
Yellow
2
-
14
-
PureWhite
6011B0137801
R130
21
10K_5%_2
+
+
270_5%_2
3
R126
EVL_23_22B_Y2ST3D_C30_2T_4P
2 1
55
58
WL_LED_ALL#
IN
1
SSM3K7002BFU
Q110
G
PureWhite
14
-
2
-
Yellow
3
DS
D110
6011B0137801
2
R115
270_5%_2
+
3
+
2 1
C C
WIRELESS/BLUETOOTH LED
S9101
SCREW660_800_NP_1P
1
P3V3AL_PB
DGND_PBN
B
C9113
21
DGND_PBN
62
LID_SW#_3_PB
OUT
BCD_AH9249NTR_G1_TSOT23_3P
U9100
1
VDD
0.1UF_16V_2
3
GND
2
Output
62
62
LED_PWRSTBY#_PB
62
ON_OFF#_PB
LID_SW#_3_PB
P3V3AL_PB
CN9100
6
6
5
IN
4
IN
IN
4
3
3
2
2
1
1
ACES_51571_0064N_001_6P
P3V3DS
58
57
G2
G2
G1
G1 5
57
51
51
LED_PWRSTBY#
26
51
44
ON_OFF#
LID_SW#_3
IN
IN
IN
CN290
1
1
2
2
3
3
4
4
5
6
6
ACES_51571_0064N_001_6P
G1
G1 5
G2
G2
B
6012B0481801
OUT
ON_OFF#_PB
SW9100
34
12
6026B0239401
DGND_PBN
POWER SWITCH DAUGHTER BOARD
REFERENCE NUMBER:9100~9199
8
4 3
2 1
GND
MISAKI_NTC011_BA1J_A160T_4P
G1
OUT
62
7 6
DGND_PBN
LED_PWRSTBY#_PB
D9100
19_217_W1D_AP1Q2QY_3T
6011B0028601
FIX9100
FIX_MASK
DGND_PBN
R9100
2 1
360_5%_2
FIX9102
1
FIX_MASK FIX_MASK
1
FIX_MASK
DGND_PBN
P3V3AL_PB
2 1
FIX9103
1
FIX9101
1
5 4
CHANGE by
XXX
6012B0481801
POWER SWITCH B TO B CONN
INVENTEC
TITLE
CODE
SIZE
CS
DATE
21-OCT-2002
2 3
A3
MODEL,PROJECT,FUNCTION
BUTTON LED
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
77 62
1
REV
X01
A A
Page 63
8 7
P5V0S_SM
24MA
C9006
D
SCARDDATA
59
DGND_SM
P3V3S_SM_AB
PVSM_VCC_SM
0.1UF_16V_2
21
4.7K_5%_2
R9001
IN
R9000
2 1
470_5%_2
59
59
59
59
21
59
USB_P7_SM_DN
USB_P7_SM_DP
SCARDC8
SCARDC6
SCARDFCB
SCARDRST
SCARDCLK
X9000
C9108
C9109
IN
IN
IN
IN
IN
IN
IN
PVSM_VCC_SM
C9005
0.1UF_16V_2
21
1UF_6.3V_2
C9004
21
DGND_SM
P5V0S_SM
DGND_SM
DGND_SM
1UF_6.3V_2
C9003
C9002
0.1UF_16V_2
21
21
21
6 5
AU9542
INSTALL
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
AU9560
UNINSTALL
U9000
SCARD0C8
SCARD0C6
SCARD0FCB
SMIO_5VPWR
SCARD0RST
SCARD0CLK
SCARD0DATA
DM
DP
AV33
SCPWR0
5VGND
5VINPUT
V33OUT V18OUT
ALCOR_AU9560_GBS_GR_SSOP_28P
PWRSV_SEL
ICCINSERTN
P3V3S_SM_AB
1UF_6.3V_2
C9001
1UF_6.3V_2
C9000
0.1UF_16V_2
21
LEDCRD
LEDPWR
RESET
EEPDATA
EEPCLK
VDDH
VDDP
XO
P1-6
VDD
C9009
XI
XTAL_12M_OUT
XTAL_12M_IN
28
27
26
25
24
23
22
21
20
19
ICCINSERTN
18
17
P1V8S_SM
16
21
DGND_SM
X9000
1
4
C9018
21
18PF_50V_2_DY
DGND_SM
R9012
0_5%_2_DY
R9011
0_5%_2
P3V3S_SM_AB
OUT
C9010
0.1UF_16V_2
1
C9007
2
0.1UF_16V_2
DGND_SM
12MHZ_DY
3
2
C9019
21
DGND_SM
2 1
2 1
IN
SC_PWRSV#_SM
59
21
18PF_50V_2_DY
P3V3S_SM_AB
R9002
59
DGND_SM
4
100K_5%_2
21
C9011
1UF_6.3V_2
21
3 2 1
LED_SM_PWRSTBY#
BAT_SM_GRNLED#
BAT_SM_AMBERLED#
WL_LED_SM_ALL#
IN
OUT
OUT
IN
SSM3K7002BFU
P3V3S_SM
1
WHITE
2
3
YELLOW
EVL_12_22_Y2ST3D_C30_2C_3P
WHITE
2
3
YELLOW
3
Q9031
DS
1
G
2
DGND_SM
NC
D9031
NC
12
EVL_12_21_T3D_CP1Q2B12Y_2C_2P
POWER LED
D9032
Pure White
-
+
Yellow
-
R9031
2
270_5%_2
R9032
1
270_5%_2
BATTERY LED
D9033
Pure White
-
+
Yellow
-
EVL_12_22_Y2ST3D_C30_2C_3P
WIRELESS LED
R9033
1
270_5%_2
P3V3AL_SM
2 1
6011B0115101
P3V3AL_SM
2 1
D
6011B0137701
P3V3S_ISCT_SM
2 1
6011B0137701
C C
B
PVSM_VCC_SM
DGND_SM
P3V3S_ISCT_SM
2 1
R9038
0_5%_2_DY
C9021
DGND_SM
C9015
21
0.1UF_16V_2
P3V3S_SM
59
2 1
R9040
BI
59
BI
59
BI
59
BI
0_5%_2
59
BI
59
BI
21
1000PF_50V_2
59
SCARDRST
59
SCARDCLK
59
SCARDFCB
59
SCARDC6
SCARDDATA
SCARDC8
ICCINSERTN
ST_RIGHT_SM
ST_LEFT_SM
IM_5S_CLK_SM
IM_5S_DATA_SM
PCH_3S_SMCLK_SM
PCH_3S_SMDATA_SM
OUT
OUT
OUT
OUT
OUT
OUT
OUT
DGND_SM
TOUCHPAD
DGND_SM
6012B0474701
DGND_SM
CN9001
1
VCC
2
RST
3
CLK
4
C4
6
VPP
7
IO
8
C8
9
SW-CD
10
SW-CD-GND
5
GND
HAMB_083AA24F08B_10P
6026B0198201
SMART CARD READER CONN
CN9021
1
1
2
2
3
3
4
4
5
5
6
7
8
G1
6
G
G2
7
G
8
HIROSE_FH34SRJ_8S_0_5SH_50_8P
DGND_SM
DGND_SM
P3V3S_ISCT_SM
P3V3AL_SM
LED_SM_PWRSTBY#
BAT_SM_GRNLED#
BAT_SM_AMBERLED#
LED_3S_SM_SATA#
HDD_SM_HALTLED
WL_LED_SM_ALL#
SC_PWRSV#_SM
USB_P7_SM_DN
USB_P7_SM_DP
IM_5S_DATA_SM
IM_5S_CLK_SM
R9039
2 1
0_5%_2
PCH_3S_SMDATA_SM
PCH_3S_SMCLK_SM
REFERENCE NUMBER:9000~9099
SMART CARD DOUGHTER BOARD
8
7 6
P3V3S_SM
ST_LEFT_SM
ST_RIGHT_SM
P5V0S_SM
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
CN9000
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
26
ACES_50501_0264N_001_26P
G
25
G
26
TMP121029001
DGND_SM
FIX9000
1
FIX_MASK
5 4
FIX_MASK FIX_MASK FIX_MASK
HDD_SM_HALTLED
G1
G2
DGND_SM
FIX9001
1
IN
DGND_SM
FIX9006
1
FIX_MASK FIX_MASK
FIX9004
1
FIX_MASK
FIX9002
1
FIX9007
1
FIX9005
1
FIX_MASK
FIX9003
1
R9035
10K_5%_2
21
R9037
21
100K_5%_2_DY
SCREW550_860_0_NP_1P
SCREW550_860_0_NP_1P
CHANGE by
R9036
1K_5%_2
21
HDD_STP#
Q9032
1
S1
2
G1
D1
D2
5
G2
S2
L2N7002DW1T1G
6
3
4
IN
LED_3S_SM_SATA#
HDD_STP#
WHITE
Pure White
2
-
Yellow
3
-
IN
YELLOW
6011B0137701
EVL_12_22_Y2ST3D_C30_2C_3P
D9030
+
1
SATA LED & HDD-HALTED LED
S9002
XXX
S9001
1
DGND_SM
1
DGND_SM
DATE
21-OCT-2002
2 3
S9005
SCREW240_460_0_1P
S9006
SCREW240_460_0_1P
S9007
SCREW250_460_0_1P
S9008
SCREW250_400_0_1P
S9003
SCREW220_600_1P
S9004
SCREW560_860_0_NP_1P
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
SMART CARD DB
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
P3V3S_ISCT_SM
R9034
270_5%_2
DGND_SM
1
DGND_SM
1
DGND_SM
1
DGND_SM
1
1
1
of
63 77
1
2 1
DGND_SM
DGND_SM
REV
X01
B
A A
Page 64
8
7 6 5 4 3 2 1
F F
CN3056
CRT_VSYNC_DB
48
BI
CRT_HSYNC_DB
48
BI
CRT_G_DB
48
IN
CRT_R_DB
48
IN
CRT_B_DB
48
IN
CRT_DDCDATA_DB
48
BI
CRT_DDCCLK_DB
48
BI
USB_P3_DN_DB
48
BI
USB_P3_DP_DB
48
BI
USB30_RX3_DN_DB
48
OUT
USB30_RX3_DP_DB
48
OUT
USB30_TX3_DN_DB
48
IN
USB30_TX3_DP_DB
48
E
P5V0DS_DB
D
USB DB
48
48
48
48
48
48
48
48
48
OUT
OUT
IN
BI
BI
IN
IN
IN
IN
IN
USB_P1_DN_DB
USB_P1_DP_DB
USB30_RX1_DN_DB
USB30_RX1_DP_DB
USB30_TX1_DN_DB
USB30_TX1_DP_DB
CPPWR_EN_DB
SLP_S4#_3R_DB
SLP_S3#_3R_DB
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ACES_51517_04001_001_40P
6012B0218428
DGND_USB
40
39
G2
G2
38
G1
G1
37
36
35
34
33
32
DGND_USB
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
E
D
CN3055
CRT_VSYNC
42
BI
CRT_HSYNC
42
BI
CRT_G_L
IN
42C2
CRT_R_L
IN
42C2
CRT_B_L
IN
42C2
CRT_DDCDATA
42
BI
CRT_DDCCLK
42
BI
C
P5V0DS
USB_P3_DN
32
BI
USB_P3_DP
32
BI
USB30_RX3_DN
32
OUT
USB30_RX3_DP
32
OUT
USB30_TX3_DN
32
IN
USB30_TX3_DP
32
IN
USB_P1_DN
32
BI
USB_P1_DP
32
BI
USB30_RX1_DN
32
IN
USB30_RX1_DP
32
IN
USB30_TX1_DN
32
OUT
USB30_TX1_DP
32
OUT
CPPWR_EN
51
OUT
SLP_S4#_3R
16
OUT
SLP_S3#_3R
16
OUT
PLT_ID3
29
IN
B
A
8
7 6 5 4 3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
G1
37
G2
38
39
40
6012B0218428
G1
G2
37
38
39
40
ACES_51517_04001_001_40P
CHANGE by
C
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
RESERVE
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
DATE
XXX
21-OCT-2002
2 1
C
SHEET
REV
X01
of
77 64
Page 65
8 7
6 5
P3V3S_CAM
4
3 2 1
D
ACES_50376_01001_001_10P
DGND_SYS1
CN600
1
2
3
4
5
6
7
GG10
8
9
G1 9
G2
6012B0452401
1
2
3
4
5
6
7
8
10
DGND_SYS1
DMIC_CLK_DB
OUT
OUT
DMIC_DATA_DB
2 1
BLM15AG121SN1D_500MA
L603
D
C604
1UF_16V_3
21
DGND_SYS1
C C
P3V3S_CAM
C651
C650
21
KNOWLES_SPK0415HM4H_B_8P
MIC600
GND_1
GND_2
GND_3
GND_4
LEFT
SELECT
CLOCK
DATA
3
4
2
2 1
R640
10K_5%_2
DGND_SYS1
DGND_SYS1
1
B
5
6
7
8
DGND_SYS1
VDD
4.7UF_6.3V_3
21
1000PF_50V_2
IN
DMIC_DATA_DB
IN IN
DMIC_CLK_DB
KNOWLES_SPK0415HM4H_B_8P
MIC601
1
VDD
5
GND_1
6
7
8
3
CLOCK
4
DATA
2
SELECT
GND_2
GND_3
GND_4
RIGHT
DGND_SYS1
P3V3S_CAM
C653
C652
21
21
1000PF_50V_2
DGND_SYS1
P3V3S_CAM
2 1
R641
10K_5%_2
4.7UF_6.3V_3
B
IN
DMIC_DATA_DB
DMIC_CLK_DB
REFERENCE NUMBER:600~649
MIC DOUGHTER BOARD
8
7 6
FIX600
1
FIX601
1
FIX_MASK
FIX_MASK
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 65
1
REV
X01
A A
Page 66
8 7
6 5
4
3 2 1
1MM
S3
SCREW320_700_800_1P
1
S18
SCREW320_600_1P
1
SCREW320_600_1P
S21
1
S4
SCREW300_700_1P
1
S2
SCREW320_800_NP_1P
1
D
C C
D
S13
SCREW300_700_1P
1
S14
S12
SCREW300_700_1P
1
S11
SCREW300_600_1P
1
SCREW320_700_800_1P
1
ST17
1
ST21
S10
1.6MM
STDPAD_1.15_6-TOP
SCREW320_600_1P
1
ST19
1
1.6MM
STDPAD_1.15_6-TOP
S9
SCREW320_600_1P
1
S24
SCREW315_550_1P
1
S8
SCREW330_600_0_1P
1
S6
SCREW330_600_0_1P
1
SCREW330_600_0_1P
S7
ST23
1
S25
SCREW330_600_0_1P
1
1MM
STDPAD_3.15_5.5_TOP
1
ST22
S15
SCREW350_700_NP_1P
1
STDPAD_3.15_5.5_TOP
1
1
1.6MM
6052B0103501
6052B0103501
STDPAD_1.15_6-TOP
6052B0103501
S16
B
SCREW300_700_1P
1
B
FIX1
FIX_MASK
1
FIX3
FIX_MASK FIX_MASK
1
FIX5
FIX_MASK
1
FIX7
FIX_MASK
1
8
7 6
FIX2
1
FIX4
1
FIX6
1
FIX8
1
FIX_MASK
FIX_MASK
FIX_MASK
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
SCREW
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77
66
1
REV
X01
A A
Page 67
8 7
SPI_CLK_FLH
CLK_R3S_KBPCI
C7510
21
CSC0402_DY
D
6 5
PVBAT
IN IN
C7511
21
C7514
CSC0402_DY
21
CSC0402_DY
C7516
C7515
21
21
CSC0402_DY
C7517
21
CSC0402_DY
CSC0402_DY
C7519
C7518
21
21
CSC0402_DY
4
IN IN
PVSIM
CSC0402_DY
C7540
21
3 2 1
11
VRP1V05A
C7539
C7541
21
CSC0402_DY
CSC0402_DY
C7538
21
21
CSC0402_DY
CSC0402_DY
D
AZ_R3S_BITCLK
IN
PVPACK
AZ_R3S_SDOUT
C7512
21
CSC0402_DY
IN
C7513
10
21
CSC0402_DY
VRPVBAT_3V
VRPVDDQ
IN
C7528
C7529
21
CSC0402_DY
IN IN
R_SPI_CLK_FLH
21
CSC0402_DY
VRPVBAT_5V
IN
CLK_KBC_SIO
C7533
21
CSC0402_DY
CLK_R3S_TPM
C7531
21
CSC0402_DY
IN IN
C7532
21
CSC0402_DY
C C
RF SOLUTION
C7547
C7546
C7545
C7544
C7543
C7542
21
21
CSC0402_DY
CSC0402_DY
21
21
CSC0402_DY
CSC0402_DY
21
21
CSC0402_DY
CSC0402_DY
B
P3V3S
C7553
C7554
21
21
CSC0402_DY
CSC0402_DY
C7557
C7556
21
21
CSC0402_DY
CSC0402_DY
P1V5
C7559
C7560
21
21
CSC0402_DY
CSC0402_DY
C7561
C7562
21
21
CSC0402_DY
CSC0402_DY
C7537
C7536
21
21
CSC0402_DY
C7564
21
CSC0402_DY
C7565
21
CSC0402_DY
P5V0DS
C7566
C7567
21
CSC0402_DY
CSC0402_DY
C7534
21
CSC0402_DY
C7568
C7569
21
21
CSC0402_DY
CSC0402_DY
C7535
21
CSC0402_DY
21
CSC0402_DY
P5V0S P1V05S
C7570
21
CSC0402_DY
C7555
21
B
CSC0402_DY
EMI SOLUTION
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
EMI & RF SOLUTION
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 67
Page 68
8
7 6 5 4 3 2 1
E
P3V3S_DGPU
2 1
R5013
D
DGPU_VID5 DGPU_VID1
10K_5%_2
2 1
R5011
10K_5%_2_DY
P3V3S_DGPU
2 1
R5016
C
DGPU_VID2
10K_5%_2_DY
2 1
R5030
10K_5%_2
B
57
68
70
DPB_DOCK_HPD
57 70
68
DPA_DOCK_HPD
A
8
MLPS TABLE
OUT OUT
DGPU_VID3
TP30
TP503 0
TP30
TP503 1
TP30
TP503 2
TP30
TP503 3
TP30
TP503 4
R5049
21
IN
IN
R5028
U5001
PART 2 0F 9
P3V3S_DGPU
2 1
R5014
2 1
R5015
P3V3S_DGPU
2 1
R5027
2 1
R5019
100K_5%_2
100K_5%_2
2 1
10K_5%_2_DY
10K_5%_2
10K_5%_2_DY
DGPU_VID4
10K_5%_2
1
1
1
1
1
GPU_TRSTB
GPU_TDI
GPU_TCK
GPU_TMS
GPU_TDO
THERM_CLK_GPU
THERM_DATA_GPU
P3V3S_DGPU
OUT OUT OUT
CLOSE TO GPU
R5045
OUT
OUT
ADP_PRES_OUT
70
DPB_DOCK_HPD
68
GPU_CTF
2 1
R5022
10K_5%_2_DY
2 1
P1V8S_DGPU
R5031
10K_5%_2
2 1
R5020
2 1
C5083
R5023
21
0.1UF_16V_2
P3V3S_DGPU
2 1
R5012
10K_5%_2_DY
2 1
R5000
10K_5%_2
BLM15AG121SN1D_500MA
FOR MARS ENBLE MLPS
P3V3S_DGPU
R5047
21
21
45.3K_1%_2
45.3K_1%_2
P3V3S_DGPU
R5069
D5000
IN
BAT54_30V_0.2A
OUT
OUT
68
57
68
70
499_1%_2
P3V3S_DGPU
2 1
249_1%_2
R5098
GPU_TESTEN
5.11K_1%_2_DY
P3V3S_DGPU
R5059
21
R5063
21
R5065
1K_5%_2
21
R5066
21
GPU_FDO
P1V8S_DGPU
L5011
2 1
R5046
R5048
100K_5%_2
2 1
2
NC
1 3
P3V3S_DGPU
R5068
10K_5%_2_DY
CLKREQ_PCIE5_N
DPA_DOCK_HPD
10K_5%_2_DY
R5064
21
10K_5%_2_DY
10K_5%_2_DY
R5061
21
10K_5%_2_DY
10K_5%_2_DY
GPU_THRM_DPLUS
GPU_THRM_DMINUS
13 MA
P1V8S_GPU_TSVDD
C5084
C5056
21
0.1UF_16V_2
2 1
0_5%_2_DY
2 1
0_5%_2_DY
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
DGPU_VID6
GPU_GPIO8
GPU_GPIO9
DGPU_VID5
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
DGPU_VID3
DGPU_VID2
2 1
DGPU_VID1
GPU_GPIO22
OUT
DGPU_VID4
OUT
TP24
TP506 0
GPU_TRSTB
GPU_TDI
GPU_TCK
GPU_TMS
GPU_TDO
12
C5057
10UF_6.3V
21
21
1UF_6.3V_2
MUTI GFX
AD29
GENLK_CLK
AC29
GENLK_VSY NC
AJ21
SWAPLOCKA
AK21
SWAPLOCKB
AR8
NC#AR8
AU8
NC#AU8
AP8
DBG_CNTL0
AW8
NC#AW8
AR3
NC#AR3
AR1
NC#AR1
AU1
DBG_DATA0
AU3
DBG_DATA1
AW3
DBG_DATA2
AP6
DBG_DATA3
AW5
DBG_DATA4
AU5
DBG_DATA5
AR6
DBG_DATA6
AW6
DBG_DATA7
AU6
DBG_DATA8
AT7
DBG_DATA9
AV7
DBG_DATA10
AN7
DBG_DATA11
AV9
DBG_DATA12
AT9
DBG_DATA13
AR10
DBG_DATA14
AW10
DBG_DATA15
AU10
DBG_DATA16
AP10
DBG_DATA17
AV11
DBG_DATA18
AT11
DBG_DATA19
AR12
DBG_DATA20
AW12
DBG_DATA21
AU12
DBG_DATA22
AP12
DBG_DATA23
AJ23
SMBCLK
AH23
SMBDATA
AK26
SCL
AJ26
SDA
GENERAL PUR POSE I/O
AH20
GPIO_0
AH18
GPIO_1
AN16
GPIO_2
AH17
GPIO_5_A C_BA TT
AJ17
GPIO_6_TAC H
AK17
GPIO_7_B LON
AJ13
GPIO_8_ROMS O
AH15
GPIO_9_ROMS I
AJ16
GPIO_10_ROMS CK
AK16
GPIO_11
AL16
GPIO_12
AM16
GPIO_13
AM14
GPIO_14_HP D2
AM13
GPIO_15_P WRC NTL_0
AK14
GPIO_16
AG30
GPIO_17_THE RMAL_I NT
AN14
GPIO_18_HP D3
AM17
GPIO_19_C TF
AL13
GPIO_20_P WRC NTL_1
AJ14
GPIO_21
AK13
GPIO_22_ROMC SB
AN13
CLKREQB
AG32
GPIO_29
AG33
GPIO_30
AJ19
GENERICA
AK19
GENERICB
AJ20
GENERICC
AK20
GENERICD
AJ24
GENERICE_ HPD4
AH26
GENERICF_ HPD5
AH24
GENERICG_HP D6
AC30
CEC_1
AK24
HPD1
AH13
DBG_VREFG
1
AL21 AD33
PX_EN
DEBUG
AD28
TESTEN
AM23
JTAG_TRSTB
AN23
JTAG_TDI
AK23
JTAG_TCK
AL24
JTAG_TMS
AM24
JTAG_TDO
THERMA L
AF29
DPLUS
AG29
DMINUS
AK32
GPIO_28_F DO
AL31
TS_A
AJ32
TSVDD
AJ33
TSVSS
DPA
DPB
DPC
DPD
SMBus
I2C
DAC1
BACO
DDC/AUX
AMD_MARS_M2_FCBGA_962P
MLPS
NC#AG21
NC_SVI2 #AC3 1
NC_SVI2 #AD3 0
NC_SVI2 #AD3 2
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
NC#AM30
NC#AM29
NC#AM21
DDCVGACLK
DDCVGADATA
NC#AU24
NC#AV23
NC#AT25
NC#AR24
NC#AU26
NC#AV25
NC#AT27
NC#AR26
NC#AR30
NC#AT29
NC#AV31
NC#AU30
NC#AR32
NC#AT31
NC#AT33
NC#AU32
NC#AU14
NC#AV13
NC#AT15
NC#AR14
NC#AU16
NC#AV15
NC#AT17
NC#AR16
NC#AU20
NC#AT19
NC#AT21
NC#AR20
NC#AU22
NC#AV21
NC#AT23
NC#AR22
NC#AF33
NC#AF32
NC#AA29
NC#AC32
NC#AL30
NC#AL29
NC#AN21
NC#AK30
NC#AK29
AU24
AV23
AT25
AR24
AU26
AV25
AT27
AR26
AR30
AT29
AV31
AU30
AR32
AT31
AT33
AU32
AU14
AV13
AT15
AR14
AU16
AV15
AT17
AR16
AU20
AT19
AT21
AR20
AU22
AV21
AT23
AR22
AD39
R
AD37
AVSSN
AE36
G
AD35
AVSSN
AF37
B
AE38
AVSSN
AC36
HSYNC
AC38
VSYNC
R5026
AB34
RSET
499_1%_2
AD34
AVDD
AE34
AVSSQ
AC33
VDD1DI
AC34
VSS1DI
V13
NC#V13
U13
NC#U13
AF33
AF32
AA29
AG21
AC32
AC31
AD30
AD32
AM34
PS_0
AD31
PS_1
AG31
PS_2
PS_3
AM26
AN26
AM27
AUX1P
AL27
AUX1N
AM19
AL19
AN20
AUX2P
AM20
AUX2N
AL30
AM30
AL29
AM29
R5051
AN21
AM21
AK30
AK29
AJ30
AJ31
GPU_THRM_DPLUS
GPU_THRM_DMINUS
16
25
DGPU_PWR_EN#
P3V3S_DGPU
R5079
10K_5%_2
21
21
68
IN
PS_0
68
IN
PS_1
68
IN
PS_2
68
IN
PS_3
R5052
21
21
51K_5%_2_DY
51K_5%_2_DY
BI
BI
BI
BI
BI
BI
7 6 5 4 3
EN_5V_3V
25
THERM#
IN
SSM3K7002BFU
P3V3S_DGPU
R5033
10K_5%_2
21
C5045
21
0.1UF_16V_2
DPA_DOCK_CLK
DPA_DOCK_DAT
DPB_DOCK_CLK_AUX_DP
DPB_DOCK_DAT_AUX_DN
DPB_DOCK_CLK_AUX_DP
DPB_DOCK_DAT_AUX_DN
1000PF_50V_2
OUT
OUT
R5320
Q5321
1
G
Q5314
2
G1
5
G2
L2N7002DW1T1G
P1V8S_DGPU
12
C5046
21
57
57
CHANGE by
MMBT3904
1
Q5300
B
CE
2 3
C5302
2 1
2 1
R5303
0_5%_2
P3V3S
10K_5%_2
21
3
DS
2
1
THERM_CLK_GPU
S1
6
PCH_KBC_SMCLK
D1
3
PCH_KBC_SMDATA
D2
4
THERM_DATA_GPU
S2
DGPU_PWR_EN#
C5047
10UF_6.3V
21
1UF_6.3V_2
P3V3S
R5053
21
XXX
R5305
21
2.2K_5%_2
R5304
0_5%_2_DY
OUT
DGPU_PWR_EN
THRMTRIP#
100K_5%_2_DY
R5054
21
100K_5%_2_DY
P3V3S
THERM SENSOR
C5306
21
0.1UF_16V_2
U5300
1
VDD
2
DP
3
DN
SMSC_EMC1412_1_ACZL_TR_MSOP_8P
2 1
DGPU_PWR_EN
50
68
IN
51
28
IN
51
28
IN
6850
IN
IN
1K_5%_2
BI
DPA_DOCK_AUX_DP
BI
DPA_DOCK_AUX_DN
68
PS_2
DATE
21-OCT-2002
2 1
SMCLK
SMDATA
ALERT#
GND THERM#/ADDR
SSM3K7002FU_DY
P3V3S
C5309
21
R5308
2 1
OUT
68
PS_0
OUT
R5307
10K_5%_2
21
8
7
6
5 4
1
IN
R5310
21
1UF_6.3V_2
3
Q5000
DS
G
L2N7002WT1G_DY
2
P1V8S_DGPU
R5001
OUT
R5002
57
57
P1V8S_DGPU
R5007
21
RSC_0402_DY
R5008
21
4.75K_1%_2
SIZE
BI
BI
OUT
OUT
CLKREQ_PCIE5_N
3
Q5322
DS
G
2
Q5311
2
3
SD
G
AM2321P
1
10K_5%_2
1
21
8.45K_1%_2
2K_1%_2
21
68
C5021
21
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
C
SSM3K7002BFU
R5057
21
68
PS_1
12
C5019
21
0.082UF_16V
PS_3
0.68UF_10V_2
AMD-THAMES-1
CODE
1310xxxxx-0-0
CS
SHEET
1
10K_5%_2_DY
OUT
OUT
DOC.NUMBER
Q5312
G
IN
THERM_CLK_GPU
THERM_DATA_GPU
THERM_SCI#
P3V3S_DGPU
R5313
200_5%_2
21
3
DS
2
GPU_CTF
P1V8S_DGPU
R5003
21
8.45K_1%_2
R5004
C5020
2K_1%_2
21
P1V8S_DGPU
R5009
21
RSC_0402_DY
R5010
21
4.75K_1%_2
of
68
77
F F
E
D
68
C
21
CSC0402_DY
B
C5022
21
CSC0402_DY
A
REV
X01
Page 69
8
7 6 5 4 3 2 1
F F
E
D
C
E
D
C
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
CHANGE by
8
7 6 5 4 3
XXX
DATE
21-OCT-2002
2 1
C
SHEET
of
69 77
B
A
REV
X01
Page 70
8
7 6 5 4 3 2 1
F F
U5001
PART 1 0F 9
R5017
R5018
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
0.22UF_16V_2
2 1
2 1
1.69K_1%_2
1K_1%_2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PVPCIE
DPA_DOCK_HPD
DPB_DOCK_HPD
PEG_RX0_C_DP
PEG_RX0_C_DN
PEG_RX1_C_DP
PEG_RX1_C_DN
PEG_RX2_C_DP
PEG_RX2_C_DN
PEG_RX3_C_DP
PEG_RX3_C_DN
PVPCIE
IN
IN
32
32
32
32
32
32
32
32
R5420
0_5%_2
R5421
10K_5%_2_DY
0_5%_2
R5424
10K_5%_2_DY
R5423
2 1
2 1
2 1
2 1
2 1
A2 A1
C
D5422
DPA_DOCK_HPD
DPB_DOCK_HPD
U5001
PART 7 0F 9
LVDS CONTROL
LVTMDP
AMD_MARS_M2_FCBGA_962P
RSVD/VA RY_BL
RSVD/DI GON
TXCBP_D PB3 P
TXCBM_DP B3N
TX3P_DP B2P
TX3M_DPB 2N
TX4P_DP B1P
TX4M_DPB 1N
TX5P_DP B0P
TX5M_DPB 0N
NC#AF35
NC#AG36
TXCAP_D PA3 P
TXCAM_DP A3N
TX0P_DP A2P
TX0M_DPA 2N
TX1P_DP A1P
TX1M_DPA 1N
TX2P_DP A0P
TX2M_DPA 0N
NC#AN36
NC#AP37
AK27
AJ27
AK35
AL36
AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
AG36
AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
AP37
IN
DPB1_DOCK_DP
IN
DPB1_DOCK_DN
IN
DPB0_DOCK_DP
IN
DPB0_DOCK_DN
IN
DPA3_DOCK_DP
IN
DPA3_DOCK_DN
IN
DPA2_DOCK_DP
IN
DPA2_DOCK_DN
IN
DPA1_DOCK_DP
IN
DPA1_DOCK_DN
IN
DPA0_DOCK_DP
IN
DPA0_DOCK_DN
E
57
57
57
57
57
57
57
57
57
57
57
57
D
C
P3V3S
1
5
U5010
5
TSB_TC7SH17F_SSOP_5P_DY
1
4
2
4
2
3
3
BAT54C
3
P3V3S
IN
IN
C5427
R5425
R5426
1UF_6.3V_2_DY
C5428
10K_5%_2_DY
2 1
10K_5%_2_DY
2 1
2 1
1UF_6.3V_2_DY
D5429
1
2 1
2
PANASONIC_DB3X313J0L_SOT_3P_DY
P3V3S
1
3
2
100K_5%_2_DY
3
R5430
R5431
5.1K_5%_2_DY
2 1
2 1
Q5432
1
2
D5433
13
BAT54_30V_0.2A_DY
3
DS
G
SSM3K7002BFU_DY
2
NC
R5099
0_5%_2
R5434
100K_5%_2
21
2 1
OUT
DGPU_HPD_INTR#
B
PCIE_CALR_RX TEST_PG
2 1
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_CALR_TX
NC#N33
NC#N32
NC#N30
NC#N29
NC#L33
NC#L32
NC#L30
NC#L29
NC#K33
NC#K32
NC#J33
NC#J32
NC#K30
NC#K29
NC#H33
NC#H32
Y33
PEG_RX0_DP
Y32
PEG_RX0_DN
W33
PEG_RX1_DP
W32
PEG_RX1_DN
U33
PEG_RX2_DP
U32
PEG_RX2_DN
U30
PEG_RX3_DP
U29
PEG_RX3_DN
T33
T32
T30
T29
P33
P32
P30
P29
N32
N30
N29
L33
L32
L30
L29
K33
K32
J33
J32
K30
K29
H33
H32
Y30
PVDDCI_PCIE_CALRP
Y29
PVDDCI_PCIE_CALRN
BI
C5001
C5002
C5003
C5004
C5005
C5006
C5007
C5008
PEG_PLT_RST#
AA38
32
PEG_TX0_C_DP
32
PEG_TX0_C_DN
32
PEG_TX1_C_DP
32
PEG_TX1_C_DN
32
PEG_TX2_C_DP
32
E
32
32
PEG_TX2_C_DN
PEG_TX3_C_DP
PEG_TX3_C_DN
IN
IN
IN
IN
IN
IN
IN
IN
D
C
CLK_PCIE5_DP
CLK_PCIE5_DN
PEG_PLT_RST#
IN
IN
1K_5%_2
IN
B
DGPU_HOLD_RST#
2854
PLT_RST#
BI
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38 N33
NC#N38
M37
NC#M37
M35
NC#M35
L36
NC#L36
R5060
2 1
L38
NC#L38
K37
NC#K37
K35
NC#K35
J36
NC#J36
J38
NC#J38
H37
NC#H37
H35
NC#H35
G36
NC#G36
G38
NC#G38
F37
NC#F37
F35
NC#F35
E37
NC#E37
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AH16
AA30
PERSTB
AMD_MARS_M2_FCBGA_962P
PCI EXPRESS INTERFACE
CLOCK
P3V3S
0.1UF_16V_2
5
U5005
+
BI
R5110
100K_5%_2
1
4
2
2 1
-
TC7SZ08FU
3
CALIBRATION
C5150
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
C
CHANGE by
8
7 6 5 4 3
XXX
DATE
21-OCT-2002
2 1
CS
SHEET
of
70 77
A
REV
X01
Page 71
8 7
6 5
4
3 2 1
D
U5001
P1V8S_DGPU
L5023
2 1
BLM15AG221SN1D_300MA
P1V8S_DGPU
L5014
2 1
P1V8S_DGPU_SPLL_PVDD
BLM15AG121SN1D_500MA
B
130 MA
P1V8S_DGPU_MPLL_PVDD
C5036
C5034
10UF_6.3V
21
21
0.1UF_16V_2
75 MA
12 12
C5156
C5157
10UF_6.3V
21
21
0.1UF_16V_2 0.1UF_16V_2
C5035
21
1UF_6.3V_2
C5155
21
1UF_6.3V_2
AM10
AN10
AF30
AF31
AN9
H7
H8
PART 9 0F 9
XTALIN
XTALOUT
MPLL_PVDD
MPLL_PVDD
XO_IN
SPLL_PVDD
PLLS/XTAL
SPLL_VDDC
SPLL_PVSS
NC_XTAL_PVDD CLKTESTB
NC_XTAL_PVSS
XO_IN2
CLKTESTA
AV33
AU34
AW34
AW35
AK10
AL10
GPU_XTALIN
GPU_XTALOUT
R5021
21
1M_5%_2
X5000
1
4
27MHZ_12PF
C5069
21
12PF_50V_2
3
2
C5067
21
12PF_50V_2
D
C C
B
PVPCIE
L5005
2 1
BLM15AG121SN1D_500MA
100 MA
PVPCIE_DGPU_SPLL_VDDC
C5160
C5162
21
21
1UF_6.3V_2
12
C5161
10UF_6.3V
21
AMD_MARS_M2_FCBGA_962P
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 71
Page 72
8 7
6 5
4
3 2 1
D
P1V8S_DGPU
237 MA HDMI
188 MA DP
12
C5143
21
B
C5147
C5144
10UF_6.3V
21
1UF_6.3V_2
21
0.1UF_16V_2
R5025
150_1%_2_DY
R5024
150_1%_2_DY
R5029
150_1%_2
2 1
U5001
DP_VDDR DP_VDDC
AN24
NC#AN24
AP24
NC#AP24
AP25
NC#AP25
AP26
NC#AP26
AU28
NC#AU28
AV29
NC#AV29
AP20
NC#AP20
AP21
NC#AP21
AP22
NC#AP22
AP23
NC#AP23
AU18
NC#AU18
AV19
NC#AV19
AH34
DP_VDDR
AJ34
DP_VDDR
AF34
DP_VDDR
AG34
DP_VDDR
AM37
DP_VDDR
AL38
DP_VDDR
AM32
DP_VDDR
CALIBRATION
2 1
AW28
NC#AW28
AW18
NC#AW18
AM39
2 1
DP_CALR
DP GND
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC
NC#AP13
NC#AT13
NC#AP14
NC#AP15
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AP31
AP32
AN33
AP33
AL33
AM33
AK33
AK34
AN31
AP13
AT13
AP14
AP15
AN27
AP27
AP28
AW24
AW26
AN29
AP29
AP30
AW30
AW32
AN17
AP16
AP17
AW14
AW16
AN19
AP18
AP19
AW20
AW22
AN34
AP39
AR39
AU37
AF39
AH39
AK39
AL34
AV27
AR28
AV17
AR18
AN38
AM35
AN32
280 MA
C5081
C5085
21
21
NC_CAP
C5023
C5024
21
21
0.1UF_16V_2 0.1UF_16V_2
C5148
21
1UF_6.3V_2
12 12
C5027
21
1UF_6.3V_2
BLM15PD600SN1D
10UF_6.3V 10UF_6.3V
L5001
2 1
PART 8 0F 9
PVPCIE
D
C C
B
AMD_MARS_M2_FCBGA_962P
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 72
Page 73
8
7 6 5 4 3 2 1
2 1
10UF_6.3V
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
PVCORE_DGPU
+
C5151
21
330UF_2.5V_DY
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
I181
AMD_MARS_M2_FCBGA_962P
U5001
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PART 6 0F 9
GND
NC#AG22
VSS_MECH
VSS_MECH
VSS_MECH
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
AG22
NC FOR MARS
A39
AW1
AW39
F F
E
D
C
B
PAD5001
P1V35S_DGPU
VRPVCORE_DGPU
IN
12
POWERPAD_2_0610
P1V8S_DGPU
C5114
C5125
C5126
21
0.1UF_16V_2
E
C5025
21
2.2UF_6.3V_2
21
0.1UF_16V_2
C5026
C5000
21
2.2UF_6.3V_2
21
2.2UF_6.3V_2
12
10UF_6.3V
21
P1V8S_DGPU
L5012
BLM15AG121SN1D_500MA
D
NEED TO CHECK POWER TIMING
2 1
P3V3S_DGPU
L5016
NEED TO CHECK POWER TIMING
BLM15AG121SN1D_500MA
2 1
C
P1V8S_DGPU
L5013
BLM15AG121SN1D_500MA
2 1
B
C5111
C5113
21
21
0.1UF_16V_2
12
12
C5117
C5115
10UF_6.3V
21
21
P1V8S_DGPU_VDD_CT
C5132
C5055
21
21
0.1UF_16V_2
C5175
C5086
21
21
1UF_6.3V_2
P1V8S_DGPU_VDDR4
C5098
C5152
21
21
0.1UF_16V_2
GPU_VCC_SENSE
GPU_VSS_SENSE
2.2UF_6.3V_2
10UF_6.3V
12
C5065
21
1UF_6.3V_2
C5176
21
1UF_6.3V_2
1UF_6.3V_2
C5116
21
2.2UF_6.3V_2
10UF_6.3V
1UF_6.3V_2
OUT
TP500 1
OUT
U5001
1.5A
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
13 MA
AF26
AF27
AG26
AG27
25 MA
AF23
AF24
AG23
AG24
300 MA
AD12
AF11
AF12
AF13
AF15
AG11
AG13
AG15
AF28
1
AG28
AH29
AMD_MARS_M2_FCBGA_962P
MEM I/O
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
LEVEL
TRANS LATION
VDD_CT
VDD_CT
VDD_CT
VDD_CT
I/O
VDDR3
VDDR3
VDDR3
VDDR3
DVP
VDDR4
VDDR4
VDDR4
VDDR4
VDDR4
VDDR4
VDDR4
VDDR4
VOLTAGE
SENESE
FB_VDDC
FB_VDDCI
FB_GND
PART 5 0F 9
AA31
AA32
AA33
AA34
W30
Y31
V28
W29
100 MA
AB37
2.5A
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
1.4A
N27
T27
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AH22
AH27
AH28
M26
N24
R18
R21
R23
R26
T17
T20
T22
T24
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
8.8A
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
21
C5127
21
1UF_6.3V_2
C5164
21
NC#AA31
NC#AA32
NC#AA33
NC#AA34
NC#W30
NC#Y31
NC_BIF_ VDDC
NC_BIF_ VDDC
PCIE_PVDD
PCIE
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
BIF_VDDC
BACO
BIF_VDDC
VDDC
CORE
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
ISOLATED
CORE I/O
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
21
1UF_6.3V_2
0.1UF_16V_2
C5108
21
1UF_6.3V_2
C5087
21
C5107
21
C5110
21
C5128
C5129
21
1UF_6.3V_2
C5165
21
1UF_6.3V_2
21
0.01UF_50V_2
C5109
C5095
21
21
1UF_6.3V_2
C5089
21
1UF_6.3V_2
1UF_6.3V_2
C5104
21
1UF_6.3V_2
1UF_6.3V_2
C5099
21
1UF_6.3V_2
1UF_6.3V_2
C5130
21
21
1UF_6.3V_2
1UF_6.3V_2
PVCORE_DGPU
C5158
C5159
21
1UF_6.3V_2
1UF_6.3V_2
C5103
C5123
21
1UF_6.3V_2
1UF_6.3V_2
12
C5082
C5142
21
21
1UF_6.3V_2
C5101
C5091
21
21
1UF_6.3V_2
C5093
C5100
21
21
1UF_6.3V_2
C5131
C5136
21
21
1UF_6.3V_2
12
10UF_6.3V
21
PVPCIE
12
12
C5094
10UF_6.3V
21
21
C5139
10UF_6.3V
21
C5102
21
1UF_6.3V_2
1UF_6.3V_2
C5097
21
1UF_6.3V_2
C5133
21
1UF_6.3V_2
10UF_6.3V
PVCORE_DGPU
C5140
10UF_6.3V
21
C5096
21
1UF_6.3V_2
C5105
21
1UF_6.3V_2
1UF_6.3V_2
C5134
21
1UF_6.3V_2
1UF_6.3V_2
121212
C5141
10UF_6.3V
21
C5106
21
C5090
21
C5135
21
C5028
C5077
C5121
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-1
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
CHANGE by
8
7 6 5 4 3
XXX
DATE
21-OCT-2002
2 1
C
SHEET
of
73 77
A
REV
X01
Page 74
8 7
6 5
4
3 2 1
U5001
VM_DQA0_<31..0>
D
VM_DQA1_<31..0>
B
P1V35S_DGPU
R5103
21
R5101
21
P1V35S_DGPU
R5102
40.2_1%_2
C5038
R5100
100_1%_2
21
1UF_6.3V_2
21
40.2_1%_2
100_1%_2
21
BI
BI
C5037
21
1UF_6.3V_2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
120_1%_2
R5104
C37
DQA0_0
C35
DQA0_1
A35
DQA0_2
E34
DQA0_3
G32
DQA0_4
D33
DQA0_5
F32
DQA0_6
E32
DQA0_7
D31
DQA0_8
F30
DQA0_9
C30
DQA0_10
A30
DQA0_11
F28
DQA0_12
C28
DQA0_13
A28
DQA0_14
E28
DQA0_15
D27
DQA0_16
F26
DQA0_17
C26
DQA0_18
A26
DQA0_19
F24
DQA0_20
C24
DQA0_21
A24
DQA0_22
E24
DQA0_23
C22
DQA0_24
A22
DQA0_25
F22
DQA0_26
D21
DQA0_27
A20
DQA0_28
F20
DQA0_29
D19
DQA0_30
E18
DQA0_31
C18
DQA1_0
A18
DQA1_1
F18
DQA1_2
D17
DQA1_3
A16
DQA1_4
F16
DQA1_5
D15
DQA1_6
E14
DQA1_7
F14
DQA1_8
D13
DQA1_9
F12
DQA1_10
A12
DQA1_11
D11
DQA1_12
F10
DQA1_13
A10
DQA1_14
C10
DQA1_15
G13
DQA1_16
H13
DQA1_17
J13
DQA1_18
H11
DQA1_19
G10
DQA1_20
G8
DQA1_21
K9
DQA1_22
K10
DQA1_23
G9
DQA1_24
A8
DQA1_25
C8
DQA1_26
E8
DQA1_27
A6
DQA1_28
C6
DQA1_29
E6
DQA1_30
A5
DQA1_31
L18
MVREFDA
L20
MVREFSA
L27
NC#L27
N12
NC#N12
AG12
NC#AG12
2 1
M27
MEM_CALRP0
M12
NC#M12
AH12
NC#AH12
PART 3 0F 9
GDDR5/DD R3
MEMORY INTERFACE A
MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1
WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1B_1/DQMA_7
EDCA0_0/QSA_0
EDCA0_1/QSA_1
EDCA0_2/QSA_2
EDCA0_3/QSA_3
EDCA1_0/QSA_4
EDCA1_1/QSA_5
EDCA1_2/QSA_6
EDCA1_3/QSA_7
DDBIA0_0/QSA_0B
DDBIA0_1/QSA_1B
DDBIA0_2/QSA_2B
DDBIA0_3/QSA_3B
DDBIA1_0/QSA_4B
DDBIA1_1/QSA_5B
DDBIA1_2/QSA_6B
DDBIA1_3/QSA_7B
ADBIA0/ODTA0
ADBIA1/ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
MAA0_8/MAA_13
MAA1_8/MAA_14
MAA0_9/MAA_15
MAA1_9/RSVD
G24
VM_MAA0_<0>
J23
VM_MAA0_<1>
H24
VM_MAA0_<2>
J24
VM_MAA0_<3>
H26
VM_MAA0_<4>
J26
VM_MAA0_<5>
H21
VM_MAA0_<6>
G21
VM_MAA0_<7>
H19
VM_MAA1_<0>
H20
VM_MAA1_<1>
L13
VM_MAA1_<2>
G16
VM_MAA1_<3>
J16
VM_MAA1_<4>
H16
VM_MAA1_<5>
J17
VM_MAA1_<6>
H17
VM_MAA1_<7>
A32
C32
D23
E22
C14
A14
E10
D9
C34
D29
D25
E20
E16
E12
J10
D7
A34
E30
E26
C20
C16
C12
J11
F8
J21
G19
H27
G27
J14
H14
K23
K19
K20
K17
K24
K27
M13
K16
K21
J20
K26
L15
H23
J19
M21
M20
VM_MAA0_<7..0>
0
1
2
3
4
5
6
7
VM_MAA1_<7..0>
0
1
2
3
4
5
6
7
BI
VM_WCKA0_0_DP
BI
VM_WCKA0_0_DN
BI
VM_WCKA0_1_DP
BI
VM_WCKA0_1_DN
BI
VM_WCKA1_0_DP
BI
VM_WCKA1_0_DN
BI
VM_WCKA1_1_DP
BI
VM_WCKA1_1_DN
BI
VM_EDCA0_0
BI
VM_EDCA0_1
BI
VM_EDCA0_2
BI
VM_EDCA0_3
BI
VM_EDCA1_0
BI
VM_EDCA1_1
BI
VM_EDCA1_2
BI
VM_EDCA1_3
BI
VM_DDBIA0_0
BI
VM_DDBIA0_1
BI
VM_DDBIA0_2
BI
VM_DDBIA0_3
BI
VM_DDBIA1_0
BI
VM_DDBIA1_1
BI
VM_DDBIA1_2
BI
VM_DDBIA1_3
BI
VM_ADBIA0
BI
VM_ADBIA1
OUT
VM_CLKA0_DP
OUT
VM_CLKA0_DN
OUT
VM_CLKA1_DP
OUT
VM_CLKA1_DN
OUT
VM_RASA0#
OUT
VM_RASA1#
OUT
VM_CASA0#
OUT
VM_CASA1#
OUT
VM_CSA0#_0
OUT
VM_CSA1#_0
OUT
VM_CKEA0
OUT
VM_CKEA1
OUT
VM_WEA0#
OUT
VM_WEA1#
BI
VM_MAA0_<8>
BI
VM_MAA1_<8>
BI
BI
76
76
76
76
76
76
VM_MAA0_<7..0>
D
VM_MAA1_<7..0>
C C
B
A A
AMD_MARS_M2_FCBGA_962P
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-4
SIZE
8
7 6
5 4
CHANGE by
XXX
DATE
21-OCT-2002
2 3
1310xxxxx-0-0
CS
A3
SHEET
of
1
DOC.NUMBER
CODE
REV
X01
77 74
Page 75
8 7
6 5
4
3 2 1
U5001
VM_DQB0_<31..0>
D
VM_DQB1_<31..0>
B
P1V35S_DGPU P1V35S_DGPU
R5108
21
R5107
21
8
7 6
R5005
40.2_1%_2
100_1%_2
21
R5006
C5039
21
21
1UF_6.3V_2
40.2_1%_2
100_1%_2
BI
BI
C5040
21
1UF_6.3V_2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
C5
DQB0_0
C3
DQB0_1
E3
DQB0_2
E1
DQB0_3
F1
DQB0_4
F3
DQB0_5
F5
DQB0_6
G4
DQB0_7
H5
DQB0_8
H6
DQB0_9
J4
DQB0_10
K6
DQB0_11
K5
DQB0_12
L4
DQB0_13
M6
DQB0_14
M1
DQB0_15
M3
DQB0_16
M5
DQB0_17
N4
DQB0_18
P6
DQB0_19
P5
DQB0_20
R4
DQB0_21
T6
DQB0_22
T1
DQB0_23
U4
DQB0_24
V6
DQB0_25
V1
DQB0_26
V3
DQB0_27
Y6
DQB0_28
Y1
DQB0_29
Y3
DQB0_30
Y5
DQB0_31
AA4
DQB1_0
AB6
DQB1_1
AB1
DQB1_2
AB3
DQB1_3
AD6
DQB1_4
AD1
DQB1_5
AD3
DQB1_6
AD5
DQB1_7
AF1
DQB1_8
AF3
DQB1_9
AF6
DQB1_10
AG4
DQB1_11
AH5
DQB1_12
AH6
DQB1_13
AJ4
DQB1_14
AK3
DQB1_15
AF8
DQB1_16
AF9
DQB1_17
AG8
DQB1_18
AG7
DQB1_19
AK9
DQB1_20
AL7
DQB1_21
AM8
DQB1_22
AM7
DQB1_23
AK1
DQB1_24
AL4
DQB1_25
AM6
DQB1_26
AM1
DQB1_27
AN4
DQB1_28
AP3
DQB1_29
AP1
DQB1_30
AP5
DQB1_31
Y12
MVREFDB
AA12
MVREFSB
AMD_MARS_M2_FCBGA_962P
PART 4 0F 9
GDDR5/DDR3
MEMORY INTERFACE B
MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
EDCB0_0/QSB_0
EDCB0_1/QSB_1
EDCB0_2/QSB_2
EDCB0_3/QSB_3
EDCB1_0/QSB_4
EDCB1_1/QSB_5
EDCB1_2/QSB_6
EDCB1_3/QSB_7
DDBIB0_0/QSB_0B
DDBIB0_1/QSB_1B
DDBIB0_2/QSB_2B
DDBIB0_3/QSB_3B
DDBIB1_0/QSB_4B
DDBIB1_1/QSB_5B
DDBIB1_2/QSB_6B
DDBIB1_3/QSB_7B
ADBIB0/ODTB0
ADBIB1/ODTB1
CLKB0
CLKB0B
CLKB1
CLKB1B
RASB0B
RASB1B
CASB0B
CASB1B
CSB0B_0
CSB0B_1
CSB1B_0
CSB1B_1
CKEB0
CKEB1
WEB0B
WEB1B
MAB0_8/MAB_13
MAB1_8/MAB_14
MAB0_9/MAB_15
MAB1_9/RSVD
DRAM_RST
5 4
P8
VM_MAB0_<0>
T9
VM_MAB0_<1>
P9
VM_MAB0_<2>
N7
VM_MAB0_<3>
N8
VM_MAB0_<4>
N9
VM_MAB0_<5>
U9
VM_MAB0_<6>
U8
VM_MAB0_<7>
Y9
VM_MAB1_<0>
W9
VM_MAB1_<1>
AC8
VM_MAB1_<2>
AC9
VM_MAB1_<3>
AA7
VM_MAB1_<4>
AA8
VM_MAB1_<5>
Y8
VM_MAB1_<6>
AA9
VM_MAB1_<7>
H3
H1
T3
T5
AE4
AF5
AK6
AK5
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
T7
W7
L9
L8
AD8
AD7
T10
Y10
W10
AA10
P10
L10
AD10
AC10
U10
AA11
N10
AB11
T8
W8
U12
V12
AH11
R5080
21
R5081
10_5%_2
4.99K_1%_2
VM_MAB0_<7..0>
0
1
2
3
4
5
6
7
VM_MAB1_<7..0>
0
1
2
3
4
5
6
7
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
2 1
C5174
21
CHANGE by
VM_WCKB0_0_DP
VM_WCKB0_0_DN
VM_WCKB0_1_DP
VM_WCKB0_1_DN
VM_WCKB1_0_DP
VM_WCKB1_0_DN
VM_WCKB1_1_DP
VM_WCKB1_1_DN
VM_EDCB0_0
VM_EDCB0_1
VM_EDCB0_2
VM_EDCB0_3
VM_EDCB1_0
VM_EDCB1_1
VM_EDCB1_2
VM_EDCB1_3
VM_DDBIB0_0
VM_DDBIB0_1
VM_DDBIB0_2
VM_DDBIB0_3
VM_DDBIB1_0
VM_DDBIB1_1
VM_DDBIB1_2
VM_DDBIB1_3
VM_ADBIB0
VM_ADBIB1
VM_CLKB0_DP
VM_CLKB0_DN
VM_CLKB1_DP
VM_CLKB1_DN
VM_RASB0#
VM_RASB1#
VM_CASB0#
VM_CASB1#
VM_CSB0#_0
VM_CSB1#_0
VM_CKEB0
VM_CKEB1
VM_WEB0#
VM_WEB1#
VM_MAB0_<8>
VM_MAB1_<8>
R5041
2 1
51_1%_2
120PF_50V_2
OUT
XXX
BI
BI
77
77
77
77
77
77
DRAM_RST#
VM_MAB0_<7..0>
VM_MAB1_<7..0>
76 77
DATE
21-OCT-2002
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-3
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
CS
A3
SHEET
of
77 75
1
REV
X01
D
C C
B
A A
Page 76
8
7 6 5 4 3 2 1
F F
U5501
M2
2 1
1K_5%_2
1K_5%_2
M4
N2
N4
T2
T4
U2
U4
M13
M11
N13
N11
T13
T11
U13
U11
F13
F11
E13
E11
B13
B11
A13
A11
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
J2
J1
2 1
A5
U5
A10
U10
J14
J4
DQ31|DQ7
DQ30|DQ6
DQ29|DQ5
DQ28|DQ4
DQ27|DQ3
DQ26|DQ2
DQ25|DQ1
DQ24|DQ0
DQ23|DQ15
DQ22|DQ14
DQ21|DQ13
DQ20|DQ12
DQ19|DQ11
DQ18|DQ10
DQ17|DQ9
DQ16|DQ8
DQ15|DQ23
DQ14|DQ22
DQ13|DQ21
DQ12|DQ20
DQ11|DQ19
DQ10|DQ18
DQ9|DQ17
DQ8|DQ16
DQ7|DQ31
DQ6|DQ30
DQ5|DQ29
DQ4|DQ28
DQ3|DQ27
DQ2|DQ26
DQ1|DQ25
DQ0|DQ24
RFU/A12/ NC
A7/A8|A0/A10
A6/A11|A1/A9
A5/BA1|A3/BA3
A4/BA2|A2/BA0
A3/BA3|A5/BA1
A2/BA0|A4/BA2
A1/A9|A6/A11
A0/A10|A7/A8
WCK01|WCK23
WCK01#|WCK23#
WCK23|WCK01
WCK23#|WCK01#
EDC3|EDC0
EDC2|EDC1
EDC1|EDC2
EDC0|EDC3
DBI3#|DBI0#
DBI2#|DBI1#
DBI1#|DBI2#
DBI0#|DBI3#
RAS#|CA S#
CAS#|RAS#
CKE#
CK#
CK
CS#|WE#
WE#|CS#
ZQ
SEN
RESET#
MF
Vpp,NC
Vpp,NC1
VREFD1
VREFD2
VREFC
ABI#
SAM_K4G20325FD_FC04_BGA_170P
MIRROR
MF=1
VM_WCKA0_1_DP
VM_WCKA0_1_DN
VM_WCKA0_0_DP
VM_WCKA0_0_DN
R5507
R5506
21
21
60.4_1%_2
60.4_1%_2
VM_WEA0#
VM_CSA0#_0
DRAM_RST#
P1V35S_DGPU
C5503
21
2.37K_1%_2
1UF_6.3V_2_DY 1UF_6.3V_2
VVM_REFD1_A0
VVM_REFD2_A0
VVM_REFC_A0
C5500
21
5.49K_1%_2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
VM_EDCA0_1
VM_EDCA0_0
VM_EDCA0_3
VM_EDCA0_2
VM_DDBIA0_1
VM_DDBIA0_0
VM_DDBIA0_3
VM_DDBIA0_2
VM_CASA0#
VM_RASA0#
VM_CKEA0
VM_ADBIA0
R5508
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
IN
IN
IN
IN
120_1%_2
2 1
R5509
IN
R5510
BI
VM_DQA0_<12>
VM_DQA0_<15>
VM_DQA0_<14>
VM_DQA0_<13>
VM_DQA0_<11>
VM_DQA0_<9>
VM_DQA0_<10>
VM_DQA0_<8>
VM_DQA0_<7>
VM_DQA0_<6>
VM_DQA0_<5>
VM_DQA0_<4>
VM_DQA0_<0>
VM_DQA0_<2>
VM_DQA0_<1>
VM_DQA0_<3>
VM_DQA0_<27>
VM_DQA0_<29>
VM_DQA0_<25>
E
D
VM_DQA0_<26>
VM_DQA0_<30>
VM_DQA0_<24>
VM_DQA0_<31>
VM_DQA0_<28>
VM_DQA0_<16>
VM_DQA0_<18>
VM_DQA0_<19>
VM_DQA0_<17>
VM_DQA0_<22>
VM_DQA0_<21>
VM_DQA0_<20>
VM_DQA0_<23>
VM_MAA0_<8>
74
VM_MAA0_<0>
74
VM_MAA0_<1>
74
VM_MAA0_<3>
74
VM_MAA0_<2>
74
VM_MAA0_<5>
74
VM_MAA0_<4>
74
VM_MAA0_<6>
74
VM_MAA0_<7>
P1V35S_DGPU
P1V35S_DGPU P1V35S_DGPU
R5504
C5504
21
21
2.37K_1%_2
R5501
C5501
21
21
5.49K_1%_2
IN
IN
P1V35S_DGPU
R5503
21
1UF_6.3V_2_DY
R5500
21
1UF_6.3V_2
VM_CLKA0_DN
C
R5505
B
R5502
VM_CLKA0_DP
C5505
21
21
2.37K_1%_2
1UF_6.3V_2_DY
C5502
21
21
1UF_6.3V_2
5.49K_1%_2
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
VDDQ-D14
VDDQ-E5
VDDQ-E10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
VDDQ-T3
VDDQ-T12
VDDQ-T14
VDD-C10
VDD-D11
VDD-G11
VDD-G14
VDD-L11
VDD-L14
VDD-P11
VDD-R10
VSSQ-A1
VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14
VSSQ-E1
VSSQ-E3
VSSQ-E12
VSSQ-E14
VSSQ-F5
VSSQ-F10
VSSQ-H2
VSSQ-H13
VSSQ-K2
VSSQ-K13
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1
VSSQ-R3
VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14
VSSQ-V1
VSSQ-V3
VSSQ-V12
VSSQ-V14
VSS-B10
VSS-D10
VSS-G10
VSS-H14
VSS-K14
VSS-L10
VSS-P10
VSS-T10
VDD-C5
VDD-G1
VDD-G4
VDD-L1
VDD-L4
VDD-R5
VSS-B5
VSS-G5
VSS-H1
VSS-K1
VSS-L5
VSS-T5
P1V35S_DGPU
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
U1
U3
U12
U14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
C5507
C5506
21
21
10UF_6.3V_3
C5513
C5514
21
21
1UF_6.3V_2
C5508
21
1UF_6.3V_2
1UF_6.3V_2
C5515
C5516
21
1UF_6.3V_2
0.1UF_16V_2
C5509
C5510
21
21
1UF_6.3V_2
C5517
21
21
0.1UF_16V_2
0.1UF_16V_2
VM_CLKA1_DN
VM_CLKA1_DP
P1V35S_DGPU
R5555
C5555
21
2.37K_1%_2
C5552
R5552
21
5.49K_1%_2
1UF_6.3V_2
C5518
21
21
VM_DQA1_<14>
VM_DQA1_<15>
VM_DQA1_<13>
VM_DQA1_<12>
VM_DQA1_<10>
VM_DQA1_<8>
VM_DQA1_<11>
VM_DQA1_<9>
VM_DQA1_<7>
C5512
C5511
21
21
VM_DQA1_<4>
0.1UF_16V_2
0.1UF_16V_2
VM_DQA1_<5>
VM_DQA1_<6>
VM_DQA1_<1>
VM_DQA1_<0>
VM_DQA1_<3>
VM_DQA1_<2>
VM_DQA1_<27>
VM_DQA1_<24>
VM_DQA1_<26>
VM_DQA1_<25>
VM_DQA1_<31>
VM_DQA1_<28>
VM_DQA1_<30>
VM_DQA1_<29>
VM_DQA1_<16>
VM_DQA1_<17>
VM_DQA1_<18>
VM_DQA1_<19>
21
VM_DQA1_<23>
0.1UF_16V_2
VM_DQA1_<20>
VM_DQA1_<22>
VM_DQA1_<21>
P1V35S_DGPU
R5556
21
60.4_1%_2
IN
IN
R5554
C5554
21
2.37K_1%_2
1UF_6.3V_2_DY
C5551
R5551
21
5.49K_1%_2
1UF_6.3V_2
VM_MAA1_<8>
VM_MAA1_<7>
VM_MAA1_<6>
VM_MAA1_<5>
VM_MAA1_<4>
VM_MAA1_<3>
VM_MAA1_<2>
VM_MAA1_<1>
VM_MAA1_<0>
R5557
21
60.4_1%_2
P1V35S_DGPU P1V35S_DGPU
R5553
21
1UF_6.3V_2_DY
R5550
21
1UF_6.3V_2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
VM_WCKA1_1_DP
VM_WCKA1_1_DN
VM_WCKA1_0_DP
VM_WCKA1_0_DN
VM_EDCA1_1
VM_EDCA1_0
VM_EDCA1_3
VM_EDCA1_2
VM_DDBIA1_1
VM_DDBIA1_0
VM_DDBIA1_3
VM_DDBIA1_2
VM_RASA1#
VM_CASA1#
VM_CKEA1
VM_CSA1#_0
VM_WEA1#
DRAM_RST#
C5553
21
21
2.37K_1%_2
1UF_6.3V_2_DY
C5550
21
21
5.49K_1%_2
1UF_6.3V_2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
IN
IN
IN
IN
R5558
VVM_REFD1_MA0
VVM_REFD2_MA0
VVM_REFC_MA0
VM_ADBIA1
IN
2 1
R5559
R5560
120_1%_2
BI
M13
M11
N11
U11
E11
B11
A11
K11
H11
2 1
1K_5%_2
2 1
1K_5%_2
M2
M4
N2
N4
T2
T4
U2
U4
N13
T13
T11
U13
F13
F11
E13
B13
A13
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
H10
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
J2
J1
A5
U5
A10
U10
J14
J4
U5551
DQ31|DQ7
DQ30|DQ6
DQ29|DQ5
DQ28|DQ4
DQ27|DQ3
DQ26|DQ2
DQ25|DQ1
DQ24|DQ0
DQ23|DQ15
DQ22|DQ14
DQ21|DQ13
DQ20|DQ12
DQ19|DQ11
DQ18|DQ10
DQ17|DQ9
DQ16|DQ8
DQ15|DQ23
DQ14|DQ22
DQ13|DQ21
DQ12|DQ20
DQ11|DQ19
DQ10|DQ18
DQ9|DQ17
DQ8|DQ16
DQ7|DQ31
DQ6|DQ30
DQ5|DQ29
DQ4|DQ28
DQ3|DQ27
DQ2|DQ26
DQ1|DQ25
DQ0|DQ24
RFU/A12/ NC
A7/A8|A0/A10
A6/A11|A1/A9
A5/BA1|A3/BA3
A4/BA2|A2/BA0
A3/BA3|A5/BA1
A2/BA0|A4/BA2
A1/A9|A6/A11
A0/A10|A7/A8
WCK01|WCK23
WCK01#|WCK23#
WCK23|WCK01
WCK23#|WCK01#
EDC3|EDC0
EDC2|EDC1
EDC1|EDC2
EDC0|EDC3
DBI3#|DBI0#
DBI2#|DBI1#
DBI1#|DBI2#
DBI0#|DBI3#
RAS#|CA S#
CAS#|RAS#
CKE#
CK#
CK
CS#|WE#
WE#|CS#
ZQ
SEN
RESET#
MF
Vpp,NC
Vpp,NC1
VREFD1
VREFD2
VREFC
ABI#
SAM_K4G20325FD_FC04_BGA_170P
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
VDDQ-D14
VDDQ-E5
VDDQ-E10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
VDDQ-T3
VDDQ-T12
VDDQ-T14
VDD-C10
VDD-D11
VDD-G11
VDD-G14
VDD-L11
VDD-L14
VDD-P11
VDD-R10
VSSQ-A1
VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14
VSSQ-E1
VSSQ-E3
VSSQ-E12
VSSQ-E14
VSSQ-F5
VSSQ-F10
VSSQ-H2
VSSQ-H13
VSSQ-K2
VSSQ-K13
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1
VSSQ-R3
VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14
VSSQ-V1
VSSQ-V3
VSSQ-V12
VSSQ-V14
VSS-B10
VSS-D10
VSS-G10
VSS-H14
VSS-K14
VSS-L10
VSS-P10
VSS-T10
VDD-C5
VDD-G1
VDD-G4
VDD-L1
VDD-L4
VDD-R5
VSS-B5
VSS-G5
VSS-H1
VSS-K1
VSS-L5
VSS-T5
P1V35S_DGPU
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
U1
U3
U12
U14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
C5557
C5556
21
21
10UF_6.3V_3
C5563
C5564
21
1UF_6.3V_2
C5558
C5559
21
21
1UF_6.3V_2
1UF_6.3V_2
C5565
C5566
21
21
21
1UF_6.3V_2
0.1UF_16V_2
C5560
C5561
21
21
1UF_6.3V_2
1UF_6.3V_2
C5567
C5568
21
21
0.1UF_16V_2
0.1UF_16V_2
C5562
21
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
E
D
C
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
VRAM-1
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
C
CHANGE by
8
7 6 5 4 3
XXX
DATE
21-OCT-2002
2 1
CS
SHEET
of
76 77
A
REV
X01
Page 77
8
7 6 5 4 3 2 1
F F
U5601
M2
2 1
1K_5%_2
M4
N2
N4
T2
T4
U2
U4
M13
M11
N13
N11
T13
T11
U13
U11
F13
F11
E13
E11
B13
B11
A13
A11
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
J2
J1
A5
U5
A10
U10
J14
J4
DQ31|DQ7
DQ30|DQ6
DQ29|DQ5
DQ28|DQ4
DQ27|DQ3
DQ26|DQ2
DQ25|DQ1
DQ24|DQ0
DQ23|DQ15
DQ22|DQ14
DQ21|DQ13
DQ20|DQ12
DQ19|DQ11
DQ18|DQ10
DQ17|DQ9
DQ16|DQ8
DQ15|DQ23
DQ14|DQ22
DQ13|DQ21
DQ12|DQ20
DQ11|DQ19
DQ10|DQ18
DQ9|DQ17
DQ8|DQ16
DQ7|DQ31
DQ6|DQ30
DQ5|DQ29
DQ4|DQ28
DQ3|DQ27
DQ2|DQ26
DQ1|DQ25
DQ0|DQ24
RFU/A12/ NC
A7/A8|A0/A10
A6/A11|A1/A9
A5/BA1|A3/BA3
A4/BA2|A2/BA0
A3/BA3|A5/BA1
A2/BA0|A4/BA2
A1/A9|A6/A11
A0/A10|A7/A8
WCK01|WCK23
WCK01#|WCK23#
WCK23|WCK01
WCK23#|WCK01#
EDC3|EDC0
EDC2|EDC1
EDC1|EDC2
EDC0|EDC3
DBI3#|DBI0#
DBI2#|DBI1#
DBI1#|DBI2#
DBI0#|DBI3#
RAS#|CA S#
CAS#|RAS#
CKE#
CK#
CK
CS#|WE#
WE#|CS#
ZQ
SEN
RESET#
MF
Vpp,NC
Vpp,NC1
VREFD1
VREFD2
VREFC
ABI#
SAM_K4G20325FD_FC04_BGA_170P
MIRROR
MF=1
R5607
R5606
21
21
60.4_1%_2
60.4_1%_2
VM_CSB0#_0
R5603
C5603
21
21
2.37K_1%_2
R5600
C5600
21
21
5.49K_1%_2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
VM_WCKB0_1_DP
VM_WCKB0_1_DN
VM_WCKB0_0_DP
VM_WCKB0_0_DN
VM_EDCB0_1
VM_EDCB0_0
VM_EDCB0_3
VM_EDCB0_2
VM_DDBIB0_1
VM_DDBIB0_0
VM_DDBIB0_3
VM_DDBIB0_2
VM_CASB0#
VM_RASB0#
VM_WEB0#
DRAM_RST#
P1V35S_DGPU
VVM_REFD1_A1
1UF_6.3V_2_DY
VVM_REFD2_A1
VVM_REFC_A1
1UF_6.3V_2
VM_ADBIB0
VM_CKEB0
IN
IN
120_1%_2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
IN
IN
R5608
2 1
R5609
IN
2 1
1K_5%_2
R5610
BI
VM_DQB0_<9>
VM_DQB0_<15>
VM_DQB0_<8>
VM_DQB0_<13>
VM_DQB0_<14>
VM_DQB0_<12>
VM_DQB0_<10>
VM_DQB0_<11>
VM_DQB0_<7>
VM_DQB0_<6>
VM_DQB0_<5>
VM_DQB0_<4>
VM_DQB0_<3>
VM_DQB0_<2>
VM_DQB0_<0>
VM_DQB0_<1>
VM_DQB0_<24>
VM_DQB0_<28>
VM_DQB0_<27>
E
D
VM_DQB0_<25>
VM_DQB0_<30>
VM_DQB0_<31>
VM_DQB0_<29>
VM_DQB0_<26>
VM_DQB0_<17>
VM_DQB0_<16>
VM_DQB0_<18>
VM_DQB0_<20>
VM_DQB0_<21>
VM_DQB0_<23>
VM_DQB0_<19>
VM_DQB0_<22>
VM_MAB0_<8>
VM_MAB0_<0>
VM_MAB0_<1>
VM_MAB0_<3>
VM_MAB0_<2>
VM_MAB0_<5>
VM_MAB0_<4>
VM_MAB0_<6>
VM_MAB0_<7>
P1V35S_DGPU
VM_CLKB0_DN
C
P1V35S_DGPU
R5605
B
R5602
VM_CLKB0_DP
P1V35S_DGPU
C5605
21
21
2.37K_1%_2
1UF_6.3V_2_DY
C5602
21
21
1UF_6.3V_2
5.49K_1%_2
R5604
R5601
IN
IN
P1V35S_DGPU
C5604
21
21
2.37K_1%_2
1UF_6.3V_2_DY
C5601
21
21
1UF_6.3V_2
5.49K_1%_2
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
VDDQ-D14
VDDQ-E5
VDDQ-E10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
VDDQ-T3
VDDQ-T12
VDDQ-T14
VDD-C10
VDD-D11
VDD-G11
VDD-G14
VDD-L11
VDD-L14
VDD-P11
VDD-R10
VSSQ-A1
VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14
VSSQ-E1
VSSQ-E3
VSSQ-E12
VSSQ-E14
VSSQ-F5
VSSQ-F10
VSSQ-H2
VSSQ-H13
VSSQ-K2
VSSQ-K13
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1
VSSQ-R3
VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14
VSSQ-V1
VSSQ-V3
VSSQ-V12
VSSQ-V14
VSS-B10
VSS-D10
VSS-G10
VSS-H14
VSS-K14
VSS-P10
VDD-C5
VDD-G1
VDD-G4
VDD-L1
VDD-L4
VDD-R5
VSS-B5
VSS-G5
VSS-H1
VSS-K1
VSS-L5
VSS-L10
VSS-T5
VSS-T10
P1V35S_DGPU
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
U1
U3
U12
U14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
C5607
C5606
21
10UF_6.3V_3
C5614
C5613
21
21
1UF_6.3V_2
1UF_6.3V_2
C5608
21
21
1UF_6.3V_2
1UF_6.3V_2
C5616
C5615
C5617
21
21
21
0.1UF_16V_2
0.1UF_16V_2
C5609
C5610
21
21
1UF_6.3V_2
C5618
21
0.1UF_16V_2
0.1UF_16V_2
R5655
21
2.37K_1%_2
R5652
21
5.49K_1%_2
1UF_6.3V_2
C5611
C5612
21
21
0.1UF_16V_2
0.1UF_16V_2
VM_CLKB1_DN
VM_CLKB1_DP
P1V35S_DGPU P1V35S_DGPU
R5654
C5655
21
21
1UF_6.3V_2_DY
C5652
R5651
21
21
1UF_6.3V_2
VM_DQB1_<15>
VM_DQB1_<14>
VM_DQB1_<13>
VM_DQB1_<8>
VM_DQB1_<12>
VM_DQB1_<9>
VM_DQB1_<11>
VM_DQB1_<10>
VM_DQB1_<1>
VM_DQB1_<4>
VM_DQB1_<7>
VM_DQB1_<6>
VM_DQB1_<3>
VM_DQB1_<5>
VM_DQB1_<0>
VM_DQB1_<2>
VM_DQB1_<26>
VM_DQB1_<24>
VM_DQB1_<27>
VM_DQB1_<25>
VM_DQB1_<29>
VM_DQB1_<30>
VM_DQB1_<31>
VM_DQB1_<28>
VM_DQB1_<18>
VM_DQB1_<16>
VM_DQB1_<19>
VM_DQB1_<17>
VM_DQB1_<23>
VM_DQB1_<22>
VM_DQB1_<21>
VM_DQB1_<20>
VM_MAB1_<8>
VM_MAB1_<7>
VM_MAB1_<6>
VM_MAB1_<5>
VM_MAB1_<4>
VM_MAB1_<3>
VM_MAB1_<2>
VM_MAB1_<1>
VM_MAB1_<0>
P1V35S_DGPU
C5654
21
2.37K_1%_2
1UF_6.3V_2_DY
C5651
21
1UF_6.3V_2
5.49K_1%_2
R5656
21
IN
IN
P1V35S_DGPU
R5653
21
2.37K_1%_2
R5650
21
5.49K_1%_2
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
VM_WCKB1_1_DP
VM_WCKB1_1_DN
VM_WCKB1_0_DP
VM_WCKB1_0_DN
VM_EDCB1_1
VM_EDCB1_0
VM_EDCB1_3
VM_EDCB1_2
VM_DDBIB1_1
VM_DDBIB1_0
VM_DDBIB1_3
VM_DDBIB1_2
VM_RASB1#
VM_CASB1#
R5657
21
60.4_1%_2
60.4_1%_2
VM_CSB1#_0
VM_WEB1#
C5653
21
1UF_6.3V_2_DY
VVM_REFD1_MA1
VVM_REFD2_MA1
VVM_REFC_MA1
C5650
21
1UF_6.3V_2
VM_CKEB1
IN
IN
R5658
120_1%_2
DRAM_RST#
VM_ADBIB1
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI BI
BI
IN
IN
IN
2 1
R5659
IN
R5660
BI
M11
1K_5%_2
2 1
1K_5%_2
M2
M4
N2
N4
T2
T4
U2
U4
M13
N13
N11
T13
T11
U13
U11
F13
F11
E13
E11
B13
B11
A13
A11
F2
F4
E2
E4
B2
B4
A2
A4
J5
K4
K5
K10
K11
H10
H11
H5
H4
D4
D5
P4
P5
R2
R13
C13
C2
P2
P13
D13
D2
G3
L3
J3
J11
J12
G12
L12
J13
J10
2 1
J2
J1
A5
U5
A10
U10
J14
J4
U5651
DQ31|DQ7
DQ30|DQ6
DQ29|DQ5
DQ28|DQ4
DQ27|DQ3
DQ26|DQ2
DQ25|DQ1
DQ24|DQ0
DQ23|DQ15
DQ22|DQ14
DQ21|DQ13
DQ20|DQ12
DQ19|DQ11
DQ18|DQ10
DQ17|DQ9
DQ16|DQ8
DQ15|DQ23
DQ14|DQ22
DQ13|DQ21
DQ12|DQ20
DQ11|DQ19
DQ10|DQ18
DQ9|DQ17
DQ8|DQ16
DQ7|DQ31
DQ6|DQ30
DQ5|DQ29
DQ4|DQ28
DQ3|DQ27
DQ2|DQ26
DQ1|DQ25
DQ0|DQ24
RFU/A12/ NC
A7/A8|A0/A10
A6/A11|A1/A9
A5/BA1|A3/BA3
A4/BA2|A2/BA0
A3/BA3|A5/BA1
A2/BA0|A4/BA2
A1/A9|A6/A11
A0/A10|A7/A8
WCK01|WCK23
WCK01#|WCK23#
WCK23|WCK01
WCK23#|WCK01#
EDC3|EDC0
EDC2|EDC1
EDC1|EDC2
EDC0|EDC3
DBI3#|DBI0#
DBI2#|DBI1#
DBI1#|DBI2#
DBI0#|DBI3#
RAS#|CA S#
CAS#|RAS#
CKE#
CK#
CK
CS#|WE#
WE#|CS#
ZQ
SEN
RESET#
MF
Vpp,NC
Vpp,NC1
VREFD1
VREFD2
VREFC
ABI#
SAM_K4G20325FD_FC04_BGA_170P
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
VDDQ-D14
VDDQ-E5
VDDQ-E10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
VDDQ-T3
VDDQ-T12
VDDQ-T14
VDD-C10
VDD-D11
VDD-G11
VDD-G14
VDD-L11
VDD-L14
VDD-P11
VDD-R10
VSSQ-A1
VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14
VSSQ-E1
VSSQ-E3
VSSQ-E12
VSSQ-E14
VSSQ-F5
VSSQ-F10
VSSQ-H2
VSSQ-H13
VSSQ-K2
VSSQ-K13
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1
VSSQ-R3
VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14
VSSQ-V1
VSSQ-V3
VSSQ-V12
VSSQ-V14
VSS-B10
VSS-D10
VSS-G10
VSS-H14
VSS-K14
VSS-P10
VDD-C5
VDD-G1
VDD-G4
VDD-L1
VDD-L4
VDD-R5
VSS-B5
VSS-G5
VSS-H1
VSS-K1
VSS-L5
VSS-L10
VSS-T5
VSS-T10
P1V35S_DGPU
B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14
C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10
A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
U1
U3
U12
U14
B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10
C5657
C5656
21
10UF_6.3V_3
C5659
C5658
21
21
1UF_6.3V_2
1UF_6.3V_2
C5664
C5663
21
21
1UF_6.3V_2
1UF_6.3V_2
C5667
C5665
C5666
21
21
0.1UF_16V_2
0.1UF_16V_2
C5660
21
21
1UF_6.3V_2
1UF_6.3V_2
C5661
C5662
21
21
0.1UF_16V_2
0.1UF_16V_2
C5668
21
21
0.1UF_16V_2
0.1UF_16V_2
E
D
C
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
VRAM-2
DOC.NUMBER
CODE
SIZE
1310xxxxx-0-0
C
CHANGE by
8
7 6 5 4 3
XXX
DATE
21-OCT-2002
2 1
CS
SHEET
of
77 77
A
REV
X01