HP DV52112BR Schematic

THIS DRAWING AND SPECIFICATIONS, HEREIN, ARE THE PROPERTY OF INVENTEC
CORPORATION AND SHALL NOT BE REPODUCED, COPIED, OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION, INVENTEC CORPORATION 2009 ALL RIGHT RESERVED
DATE
AMD DANUBE PLATFORM
CHANGE NO.
REV
SI - R Build
U811 Hynix DDR3 6019B0647101 R1206 Install , R1186 Open U811 Samsung DDR3 6019B0648501 R1206 Open , R1186 Install
U805 Change to 6019B0653601 CN804 Change to 6026B0184301 CN807 Change to 6026B0184301 CN808 Change to 6026B0121002
DRAWER DESIGN CHECK RESPONSIBLE
SIZE = FILE NAME :
P/N
XXXXXXXXXXXX
EE POWER
3
XXXX-XXXXXX-XX
2009/12/21
DATE
VER :
DATE
TITLE
SIZE
A3
INVENTEC
ST145a-UMA
Project Name
DOC. NUMBER REV
CODE
Model_No X01
CS
SHEET
511
OF
Index Of Content
PAGE
01- Project Name 02- Index
03- Block Diagram 04- Power Procedure 05- NOTE
06- DC & BATTERY CHARGER 07- BATTERY CONN 08- +V5A & +V3A & +V2.5S 09- +V1.2A & +VCC_NB 10- +VCC_CORE & +VCC_CORE_NB 11- +V1.1S & +V1.1A & +V1.05S 12- NOTE 13- +V1.5 & +V1.8S 14- POWER (SLEEP) 15- CLK GEN-RTM880N 16- CPU-1
17- CPU-2 18- CPU-3 19- CPU-4 20- FAN & THERMAL IC 21- RS880M-1 22- RS880M-2 23- RS880M-3
PAGE
24- RS880M-4 25- DDR3 DIMM0
26- DDR3 DIMM1 27- DDR3 SIDE-PORT 28- SB820M-1
29- SB820M-2 30- SB820M-3 31- SB820M-4 32- SB820M-5 33- CRT 34- NOTE 35- LCM 36- HDMI 37- KBC 38- Keyboard CONN & Indicate LED 39- Card reader
40- SATA HDD & SATA ODD CONN 41- Touch screen & FingerPrint CONN 42- ESATA CONN & USB Board CONN 43- LAN 44- RJ45 CONN 45- AUDIO CODEC & SPEAKER CONN 46- HP JACK & MIC JACK 47- NOTE 48- WLAN & BLUETOOTH 49- WWAN
PAGE
50- NOTE 51- USB BOARD & BUTTON BOARD
52- HDD Board & ODD Board
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
Index
DOC. NUMBERSIZE
CODE
A3
Model_No X01
CS
SHEET
OF
REV
512
Inventec Confidential
PCB STACK UP
LAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1 LAYER 4 : IN2
LAYER 5 : VCC
LAYER 6 : BOT
FINGER PRINT
TOUCH SCREEN
MAIN BATT
P.07
System Charger &
DC/DC System power
USB_6
CLK GEN
REA-RTM880N-796
WEB CAM
P.42
USB_7
P.42
P.06
P.16
USB_4
P.36
USB_8
MINI CARD
CONN
(WWAN)
SIMCARD
CONN
P.50
CARD READER
P.50
Speaker
DMIC
P.47
P.36
Thermal Sensor
HDMI
LCM
VGA
USB_3
USB2 CONN
(DB)
P.50
USB_1
AU6433
5 in 1
Conn
P.40
P.40
AUDIO CODEC
IDT 92HD80B1
HP JACK
P.47
P.20
P.37
P.36
P.35
USB_2
USB1 CONN
(DB)
P.50
BLUE TOOTH
MIC JACK
USB_2
P.47
P.47
TMDS
LVDS
CRT
USB2.0
P.49
638 P(PGA) 45W/35W
Side-port
Memory
128MB
HDA
AMD
Champlain
S1G4 Processor
35mm X 35mm
Transport 3
P.16~19
Hyper
P.21~24
AMD
RS880M
A12
21mm X 21mm, 528pin BGA
DDR3
P.26
A-link X 4
P.29~33
AMD
SB820M
21mm X 21mm, 528pin BGA
A12
4.5W (Ext)
4.3W (Int)
Keyboard
P.39
DDR3
DDR3
PCI_EXPRESS
REALTEK
GIGA RTL8111DL-VB-GR
SATA SMBus
Accelerometer
LPC
KBC
ITE 8502E-KX
TouchPad
SYSTEM
P.39
CHANGE by OF
X1
LAN
RJ45
P.38
SPI
BIOS
channel A
channel B
PCIE_0
P.44
P.40
P.38
DDR III _SODIMM0
DDR III _SODIMM1
P.43
HDD
ALAN W 29-Nov-2009
Half MINI CARD
SATA_0
P.40
P.27
P.28
X1
PCIE_1 USB_8
CONN
(WLAN)
SATA_1
ODD
P.40
TITLE
SIZE
A3
P.48
SATA_2
USB_0
ESATA
P.42
INVENTEC
ST145a-UMA
Block Diagram
DOC. NUMBER
CODE
Model_No X01
CS
SHEET
513
REV
Adapter
(65W)
ADP_PRES
CHGCTRL_3
Selector
(Discrete)
Charger
(BQ24721C)
+VBDC
+VBADC
+VBATR
CHGCTRL_3
I_ADP
BATT_CLK
BATT_DATA
ADP_IP
ACOK
Main Battery
ALWAYS_EN
+V5A
+V1.2A_PG
VRM_PWRGD
VCC_NB_PG
RESUME_PWEN
5V/3.3V
(TPS51125)
+V1.1A
(TPS51117)
NB POWER
I/O POWER
(TPS51117)
DDR POWER
(Max17000ETG)
I = 0.02A
I = 0.05A
I = 8.6A
I = 9.593A
I = 7.42A
+V1.1A
+V0.75S
I = 1A
APL5610C
VRM_PWRGD
+VCC_NB
I = 9A
+V1.5
+V5AL
+V3AL
+V5A
+V3A
I = 7.6A
AM3402N
+V1.1S
CORE_PWEN#
AM3402N
CORE_PWEN#
AM3402N
CPU_VDDR
RT8015AP
+V1.8S
RT8015AP
I = 6.8A
+V1.5S
+V5S
I = 2.53A
+V3S
CPU_VDDR
I = 1.5A
+V1.8S
I = 1.3A
I = 1.23A
I = 2.6A
+V2.5S
(APL5315)
+V2.5S
I = 0.25A
+VDD_CORE
VGA POWER
(TPS51511)
VGAVCC_EN
VPCIE_SW
POW_SW1
SVC
SVD
CPU_PWEN
VRM_PWRGD
AMD Griff
MAX17480
+VDD_CORE
+VDD_CORE
+VDDNB_CORE
I = 38A
I = 4A
CHANGE by
INVENTEC
TITLE
ST145a-UMA
Power Procedure
CODE
CS
SHEET
DOC. NUMBER
REV
451
X01Model_No
OF
SIZE
10-Aug-2009ALAN W
A3
SB800
3
SB_PWRBTN#
SLP_S3#
SLP_S5#
4
KBC
ITE8502E
1
ALWAYS_PW_EN
5
CORE_PWEN
5
RESUME_PWEN
TPS51125
MAX 17000E
2
+V3A
+V5A
+V1.5
+V0.75S
+V1.1A
2
TPS51117
3
V1.1A_PG
6
5
CORE_PWEN#
5
CORE_PWEN#
7
CORE_PWEN_D#
7
CPU_PWEN
RT8015A
MOSFET
SWITCH
RT8015A
MAX 17480G
+V1.8S
+V5S
+V3.3S
+V1.5S
CPU_VDDR
VDD_CORE
VDDNB_CORE
6
6
10
9
VRM_PWRGD
8
8
VRM_PWRGD
TPS51117
9
MOSFET
VCC_NB
10
+V1.1S
SWITCH
INVENTEC
TITLE
ST145a-UMA
Power Sequence
CHANGE by
ALAN W 13-Aug-2009
SIZE
A3
CODE
CS
SHEET
DOC. NUMBER
Model_No X01
REV
515
OF
POWER ON SEQUENCW REQUIRED. SB820M
1. +V3.3A RAMP BEFORE +V1.1A
2. +V3.3S RAMP BEFORE +V1.8S
3. +V1.8S RAMP BEFORE +V1.1S
4. +V3.3S RAMP BEFORE +V1.1S
5. VDDIO_33_S RAMPING DOWN TIME <= 300uS
6. 50uS <= ALL POWER RAILS EXPECT VDDIO_33_S <= 40mS
7. 100uS <= VDDIO_33_S <= 40mS
RS880M
1. 0 <(+V3.3S) - (+V1.8S) < 2.1
2. +V1.8S RAMP BEFORE +V1.1S
3. +V1.1S RAMP BEFORE VCC_NB
SB_PWRGD
ALL_PWGD_IN
VCC_NB_PG
VCC_NB
10mS
GROUP B
GROUP A
CPU MEM CTL &
DDR3_SODIMM PWRS
CPU_THM/SB/SB_SCL1/2 SB_KB/SPI/LPC ROM PWRS
KBC IS READY
KBC IS POWERED BY +V3AL
+V1.1S/+VLDT
VRM_PWRGD
CPU_VDDR
VDD_CORE
VDDNB_CORE
+V2.5S
(CPU_VDDA_2.5_RUN)
+V1.8S
+V3S/+V5S/+V1.5S
CORE_PWEN
SLP_S3#
M_VREF/+0.75S
+V1.5
(CPU_VDDIO_SUS)
RESUME_PWEN
SLP_S5#
SB_PWRBTN#
RSMRST#
DUAL RAILS
ALWAYS_PW_EN
EC_PWRBTN#
AC_OK
(AC_IN DETECT)
+V3AL/+V5AL
5ms
POWER BUTTON PRESSED
+VIN/+19V
CHANGE by
ALAN W 17-Aug-2009
INVENTEC
TITLE
ST145a-UMA
CPU_VDDR & +V1.1A & +V1.1S
CODE
SIZE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REV
516
R849
1
100K_1%
2
R847
1
26.7K_1%
2
+VADP
7-
PWR-E
R848
1
200K_1%
2
R845
1
24.3K_1%
2
DGND
R846
1
26.7K_1%
2
DGND
SINGA_2WA1554_107111_7P
DGND PWR-A PWR-A PWR-A
1
R841 1K_1%
2
R842
1
13.7K_1%
2
DGND
Q815
FDMC8884
CN802
G1
AC IN_90W_5A
G
1
1
2
2
3
3
4
4
5
5
6
6
7
7
G2
G
37-
ADP_ID
N E P
1
V
5
O
5
8
_
2
1
1
C
V
_
0
F
5
u
_
2
1
2
F
. 0
p 0 0 2
2
RF
765
8
D
Q809
G
FDMC8884
S
4
123
L803
PWR-B
12
PCMB103T_8R2MS
8765
N
1
E
9
D
9
OP
8
_
G
2
R 0 4
2
0
N E
1
PWR-B
OP
5
RF
_
41S23
CHANGE by
2
0
2
9
0
C817
C
4 0
DGND
1
2
4.7uF_25v
R850
1
10K_5%
2
C847
56pF_50v
C846
1
0.0015uF_50V
2
CELLSEL#=0,Vcharger=12.6V CELLSEL#=1,Vcharger=16.8V
ALAN W 27-Jul-2009
AMBER
AC_LED
CN539 Pin6
WHITE
9 cell_2.8AHr_93W_8.78A
+VBATR
9-,10-,11-,12-,13-,35-,47-
PWR-A
1 2
7
5
2
5
5
5
v
v
8
8
8
5
5
C
C
2
C
2
1
1
_
_
F
F
u
u
7
7
.
2
2
.
4
4
DGND
PWR-E
1
2
Icharger=3A
v 5 2
1
_ F u 7
2
. 4
1
2
C860
4.7uF_25v
3 5 8 C
CHARGE_GND
2
1
N
N
1
1
E
E
4
4
P
P
1
1
O
O
C
C
1
1
_
_
V
V
0
0
5
5
2
2
_
_
F
F
p
p
3
3
3
3
RF
R852
12
34
0.01_1%
C900
0.1uF_16v
1
C901
1
2
0.1uF_25V
3
1
2
C814
0.1uF_16V
1
2
DGND
2
C899
1
2
PWR-A
0.1uF_25V
CHARGE_GND
Note:
high power trace
INVENTEC
TITLE
ST145a-UMA
DC & BATTERY CHARGER
CODE
SIZE
A3
CS
SHEET
CHG_LED# CN539 Pin5
Q801
S
G
AM7331P
C816 C859
4.7uF_25v
4.7uF_25v
0.1uF_25V
DOC. NUMBER
Model_No
D
1
2
C898
+VBDC
8 7 6 54
1
2
PWR-A
CHARGE_GND
OF
8-
PWR-E
517
REV
X01
AC IN
+V3AL
7-,8-,9-,29-,37-
PWR-B
1SS355W
D800
21
PWR-A
AMBER#
WHITE#
1
2
38­38-
C843
0.0015uF_50V
DGND
PWR-E
C842
0603_OPEN
PWR-A
12
ANALOG_AM7333P_POWER33_8P
Q808
D8
1S 2
7 3 4
PWR-E 6 5
G
DGND
C838
10pF_50v
1 2
DGND
+VADP
7-
1
2
0.1uF_25V
C836
DGND
L802
NFM60R30T222
12
3
4
DGND
1
R837 15K_5%
2
+VADPTR
1 2
C837 10pF_50v
+VADPTR
1
2
DGNDDGND
PWR-E
C839
0.1uF_25V
C811
1uF_25v
1
2
1
2
DGND
C834
C835
0.1uF_25V
0.1uF_25V
1
2
prevent KBC latchup
1
2
D804
13
R896
1
33K_5%
2
Q800
D
S
8
1 2
7
3
6 5
4
G
ANALOG_AM7333P_POWER33_8P
PWR-B
C904
0.1uF_16v
1
2
12
C903
1uF_25v
1
R843 18K_5%
2
R844
1
200K_5%
2
1
C845
2
100pF_50v
SYS
PH
SRP SRN BAT
EAO
EAI
FBO
TML
DGND
PWR-A
2
23
24
32
30
29
PWR-A
12
31
PWR-A
28
27 26
DGND 22 21 20 19 18
7
8 9
16 33
PWR-E
C90212
0.1uF_25V
R904
PWR-A
12
1K_5%
R898
0_5%
PWR-A
PWR-A PWR-A
PWR-A
DGND
C812
0.1uF_16V
R901
12
1K_5%
PWR-A
BAT54_30V_0.2A
PWR-A
PWR-A
R840
2
1 34
0.01_1%
1
C844
C841
C840
1
1
2
DGND
AC_OK
0.1uF_25V
2
0.1uF_25V
37-
PWR-A
R892
1
47K_5%
PWR-A
2
R890
1
100K_5%
2
R889
1
20_5%
2
C896
1
2
0.47uF_25V
C848
0.1uF_25V
DGND
C895
1
1uF_10v
2
2
33uF_25v
ADP_PRES
37-
PWR-APWR-A
1
2
R897
12
1K_5%
PWR-A
12 C849
0.1uF_16v
1
R891 100K_1%
2
PWR-A
1
R895 100K_1%
2
1
C850
2
0.1uF_25V
DGND
PWR-A
PWR-A
12
11
10
15
14 13 25
17
U802
VCC
3
ACN
4
ACP
6
BYPASS#
5
ACDET
VREF5
AGND
TS
1
CHGEN#
SCL SDA ALARM#
IOUT
TI_BQ24721C_QFN_32P
PWR-E
A
­R W
P
ACDRV#
BATDRV#
PVCC
HIDRV
BTST
REGN
LODRV
PGND SYNP SYNN
ISYNSET
PAD5001
POWERPAD1x1m
CHARGE_GND
I_ADP
CHARGE_GND
BATT_CLK
BATT_DAT
CHG_EN#
PWR-A
37-
8-,37-
8-,37-
PWR-B
+V3AL
7-,8-,9-,29-,37-
SMBUS
SMBUS
R851
12
200K_5%
R894
12
10_5%
R893
12
10_5%
PWR-A
PWR-A
PWR-A
CHARGE_GND
1
2
PWR-A
C897
0.1uF_10V
37-
9cell_2.8AHr_93W_8.78A
BATT_DAT BATT_CLK
BATT_ID
BATT_A_IN#
7-,37­7-,37­37­37-
7-,8-,9-,29-,37-
+V3AL
9 9 V A
PWR-B
B _
O K M N E H C
DGND
+VBDC
7-
CN800
1
1
2
2
3
3
4
4
5
5
G1
6
G
6
G2
7
G
7
8
P
2 _ 3 2 5 D O
S
1
_
4
3
B
0
0
B
9
9
1
D
D
S 0 V
1
5 D S E
2
P
2
_
C815
P
0.1uF_25V
H P
DGND
DGND
8
FOX_BP02083_B69B5_7H_8P
DGND
INVENTEC
TITLE
ST145a-UMA
BATTERY CONN
CODE
CS
SHEET OFCHANGE by
DOC. NUMBER REV
851
X01Model_No
SIZE
27-Jul-2009ALAN W
A3
PWR-B
DGND
+V3AL
3
1
1
8 C
2
7-,8-,9-,29-,37-
1
R1400 100K_5%
2
N E P O
_ 2 0 4 0
12
R807
1
R805 R803
1
R801
1
4
6
V
5
0
8
5
C
1
_ F p
2 0 0 1
DGND
8
V
V
5
5
0
0
8
8
5
5
C
C
1
1
_
_
F
F
p
p
2
2
0
0
0
0
1
1
DGND
+V3AL
7-,8-,9-,29-,37- 7-,8-,9-,29-,37-
PWR-B
2009/10/14
1
1
R806
R802
2.2K_5%
2.2K_5%
2
2
7-,8-,9-,29-,37-
+V3AL
1
2
1
9 9 V
3
A
PWR-B
B _
0 0
O
9
K
D
2
M N E H C
DGND
+V3AL
9
9 V
3
A B _
1 0
O
8
K
2
D
M N E H
DGND
C
7-,8-,9-,29-,37-7-,8-,9-,29-,37-
+V3AL
1
3
1
PWR-B
9 9 V
3
A B
DGND
3
_
0 8
O
D
K
2
M N E H C
2 0 8 D
+V3AL
PWR-B
1
R804 100K_5%
2
100_5% 100_5%
2
100_5%
2
PWR-A
2
100_5%
P 2 _ 3 2 5 D O S _ B B 1 S 0 V 5 D S E P _ P H P
PWR-A
P
P
2
2
_
_
3
3
2
2
5
5
D
D
O
O
S
S
1
_
1
B
0
B
9
1
D
S 0 V 5 D S E P
2
_ P H P
DGND
1
1
_
2
B
0
B
9
1
D
S 0 V 5 D S E P
2
2 _ P H P
2009/11/26
Typ@9.6A
+V3A OCP = 6.2A
Vout=(R1266/R1267+1)*2
+V3A
11-,13-,14-,18-,29-,30-,31-, 32-,33-,35-,40-,41-,43-,47-,48-
PAD804
POWERPAD_2_0610
C1333
10uF_6.3V
1
2
ALWAYS_PW_EN
1
C1359
DGND
330uF_6.3V
2
37-
RF
PCMC063T_3R3MN
1
R1266
6.8K_1%
2
1
R1267 10K_1%
2
PWR-A
51125GND
R1262
12
0_5%
R1261
10K_5%
DGND
7-,9-,10-,11-,12-,13-,35-,47-
N E
4
5
P
7
7
O
3
3
_
1
1
V
C
C
1
1
0 5 _
2
2
F p 0 0
2 2
L851
12
N E
2009/12/21
OP _ V 5 2 _ F u
C2000
1 .
4.7uF_25v
0
1
2
PWR-C
1
2
N E
OP _ 2 0 4
0 N E
OP _ 2 0 4 0
RF
R1305 100K_5%
Q840
SSM3K7002FU
1
C1327
1 2
0.1uF_16V
DGND
2009/11/07
+VBATR
8/14
1
AON7410
2
C1380
4.7uF_25v
1
1 2 3 1
SI7716ADN_T1_GE3
R
2
1
0 0
2
4 1 C
+V5AL
PWR-A
9-
1
2
3
D
G
S
2
DGND
Typ@0.05A
D
Q850
S
D
Q851
S
PWR-A
8
123
765
8
12
765
G
G
DGND
3
4
4
U825
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
2N7002DW
+V3AL
7-,8-,9-,29-,37-
C1358
1
10uF_6.3V
DGND
2
C1357
0.1uF_16V
R1311
12
PWR-C
0_5%
12
RICH_RT8205EGQW_WQFN_24P
9-
7-,9-,10-,11-,12-,13-,35-,47-
DGND
2VREF
R1268
95.3K_1%
51125GND
R1308
12
0402_OPEN
DGND
7 8
PWR-C
PWR-C
10 11
PWR-C
R1309
12
330K_5%
R1310 1M_5%
C1356
4.7uF_25v
PWR-A
1
2
VREG3 BOOT2
PHASE2 LGATE2
PWR-A
1
R1263
90.9K_1%
2
PWR-APWR-A
51125GND
R1306
0_5%
1
1
2
1 P
I R
T N E
VOUT1VOUT2
BOOT1
C N
8
7
1
1
R1301
1
0402_OPEN
2
+V5AL+VBATR
1
2
2VREF
9-
C1328
1
PWR-A
2
51125GND
24 23
R1304
12
229
PWR-C
21
0_5%
20 1912
PWR-C
2009/11/07
+V3AL
Typ@0.02A
9-
C1355
10uF_6.3V
DGND
CHENMKO_BAV99
0.22uF_6.3v
POWERPAD1x1m
PAD5002
C1354
PWR-C
12
7-,8-,9-,29-,37-
1
%
0
5
1
_
5
K
1
0
R
0
2
1
1
2
2
0.1uF_16V
R1303
1
0_5%
2
C1352
0.1uF_16V
3
CHENMKO_BAV99
1
8/14
PWR-C
2
5 2
3
4
6
5
1
2
2
D
F
L
P
E
E
B
B
N
I
F
F
S
R
G
R
N
T
O
N
T
E
PGOOD
U826
UGATE1UGATE2 PHASE1 LGATE1
L E
5
S
G
P
D
E
I
N
N
R
I
N
K
G
V
V
E
S
5
6
3
4
1
1
1
1
D N G D
1
2
1
DGND
2
D826
C1350
1
2
0.1uF_25V
DGND DGND DGND DGND
8765
D
Q848
G
AON7410
41S23
765
8
D
Q849
G
SI7716ADN_T1_GE3
41S23
DGND
R1302
12
0_5%
2
C1349
1
2
0.1uF_25V
+VBATR
7-,9-,10-,11-,12-,13-,35-,47-
C1379
1
2
4.7uF_25v
DGND
PWR-C
N E
OP _ 2 0 4
0 N E
1
OP _
2 2 0 4
0
DGNDDGND
C1353
1
2
0.1uF_16V
3
1
D825
C1378
1
2
4.7uF_25v
DGND
L850
12
PCMC063T_3R3MN
1
8 3 3 1 R
2
9 9 3 1 C
RF
10-
2009/11/07
C1351
1
2
1uF_25V
N
E 7 7 3
OP 1
_
V
C
1
5
2
_
2
F
u
1
RF
+V1.1A_EN
+V15A
. 0
14-,40-
R1299
1
5.1M_5%
2
1 2
DGND
N E
6
P
7
O
3
_
1
V
C
0 5 _ F p 0 0
2 2
1
R1265
15.4K_1%
2
1
R1264
10K_1%
2
PWR-A
51125GND
10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
1
C1373
2
330uF_6.3V
DGND
Typ@8.6A
+V5A OCP = 6.8A
Vout=(R1265/R1264+1)*2
+V5A
PAD806
PWR-E
C1398
1
10uF_6.3V
2
POWERPAD_2_0610
INVENTEC
TITLE
ST145a-UMA
+V3.3A & +V5A & +V2.5S
DOC. NUMBERSIZE
CODE
A3
CS
CHANGE by OF
27-Jul-2009ALAN W
SHEET
951
REV
X01Model_No
2009/11/07
+V1.1A_EN
RSMRST#
9-
31-,37-
R1298
0_5%
12
R1293
0_5%
12
C1326
1
C1348
1
2
0402_OPEN
2
1uF_6.3v
DGND
+V1.2S_GND
12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
1
C1066
2
10uF_6.3v
V1.1A_PG
PWR-A
0.1uF_16V
U824
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
TI_TPS51117_QFN_14P
PWR-B
R1066
12
10K_5%
2009/09/28
C1501
R1296
2
1
10_5%
R1297
12
180K_5%
PAD5003
POWERPAD1x1m
1
2
+V5A
9-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
PWR-E
R1260
0_5%
12
14
VBST
13
DRVH
12
LL
11
TRIP
10
V5DRV
9
DRVL
8
PGND
15
TML
DGND
1
DGND
2
C1324
1uF_6.3v
ANPEC_APL5315_BI_TRL_SOT23_5P
5
8/14
Q838
SI7716ADN_T1_GE3
R1259
10.7K_1%
5
SETSHDN
G
4
G
4
C1325
0.1uF_16V
12
1
PWR-A
2
+V1.2S_GND
U815
1
2
GND
34
VIN
VOUT
76
8
D
Q839
AON7410
S
123
8
765
D
S
123
DGND
R1002
1
22K_1%
2
R1062
1
10K_1%
2
DGND
+VBATR
7-,9-,11-,12-,13-,35-,47-
1
1
C1323
C1320
2
2
DGND
4.7uF_25v
4.7uF_25v
L845
12
PCMC063T_2R2MN
N
1
E
3 0
OP
2
_
1
2
R
0 4
2
0
C1301
N E
1
330uF_2.5V
0
OP
0
_
2
3
2
1
0
C
4 0
DGND
RF
Typ@0.25A
Vout=(R1002/R1062)*0.8
+V2.5S
18-
C1061
10uF_6.3v
1
2
N
N
E
E
1
2
P
2
2
O
3
3
OP
1
_ V
C
1
5 2 _
2
F u 1
. 0
RF
1
DGND
R1295
5.11K_1%
+V1.2S_GND
2
R1294
1
10K_1%
2
1
2
_
1
V
C
1
0
2
DGND
C1347
1
2
0402_OPEN
5 _ F p 0 0 2 2
POWERPAD_2_0610
Typ@ 7.42A
+V1.1A OCP = 9A
Vout=(R1295/R1294)*0.75
+V1.1A
14-,32-
PAD803
CHANGE by
INVENTEC
TITLE
ST145a-UMA
+V1.2A & VCC_NB
SIZE
CODE
27-Jul-2009ALAN W
A3
DOC. NUMBER
CS
SHEET OF
10 51
REV
X01Model_No
CORE_PWEN
RESUME_PWEN
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
11-,37-
37-,38-
R853
12
0_5%
R900
12
0_5%
C906
0.1uF_10V_OPEN
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
C1502
1
1
2
2
DGND
0.1uF_10V_OPEN
DGND
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
PWR-A
R854
12
C907
1uF_6.3v
1
2
PWR-A
PWR-A
DEFAULT_NET_TYPE
3300pF_50v
1
C864
2
MAX_MAX17000ETG+_TQFN_24P
PAD5004
POWERPAD1x1m
17000GND
10_5%
DGND
C908
1
DGND
2
U801
1
OVP
TON
BST
DH
2
PGOOD1
3
LX
PGOOD2
19
VDD
DL
PGND1
CSH
23
VCC
CSL
21
FB
AGND
4
STDBY
24
SHDN
VTTI
22
SKIP
PGND2
10
VTT
REFIN
VTTS
25
GND
VTTR
NOTE: DDR3 REGULATOR
2.2uF_6.3v
14 17 15
16
18 20
13 12
11
9
7 8 5 6
10uF_6.3v
PWR-A
R857
0_5%
12
PWR-A
1
2
C865
DGND
R858
1
150K_5%
1
DGND
2
10uF_6.3v
2
DGND
C863
C867
0.1uF_16V 2
+V0.75S
PWR-A
26-,27-
1
2
C861
10uF_6.3v
+VBATR
7-,9-,10-,12-,13-,35-,47-
1
RF
N E
OP _ 2 0 4
2
0 N E
1
OP _
2 2 0 4 0
DGND
1
DGND
DGND
2
2
PCMC063T_1R0MN
1
1
R925
2
3K_1%
0 9 R
2
C866
9 0 9 C
0.22uF_16v
12
5
76
8
8/14
8/14
D
G
S
123
4
6
5
87
D
G
DGND
41S23
Q817
AON7410
1
PWR-D
Q816
FDS6680S
M_VREF
26-,27­PWR-A
C868 C869
4.7uF_25v
4.7uF_25v
L805
2009/09/09
R926
12
1K_1%
12
1 2
N E
1 7
OP _
8
V
C
5 2 _ F u 1
. 0
RF
PWR-D
R855
5.36K_1%
R856 10K_1%
1 2
DGND
PWR-A
17000GND
N E P
0
O
7
_
8
V
C
0 5 _ F p 0 0
2 2
1
2
1
PWR-A
2
C8621
0.33uF_10V
2
PWR-A
17000GND
+V1.5 OCP = 10.2A
Vout=(R855/R856+1)*1
12-,14-,18-,19-,26-,27-,32-,33-
+V1.5
PAD801
POWERPAD_2_0610
1
C929
330uF_2V_15mR_Pana_-35%
2
DGND
PWR-D
Typ@9A
CORE_PWEN
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
R1501
12
11-,37-
10K_5%
C1500
0.1uF_10V
SSM3K7002FU
1
2
DGND
+V5A
% 5 _
M 1
Q856
3
D
1
G
S
2
2009/09/09
9-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
1
0 0 5 1 R
2
R1083
750K_1%
1
DGND
DEFAULT_NET_TYPE
RICH_RT8015APQW_WDFN_10P
1
SHDN-RT
2
2
GND
3
LX
U816
4
LX
5
PGND
COMP
PVDD PVDD
FB
VDD
GND
DGND
+V3A
PWR-D
10 9
12
8 7
R1080
6 11
10_5%
L828
C1150
1
2
2.2uF_6.3v
DGND
12
LTF5022T_2R2N3R2_LC
2009/09/18
R1081
1000pF_50V
10K_5%
12
C1151
1
2
1
R1082 309K_1%
2
C1153
22uF_6.3V
DGND
12
240K_1%
C1152
1
0402_OPEN
2
1
2
R1079
18-,21-,23-,24-,31-
+V1.8S
PWR-D
Vout=(R1082/R1079+1)*0.8
1
C1154
DGND
22uF_6.3V
2
Typ@1.3A
TITLE
CHANGE by SHEET
ALAN W
27-Jul-2009
INVENTEC
ST145a-UMA
DDR3 POWER
CODE
SIZE REV
A3
DOC. NUMBER
Model_No X01
CS
OF
5111
+V1.5
1
2
10-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
MAX17480
VRM_PWRGD
VRD_PROCHOT#
OCP@4A
Typ@4A
VDDNB_CORE
18-,19-
PWR-D
C918
1
1
C917
2
2
C919
47uF_6.3V 47uF_6.3V 47uF_6.3V
SVC
SVD1VDD_CORE
0
0
1 0
1
1
11-,12-,14-,18-,19-,26-,27-,32-,33-
C824
0.1uF_10V CPU_PWRGD_SVID_REG
+V5A
+V3S
1
R819
4.7K_5%
2 13­18-
PCMC063T_1R0MN
1
2
R918
12
0_5%
PWR-A
C888
4700pF_50V
1
2
1
2
1.1V
1.0V0
0.9V
0.8V
C831
2.2uF_6.3V
MAX17480
CPU_SVC_R CPU_SVD_R
CPU_PWEN
DEFAULT_NET_TYPE
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
R825
1
100K_5%
2
MAX17480
L804
12
R882 511_1%
PWR-A
12
C889
0.22uF_16V
R919
C890
10_5%
1000pF_50V
R920
12
5.1K_5%
1
R874
2
143K_1%
1
1
R872
100K_1%
12
100K_5%
2
2
18­18-
18-
12
13-,37-
R869
100_1%
PWR-E
R826
1
1
2
PWR-A
2
C884
1
2
2200pF_50V
1
2
1
R827
13K_1%
2
R870 2_5%
POWERPAD1x1m
MAX_MAX17480GTL+_TQFN_40P
2
1
R871
45.3K_1%
DEFAULT_NET_TYPE
R873
12
0_5%
CPU-I
+V5A
C887
10uF_6.3V
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
2
1
1
2
C886
0.1uF_10V
C885
12
PWR-A
0.1uF_16V
PWR-A
PAD800
(Should routed in 5/5/5 pair and need to have 10mil clearance to other traces.)
RF
VDD_CORE
12-,19-
PWR-E
1
18-
18-
N
N
E
E
P
P
8
9
O
0
0
O
_
8
8
_
V
V
C
C
1
1
0
5
5
2
_
_
2
2
F
F
p
u
0
1 .
0
0
2 2
41S23
G
41S23
8765
D
G
S
123
4
8D765
G
S
3
4
12
(Should routed in 5/5/5 pair and need to have 10mil clearance to other traces.)
C810
0.1uF_16V
2
2
C830
2200pF_50V
R821
3.01K_1%
2
C826
2200pF_50V
8/13
2
R820
1
PWR-A
MAX17480
+V5A
1
2
12
R800
1
12
VDD_CORE
12-,19-
1
R816
0402_OPEN
0.0047uF_50v
2
C823
C828
4.7uF_6.3V
R830
1
3.01K_1%
E
1
­R
R817
W P
51_5%
2
2
C827
2
1
2
R828
1
100_1%
2
0.0047uF_50v
18-
VDD1_FB
0.1uF_16V
1
R829
3.01K_1%
2
PWR-A
1
C832
2
MAX17480
R832
1
100_1%
1
C833
0.0047uF_50v
2
2
MAX17480
R831
2
R833
1
51_5%
2
51_5%
VDD0_FB
VDD0_FB#
DH1
LX1
DL1
DH2
LX2
DL2
27
29
28
26
33
34
18
17
23
21
22
24
36
35
37
15
16
14
1
18-
VDD1_FB#
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
R824 0_5%
0_5%
1
1
2
1
3.01K_1%
R823
12
10_5%
2
5
3
2
U800
39
C
D
BST1
OSC
C
TIME
ILIM12
VDDIO
SVC SVD
PGD_IN SHDN
OPTION
PWRGD VRHOT
THRM
ILIM3
IN3 IN3
LX3 LX3
BST3
OUT3
AGDN
V
+V1.5
D V
CSP1
CSN1
CSP2
CSN2
BST2
FBAC1
FBDC1
GNDS1
FBAC2
FBDC2
D N G
GNDS2
P
1 4
11-,12-,14-,18-,19-,26-,27-,32-,33-
R822
12
10_5%
40
1
13
12 11
19
8
38
20 30
31
2
3 4
5 6
7
9
10
G
1
2
Q802
FDMS8692
Q803
FDS6680S
8765
D
Q805
FDMS8692
8765
D
Q804
FDS6680S
C803
4.7uF_25v
7-,9-,10-,11-,12-,13-,35-,47-
C806
1
2
4.7uF_25v
4.7uF_25v
4.7uF_25v
+VBATR
7-,9-,10-,11-,12-,13-,35-,47-
C802
1
2
4.7uF_25v
+VBATR
PWR-A
C821
1
PWR-A
2
330pF_50V
1
C807
C805
1
1
2
1
3 1 8 R
2
2 2 8 C
RF
1
2
100uF_25V
C804
4.7uF_25v
C818
2
1
R818
1.5K_5%
2
N
N
E
E
P
P
0
1
O
0
0
O
_
8
8
_
V
V
C
C
1
1
0
5
5
2
_
_
2
2
F
F
p
u
0
1 .
0
0
2 2
2
N E P O _ 2 0 4
0 N E
1 P O _
2 2 0 4 0
RF
R811
1
1.5K_5%
2
C820
330pF_50V
1
R810
2.4K_1%
2
4.02K_1%
1
N
1 E P
2 1
O
8
_ 2
R 0 4
2
0
N E
1 P O
1
9
_
2
1
2
8
0
C
4
2
0
RF
C829
12
R815
12
10K_1%_THER_NTC
4.02K_1%
1
R814
2.4K_1%
2
L801
1
ETQP4LR45XFC
330uF_2V_6mR_OPEN
Typ@38A
L800
ETQP4LR45XFC
12
R808
R809
12
2
10K_1%_THER_NTC
C825
12
0.22uF_10v
0.22uF_10v
R868
12
2
C880
OCP@45A
VDD_CORE
C883
330uF_2V_6mR
VDD_CORE
12-,19-
1
1
2
C881
2
330uF_2V_6mR
12-,19-
1
2
1
C882
2
330uF_2V_6mR
MAX17480
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
+VCC_CORE & +VCC_CORE_NB
SIZE
A3
DOC. NUMBERCODE
Model_No X01
CS
SHEET
OF
REV
5112
VRM_PWRGD
DEFAULT_NET_TYPE
VCC_NB_PG
12-
14-
2009/09/28
R1068
47K_5%
2
R1106
0_5%
12
8/17
C1128
0.1uF_10V
1
DEFAULT_NET_TYPE
1
2
1
2
+VCC_NB_GND
CPU_PWEN
C1171
1uF_6.3v
1 2 3 4 5 6 7
TI_TPS51117_QFN_14P
R1504
12
12-,37-
10K_5%
R1105
12
10_5%
R1067
12
180K_5%
EN_PSV TON VOUT
U819
V5FILT VFB PGOOD GND
PAD5005
POWERPAD1x1m
2009/09/28
C1601
1000pF_50V
2
+V5A
14
VBST
13
DRVH
12
LL
11
TRIP
10
V5DRV
9
DRVL
8
PGND
15
TML
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
% 5
_ M
1
Q857
3
D
1
G
S
2
SSM3K7002FU
1
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
8/14
R1108
C1172
0_5%
0.1uF_16V
12
12
FDMS0310S
Q830
1
C1173
1
2
1
3 0 5 1 R
2
1uF_6.3v
PWR-A
+VCC_NB_GND
750K_1%
R1107
2
3.92K_1%
R1060
12
DEFAULT_NET_TYPE
+VBATR
7-,9-,10-,11-,12-,35-,47-
1
C1197
8D765
4.7uF_25v
Q832
AON7410
N E
OP _ 2 0 4 0
N E
OP _ 2 0 4 0
COMP
PVDD PVDD
1
2
VDD
GND
2
PCMC063T_1R0MN
1
9 0 1 1 R
2
6 7 1 1 C
RF
10 9
FB
8
PWR-D
7 6 11
G
S
4
123
6
8
7
5
D
G
S
4
3
2
1
12/22
U814
RICH_RT8015APQW_WDFN_10P
1
SHDN-RT
2
GND
3
LX
4
LX
5
PGND
PWR-C
L824
12
LTF5022T_2R2N3R2_LC
1
C1198
4.7uF_25v
2
L830
12
C1199
330uF_2.5V
R1104 CHANGE TO 13.3K
VCC_NBSTRP_DATA
0
1.25
10.95
+V3A
9-,11-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
PWR-D
R1064
10K_5%
12
PWR-A
12
R1063
10_5%
C1127
2.2uF_6.3V
1
2
SSM3K7002FU
8/17
VDDR_0.9_EN
29-
C1051
22uF_6.3V
2009/09/28
R1104
10K_1%
1
2
23.2K_1%
PWR-A
Q827
1
G
N
E 4 7 1
OP 1
_
V
C
1
5 2 _
2
F u 1
. 0
RF
1
2
1
R1102
PWR-A
2
+VCC_NB_GND
C1126
1000pF_50V
12
3
D
S
2
1
R998
20.5K_1%
2
1
1
2
2
5 7 1 1 C
1 2
PWR-A
R1061
1
31.6K_1%
2
C1052
22uF_6.3V
VCC_NB OCP = 10A
N E P O _ V 0 5 _ F p 0 0 2 2
MAX 10A
Typ@7.6A
VCC_NB
24-,47-
PAD802
POWERPAD_2_0610
Vout={R1104/[(R1100+R1099+R1101)//R1102]}*0.75
PWR-A
R1101
1
226K_1%
PWR-A
2
PWR-A 2
12
5.1K_1%
C1169
11
2
4700pF_25V
R1100
R1099
1
16.2K_1%
C1170
2
0.0015uF_50V
R1065
12
100K_1%
Typ@1.5A
C1124
1
Vout=(R1061/R1065)*0.8
2
0402_OPEN
+V1.05S
CPU_VDDR
18-,19-
0.9_EN
0
1
CHANGE by
Power State
UVD Moe - High
UVD Mode - Low
Performance Mode
Battery Mode
Power State
UVD Moe - High
UVD Mode - Low
Performance Mode
Battery Mode
R1098
1
10K_5%
2
CPU_VDDR
1.05
0.9
RS880M
Enging Clock
500 MHz
380 MHz
500 MHz - 200MHz
200MHz
High Performance Variant
RS880M
Enging Clock
380 MHz
200MHz
23-
STRP_DATA
ALAN W 27-Jul-2009
Northbridge
Core Voltage
1.1 V
0.95 V
1.1 V
0.95 V
Northbridge Core Voltage
1.25 V590 MHz 550 MHz / 400 MHz
0.95 V
1.25 V590 MHz - 200MHz
0.95 V
STRP_DATA
0
UVD Clocks
550 MHz / 400 MHz
400 MHz / 300 MHz
n / a
n / a
UVD Clocks
400 MHz / 300 MHz
n / a
n / a
VCC_NB
1.1
0.951
INVENTEC
TITLE
ST145a-UMA
CODE
SIZE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REV
5113
CORE_PWEN#
CORE_PWEN#
9-,11-,13-,18-,29-,30-,31-,32-,33-,35-,40-, 41-,43-,47-,48-
1
C1381 2200pF_50V
2
+V3A
PWR-D
Q843
6
D
S
5 2 1
G
AO6402AL
2009/11/29
R1323
V3_EN
12
34-
0_5%
DEFAULT_NET_TYPE
+V5A
9-,10-,11-,12-,13-,35-,36-,37-,38-,42-,47-
Q847
6
S
D
5 2 13
G
AO6402AL
R1320
12
V5_EN
0_5%
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
100_5%
12
R1147
R1146
R1179
100_5%
12
100_5%_OPEN
2
1
+V15A
9-,14-,40­PWR-A
1
R1322
750K_5%
2
+V15A_RC
Q852
14-,37-
V35_EN
SSM3K7002FU
L
H
H
L
V1.1A_PG
VCC_NB_PG
SYS_RST#
D
1
G
S
+V3S & +V5S
3V & 5V
0V
10-
13-
31-
3
2
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
470 OHM
1
R1325
470_5%
2
NA
3
D
Q853
SSM3K7002FU
S
2
+V5S
20-,34-,35-,36-,38-,40-,41-,45-,47-
Typ@2.72A
1
2
PWR-D
4
3
1
G
Typ@2.6A
4
1
2
PWR-E
470 OHM
1
R1300
470_5%
2
NA
3
D
1
G
Q842
SSM3K7002FU
S
2
+V3S
PWR-D
2
R1149 10K_5%
1
1
C1258 1000pF_50V
2
C1382
10uF_6.3V
C1372
10uF_10V
37-
ALL_PWGD_IN
CORE_PWEN#
CORE_PWEN_D#
14-,37-
37-
DEFAULT_NET_TYPE
Q818
SSM3K7002FU
1
G
SSM3K7002FU
+V15A
D
S
9-,14-,40-
PWR-A
1
R903
1M_5%
2
3
2
9-,14-,40-
Q837
1
G
+V15A
D
S
+V1.5
1
C910 3300pF_50V
2
PWR-A
1
R1204
1M_5%
2
3
2
11-,12-,18-,19-,26-,27-,32-,33-
PWR-D
Q820
6
4
S
D
5 2 13
G
AO6402AL
V1.5_EN
2009/11/12
+V1.1A
10-,32-
PWR-D
Q835
8
D
7 6 5
G
SI7716ADN_T1_GE3
1
C1302 2200pF_50V
2
S
+V1.5S
1
G
1 2 3 4
18-,24-,25-,45-,47-,48-
PWR-C
1
2
470 OHM
1
R905
470_5%
2
3
D
Q819
SSM3K7002FU
S
2
Typ@6.8A
+V1.1S
1
2
3
D
1
G
S
2
Typ@1.23A
C911 10uF_6.3V
NA
18-,19-,21-,22-,23-,24-,32-,47-
1
C1260
10uF_6.3V
2
470 OHM
R1181
470_5%
NA
Q836
SSM3K7002FU
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
+V5S & +V3.3S & +V1.5S & +V1.2S
DOC. NUMBER
CODE
SIZE
A3
Model_No X01
CS
SHEET
OF
REV
5114
ALAN W 21-Dec-2009
INVENTEC
TITLE
ST145a-UMA
CLK GEN
SIZE CODE REV
A3
DOC. NUMBER
Model_No X01
CS
SHEET
5115
OFCHANGE by
L0_CLKIN1H
L0_CLKIN1L
L0_CLKIN0H
L0_CLKIN0L
L0_CTLIN1H
L0_CTLIN1L
L0_CTLIN0H
L0_CTLIN0L
L0_CADIN15H
L0_CADIN15L
L0_CADIN14H
L0_CADIN14L
L0_CADIN13H
L0_CADIN13L
L0_CADIN12H
L0_CADIN12L
L0_CADIN11H
L0_CADIN11L
L0_CADIN10H
L0_CADIN10L
L0_CADIN9H L0_CADIN9L L0_CADIN8H L0_CADIN8L
L0_CADIN7H L0_CADIN7L L0_CADIN6H L0_CADIN6L L0_CADIN5H L0_CADIN5L L0_CADIN4H L0_CADIN4L L0_CADIN3H L0_CADIN3L L0_CADIN2H L0_CADIN2L L0_CADIN1H L0_CADIN1L L0_CADIN0H L0_CADIN0L
CN810-1
21­21­21­21-
21­21­21­21-
21­21­21­21­21­21­21­21­21­21­21­21­21­21­21­21-
21­21­21­21­21­21­21-
21­21­21­21­21­21­21­21-
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
FOX_PZ63823_284S_41F_TEMP_638P
T R O P S N A R T R E P
Y H
L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0
L0_CTLOUT_H1 L0_CTLOUT_L1 L0_CTLOUT_H0 L0_CTLOUT_L0
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
Y4 Y3 Y1 W1
T5 R5 R2 R3
T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3
T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1
21-
L0_CLKOUT1H
21-
L0_CLKOUT1L
21-
L0_CLKOUT0H
21-
L0_CLKOUT0L
21-
L0_CTLOUT1H
21-
L0_CTLOUT1L
21-
L0_CTLOUT0H
21-
L0_CTLOUT0L
21-
L0_CADOUT15H
21-
L0_CADOUT15L
21-
L0_CADOUT14H
21-
L0_CADOUT14L
21-
L0_CADOUT13H
21-
L0_CADOUT13L
21-
L0_CADOUT12H
21-
L0_CADOUT12L
21-
L0_CADOUT11H
21-
L0_CADOUT11L
21-
L0_CADOUT10H
21-
L0_CADOUT10L
21-
L0_CADOUT9H
21-
L0_CADOUT9L
21-
L0_CADOUT8H
21-
L0_CADOUT8L
21-
L0_CADOUT7H
21-
L0_CADOUT7L
21-
L0_CADOUT6H
21-
L0_CADOUT6L
21-
L0_CADOUT5H
21-
L0_CADOUT5L
21-
L0_CADOUT4H
21-21-
L0_CADOUT4L
21-
L0_CADOUT3H
21-
L0_CADOUT3L
21-
L0_CADOUT2H
21-
L0_CADOUT2L
21-
L0_CADOUT1H
21-
L0_CADOUT1L
21-
L0_CADOUT0H
21-
L0_CADOUT0L
A1
AF1
S1
Top View
A26
Layout: Add stitching caps if crossing plane split.
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
CPU-1
CODE
SIZE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REV
5116
MA_CLK_DDR2
MA_CLK_DDR1 MA_CLK_DDR1# MA_CLK_DDR2#
MA_CS1# MA_CS0#
MA_ODT1 MA_ODT0
MA_CAS#
MA_WE#
MA_RAS#
MA_BA2 MA_BA1 MA_BA0
MA_CKE1 MA_CKE0
MA_A(15:0)
MA_DQS(7)
MA_DQS#(7)
MA_DQS(6)
MA_DQS#(6)
MA_DQS(5)
MA_DQS#(5)
MA_DQS(4)
MA_DQS#(4)
MA_DQS(3)
MA_DQS#(3)
MA_DQS(2)
MA_DQS#(2)
MA_DQS(1)
MA_DQS#(1)
MA_DQS(0)
MA_DQS#(0)
MA_DM(7:0)
26­26­26­26-
26­26-
26­26-
26­26­26-
26­26­26-
26­26­26-
26­26­26­26­26­26­26­26­26­26­26­26­26­26­26­26­26-
MA_A(15) MA_A(14) MA_A(13) MA_A(12) MA_A(11) MA_A(10) MA_A(9) MA_A(8) MA_A(7) MA_A(6) MA_A(5) MA_A(4) MA_A(3) MA_A(2) MA_A(1) MA_A(0)
MA_DQS(7) MA_DQS#(7) MA_DQS(6) MA_DQS#(6) MA_DQS(5) MA_DQS#(5) MA_DQS(4) MA_DQS#(4) MA_DQS(3) MA_DQS#(3) MA_DQS(2) MA_DQS#(2) MA_DQS(1) MA_DQS#(1) MA_DQS(0) MA_DQS#(0)
MA_DM(7) MA_DM(6) MA_DM(5) MA_DM(4) MA_DM(3) MA_DM(2) MA_DM(1) MA_DM(0)
CN810-2
P19
MA_CLK_H3
N19
MA_CLK_H0
N20
MA_CLK_L0
P20
MA_CLK_L3
Y16
MA_CLK_H2
AA16
MA_CLK_L2
E16
MA_CLK_H1
F16
MA_CLK_L1
V20
MA1_CS_L1
U20
MA1_CS_L0
U19
MA0_CS_L1
T20
MA0_CS_L0
V22
MA0_ODT1
T19
MA0_ODT0
V19 27-
MA1_ODT1
U21
MA1_ODT0
T22
MA_CAS_L
T24
MA_WE_L
R19
MA_RAS_L
J21
MA_BANK2
R23
MA_BANK1
R20
MA_BANK0
J20
MA_CKE1
J22
MA_CKE0
MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0
MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0
MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
E C A F R E T N
I
Y R O M E M
K19 K24 V24 K20 L22 R21 K22 L19 L21
M24
L20 M22 M19
N22 M20
N21
W12 W13
Y15 W15
AB19 AB20 AD23 AC23
G22
G21
C22
C21
G16
G15
G13
H13
Y13
AB16
Y19
AC24
F24
E19
C15
E12
FOX_PZ63823_284S_41F_TEMP_638P
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54
MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15
AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12
MA_DATA(63) MA_DATA(62) MA_DATA(61) MA_DATA(60) MA_DATA(59) MA_DATA(58) MA_DATA(57) MA_DATA(56) MA_DATA(55) MA_DATA(54)
MA_DATA(53) MA_DATA(52) MA_DATA(51) MA_DATA(50) MA_DATA(49) MA_DATA(48) MA_DATA(47) MA_DATA(46) MA_DATA(45) MA_DATA(44) MA_DATA(43) MA_DATA(42) MA_DATA(41) MA_DATA(40) MA_DATA(39) MA_DATA(38) MA_DATA(37) MA_DATA(36) MA_DATA(35) MA_DATA(34) MA_DATA(33) MA_DATA(32) MA_DATA(31) MA_DATA(30) MA_DATA(29) MA_DATA(28) MA_DATA(27) MA_DATA(26) MA_DATA(25) MA_DATA(24) MA_DATA(23) MA_DATA(22) MA_DATA(21) MA_DATA(20) MA_DATA(19) MA_DATA(18) MA_DATA(17) MA_DATA(16) MA_DATA(15) MA_DATA(14) MA_DATA(13) MA_DATA(12) MA_DATA(11) MA_DATA(10)
MA_DATA(9) MA_DATA(8) MA_DATA(7) MA_DATA(6) MA_DATA(5) MA_DATA(4) MA_DATA(3) MA_DATA(2) MA_DATA(1) MA_DATA(0)
26-
MA_DATA(63:0)
MB_CLK_DDR2
MB_CLK_DDR1 MB_CLK_DDR1# MB_CLK_DDR2#
MB_CS1# MB_CS0#
MB_ODT1 MB_ODT0
MB_CAS#
MB_WE#
MB_RAS#
MB_BA2 MB_BA1 MB_BA0
MB_CKE1 MB_CKE0
MB_A(15:0)
MB_DQS(7)
MB_DQS#(7)
MB_DQS(6)
MB_DQS#(6)
MB_DQS(5)
MB_DQS#(5)
MB_DQS(4)
MB_DQS#(4)
MB_DQS(3)
MB_DQS#(3)
MB_DQS(2)
MB_DQS#(2)
MB_DQS(1)
MB_DQS#(1)
MB_DQS(0)
MB_DQS#(0)
MB_DM(7:0)
27­27­27­27-
27­27-
27-
27­27­27-
27­27­27-
27­27­27-
27­27­27­27­27­27­27­27­27­27­27­27­27­27­27­27­27-
MB_A(15) MB_A(14) MB_A(13) MB_A(12) MB_A(11) MB_A(10)
MB_A(9) MB_A(8) MB_A(7) MB_A(6) MB_A(5) MB_A(4) MB_A(3) MB_A(2) MB_A(1) MB_A(0)
MB_DQS(7) MB_DQS#(7) MB_DQS(6) MB_DQS#(6) MB_DQS(5) MB_DQS#(5) MB_DQS(4) MB_DQS#(4) MB_DQS(3) MB_DQS#(3) MB_DQS(2) MB_DQS#(2) MB_DQS(1) MB_DQS#(1) MB_DQS(0) MB_DQS#(0)
MB_DM(7) MB_DM(6) MB_DM(5) MB_DM(4) MB_DM(3) MB_DM(2) MB_DM(1) MB_DM(0)
CN810-3
R26
MB_CLK_H3
P22
MB_CLK_H0
R22
MB_CLK_L0
R25
MB_CLK_L3
AF18
MB_CLK_H2
AF17
MB_CLK_L2
A17
MB_CLK_H1
A18
MB_CLK_L1
U22
MB1_CS_L0
W25
MB0_CS_L1
V26
MB0_CS_L0
W23
MB0_ODT1
W26
MB0_ODT0
Y26
MB1_ODT0
U24
MB_CAS_L
U23
MB_WE_L
U25
MB_RAS_L
J26
MB_BANK2
U26
MB_BANK1
R24
MB_BANK0
H26
MB_CKE1
J25
MB_CKE0
J24
MB_ADD15
J23
MB_ADD14
W24
MB_ADD13
L25
MB_ADD12
L26
MB_ADD11
T26
MB_ADD10
K26
MB_ADD9
M26
MB_ADD8
L24
MB_ADD7
N25
MB_ADD6
L23
MB_ADD5
N26
MB_ADD4
N23
MB_ADD3
P26
MB_ADD2
N24
MB_ADD1
P24
MB_ADD0
AF12
MB_DQS_H7
AE12
MB_DQS_L7
AE16
MB_DQS_H6
AD16
MB_DQS_L6
AF21
MB_DQS_H5
AF22
MB_DQS_L5
AC25
MB_DQS_H4
AC26
MB_DQS_L4
F26
MB_DQS_H3
E26
MB_DQS_L3
A24
MB_DQS_H2
A23
MA_DQS_L2
D16
MB_DQS_H1
C16
MA_DQS_L1
C12
MB_DQS_H0
B12
MA_DQS_L0
AD12
MB_DM7
AC16
MB_DM6
AE22
MB_DM5
AB26
MB_DM4
E25
MB_DM3
A22
MB_DM2
B16
MB_DM1
A12
MB_DM0
FOX_PZ63823_284S_41F_TEMP_638P
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54
MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41
E C
MB_DATA40
A
MB_DATA39
F R
MB_DATA38
E
MB_DATA37
T N
MB_DATA36
I
MB_DATA35
Y
MB_DATA34
R O
MB_DATA33
M
MB_DATA32
E
MB_DATA31
M
MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10
MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16
AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11
MB_DATA(63) MB_DATA(62) MB_DATA(61) MB_DATA(60) MB_DATA(59) MB_DATA(58) MB_DATA(57) MB_DATA(56) MB_DATA(55) MB_DATA(54)
MB_DATA(53) MB_DATA(52) MB_DATA(51) MB_DATA(50) MB_DATA(49) MB_DATA(48) MB_DATA(47) MB_DATA(46) MB_DATA(45) MB_DATA(44) MB_DATA(43) MB_DATA(42) MB_DATA(41) MB_DATA(40) MB_DATA(39) MB_DATA(38) MB_DATA(37) MB_DATA(36) MB_DATA(35) MB_DATA(34) MB_DATA(33) MB_DATA(32) MB_DATA(31) MB_DATA(30) MB_DATA(29) MB_DATA(28) MB_DATA(27) MB_DATA(26) MB_DATA(25) MB_DATA(24) MB_DATA(23) MB_DATA(22) MB_DATA(21) MB_DATA(20) MB_DATA(19) MB_DATA(18) MB_DATA(17) MB_DATA(16) MB_DATA(15) MB_DATA(14) MB_DATA(13) MB_DATA(12) MB_DATA(11) MB_DATA(10)
MB_DATA(9) MB_DATA(8) MB_DATA(7) MB_DATA(6) MB_DATA(5) MB_DATA(4) MB_DATA(3) MB_DATA(2) MB_DATA(1) MB_DATA(0)
27-
MB_DATA(63:0)
INVENTEC
TITLE
ST145a-UMA
CPU-2
CODE
SIZE
A3
CHANGE by SHEET
16-Sep-2009ALAN W
CS
DOC. NUMBER
17 51
OF
REV
X01Model_No
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
1
R929 1K_1%
2
1
R930
1K_1%
2
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
1
R1000
510_5%
2
1
R999
0402_OPEN
2
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
1
R1001
0402_OPEN
2
1
R1003
510_5%
2
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
PWR-D
0402_OPEN
R160 300OHM
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
LDT_RST#
1
2
18-
18-
R971
1
300_5%
R972
1
N.C
C943
0.01uF_16V
TEST25_H
TEST25_L
2
18-
2
18-
18-
18-
18-
18-
18-
18-
18-
18-
CPU_MVREF
18-
1
C944
2
1000pF_50V
11-,12-,14-,18-,19-,26-,27-,32-,33-
CPU_DBREQ#
CPU_DBRDY
SMBUS SMBUS
HDT Header
CPU_R_CLKP
CPU_R_CLKN
11-,12-,14-,18-,19-,26-,27-,32-,33-
+V1.5
PWR-D
31-
SCLK3
31-
SDATA3
CPU_MVREF
+V1.5
18-
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
SAMTEC_ASP_68200_26P_OPEN
Keep trace to resistor less than 600mils from CPU pin and trace to AC caps less than 1250mils.
C1064
29-
29-
R916 1K_5%
R917 0_5%_OPEN
CPU_VDDR
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
3900pF_16V
C1065
3900pF_16V
12 12
1K_5%R914
12 12
0_5%_OPENR915
C914
8/18
VDDNB_CORE
12-,19-
PWR-D
13-,19-
CN817
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
12
1
R1004 169_1%
2
12
C915
1
1
2
2
100pF_50V_OPEN 100pF_50V_OPEN
R907 39.2_1% R906 39.2_1%
Keep trace to resistors less than 1" from CPU pin.
CLK_CPUBCLK_C CLK_CPUBCLK#_C
LDT_PG LDTSTOP# LDT_RST#
CPU_TDI
CPU_TRST#
CPU_TCK CPU_TMS
CPU_DBREQ#
VDD0_FB
VDD0_FB#
12 1
2
MEMHOT#
TEST25_H
TEST25_L
R950 1K_5%
300 OHM N.C
R975 R974 R908
H_THERMDC H_THERMDA
VDD1_FB
VDD1_FB#
LDTSTOP# NB_LDTSTOP#
CPU_VDDA
C1059
3300pF_50V
CN810-4
F8 F9
A9 A8
A7
B7
AF4 AF5
AF9 AD9 AC9 AA9
E10
F6 E6 H6 G6
Y10
W17
AE10
AF10
AA8
E9 E8 G9
H10
C2
D7 E7 F7 C7
AC8
C3
AA6
W7 W8
Y6
AB6
1
2
0_5%_OPEN
U860
1
2
3
C10581
0.22uF_6.3V
2
11-,12-,14-,18-,19-,26-,27-,32-,33-
VDDA VDDA
MISC
CLKIN_H CLKIN_L
PWROK LDTSTOP_L RESET_L
SIC SID
TDI TRST_L TCK TMS DBREQ_L
VDD_FB_H VDD_FB_L VDDNB_FB_H VDDNB_FB_L
VDDR_SENSE
VTT_SENSE
M_VREF M_ZN M_ZP MEMHOT_L
TEST25_H TEST25_L TEST19 TEST18
TEST9
TEST17 TEST16 TEST15 TEST14 TEST12
TEST7 TEST6 THERMDC THERMDA VDD1_FB_H VDD1_FB_L
+V1.8S
11-,21-,23-,24-,31-
2009/11/19
R1573
12
1A61Y
5
VCC
GND
2A42Y
1
2
LDTREQ_L
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H VDDIO_FB_L
HTREF1 HTREF0
TEST29_H TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H TEST28_L
TEST27
ALERT_L
TEST10
TEST8
V 0
1
1 _
8
F
6
u
1
2
1
1
. 0
C
1
2
R1007 0_5%
18-,29­18-,29­18-
CPU_SIC CPU_SID
18­18­18­18­18-
12­12-
1K_5%R949
270_5%_OPEN 270_5%_OPEN
1K_5%
20­20­12­12-
18-
18­18-
12
12
1K_5%
R954
100_5%
12
R931
12
2
1
R976
12
0_5%
12
1
2
12
THM
THM THM
THM
PWRGD
TP816 TP817
THM THM
TP815
FOX_PZ63823_284S_41F_TEMP_638P
+V1.5S
14-,18-,24-,25-,45-,47-,48-
1
R1092
300_5%
18-,29-
2
R1574
0402_OPEN
NXP_74LVC2G07GW_SC88A_6P
CO-LAYOUT FOR R1573 & U860
INSTALL R1573 AND R1574, REMOVE R1092 IF CPU CAN TOLERANCE 1.8
12
BLM11P600S
C1125
4.7uF_6.3V
+V1.5
C6F10 A6
SVC
A4
SVD
AF6 AC7
AE9
TDO
G10
W9 Y9
P6 R6
C9 C8
AE7 AD7 AE8 AB8 AF7
J7 H8 AF8 AE6 K8 C4
1
R1096
2.2K_5%
2
L817
2009/09/29
14-,18-,24-,25-,45-,47-,48-
23-
+V2.5S
10-
1
C1063 180pF_50V
2
+V1.5S
1
1
R1015
R1014
1K_5%
1K_5%
2
2
CPU_SVC CPU_SVD
CPU_HTREF1
CPU_HTREF0
1 12
R1016 0_5%
THERMTRIP#
CPU_PROCHOT#_VDDIO
1
TP801
200_5%
44.2_1%
44.2_1%
R973
12
80.6_1%
Route as 80ohm, diff
1 12 12 1 12
TP804 TP805
12
CPU_ALERT
12
R117 300OHM
1K_5%_OPEN
250mA
2
0_5%R1013
18-
18-
R932
2
2 2
2
R912 R913 R910
2
R933 R911
R909
R952
NA
R1095
18-
18-,29-
LDT_REQ#
12-
CPU_SVC_R
12-
CPU_SVD_R
CPU_TDO
CPU_DBRDY
+V1.1S
R953
1
R951
1
1K_5% 1K_5%_OPEN 1K_5% 1K_5% 1K_5%
1K_5%
0402_OPEN
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
11-,12-,14-,18-,19-,26-,27-,32-,33-
+V1.5 +V3A
PWR-D
1
1
2
2
1
B
Q829
MMBT3904_OPEN
R878
300_5%
11-,12-,14-,18-,19-,26-,27-,32-,33-
+V1.5
14-,18-,19-,21-,22-,23-,24-,32-,47-
Keep trace to resistors less than 1" from CPU pin.
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
1
R1097
R1094
10K_5%
10K_5%_OPEN
2
26-,29-,31-
3CE2
CHANGE by
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
1
1
R876 1K_5%
2
2
+V1.1S
14-,18-,19-,21-,22-,23-,24-,32-,47-
PWR-D
CPU_PWRGD_SVID_REG
CPU_LDT_RST#
CPU_MEMHOT#MEMHOT#
1
R877 10K_5%
2
Q814
1
B
MMBT3904
3CE2
11-,12-,14-,18-,19-,26-,27-,32-,33-
+V1.5
PWR-D
1
1
R834 1K_5%
2
2
1
B
Q813
MMBT3904_OPEN
LDT_PG
LDT_RST#
LDT_REQ#
27-Jul-2009ALAN W
R875
10K_5%
3CE2
18-,29-
12-
29-
18-
18-,29-
1
2
1
B
R1700 10K_5%
C32E
Q864 MMBT3904
11/05
C6016
12
0.01uF_16V
31-,37-
R879
12
0_5% R880
12
0_5% R881
12
0_5%
12-
30-
29-
+V3A
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
1
R883
4.7K_5%_OPEN
2
20-
CPU_Q_ALERT#
300_5%
R1010
R1008
0_5%_OPEN
R1006
12
0_5%
12
R1005
12
0_5%
12
2.2K_5%_OPEN
R1009
12
R1012
12
R1011
12
0402_OPEN
R201 300OHM
N.C
INVENTEC
TITLE
ST145a-UMA
CPU-3
CODE
SIZE
A3
CS
SHEET
300_5%
DOC. NUMBER
CPUTHERMTRIP# VRD_PROCHOT#
SB_PROCHOT#
CPU_PROCHOT#
14-,18-,24-,25-,45-,47-,48-
+V1.5S
OF
18 51
REV
X01Model_No
VDD_CORE
12-,19-
8/14
C989
1
22uF_6.3V
2
VDD_CORE
12-,19-
C951
C996
1
1
0.22uF_6.3V
0.22uF_6.3V
2
2
Place under socket on bottom side.
VDDNB_CORE
12-,18-,19-
C988
C990
1
1
22uF_6.3V
22uF_6.3V
2
2
VDD_CORE
12-,19-
VDD_CORE
38A
12-,19-
VDD_CORE
C993
C946
1
1
22uF_6.3V
22uF_6.3V
2
2
C994
C995
1
1
0.01uF_16V
2
0.01uF_16V
2
VDDNB_CORE
C945
1
22uF_6.3V
2
Place under socket on bottom side.
CN810-5
AC4
VDD1
AD2
VDD1
G4
VDD0
H2
VDD0
J9
VDD0
J11
VDD0
J13
VDD0
K6
VDD0
K10
VDD0
K12
VDD0
K14
VDD0
L4
VDD0
L7
VDD0
L9
VDD0
L11
VDD0
L13
VDD0
M2
VDD0
M6
VDD0
M8
VDD0
M10
VDD0
N7
VDD0
N9
VDD0
N11
VDD0
P8
VDD1
P10
VDD1
R4
VDD1
R7
VDD1
R9
VDD1
R11
VDD1
T2
VDD1
T6
VDD1
T8
VDD1
T10
VDD1
T12
VDD1
T14
VDD1
U7
VDD1
U9
VDD1
U11
VDD1
U13
VDD1
V6
VDD1
V8
VDD1
V10
VDD1
V12
VDD1
V14
VDD1
W4
VDD1
Y2
VDD1
FOX_PZ63823_284S_41F_TEMP_638P
C992
1
1
22uF_6.3V
2
2
C997
1
1
180pF_50V
2
2
C952
22uF_6.3V
C947
180pF_50V
AA4
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AB2
VSS
AB7
VSS
AB9
VSS
AB23
VSS
AB25
VSS
AC11
VSS
AC13
VSS
AC15
VSS
AC17
VSS
AC19
VSS
AC21
VSS
AD6
VSS
AD8
VSS
AD25
D
VSS
AE11
D
VSS
V
AE13
VSS
AE15
VSS
AE17
VSS
AE19
VSS
AE21
VSS
AE23
VSS
B4
VSS
B6
VSS
B8
VSS
B9
VSS
B11
VSS
B13
VSS
B15
VSS
B17
VSS
B19
VSS
B21
VSS
B23
VSS
B25
VSS
D6
VSS
D8
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
AC6
VSS
C998
C991
1
1
22uF_6.3V
22uF_6.3V
2
2
1.5A
11-,12-,14-,18-,19-,26-,27-,32-,33-
3A
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
C976
1
22uF_6.3V
2
C942
1
4.7uF_6.3V
2
C978
1
0.22uF_6.3V
2
C985
1
0.1uF_10V
2
+V1.1S +V1.1S
14-,18-,19-,21-,22-,23-,24-,32-,47-
1.5A
CPU_VDDR
+V1.5
PWR-D
PWR-C
13-,18-,19-
AD10
D10 C10 B10
W10
H25
J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25
D4 D3 D2 D1
CN810-6
VLDT_A VLDT_A VLDT_A VLDT_A
VTT VTT VTT VTT VTT
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
VDDR
FOX_PZ63823_284S_41F_TEMP_638P
+V1.5
C1019
C981
1
0.22uF_6.3V
2
C983
1
4.7uF_6.3V
2
C984
1
0.22uF_6.3V
2
C977
1
2
180pF_50V
C940
1
0.22uF_6.3V
2
1
2
C980
1
0.22uF_6.3V
2
C982
1
2
C941
4.7uF_6.3V
180pF_50V
1
22uF_6.3V
2
Place under socket on bottom side.
C979
1
4.7uF_6.3V
2
C987
1
0.22uF_6.3V
2
C939
1
0.01uF_16V
2
R W
P O
I
VLDT_B VLDT_B VLDT_B VLDT_B
VTT VTT VTT VTT
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
2
AE5 AE4 AE3 AE2
AC10 AB10 AA10 A10
D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11
C986
180pF_50V
14-,18-,19-,21-,22-,23-,24-,32-,47-
CPU_VDDR
13-,18-,19-
CPU_VDDR
13-,18-,19-
VDD_CORE
VDD_CORE
12-,19-
MEM_MB_RST#
+V1.05S
1
C913
4.7uF_6.3V
2
C1054
1
0.22uF_6.3V
2
Place close to socket.
C949
1
1000pF_50V
2
C1056
1
180pF_50V
2
PWR-D
VDDNB_CORE
12-,18-,19-
4A
12-,19-
FOX_PZ63823_284S_41F_TEMP_638P
AMD S1G4_H16 / B18
SDDR-CTRL
27-
FOX_PZ63823_284S_41F_TEMP_638P
1
1
C912
C1060
4.7uF_6.3V
4.7uF_6.3V
2
2
C1057
C953
1
1
0.22uF_6.3V
0.22uF_6.3V
2
2
C954
C1053
1
1
1000pF_50V
1000pF_50V
2
2
C955
C948
1
1
180pF_50V
2
2
180pF_50V
CHANGE by
CN810-7
M16
VDDNB
P16
VDDNB
T16
VDDNB
K16
VDDNB
U15
VDD1
V16
VDDNB
J15
VDD0
L15
VDD0
CN810-8
A5
RSVD
C5
RSVD RSVD
B5
RSVD
A3
RSVD
AA7
RSVD
B3
RSVD
B18
RSVD
1
C1062
4.7uF_6.3V
2
C956
1
0.22uF_6.3V
2
C1055
1
1000pF_50V
2
C950
1
2
180pF_50V
M17
VSS
N4
VSS
N8
VSS
N10
VSS
N16
VSS
N18
VSS
P2
VSS
P7
VSS
P9
VSS
P11
VSS
P17
VSS
R8
VSS
R10
VSS
R16
VSS
R18
VSS
D
T7
D
VSS
T9
V
VSS
T11
VSS
T13
VSS
T15
VSS
T17
VSS
U4
VSS
U6
VSS
U8
VSS
U10
VSS
U12
VSS
U14
VSS
U16
VSS
U18
VSS
V2
VSS
V7
VSS
V9
VSS
V11
VSS
V13
VSS
V15
VSS
V17
VSS
W6
VSS
Y21
VSS
Y23
VSS
N6
VSS
C1
RSVD
D5 H16
26-
RSVD RSVD RSVD RSVD
SDDR-CTRL H18 H19 W18
MEM_MA_RST#
+V1.1S
+V1.1S
14-,18-,19-,21-,22-,23-,24-,32-,47-
C916
1
4.7uF_6.3V
2
Place close to socket.
27-Jul-2009ALAN W
1
1
C1023
4.7uF_6.3V
2
2
C957
1
1
0.22uF_6.3V
2
2
INVENTEC
TITLE
ST145a-UMA
CPU-4
CODE
SIZE
A3
CS
SHEET
C920
4.7uF_6.3V
C1021
180pF_50V
DOC. NUMBER
C958
1
0.22uF_6.3V
2
C1022
1
180pF_50V
2
OF
19 51
REV
X01Model_No
14-,34-,35-,36-,38-,40-,41-,45-,47-
0.1uF_16V
CPUFAN1_ON#
THERM_WARN#
37-
20-
TC7SET08FU
C999
PWR-A
U806
+V3S
(0,001A)
+V5S
14-,34-,35-,36-,38-,40-,41-,45-,47-
8/13
V 0 1
0
1
_
AO3409
0
F
0
u
1
12
1
2
2
7 .
C
4
5
R955
12
4
5.6K_5%
DGND
3
+V5S_FANPWR
PWR-B
0710
2
3
D
S
Q821
G
1
FAN CONN
1
1
0 0
V
1
6
C
2
1 _ F u 1 0
. 0
NB_THERMDA
1 2 3
CN812
1 2 3
G1
G
G2
G
NB_THERMDC
ACES_85205_0300N_3P
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
1
%
6
5
5
_
8/13
9
K
R
0 1
2
R957
12
37-
0_5%
V 5
2
1
_
2
F
0
p
0
2
0
1
2
C
2
THERM_WARN#
TACH0
H_THERMDA H_THERMDC
2009/09/28
23-
0_5%_OPEN
23-
THM
0_5%_OPEN
R1552 0_5% 18­18-
THM
R1553 0_5%
20-
R1550
12
R1551
12
12 12
C1024
1000pF_50V
12
THM
R978 R977
2
1
10_5%
12
10_5%
I = 0.5A
+V5S
CHANGE by
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
PWR-D
1
% 5 _ K 0 1
H_THERMDA_R
H_THERMDC_R
C1025
0.1uF_16V
2
U808
1
SMCLK
VDD
2
DXP
SMDATA
3
ALERT
DXN
4
THERM
TI_TMP431A_MSOP_8P
8 7 6 5
GND
2
9 7 9 R
1
THM
THM
THM
TMP431A : 6019B0671901
SMBus Address is "1001_100xb"
37-
37-
18-
CPU-I
DGND
27-Jul-2009ALAN W
SMBUS
THM_CLK
SMBUS
THM_DAT
CPU_Q_ALERT#
INVENTEC
TITLE
ST145a-UMA
FAN & THERMAL
CODE REV
SIZE
A3
CS
SHEET
DOC. NUMBER
20 51
X01Model_No
OF
SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD
SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CMD
SPMEM-CMD
SPMEM-CMD SPMEM-CMD
SPMEM-CMD SPMEM-CMD SPMEM-CMD SPMEM-CTRL SPMEM-CTRL SPMEM-CTRL
SPMEM-CLK-B SPMEM-CLK-B
+V1.5S_SIDEPORT
PWR-C
21-,25-
HTCADOUT-D HTCADOUT-D HTCADOUT-C HTCADOUT-C HTCADOUT-B HTCADOUT-B HTCADOUT-A HTCADOUT-A HTCADOUT-C HTCADOUT-C HTCADOUT-B HTCADOUT-B HTCADOUT-A HTCADOUT-A HTCADOUT-D HTCADOUT-D
HTCADOUT-D HTCADOUT-D HTCADOUT-C HTCADOUT-C HTCADOUT-B HTCADOUT-B HTCADOUT-D HTCADOUT-D HTCADOUT-C HTCADOUT-C HTCADOUT-B HTCADOUT-B HTCADOUT-A HTCADOUT-A HTCADOUT-D HTCADOUT-D
HTCADOUT-D HTCADOUT-D HTCADOUT-A HTCADOUT-A
HTCADOUT-C HTCADOUT-C HTCADOUT-C HTCADOUT-C
GM_MA(0) GM_MA(1) GM_MA(2) GM_MA(3) GM_MA(4) GM_MA(5) GM_MA(6) GM_MA(7) GM_MA(8)
GM_MA(9) GM_MA(10) GM_MA(11) GM_MA(12) GM_MA(13)
GM_BA0 GM_BA1 GM_BA2
GM_RAS# GM_CAS#
GM_WE#
GM_CS# GM_CKE GM_ODT
GM_CLK
GM_CLK#
L0_CADOUT0H L0_CADOUT0L L0_CADOUT1H L0_CADOUT1L L0_CADOUT2H L0_CADOUT2L L0_CADOUT3H L0_CADOUT3L L0_CADOUT4H L0_CADOUT4L L0_CADOUT5H L0_CADOUT5L L0_CADOUT6H L0_CADOUT6L L0_CADOUT7H L0_CADOUT7L
L0_CADOUT8H L0_CADOUT8L L0_CADOUT9H L0_CADOUT9L
L0_CADOUT10H
L0_CADOUT10L
L0_CADOUT11H
L0_CADOUT11L
L0_CADOUT12H
L0_CADOUT12L
L0_CADOUT13H
L0_CADOUT13L
L0_CADOUT14H
L0_CADOUT14L
L0_CADOUT15H
L0_CADOUT15L
L0_CLKOUT0H
L0_CLKOUT0L
L0_CLKOUT1H
L0_CLKOUT1L
L0_CTLOUT0H
L0_CTLOUT0L
L0_CTLOUT1H
L0_CTLOUT1L
16­16­16­16­16­16­16­16­16­16­16­16­16­16­16­16-
16­16­16­16­16­16­16­16­16­16­16­16­16­16­16­16-
16­16­16­16-
16­16­16­16-
12
R980
301_1%
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
C23
A24
Please close to NB balls
SPMEM-CMDSPMEM-CMD
100_1%_OPEN
40.2_1%
40.2_1%
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
AD16
AE17
AD17
W12
Y12
AD18
AB13
AB18
V14
V15
W14
AE12
AD12
25­25­25­25­25­25­25­25­25­25­25­25­25­25-
25­25­25-
25­25­25­25­25­25-
12
R1044
25­25-
R10803 close to NB no stub
12
R1041
12
R1042
Close to NB balls within 1"
Spacing : height 2:1
U810-1
PART 1 OF 6
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
F
/
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
AMD_RS880M_FCBGA_528P
U810-4
PAR 4 OF 6
MEM_A0_NC
MEM_A1_NC
MEM_A2_NC
MEM_A3_NC
MEM_A4_NC
MEM_A5_NC
MEM_A6_NC
MEM_A7_NC
MEM_A8_NC
MEM_A9_NC
MEM_A10_NC
MEM_A11_NC
MEM_A12_NC
MEM_A13_NC
MEM_BA0_NC
MEM_BA1_NC
MEM_BA2_NC
MEM_RAS#_NC
MEM_CAS#_NC
MEM_WE#_NC
MEM_CS#_NC
MEM_CKE_NC
MEM_ODT_NC
MEM_CKP_NC
MEM_CKN_NC
MEM_COMPP_NC
MEM_COMPN_NC
MEM_DQ0_DVO_VSYNC_NC
MEM_DQ1_DVO_HSYNC_NC
MEM_DQ10_DVO_D6_NC
MEM_DQ11_DVO_D7_NC
MEM_DQ13_DVO_D9_NC
MEM_DQ14_DVO_D10_NC
MEM_DQ15_DVO_D11_NC
MEM_DQS0P_DVO_IDCKP_NC
MEM_DQS0N_DVO_IDCKN_NC
F
/
I _
O V D
/ M E M
_ D
B S
AMD_RS880M_FCBGA_528P
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
I
HT_TXCAD7N
U P
HT_TXCAD8P
C
HT_TXCAD8N
T R
HT_TXCAD9P
O
HT_TXCAD9N
P S
HT_TXCAD10P
N
HT_TXCAD10N
A
HT_TXCAD11P
R T
HT_TXCAD11N
R
HT_TXCAD12P
E
HT_TXCAD12N
P Y
HT_TXCAD13P
H
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
MEM_DQ2_DVO_DE_NC
MEM_DQ3_DVO_D0_NC
MEM_DQ4_NC
MEM_DQ5_DVO_D1_NC
MEM_DQ6_DVO_D2_NC
MEM_DQ7_DVO_D4_NC
MEM_DQ8_DVO_D3_NC
MEM_DQ9_DVO_D5_NC
MEM_DQ12_NC
MEM_DQS1P_NC
MEM_DQS1N_NC
MEM_DM0_NC
MEM_DM1_DVO_D8_NC
IOPLLVDD18_NC
IOPLLVDD_NC
IOPLLVSS_NC
MEM_VREF_NC
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
HT_TXCALP
B24
B25
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
16-
L0_CADIN0H
16-
L0_CADIN0L
16-
L0_CADIN1H
16-
L0_CADIN1L
16-
L0_CADIN2H
16-
L0_CADIN2L
16-
L0_CADIN3H
16-
L0_CADIN3L
16-
L0_CADIN4H
16-
L0_CADIN4L
16-
L0_CADIN5H
16-
L0_CADIN5L
16-
L0_CADIN6H
16-
L0_CADIN6L
16-
L0_CADIN7H
16-
L0_CADIN7L
16-
L0_CADIN8H
16-
L0_CADIN8L
16-
L0_CADIN9H
16-
L0_CADIN9L
16-
L0_CADIN10H
16-
L0_CADIN10L
16-
L0_CADIN11H
16-
L0_CADIN11L
16-
L0_CADIN12H
16-
L0_CADIN12L
16-
L0_CADIN13H
16-
L0_CADIN13L
16-
L0_CADIN14H
16-
L0_CADIN14L
16-
L0_CADIN15H
16-
L0_CADIN15L
16-
L0_CLKIN0H
16-
L0_CLKIN0L
16-
L0_CLKIN1H
16-
L0_CLKIN1L
16-
L0_CTLIN0H
16-
L0_CTLIN0L
16-
L0_CTLIN1H
16-
L0_CTLIN1L
12
HT_TXCALN
301_1%R981
HTCADIN-A HTCADIN-A HTCADIN-B HTCADIN-B HTCADIN-C HTCADIN-C HTCADIN-D HTCADIN-D HTCADIN-B HTCADIN-B HTCADIN-C HTCADIN-C HTCADIN-D HTCADIN-D HTCADIN-A HTCADIN-A
HTCADIN-A HTCADIN-A HTCADIN-B HTCADIN-B HTCADIN-C HTCADIN-C HTCADIN-D HTCADIN-D HTCADIN-B HTCADIN-B HTCADIN-C HTCADIN-C HTCADIN-D HTCADIN-D HTCADIN-A HTCADIN-A
HTCADIN-A HTCADIN-A HTCADIN-A HTCADIN-A
HTCADIN-B HTCADIN-B HTCADIN-B HTCADIN-B
Please close to NB balls
25-
GM_MD(0)
25-
GM_MD(1)
25-
GM_MD(2)
25-
GM_MD(3)
25-
GM_MD(4)
25-
GM_MD(5)
25-
GM_MD(6)
25-
GM_MD(7)
25-
GM_MD(8)
25-
GM_MD(9)
25-
GM_MD(10)
25-
GM_MD(11)
25-
GM_MD(12)
25-
GM_MD(13)
25-
GM_MD(14)
25-
GM_MD(15)
25-
GM_DQS0
25-
GM_DQS0#
25-
GM_DQS1
25-
GM_DQS1#
25-
GM_DM0
25-
1
2
L814 L813
C1032
2.2uF_6.3V
GM_DM1
12 12
NB_IOPLLVDD18 NB_IOPLLVDD
NB_MEM_VREF
C1033
2.2uF_6.3V
PWR-B PWR-B
1
2
SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ SPMEM-DQ
SPMEM-DQS SPMEM-DQS SPMEM-DQS
Trace Width >= 15mil
SPMEM-DQS
SPMEM-DQ SPMEM-DQ
15mA
BLM15AG221SN1D
BLM15AG221SN1D
26mA
Close to NB balls within 0.5" Trace width >= 20mil
+V1.8S
Trace Width >= 15mil
CHANGE by
PWR-D 11-,18-,23-,24-,31-
+V1.1S
PWR-D
14-,18-,19-,22-,23-,24-,32-,47-
1
2
1
2
+V1.5S_SIDEPORT
21-,25-
1
R1040
C1101
1K_1%
0.1uF_10V
2
1
R1039
C1100
1K_1%
0.1uF_10V
2
27-Jul-2009ALAN W
PWR-C
INVENTEC
TITLE
ST145a-UMA
SIZE
CODE
A3
CS
SHEET
RS880M - 1
DOC. NUMBER
21 51
REV
X01Model_No
OF
A_C_RX0
A_C_RX0#
A_C_RX1
A_C_RX1#
A_C_RX2
A_C_RX2#
A_C_RX3
A_C_RX3#
PCIE_RXP0 PCIE_RXN0 PCIE_RXP1 PCIE_RXN1
29­29­29­29­29­29­29­29-
U810-2
PART 2 OF 6
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
43­43­48­48-
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
PCE_CALRP_PCE_BCALRP
PCE_CALRN_PCE_BCALRN
AMD_RS880M_FCBGA_528P
X F G
F
/
I E
I C P
P P
G F
/
I E
I C P
B
S F
/
I E
I C P
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
A5
36-
HDMI_TX2P
36-
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
36­36­36­36­36­36-
PCIE_TXP0 PCIE_TXN0 PCIE_TXP1 PCIE_TXN1
A_TX0 A_TX0# A_TX1 A_TX1# A_TX2 A_TX2# A_TX3 A_TX3#
PCE_PCAL
PCE_NCAL
HDMI_TX2N HDMI_TX1P HDMI_TX1N HDMI_TX0P
HDMI_TX0N HDMI_TXCP HDMI_TXCN
C1185 C1186 C1184 C1183 C1181 C1182 C1179 C1180
C1145
C1178
0.1uF_10V
0.1uF_10V
0.1uF_10V
0.1uF_10V
0.1uF_10V
0.1uF_10V
0.1uF_10V
0.1uF_10V
R1038
HDMI-D HDMI-D HDMI-C
HDMI-C HDMI-B HDMI-B
HDMI-A
HDMI-A
12
12
12
12
12
12
12
1
12
12
0.1uF_10VC1146
0.1uF_10V
0.1uF_10VC1177
0.1uF_10V
2
12
12
12
12
1.27K_1%R1043
2K_1%
HDMI
PCIE-16X
43-
PCIE_C_TXP0
43-
PCIE_C_TXN0
48-
PCIE_C_TXP1
48-
PCIE_C_TXN1
29-
A_C_TX0
29-
A_C_TX0#
29-
A_C_TX1
29-
A_C_TX1#
29-
A_C_TX2
29-
A_C_TX2#
29-
A_C_TX3
29-
A_C_TX3#
PCIE-TX-A
LAN
PCIE-TX-A PCIE-TX-B PCIE-TX-B
WLAN
+V1.1S
14-,18-,19-,21-,23-,24-,32-,47-
PCIE-TX-A PCIE-TX-A PCIE-TX-B PCIE-TX-B
CHANGE by
INVENTEC
TITLE
ST145a-UMA
SIZE
CODE
A3
27-Jul-2009ALAN W
CS
SHEET
RS880M - 2
DOC. NUMBER
OF
22 51
REV
X01Model_No
+V1.8S
I = 4mA
11-,18-,21-,23-,24-,31-
BLM15AG221SN1D
CLK_R_NBGFX_REFP
CLK_R_NBGFX_REFN
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
2
R1018
3K_5%_OPEN
1
2
R1021 3K_5%
1
L821
12
+V1.8S
11-,18-,21-,23-,24-,31-
PWR-D
1 2
22uF_6.3V
23-
23-
2
R1019 3K_5%
1
1
R1020
3K_5%_OPEN
2
Trace Width >= 15mil
1
C1071
2.2uF_6.3V
2
Trace Width >= 15mil
I = 20mA
12
L822
12
L826
12
I = 120mA
C1073
Trace Width >= 15mil
INT CLK
R1077
12
12
R1078
INT CLK
CPU-I
23-,29-,37-,48-
7
1 _ E
8
T
1
_
1
0
8
4 _
D
V 1 0 5
2
B R
23-,34­23-,34-
1
R1017
3K_5%_OPEN
2
PWR-B
R1800
3.3_5%
N.C
23-
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
11-,18-,21-,23-,24-,31-
+V1.8S
PWR-D
I = 20mA
NB_AVDDQ NB_AVSSQ
2009/1119
BLM15AG221SN1D BLM15AG221SN1D
4.7K_5%
4.7K_5%
A_RST#
SUS_STAT#_R NB_VSYNC NB_HSYNC
PWR-B
Trace Width >= 15mil
+V1.1S
I = 65mA
14-,18-,19-,21-,22-,24-,32-,47-
BLM15AG221SN1D
I = 20mA
1
C1074
2
4.7uF_4V
2009/1119
NB_R_REFCLKP NB_R_REFCLKN
CLK_R_NBGFX_REFP CLK_R_NBGFX_REFN
NBLINK_R_CLKP NBLINK_R_CLKN
NB_LCM_DAT
NB_LCM_CLK NB_HDMI_CLK NB_HDMI_DAT
LOAD_EEPROM_STRAPS ; SUS_STAT#_R
1 = Bypass the loading of EEPROM straps and use HW Default
0 = I2C Master can load st raps from EEPROM if connected.
RS880M NB_VSYNC
Enables the test Debug Bus usi ng GPIO
RS880M NB_VSYNC
Enable
0
Disable
1
RS880M NB_HSYNC 0 = Memory Side port available 1 = Memory Side port Not available
Register Readback of Strap: NB_CLKCFG: CLK_TOP_SPARE_D[1]
+V3S
C1075
1
0.1uF_10V
2
L820
12
1
C1070
2
2.2uF_6.3V
I = 110mA
BLM15AG221SN1D
L825
12
2.2uF_6.3V
Trace Width >= 15mil
NB_PLLVDD
1
C1072
2.2uF_6.3V
2
NB_PLLVDD18
NB_HTPVDD NB_VDDA18PCIEPLL
PWR-B
1
C1139
2.2uF_6.3V
2
NB_PWRGD_IN
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
HT_R_REFCLKP HT_R_REFCLKN
29­29-
23­23-
29­29-
35­35-
12
36-
R1022
12
36-
R1023
C1138
NB_CRT_R
NB_CRT_G
NB_CRT_B
NB_HSYNC
NB_VSYNC NB_CRT_DAT NB_CRT_CLK
A_RST#
NB_R_REFCLKP NB_R_REFCLKN
STRP_DATA
0_5% 0_5%
Trace Width >= 15mil
NB_AVDD
1
2
23-,34-
23-,34-
23-,34-
23-,34­23-,34­34­34-
R1036
1
Trace Width >= 10mil
715_1%
R1069
12
23-,29-,37-,48-
R1024
31-
12
18­23-
29­29-
CLK_R_NBGFX_REFP
CLK_R_NBGFX_REFN
HDMI_CLK
HDMI_DATA
13-
1
2
DAC_RSET
2
0_5%
NB_RST#_IN
NB_PWRGD_IN_R
0_5%
CPU-I
TP831 TP830
TP828
RS880M_AUC_CAL
R1028 150_1%
U810-3
F12
AVDD1_NC
E12
AVDD2_NC
F14
AVDDDI_NC
G15
AVSSDI_NC
H15
AVDDQ_NC
H14
AVSSQ_NC
E17
C_Pr_DFT_GPIO5
F17
Y_DFT_GPIO2
F15
COMP_P#_DFT_GPIO4
G18
RED_DFT_GPIO0
G17
RED#_NC
E18
GREEN_DFT_GPIO1
F18
GREEN#_NC
E19
BLUE_DFT_GPIO3
F19
BLUE#_NC
A11
DAC_HSYNC_PWM_GPIO4
B11
DAC_VSYNC_PWM_GPIO6
E8
DAC_SDA_PCE_TCALRN
F8
DAC_SCL_PCE_RCALRN
G14
DAC_RSET_PWM_GPIO1
A12
PLLVDD_NC
D14
PLLVDD18_NC
B12
PLLVSS_NC
H17
VDDA18HTPLL
D7
PWR-B
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESET#
A10
POWERGOOD
C10
LDTSTOP#
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P_OSCIN_OSCIN
F11
REFCLK_N_PWM_GPIO3
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP_SB_REFCLKP
V3
GPPSB_REFCLKN_SB_REFCLKN
A9
I2C_DATA
B9
I2C_CLK
A8
DDC_CLK0_AUX0P_NC
B8
DDC_DATA0_AUX0N_NC
B7
DDC_CLK1_AUX1P_NC
A7
DDC_DATA1_AUX1N_NC
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL_NC
PART 3 OF 6
TXOUT_L2N_DBG_GPIO0
TXOUT_L3N_DBG_GPIO2
T
TXOUT_U1P_PCIE_RESET_GPIO3
U
TXOUT_U1N_PCIE_RESET_GPIO2
O V T
/ T
TXOUT_U3P_PCIE_RESET_GPIO5
R C
TXCLK_LP_DBG_GPIO1
TXCLK_LN_DBG_GPIO3
TXCLK_UP_PCIE_RESET_GPIO4
TXCLK_UN_PCIE_RESET_GPIO1
R W
P L
L P
M T V L
M P
LVDS_DIGON_PCE_TCALRP
LVDS_BLON_PCE_RCALRP
LVDS_ENA_BL_PWM_GPIO2
s K C O L C
MIS.
TVCLKIN_PWM_GPIO5
THERMALDIODE_P
THERMALDIODE_N
AMD_RS880M_FCBGA_528P
A22
TXOUT_L0P_NC
B22
TXOUT_L0N_NC
A21
TXOUT_L1P_NC
B21
TXOUT_L1N_NC
B20
TXOUT_L2P_NC
A20
A19
TXOUT_L3P_NC
B19
B18
TXOUT_U0P_NC
A18
TXOUT_U0N_NC
A17
B17
D20
TXOUT_U2P_NC
D21
TXOUT_U2N_NC
D18
D19
TXOUT_U3N_NC
B16
A16
D16
D17
A13
VDDLTP18_NC
B13
VSSLTP18_NC
A15
VDDLT18_1_NC
B15
VDDLT18_2_NC
A14
VDDLT33_1_NC
B14
VDDLT33_2_NC
C14
VSSLT1_VSS
D15
VSSLT2_VSS
C16
VSSLT3_VSS
C18
VSSLT4_VSS
C20
VSSLT5_VSS
E20
VSSLT6_VSS
C22
VSSLT7_VSS
E9
F7
G12
D9
TMDS_HPD_NC
D10
HPD_NC
D12
AE8
AD8
D13
TESTMODE
NB_ALLOW_LDTSTOP
35­35­35­35­35­35-
35­35-
NB_LVDSVCC_EN NB_LVDS_PWM
NB_LVDS_BLEN
R1076
12
R1027
TEST_EN
12
1.8K_5%
NB_LCM_TXDL0P NB_LCM_TXDL0N NB_LCM_TXDL1P NB_LCM_TXDL1N NB_LCM_TXDL2P NB_LCM_TXDL2N
TP827
NB_LCM_TXCLP NB_LCM_TXCLN
0_5%
CPU-I
+V1.8S
11-,18-,21-,23-,24-,31-
PWR-D
1K_5%
23-
C1069
1
0.1uF_10V
2
R1071 R1073 R1075
4.7K_5%
4.7K_5%
4.7K_5%
12
R1029
100K_5%_OPEN
31-TP829
SUS_STAT#
23-
SUS_STAT#_R
20-
NB_THERMDA
20-
NB_THERMDC
1
R1031
2
0_5%
12
R1030
NB_VDDLTP18
NB_VDDR18D
C1067
1
4.7uF_6.3V
2
12 12 12
12 12 12
29-
ALLOW_LDTSTOP
Trace Width >= 15mil
BLM15AG221SN1D
C1068
1
2
2.2uF_6.3V
L819
12
BLM15AG221SN1D
Trace Width >= 15mil
I = 300mA
0_5%
CPU-I
0_5% 0_5%
R1070 R1072 R1074
36-
DGPU_HPD_INTR
NB_CRT_R
NB_CRT_G
NB_CRT_B
27-Jul-2009ALAN W
I = 15mA
12
+V1.8S
11-,18-,21-,23-,24-,31-
L818
11-,18-,21-,23-,24-,31-
35-
NB_LCMVCC_EN
35-
NB_LCM_PWM
35-
NB_LCM_BLEN
+V1.8S
PWR-D
PWR-D
Place close to RS880M < 1"
140_1% R1037
23-,34-
150_1%
23-,34-
150_1% R1032
23-,34-
INVENTEC
TITLE
ST145a-UMA
SIZE
CODE
Model_No
A3
CS
SHEETCHANGE by
2
1
12
R1033
12
RS880M - 3
DOC. NUMBER
OF
23 51
REV
X01
+V1.1S
14-,18-,19-,21-,22-,23-,24-,32-,47-
+V1.8S
11-,18-,21-,23-,24-,31-
L827
12
BLM21PG221SN1
Trace Width >= 25mil
I = 700mA
14-,18-,19-,21-,22-,23-,24-, 32-,47-
+V1.1S
14-,18-,19-,21-,22-,23-,24-,32-,47-
+V1.1S
Trace Width >= 40mil
I = 700mA
Trace Width >= 20mil
I = 400mA
2009/11/23
C1148
1
4.7uF_6.3V
2
Trace Width >= 35mil
I = 600mA
PWR-D
C1030
1
2
4.7uF_6.3V
C1094
1
4.7uF_6.3V
2
VDDHT
C1027
1
2
4.7uF_6.3V
VDDHTRX
C1026
1
2
10uF_6.3V
VDDHTTX
C1031
1
2
0.1uF_10V
C1082
1
2
0.1uF_10V
Trace Width >= 15mil
I = 10mA
Trace Width >= 15mil
I = 25mA
C1087
1
2
0.1uF_10V
C1029
1
0.1uF_10V
2
1
2
C1095
1
2
0.1uF_10V
+V1.1S
+V1.1S
C1091
0.1uF_10V
VDDA18PCIE
+V1.8S
+V1.8S
C1081
1
2
0.1uF_10V
C1028
1
0.1uF_10V
2
C1096
1
2
0.1uF_10V
C1088
1
2
0.1uF_10V
11-,18-,21-,23-,24-,31-
C1076
1
2
1uF_10V
11-,18-,21-,23-,24-,31-
C1140
1
2
1uF_10V
C1093
1
2
0.1uF_10V
1
2
C1084
0.1uF_10V
U810-5
J17
K16
L16
M16
P16
R16
T16
H18
G19
F20
E21
D22
B23
A23
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
J10
P10
K10
M10
L10
T10
R10
AA9
AB9
AD9
AE9
U10
AE11
AD11
PART 5/6
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
Y9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
F9
VDDG18_1_VDD18_1
G9
VDDG18_2_VDD18_2
VDD18_MEM1_NC
VDD18_MEM2_NC
AMD_RS880M_FCBGA_528P
R E
W O P
VDD_MEM1_NC
VDD_MEM2_NC
VDD_MEM3_NC
VDD_MEM4_NC
VDD_MEM5_NC
VDD_MEM6_NC
VDDG33_1_NC
VDDG33_2_NC
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
U810-6
PART 6/6
A25
VSSAHT1
D23
VSSAHT2
E22
VSSAHT3
G22
VSSAHT4
G24
VSSAHT5
G25
VSSAHT6
H19
VSSAHT7
J22
VSSAHT8
L17
VSSAHT9
L22
VSSAHT10
L24
VSSAHT11
L25
VSSAHT12
M20
VSSAHT13
N22
VSSAHT14
P20
VSSAHT15
R19
VSSAHT16
R22
VSSAHT17
R24
VSSAHT18
R25
VSSAHT19
H20
VSSAHT20
U22
VSSAHT21
V19
VSSAHT22
W22
VSSAHT23
W24
VSSAHT24
W25
VSSAHT25
Y21
VSSAHT26
AD25
VSSAHT27
L12
VSS11
M14
VSS12
N13
VSS13
P12
VSS14
P15
VSS15
R11
VSS16
R14
VSS17
T12
VSS18
U14
VSS19
U11
VSS20
U15
VSS21
V12
VSS22
W11
VSS23
W15
VSS24
AC12
VSS25
AA14
VSS26
Y18
VSS27
AB11
VSS28
AB15
VSS29
AB17
VSS30
AB19
VSS31
AE20
VSS32
AB21
VSS33
K11
VSS34
AMD_RS880M_FCBGA_528P
D N U O R G
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
VSS1
D11
VSS2
G8
VSS3
E14
VSS4
E15
VSS5
J15
VSS6
J12
VSS7
K14
VSS8
M11
VSS9
L15
C1137
1
2
4.7uF_6.3V
VCC_NB
13-,47-
C1149
+V1.1S
14-,18-,19-,21-,22-,23-,24-,32-,47-
1 2
14-,18-,25-,45-,47-,48-
+V1.5S
1
2
C1806
10uF_6.3V
2009/11/19
I = TBDA
Trace Width >= 130mil
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
C1085
1
2
0.1uF_10V
C1092
1
2
0.1uF_10V
C1080
1
2
0.1uF_10V
C1097
1
2
0.1uF_10V
0.1uF_10V
10-,12-,14-,20-,23-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
C1141
1
2
0.1uF_10V
C1089
1
2
0.1uF_10V
C1083
1
2
0.1uF_10V
C1098
+V3S
VDDPCIE
C1090
1
2
1uF_10V
Trace Width >= 550mil
I = 10A
C1142
1
2
10uF_6.3V
C1079
1
2
0.1uF_10V
C1099
1
2
0.1uF_10V
Trace Width >= 15mil
C1077
0.1uF_10V
C1078
1
2
0.1uF_10V
1
2
C1144
1
2
1uF_10V
C1143
1
2
10uF_6.3V
C1086
1
2
0.1uF_10V
C1147
1
2
0.1uF_10V
I = 60mA
I = 2.5A
1
2
4.7uF_6.3V
INVENTEC
TITLE
ST145a-UMA
SIZE
CODE
A3
CS
27-Jul-2009ALAN W
SHEETCHANGE by
RS880M - 4
DOC. NUMBER
OF
24
REV
X01Model_No
51
SIDE-PORT DDR III
GM_MA(0) GM_MA(1) GM_MA(2) GM_MA(3) GM_MA(4) GM_MA(5) GM_MA(6) GM_MA(7) GM_MA(8)
GM_MA(9) GM_MA(10) GM_MA(11) GM_MA(12) GM_MA(13)
GM_BA0 GM_BA1 GM_BA2
GM_ODT
GM_CS# GM_RAS# GM_CAS#
GM_WE#
GM_RESET#
GM_CKE
GM_CLK
GM_CLK#
GM_DM1
GM_DQS1
GM_DQS1#
GM_DM0
GM_DQS0
GM_DQS0#
SP_VREFDQ
SP_VREFCA
21­21­21­21­21­21­21­21­21­21­21­21­21­21-
21­21­21-
21­21­21­21­21-
25-,31-
21-
21­21-
21-
21-
21-
21-
21-
21-
25­25-
U811
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10_AP
R7
A11
N7
A12_BC#
T3
A13
T7
A14
M7
A15_BA3
M2
BA0
N8
BA1
M3
BA2
K1
ODT_ODT0
L2
CS#_CS0#
J3
RAS#
K3
CAS#
L3
WE#
T2
RESET#
K9
CKE_CKE0
J7
CK
K7
CK#
D3
DMU
C7
DQSU
B7
DQSU#
E7
DML
F3
DQSL
G3
240_1%
R1046
DQSL#
L8
ZQ_ZQ0
12
J1
NC_ODT1
L1
NC_CS1#
J9
NC_CE1
L9
NC_ZQ1
H1
VREFDQ
M8
VREFCA
SAM_K4W1G1646E_HC15_FBGA_96P
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD_B2 VDD_D9 VDD_G7 VDD_K2 VDD_K8 VDD_N1 VDD_N9 VDD_R1 VDD_R9
VDDQ_A1 VDDQ_A8 VDDQ_C1 VDDQ_C9 VDDQ_D2 VDDQ_E9 VDDQ_F1 VDDQ_H2 VDDQ_H9
VSS_A9 VSS_B3
VSS_E1
VSS_G8
VSS_J2
VSS_J8 VSS_M1 VSS_M9
VSS_P1
VSS_P9
VSS_T1
VSS_T9
VSSQ_B1 VSSQ_B9 VSSQ_D1 VSSQ_D8 VSSQ_E2 VSSQ_E8
VSSQ_F9 VSSQ_G1 VSSQ_G9
21-
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
21­21­21­21­21­21­21-
21­21­21­21­21­21­21­21-
GM_MD(0) GM_MD(1) GM_MD(2) GM_MD(3) GM_MD(4) GM_MD(5) GM_MD(6) GM_MD(7)
GM_MD(8) GM_MD(9) GM_MD(10) GM_MD(11) GM_MD(12) GM_MD(13) GM_MD(14) GM_MD(15)
+V1.5S_SIDEPORT
21-,25-
0.5A
+V1.5S_SIDEPORT
21-,25-
SIDE PORT MEMORY DDR3 800MHz
HYNIX
SAMSUNG
6019B0647101
6019B0648501
R1206
R1186
SP_VREFDQ
SP_VREFCA
GM_RESET#
C1103
0.1uF_10V
25-
C1035
0.1uF_10V
C1107
0.1uF_10V
25-
C1106
0.1uF_10V
+V1.5S_SIDEPORT
21-,25-
1
1
R982
1K_1%
2
2
1
1
R983 1K_1%
2
2
+V1.5S_SIDEPORT
21-,25-
1
1
R1047 1K_1%
2
2
1
1
R1048 1K_1%
2
2
+V1.5S_SIDEPORT
21-,25-
2
R1045
10K_5%
1
25-,31-
1
C1105
0.01uF_16V
2
0.5A
+V1.5S +V1.5S_SIDEPORT
14-,18-,24-,45-,47-,48-
L815
12
BLM11P600S_OPEN
PAD5
POWERPAD_2_0610
10uF_6.3V
1
2
C1037
10uF_6.3V
1
2
C1034
C1104 C1036
1
2
1uF_10V
1uF_10V
1
2
C1108
0.1uF_10V
1
2
0.1uF_10V
21-,25-
C1102
1
2
INVENTEC
TITLE
ST145a-UMA
SIDE-PORT
SIZE
CODE
A3
CHANGE by SHEET
ALAN W 27-Jul-2009
CS
Model_No X01
REVDOC. NUMBER
OF
5125
SO-DIMM0
SMBUS SMBUS
SDDR-CTRL SDDR-CTRL
SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ
SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS
SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS SDDR-DQS
SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CMD
SDDR-CMD
17-
MA_BA0
17-
MA_BA1
17-
MA_BA2
17-
MA_CS0#
17-
MA_CS1#
MA_CLK_DDR1
MA_CLK_DDR1#
MA_CLK_DDR2
MA_CLK_DDR2#
SB_3S_SMCLK
SB_3S_SMDATA
MA_DM(7:0)
MA_DQS(7:0)
MA_DQS#(7:0)
17­17­17­17­17-
MA_CKE0
17-
MA_CKE1
17-
MA_CAS#
17-
MA_RAS#
17-
MA_WE#
26-
SA0_DIM0
26-
SA1_DIM0
27-,31-,40­27-,31-,40-
17-
MA_ODT0
17-
MA_ODT1
17-
17-
17-
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
NOTE:
IF SA0_DIM0=0 , SA1_DIM0=0 SO-DIMMA SPD ADDRESS IS 0xA0 SO-DIMMA TS ADDRESS IS 0x30
IF SA0_DIM0=1 , SA1_DIM0=0 SO-DIMMA SPD ADDRESS IS 0xA2 SO-DIMMA TS ADDRESS IS 0x32
SDDR-CMD SDDR-CMD SDDR-CMD SDDR-CTRL SDDR-CTRL
SDDR-CTRL SDDR-CTRL SDDR-CMD SDDR-CMD SDDR-CMD
SDDR-CTRL SDDR-CTRL
MA_A(0) MA_A(1) MA_A(2) MA_A(3) MA_A(4) MA_A(5) MA_A(6) MA_A(7) MA_A(8) MA_A(9) MA_A(10) MA_A(11) MA_A(12) MA_A(13) MA_A(14) MA_A(15)
MA_DM(0) MA_DM(1) MA_DM(2) MA_DM(3) MA_DM(4) MA_DM(5) MA_DM(6) MA_DM(7)
MA_DQS(0) MA_DQS(1) MA_DQS(2) MA_DQS(3) MA_DQS(4) MA_DQS(5) MA_DQS(6) MA_DQS(7) MA_DQS#(0) MA_DQS#(1) MA_DQS#(2) MA_DQS#(3) MA_DQS#(4) MA_DQS#(5) MA_DQS#(6) MA_DQS#(7)
CN808-1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10_AP
84
A11
83
A12
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
FOX_AS0A626_U4SG_7H_204P
+V3S
R864
10K_5%
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
PWR-D
1
R865 10K_5%_OPEN
2
1
1
R863 10K_5%
2
2
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
MA_DATA(0) MA_DATA(1) MA_DATA(2) MA_DATA(3) MA_DATA(4) MA_DATA(5) MA_DATA(6) MA_DATA(7) MA_DATA(8) MA_DATA(9) MA_DATA(10) MA_DATA(11) MA_DATA(12) MA_DATA(13) MA_DATA(14) MA_DATA(15) MA_DATA(16) MA_DATA(17) MA_DATA(18) MA_DATA(19) MA_DATA(20) MA_DATA(21) MA_DATA(22) MA_DATA(23) MA_DATA(24) MA_DATA(25) MA_DATA(26) MA_DATA(27) MA_DATA(28) MA_DATA(29) MA_DATA(30) MA_DATA(31) MA_DATA(32) MA_DATA(33) MA_DATA(34) MA_DATA(35) MA_DATA(36) MA_DATA(37) MA_DATA(38) MA_DATA(39) MA_DATA(40) MA_DATA(41) MA_DATA(42) MA_DATA(43) MA_DATA(44) MA_DATA(45) MA_DATA(46) MA_DATA(47) MA_DATA(48) MA_DATA(49) MA_DATA(50) MA_DATA(51) MA_DATA(52) MA_DATA(53) MA_DATA(54) MA_DATA(55) MA_DATA(56) MA_DATA(57) MA_DATA(58) MA_DATA(59) MA_DATA(60) MA_DATA(61) MA_DATA(62) MA_DATA(63)
26-
SA0_DIM0
26-
SA1_DIM0
SDDR-CTRL
SDDR-CTRL
C932
1
2
22uF_6.3V
+V1.5
PWR-D 11-,12-,14-,18-,19-,26-,27-,32-,33-
C972
1
2
22uF_6.3V
1
C874
1uF_10V
2
17-17-
MA_DATA(63:0)MA_A(15:0)
SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ
1
C971
SDDR-DQ SDDR-DQ
100uF_6.3V
SDDR-DQ
2
SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ SDDR-DQ
SDDR-DQ SDDR-DQ SDDR-DQ
4A
C974
1
2
22uF_6.3V
+V3S
PWR-D
1
2
M_VREF_DQ_A
CPU_MEMHOT#
C875
0.1uF_10V
M_VREF_DQ_A
C1121
2.2uF_6.3V
2.2uF_6.3V
PWR-C
26-
R927
12
0_5%
1
2
0.5A
C1017
0.1uF_10V
PWR-C 26-
1
2
M_VREF
C931
M_VREF
PWR-A 11-,26-,27-
18-,29-,31-
C934
1
2
0.1uF_10V
1
C1120
0.1uF_10V
2
11-,26-,27-
1
2
11-,12-,14-,18-,19-,26-,27-,32-,33-
Q810
MMBT3904
Layout NOTE: Place
these Caps near
SO-DIMM0 power pin
C1016
1
2
0.1uF_10V
MEM_MA_EVENT#
1
C930
0.1uF_10V
2
+V1.5
1
%
0
5
6
_
8
K
R
2
.
2
2
1
B
C
E
32
Q811
MMBT3904
C1018
1
2
0.1uF_10V
26-
11-,12-,14-,18-,19-,26-,27-,32-,33-
+V1.5
1
%
2
5
6
_
8
K
R
2
.
2
2
1
B
19-
%
5 _ K 2
. 2
MEM_MA_RST#
PWR-D PWR-D
3CE2
CHANGE by
100 105 106 111 112 117 118 123 124
199
122 125
CPU-I SDDR-CTRL
198
126
FOX_AS0A626_U4SG_7H_204P
1
1
%
9
1
5
5
6
_
8
8
K
R
R
2
.
2
2
2
26-
MEM_MA_EVENT#
27-
MEM_MB_EVENT#
ALAN W 27-Jul-2009
CN808-2
75 76 81 82 87 88 93 94 99
77
30
1
2 3 8
9 13 14 19 20 25 26 31 32 37 38 43
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
VDDSPD
NC1 NC2 NCTEST
EVENT# RESET#
VREF_DQ VREF_CA
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
203
VTT1
204
VTT2
G1
G1
G2
G2
C872
4.7uF_6.3V
Place these caps
close to VTT1 and
VTT2
+V0.75S
11-,27-
PWR-A
1.5A
Note:Place C4100
on common path
for both DIMM's
1
1
C873
2
2
0.1uF_10V
INVENTEC
TITLE
ST145a-UMA
DDR3 DIMM0
CODE
SIZE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REV
5126
SO-DIMM1
MB_A(15:0)
MB_DM(7:0)
MB_DQS(7:0)
MB_DQS#(7:0)
17-
SA0_DIM1 SA1_DIM1
SB_3S_SMCLK
SB_3S_SMDATA
17-
17-
17-
MB_BA0 MB_BA1
MB_BA2 MB_CS0# MB_CS1#
MB_CLK_DDR1 MB_CLK_DDR1# MB_CLK_DDR2 MB_CLK_DDR2#
MB_CKE0 MB_CKE1 MB_CAS# MB_RAS#
MB_WE#
27­27­26-,31-,40­26-,31-,40-
MB_ODT0 MB_ODT1
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
NOTE:
SO-DIMMB SPD ADDRESS IS 0xA4 SO-DIMMB TS ADDRESS IS 0x34
MB_A(0) MB_A(1) MB_A(2) MB_A(3) MB_A(4) MB_A(5) MB_A(6) MB_A(7) MB_A(8) MB_A(9) MB_A(10) MB_A(11) MB_A(12) MB_A(13) MB_A(14) MB_A(15)
17­17­17­17­17­17­17­17­17­17­17­17­17­17-
CN809-1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10_AP
84
A11
83
A12
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
17-
116
ODT0
17-
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
FOX_AS0A621_J8SG_7H_204P
SA1_DIM1
27-
R866
10K_5%
+V3S
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
MB_DATA(63:0)
17-
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
27-
1
2
1
2
R867 10K_5%
SA0_DIM1
4A
+V1.5
11-,12-,14-,18-,19-,26-,27-,32-,33-
C938
1
2
22uF_6.3V
1
C879
2
1uF_10V
C973
1
2
22uF_6.3V
C975
1
2
22uF_6.3V
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
C878
1
2
0.1uF_10V
M_VREF_DQ_B
27-
C1123
1
2
2.2uF_6.3V
M_VREF
C936
2.2uF_6.3V
+V1.5
N E P O _
1 V 0
2
5 _ F p
3 3
Layout Note: Place
these Caps near
SO-DIMM1 power pin
C937
1
2
0.1uF_10V
C1122
1
2
0.1uF_10V
0.5A
11-,26-,27-
C935
1
1
2
2
27-
11-,12-,14-,18-,19-,26-,27-,32-,33-
3 1
4 1 C
M_VREFM_VREF_DQ_B
R928
12
0_5%
N
4
E
1
P
4
O
1
_
C
1 V 0
2
5 _ F p 3 3
0.1uF_10V
RF
C1020
1
2
0.1uF_10V
MEM_MB_EVENT#
MEM_MB_RST#
11-,26-,27-
C933
1
2
0.1uF_10V
CHANGE by
CN809-2
75
VDD1
76
C1015
1
2
0.1uF_10V
26­19-
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
FOX_AS0A621_J8SG_7H_204P
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
Place these caps
close to VTT1 and
VTT2
+V0.75S
11-,26-
1.5A
203 204
G1
G1
G2
G2
Place these caps
close to VTT1 and
VTT2
C876
C877
1
1
2
2
0.1uF_10V
ST145a-UMA
DDR3 DIMM1
DOC. NUMBER
CODE
Model_No X01
CS
SHEET OF
REV
5127
ALAN W
27-Jul-2009
4.7uF_6.3V
INVENTEC
TITLE
SIZE
A3
INVENTEC
TITLE
ST145a-UMA
DDR3 DAMPING
SIZE CODE DOC. NUMBER REV
A3
CHANGE by SHEET
20-Aug-2009ALAN W
CS
OF
28 51
X01Model_No
A_RST#
ALINK-RX-A
A_C_RX0
ALINK-RX-A
A_C_RX0#
ALINK-RX-B
A_C_RX1
ALINK-RX-B
A_C_RX1#
ALINK-RX-C
A_C_RX2
ALINK-RX-C
A_C_RX2#
ALINK-RX-D
A_C_RX3
ALINK-RX-D
A_C_RX3#
PCIE_VDDR
PCIE & ALINK - 100MHZ
NBLINK_R_CLKP NBLINK_R_CLKN
NB_REF - 100MHZ
NB_R_REFCLKP
NB_R_REFCLKN
NB_HT - 100MHZ
HT_R_REFCLKP HT_R_REFCLKN
CPU - 200 MHZ
CPU_R_CLKP CPU_R_CLKN
NB_GFX - 100MHZ LAN - 100MHZ
PCIE_R_LAN_CLKP PCIE_R_LAN_CLKN
WLAN - 100MHZ
PCIE_R_WLAN_CLKP PCIE_R_WLAN_CLKN
CARD READER - 48MHZ
CLK-USB
2
0.1uF_10V
12
0.1uF_10V
12
0.1uF_10V
12
0.1uF_10V
12
CLK-SRC-B CLK-SRC-B
CLK-SRC-B CLK-SRC-B
CLK-HCLK-A
CLK-HCLK-A
CLK-HCLK-A
39-
PCIE_RST#_C
C1306
1
C1215
C1212
C1211
C1209
A_C_TX0 A_C_TX0# A_C_TX1 A_C_TX1# A_C_TX2 A_C_TX2# A_C_TX3 A_C_TX3#
R1175 R1174
INT CLK
RS812
1 23
0.5%
INT CLK
RS806
1 23
0.5%
INT CLK
RS810
1 23
0.5%
5
1
0 2 1
2
C
150pF_50V
23-,37-,48-
22- 33-
C1214
22­22-
C1213
22­22-
C1210
22­22-
C1208
22-
ALINK-TX-A ALINK-TX-A
ALINK-TX-B ALINK-TX-B ALINK-TX-C ALINK-TX-C ALINK-TX-D ALINK-TX-D
PWR-C
32-
23­23-
23­23-
23­23-
18­18-
43-
CLK-SRC-C 43-
CLK-SRC-C
48-
CLK-SRC-D 48-
CLK-SRC-D
CLK_CR48
R1221
12
CPU-I
0.1uF_10V
12
0.1uF_10V
2
1
0.1uF_10V
12
0.1uF_10V
12
22­22­22­22­22­22­22­22-
590_1%
12
LPC
2K_1%
12
LPC
INT CLK
0.5%
23 1
RS804
4
INT CLK
1 2
0.5%
4
4
INT CLK
1 23
0.5%
INT CLK
12
R1172
R1140
12
1M_5%
X802
1
V 0
25MHz
5 _ F
p 7 2
2009/11/19
29-
4
SB_NB_DISP_CLKP SB_NB_DISP_CLKN
RS800 4
CLK-HCLK-A
3
CLK-HCLK-A
CLK-HCLK-A CLK-HCLK-A
RS809
4
22_5%
2
6
1
0 2
1
2
C
CPU-I
33_5%
CPU-I
PCIE_CALRP PCIE_CALRN
SB_NB_LINK_CLKP
SB_NB_LINK_CLKN
CLK-SRC-B CLK-SRC-B
SB_HT_CLKP SB_HT_CLKN
SB_CPU_CLKP
SB_CPU_CLKN
SB_LAN_CLKP
CLK-SRC-C
SB_LAN_CLKN
CLK-SRC-C
SB_WLAN_CLKP
CLK-SRC-D
SB_WLAN_CLKN
CLK-SRC-D
SB_48M_OSC
V 0 5 _ F p 7 2
A_RX0
A_RX0#
A_RX1
A_RX1#
A_RX2
A_RX2#
A_RX3
A_RX3#
AD26 AD27 AC28 AC29 AB29 AB28 AB26 AB27
AE24 AE23 AD25 AD24 AC24 AC25 AB25 AB24
AD29 AD28
AA28 AA29
AA22
AA25 AA24
P1 L1
Y29 Y28 Y26 Y27 W28 W29
Y21
W23 V24 W24 W25
M23 P23
U29 U28
T26 T27
V21 T21
V23 T23
L29 L28
N29 N28
M29 M28
T25 V25
L24 L23
P25 M25
P29 P28
N26 N27
T29 T28
L25
L26
L27
U822-1
PCIE_RST# A_RST#
A_TX0P A_TX0N A_TX1P A_TX1N A_TX2P A_TX2N A_TX3P A_TX3N
A_RX0P A_RX0N A_RX1P A_RX1N A_RX2P A_RX2N A_RX3P A_RX3N
PCIE_CALRP PCIE_CALRN
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N
PCIE_RCLKP_NB_LNK_CLKP PCIE_RCLKN_NB_LNK_CLKN
NB_DISP_CLKP NB_DISP_CLKN
NB_HT_CLKP NB_HT_CLKN
CPU_HT_CLKP CPU_HT_CLKN
SLT_GFX_CLKP SLT_GFX_CLKN
GPP_CLK0P GPP_CLK0N
GPP_CLK1P GPP_CLK1N
GPP_CLK2P GPP_CLK2N
GPP_CLK3P GPP_CLK3N
GPP_CLK4P GPP_CLK4N
GPP_CLK5P GPP_CLK5N
GPP_CLK6P GPP_CLK6N
GPP_CLK7P GPP_CLK7N
GPP_CLK8P GPP_CLK8N
14M_25M_48M_OSC
25M_X1
25M_X2
AMD_SB820M_FCBGA_605P
SB800
S E C A F
R E T N I
S S E R P X E
I C P
R O T A R E N
E G
K C O L C
Part 1 of 5
S K L C
I
PCICLK4_14M_OSC_GPO39
C P
REQ2#_CLK_REQ8#_GPIO41 REQ3#_CLK_REQ5#_GPIO42
GNT3#_CLK_REQ7#_GPIO46
LDRQ1#_CLK_REQ6#_GPIO49
ALLOW_LDTSTP_DMA_ACTIVE#
PCICLK1_GPO36 PCICLK2_GPO37 PCICLK3_GPO38
E C A F R
E T N I
I C P
C P L
SERIRQ_GPIO48
U P C
C T R
INTRUDER_ALERT#
PCICLK0
PCIRST#
AD0_GPIO0 AD1_GPIO1 AD2_GPIO2 AD3_GPIO3 AD4_GPIO4 AD5_GPIO5 AD6_GPIO6 AD7_GPIO7 AD8_GPIO8
AD9_GPIO9 AD10_GPIO10 AD11_GPIO11 AD12_GPIO12 AD13_GPIO13 AD14_GPIO14 AD15_GPIO15 AD16_GPIO16 AD17_GPIO17 AD18_GPIO18 AD19_GPIO19 AD20_GPIO20 AD21_GPIO21 AD22_GPIO22 AD23_GPIO23 AD24_GPIO24 AD25_GPIO25 AD26_GPIO26 AD27_GPIO27 AD28_GPIO28 AD29_GPIO29 AD30_GPIO30 AD31_GPIO31
DEVSEL#
REQ1#_GPIO40
GNT1#_GPO44 GNT2#_GPO45
CLKRUN#
INTE#_GPIO32 INTF#_GPIO33 INTG#_GPIO34 INTH#_GPIO35
LPCCLK0 LPCCLK1
LFRAME#
PROCHOT#
LDT_STP# LDT_RST#
VDDBT_RTC_G
Trace Width >= 15mil
CBE0# CBE1# CBE2# CBE3#
FRAME#
IRDY# TRDY#
STOP# PERR# SERR# REQ0#
GNT0#
LOCK#
LAD0 LAD1 LAD2 LAD3
LDRQ0#
LDT_PG
32K_X1
32K_X2
RTCCLK
12
R1237
W2
R1238
W1
R1239
W3
R1241
W4
R1240
Y1
V2
AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5
PAR
AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7
AJ6 AG6 AG4 AJ4
R1170
H24
R1171
H25 J27 J26 H29 H28 G28 J25 AA18 AB19
G21 H21 K19 G22 J24
C1
C2
D2 B2 B1
1 3 3 1 C
22_5%_OPEN
12
12
1
12
12
R1235
TP843
R1246
12 PCI PCI PCI PCI PCI PCI PCI
R1245
12
PCI
29-,37-
TP850
TP842
TP845 TP841
TP844
TP852
TP851
DEFAULT_NET_TYPE
12 12
47pF_50V_OPEN
C2001
12
R1169 0_5%_OPEN
12
CPU-I
CPU-I
CPU-I
CPU-I CPU-I
CPU-I
LPC
R1270
+V_RTC
PWR-B
V
V
0
0
1
1
1
1
0
_
_
3
F
F
3
u
u
2
1
2
1
1
C
. 0
22_5% 22_5%
2
22_5% 22_5%
33_5%
0_5%
0_5%
PCI_SERR#
29-,40-
ACCEL_INT
12_5%
33-,37-
22_5%
33-,48­29-,37-,48­29-,37-,48­29-,37-,48­29-,37-,48-
37-,48-
2009/12/21 37-
SERIRQ
18-
LDT_REQ#
23-
ALLOW_LDTSTOP
18-
CPU_PROCHOT#
18-
LDT_PG
18-
LDTSTOP#
18-
CPU_LDT_RST#
29-
RTC_CLK
1M_5%_OPEN
12
+V3AL
7-,8-,9-,37-
3
D823 BAT54C
R1271
2
510_5%
12
PWR-B
13­33­33­33­33­33­33­33-
38­29-
PCI_CLK0
33-
PCI_CLK1
33-
PCI_CLK2 PCI_CLK3
33-
PCI_CLK4
150pF_50V
C1335
12
MPCIE_RST0#
VDDR_0.9_EN
PCI_3S_AD(23) PCI_3S_AD(24) PCI_3S_AD(25) PCI_3S_AD(26) PCI_3S_AD(27) PCI_3S_AD(28)
PCI_3S_AD(29) HDD_LOCK_LED SB820M_MEMHOT#
LPC
LPC_CLK0
LPC
LPC_CLK1
LPC_AD(0) LPC_AD(1) LPC_AD(2) LPC_AD(3)
LPC_FRAME#
CPU-I
DGND
+V_RTCBAT
29-
PWR-B
Trace Width >= 15mil
PCI
N.C ?
PCI PCI PCI PCI
LPC LPC LPC LPC LPC LPC LPC
I = 200mA
PCI PCI
PCI PCI PCI
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
PCI_RST# +V3S
R1243
ACCEL_INT
PCI_SERR#
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
SB_GPIO_PCIE_RST#
PCIE_RST#_C
SHAQ SI PHASE CHANGE TO U823 N.C, R1286 STUFF
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3A
1
31-
2
29-
R1286
12
0_5%
29-,40-
DEFAULT_NET_TYPE
R1242
29-,37-
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
C1339
12
29-
LPC
R1211
R1285
12
33_5%
RTC_CLK
PWR-D
0.1uF_25V
5
4
U823
3
TSB_TC7SZ08F_SSOP_5P_OPEN
+V3S
1
2
Q841
1
%
4
5
5
7
7
_
2
2
K
1
1
2
R
R
.
2
2
29-
SB820M_MEMHOT#
R1138
29-,37-,48-
R1162
29-,37-,48-
R1137
29-,37-,48-
R1139
29-,37-,48-
INVENTEC
TITLE
ST145a-UMA
CODE
SIZE
A3
CS
SHEET
CPU_MEMHOT#
18pF_50V
1
8/21
2
%
9
5
6
_
2 1
M 0
R
1
1
2
%
8
5
0
_
2 1
M 0
R
1
1
+V_RTCBAT
29-
PWR-B
1-2
LOTES_AAA_BAT_032_K01_A_2P
CHANGE by
C1329
P 4 _ M P
3
4
P 0 1 _
5
8
2009/09/28
0
6
8
7 .
X
2 3
2
1
_ C X T
18pF_50V
1
C1303
CN820
+
ALAN W 27-Jul-2009
% 5 _ K 2
. 2
1
B
18-,26-,31-
3CE2
MMBT3904
2
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
LPC_AD(0)
LPC_AD(1)
LPC_AD(2)
LPC_AD(3)
2
12
8.2K_5%
8.2K_5%
PCI
2
1
+V3A
10K_5%_OPEN
12
43-,48-
PCIE_RST#
C1340
1 2
150pF_50V
From GPIO
+V3A
8.2K_5%
LPC
2
1
8.2K_5%
LPC
2
1
8.2K_5%
LPC
2
1
8.2K_5%
LPC
2
1
SB820M - 1
DOC. NUMBER
Model_No X01
OF
REV
5129
SATA_0 --- HDD SATA_1--- ODD SATA_2--- ESATA
SATA_TX0P SATA_TX0N
SATA_RX0N SATA_RX0P
SATA_TX1P SATA_TX1N
SATA_RX1N SATA_RX1P
SATA_TX2P SATA_TX2N
SATA_RX2N SATA_RX2P
0.01uF_16V
40-
C1313
40-
12
C1296
Close to SB
0.01uF_16V
2
1
Close to SB
0.01uF_16V
2
1
Close to SB
LED_3S_SATA#
12
C1295
1
C1292
12
1 12
40­40-
40-
C1294
40-
40­40-
C1293
42­42-
42­42-
SB820 A11 = R1193 = 800 OHM SB820 A12 = R1193 = TBD OHM
A
C
-
T
R
A
­2
W
S
3
P
_ D D
V
A
2
R1193
806_1%
931_1%
R1192
SATA_C_TX0P
SATA_C_TX0N
0.01uF_16V
SATA_C_TX1P
SATA_C_TX1N
0.01uF_16V
SATA_C_TX2P
SATA_C_TX2N
0.01uF_16V
2
BID_0
BID_1
0
HYNIX SAMSUNG QIMONDA
U822-2
AH9
SATA_TX0P
AJ9
SATA_TX0N
AJ8
SATA_RX0N
AH8
SATA_RX0P
AH10
SATA_TX1P
AJ10
SATA_TX1N
AG10
SATA_RX1N
AF10
SATA_RX1P
AG12
SATA_TX2P
AF12
SATA_TX2N
AJ12
SATA_RX2N
AH12
SATA_RX2P
AH14
SATA_TX3P
AJ14
SATA_TX3N
AG14
SATA_RX3N
AF14
SATA_RX3P
AG17
SATA_TX4P
AF17
SATA_TX4N
AJ17
SATA_RX4N
AH17
SATA_RX4P
AJ18
SATA_TX5P
AH18
SATA_TX5N
AH19
SATA_RX5N
AJ19
SATA_RX5P
AB14
SATA_CALRP
AA14
SATA_CALRN
AD11
38-
PWR-A
SATA_ACT#_GPIO67
AD16
SATA_X1
AC16
SATA_X2
SB800
Part 2 of 5
A T A
L A I R E S
R O T I N O M
W H
FC_FBCLKOUT
FC_OE#_GPIOD145
FC_AVD#_GPIOD146
FC_WE#_GPIOD148 FC_CE1#_GPIOD149 FC_CE2#_GPIOD150 FC_INT1_GPIOD144 FC_INT2_GPIOD147
FC_ADQ0_GPIOD128 FC_ADQ1_GPIOD129 FC_ADQ2_GPIOD130 FC_ADQ3_GPIOD131 FC_ADQ4_GPIOD132 FC_ADQ5_GPIOD133 FC_ADQ6_GPIOD134 FC_ADQ7_GPIOD135 FC_ADQ8_GPIOD136 FC_ADQ9_GPIOD137
H
FC_ADQ10_GPIOD138
S A
FC_ADQ11_GPIOD139
L
FC_ADQ12_GPIOD140
F
FC_ADQ13_GPIOD141 FC_ADQ14_GPIOD142 FC_ADQ15_GPIOD143
FANOUT0_GPIO52 FANOUT1_GPIO53 FANOUT2_GPIO54
FANIN0_GPIO56 FANIN1_GPIO57 FANIN2_GPIO58
TEMPIN0_GPIO171
TEMPIN1_GPIO172
TEMPIN2_GPIO173
TEMPIN3_TALERT#_GPIO174
VIN0_GPIO175 VIN1_GPIO176 VIN2_GPIO177 VIN3_GPIO178 VIN4_GPIO179 VIN5_GPIO180
VIN6_GBE_STAT3_GPIO181
VIN7_GBE_LED3_GPIO182
FC_CLK
FC_FBCLKIN
TEMP_COMM
AH28 AG28 AF26
AF28 AG29 AG26 AF27 AE29 AF29 AH27
AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26
W5 W6 Y9
W7 V9 W8
B6 A6 A5 B5 C7
A3 B4 A4 C5 A7 B7 B8 A8
TP836
TP846
43-
LAN_DIS#
30-
SB_PROCHOT#_C
30-
BID_0
30-
BID_1
WWAN_POWER_OFF WLAN_POWER_OFF WWAN_RF_OFF#
30-,48-
WLAN_RF_OFF# WWAN_DET#
48-
BTOFF
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
+V3A
PWR-D
N
N
E
1
1
E P O _ % 5 _ K 0 1
% 5 _ K 0 1
P
6
O
8
_
1 1
%
R
5
2
_ K 0 1
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
1
6
%
0
5
2
_
1
K
R
0
2
1
5 8 1 1 R
2
1
4 8 1 1 R
2
BOARD ID
10-,12-,14-,20-,23-,24-,26-,27-,29-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
1
R1145
10K_5%
2
SB_PROCHOT#_C
30-
R1144
10K_5%
0 1
+V3S
30­30-
1
2
1
B
MMBT3904
3CE2
Q833
0 1 0
BID_0 BID_1
18-
SB_PROCHOT#
J5
SPI_DI_GPIO164
E2
SPI_DO_GPIO163
K4
SPI_CLK_GPIO162
K9
SPI_CS1#_GPIO165
G2
ROM_RST#_GPIO161
M O R
I P S
AMD_SB820M_FCBGA_605P
G27
NC1
Y2
NC2
+V3A
8.2K_5%
ST145a-UMA
SB820M-2
DOC. NUMBER
CODE
CS
SHEET
30 51
REV
X01Model_No
OF
CHANGE by
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
WLAN_RF_OFF#
30-,48-
27-Jul-2009ALAN W
12
R884
INVENTEC
TITLE
SIZE
A3
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
+V3A
CPU_MEMHOT#
SLP_S3# SLP_S5#
SB_PWRBTN#
SB_PWRGD
SUS_STAT#
A20GATE
KB_RST#
EC_SCI#
EC_SMI#
LAN_CABLE_IN#
SYS_RST#
PCIE_WAKE#
CPUTHERMTRIP#
NB_PWRGD
RSMRST#
SB_GPIO_PCIE_RST#
SB_PCIE_LAN_CLKREQ#
GPU_PWR_EN
45-
PCSPKR
R1173
10K_5%_OPEN
18-,26-,29-
37­37­37­31-,37-
CPU-I
23-,31-
D822 CHENMKO_BAT54_3P
37-
31-,37-
3
1
37-
31-,43­14­31-,43-,48-
18-,31-,37­31-
CPU-I
10-,31-,37-
29­31-,43-
31-
2
1
SB_PCIE_WLAN_CLKREQ#
DEFAULT_NET_TYPE
LPC
DEFAULT_NET_TYPE
SB_3S_SMCLK
SB_3S_SMDATA
W_SCLK1
W_SDATA1
BATLOW#
GM_RESET#
CLK_REQG#
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SYNC HDA_RST#
GBE_COL GBE_CRS
GBE_RXERR
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
R1561
12
R1209 R1210 R1189
26-,27-,31-,40­26-,27-,31-,40-
31­31-
31-,48-
DEFAULT_NET_TYPE
31-
25-
31-
45­33-,45­45-
45­45-
31­31-
31-
R1216
0_5%
12
10K_5%_OPEN 10K_5%_OPEN
12
10K_5%_OPEN
12
SB_EC_GA20IN
DEFAULT_NET_TYPE
12
R1225
12
R1230
R1231
12 12
R1233
+V3A
0_5%
12
DEFAULT_NET_TYPE
12
0_5%R1215
33_5% 33_5%
33_5% 33_5%
N E
1
P
3
O
2
_
2 1
% 5
R
_
2
K 0 1
R1191
12
10K_5%
SB_PWR_SWIN#
NB_PWRGD
TP835
TP848 TP849 TP847 TP838 TP839 TP837 TP840
SB_HDA_BITCLK
SB_HDA_SDOUT
SB_HDA_SYNC
SB_HDA_RST#
N
E
1
P
2
O
2
_
2 1
% 5
R
_
2
K 0 1
U822-4
J2
PCI_PME#_GEVENT4#
K1
RI#_GEVENT22#
D3
SPI_CS3#_GBE_STAT1_GEVENT21#
F1
SLP_S3#
H1
SLP_S5#
F2
PWR_BTN#
H5
PWR_GOOD
G6
SUS_STAT#
B3
TEST0
C4
TEST1_TMS
F6
TEST2
AD21
GA20IN_GEVENT0#
AE21
KBRST#_GEVENT1#
K2
LPC_PME#_GEVENT3#
J29
LPC_SMI#_GEVENT23#
H2
GEVENT5#
J1
SYS_RESET#_GEVENT19#
H6
WAKE#_GEVENT8#
F3
IR_RX1_GEVENT20#
J6
THRMTRIP#_SMBALERT#_GEVENT2#
AC19
NB_PWRGD
G1
RSMRST#
AD19
CLK_REQ4#_SATA_IS0#_GPIO64
AA16
CLK_REQ3#_SATA_IS1#_GPIO63
AB21
SMARTVOLT1_SATA_IS2#_GPIO50
AC18
CLK_REQ0#_SATA_IS3#_GPIO60
AF20
SATA_IS4#_FANOUT3_GPIO55
AE19
SATA_IS5#_FANIN3_GPIO59
AF19
SPKR_GPIO66
AD22
SCL0_GPIO43
AE22
SDA0_GPIO47
F5
SCL1_GPIO227
F4
SDA1_GPIO228
AH21
CLK_REQ2#_FANIN4_GPIO62
AB18
CLK_REQ1#_FANOUT4_GPIO61
E1
IR_LED#_LLB#_GPIO184
AJ21
SMARTVOLT2_SHUTDOWN#_GPIO51
H4
DDR3_RST#_GEVENT7#
D5
GBE_LED0_GPIO183
D7
GBE_LED1_GEVENT9#
G5
GBE_LED2_GEVENT10#
K3
GBE_STAT0_GEVENT11#
AA20
CLK_REQG#_GPIO65_OSCIN
H3
BLINK_USB_OC7#_GEVENT18#
D1
USB_OC6#_IR_TX1_GEVENT6#
E4
USB_OC5#_IR_TX0_GEVENT17#
D4
USB_OC4#_IR_RX0_GEVENT16#
E8
USB_OC3#_AC_PRES_TDO_GEVENT15#
F7
USB_OC2#_TCK_GEVENT14#
E7
USB_OC1#_TDI_GEVENT13#
F8
USB_OC0#_TRST#_GEVENT12#
M3
AZ_BITCLK
N1
AZ_SDOUT
L2
AZ_SDIN0_GPIO167
M2
AZ_SDIN1_GPIO168
M1
AZ_SDIN2_GPIO169
M4
AZ_SDIN3_GPIO170
N2
AZ_SYNC
P2
AZ_RST#
T1
GBE_COL
T4
GBE_CRS
L6
GBE_MDCK
L5
GBE_MDIO
T9
GBE_RXCLK
U1
GBE_RXD3
U3
GBE_RXD2
T2
GBE_RXD1
U2
GBE_RXD0
T5
GBE_RXCTL_RXDV
V5
GBE_RXERR
P5
GBE_TXCLK
M5
GBE_TXD3
P9
GBE_TXD2
T7
GBE_TXD1
P7
GBE_TXD0
M7
GBE_TXCTL_TXEN
P4
GBE_PHY_PD
M9
GBE_PHY_RST#
V7
GBE_PHY_INTR
E23
PS2_DAT_SDA4_GPIO187
E24
PS2_CLK_SCL4_GPIO188
F21
SPI_CS2#_GBE_STAT2_GPIO166
G29
FC_RST#_GPO160
D27
PS2KB_DAT_GPIO189
F28
PS2KB_CLK_GPIO190
F29
PS2M_DAT_GPIO191
E27
PS2M_CLK_GPIO192
S T N
O I D U A
D
H
L R T C
D E D D E B M E
E V E
P U
E K A W
/ I
P C A
EC_PWM0_EC_TIMER0_GPIO197 EC_PWM1_EC_TIMER1_GPIO198 EC_PWM2_EC_TIMER2_GPIO199 EC_PWM3_EC_TIMER3_GPIO200
SB800
Part 4 of 5
N A L
E B G
AMD_SB820M_FCBGA_605P
USBCLK_14M_25M_48M_OSC
C S
USB_RCOMP
I M
B S U
USB_FSD1P_GPIO186
1
USB_FSD1N
. 1
USB_FSD0P_GPIO185
B
USB_FSD0N
S U
USB_HSD13P USB_HSD13N
USB_HSD12P USB_HSD12N
USB_HSD11P USB_HSD11N
USB_HSD10P USB_HSD10N
USB_HSD9P USB_HSD9N
USB_HSD8P USB_HSD8N
0
.
USB_HSD7P
2
USB_HSD7N
B S
USB_HSD6P
U
P G
S U
L R T C
D E D D E B M E
USB_HSD6N
USB_HSD5P USB_HSD5N
USB_HSD4P USB_HSD4N
USB_HSD3P USB_HSD3N
USB_HSD2P USB_HSD2N
USB_HSD1P USB_HSD1N
USB_HSD0P USB_HSD0N
SCL2_GPIO193
SDA2_GPIO194 SCL3_LV_GPIO195 SDA3_LV_GPIO196
KSI_0_GPIO201 KSI_1_GPIO202 KSI_2_GPIO203 KSI_3_GPIO204 KSI_4_GPIO205 KSI_5_GPIO206 KSI_6_GPIO207 KSI_7_GPIO208
KSO_0_GPIO209 KSO_1_GPIO210 KSO_2_GPIO211 KSO_3_GPIO212 KSO_4_GPIO213 KSO_5_GPIO214 KSO_6_GPIO215 KSO_7_GPIO216 KSO_8_GPIO217
KSO_9_GPIO218 KSO_10_GPIO219 KSO_11_GPIO220 KSO_12_GPIO221 KSO_13_GPIO222 KSO_14_GPIO223 KSO_15_GPIO224 KSO_16_GPIO225 KSO_17_GPIO226
O I
C O
B
A10
G19
J10 H11
H9 J8
B12 A12
F11 E11
E14 E12
J12 J14
A13 B13
D13 C13
G12 G14
G16 G18
D16 C16
B14 A14
E18 E16
J16 J18
B17 A17
A16 B16
D25 F23 B26 E26 F25 E22 F22 E21
G24 G25 E28 E29 D29 D28 C29 C28
B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22
SB_USB_RCOMP
Keep impendence to 35ohm
Space : height 4 : 1
48­48-
41­41-
48­48-
35­35-
39­39-
41­41-
42­42-
42­42-
42­42-
WWAN(Mini Card)
USB_10P
WLAN ( Half Mini Card)
USB_10N
USB_8P
FINGER PRINT(DB)
USB_8N
USB_7P
BlueTooth
USB_7N
USB_6P
Webcam(DB)
USB_6N
USB_5P
Card Reader
USB_5N
USB_3P
TOUCH SCREEN(DB)
USB_3N
USB_2P
USB2
USB_2N
USB_1P
USB1
USB_1N
USB_0P
ESATA
USB_0N
18­18-
33­33-
CHANGE by
12
10.5K_1%
Place close to SB balls
SCLK3
SDATA3
GPIO199
SPI/LPC DEFINE
GPIO200
R1188
SB_PWRGD
NB_PWRGD
SB_PCIE_LAN_CLKREQ#
SB_PCIE_WLAN_CLKREQ#
11-,18-,21-,23-,24-,31-
300_5%
12
R1194
NB_PWRGD
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
SB_3S_SMCLK
SB_3S_SMDATA
GPU_PWR_EN
CLK_REQG#
SUS_STAT#
GBE_COL
GBE_CRS
GBE_RXERR
LAN_CABLE_IN#
PCIE_WAKE#
W_SDATA1
CPUTHERMTRIP#
31-
CPU-I
+V1.8S
11-,18-,21-,23-,24-,31-
R1555
CPU-I
12
31-,37-
0_5%
R1557
12
31-
CPU-I
KB_RST#
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
BATLOW#
W_SCLK1
RSMRST#
27-Jul-2009ALAN W
C1505
0_5%
5
1
2
U100
3
TSB_TC7SZ08F_SSOP_5P
R1558
12
0_5%_OPEN
26-,27-,31-,40-
26-,27-,31-,40-
31-
31-
23-,31-
31-,37-
31-,43-
DEFAULT_NET_TYPE
31-,48-
DEFAULT_NET_TYPE
31-
R1226
31-
R1224
31-
R1229
R1220
31-,43-
R1190
31-,43-,48-
R1214
31-
R1212
31-
R1213
31-
18-,31-,37-
R1207
R1217
10-,31-,37-
DEFAULT_NET_TYPE
1
C1332
2
2.2uF_10V
INVENTEC
TITLE
CODE
A3
2009/09/28
0.01uF_16V
1
2
R1556
12
4
33_5%
R1178
1
2
R1177
12
R1200
12
R1199
12
R1218
1
2
R1176
1
2
R1202
12
R1255
12
12
10K_5%
12
10K_5%
12
10K_5%
12
12
10K_5%
1
2
10K_5%
2.2K_5%_OPEN
12
2.2K_5%
12
12
10K_5%
22K_5%
12
ST145a-UMA
DOC. NUMBER
Model_No
CS
SHEET
+V1.8S
CPU-I
1
2
+V3S
2.2K_5%
2.2K_5%
8.2K_5%
8.2K_5%
4.7K_5%
10K_5%
8.2K_5%
8.2K_5%
+V3A
10K_5%
SB820M - 3
31 51
OF
23-
C1504
100pF_50V
NB_PWRGD_IN
REVSIZE
X01
VDD -- S/B CORE POWER
0.1uF_10V
0.1uF_10V
C1286
C1284
1
2
510mA
14-,18-,19-,21-,22-,23-,24-,32-,47-
1uF_10V
1uF_10V
1
1
C1280
C1283
1
2
2
2
1
2
C1278
10uF_6.3V
+V1.1S
1 2
C1800
10uF_6.3V
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
Trace Width >= 15mil
14-,18-,19-,21-,22-,23-,24-,32-,47-
PCIE_VDDR -- PCIE I/O power
600mA
Trace Width >= 100mil With area fill under ASIC
+V1.1S
43mA
L837
12
BLM21PG220SN1D
2009/09/28
+V3S
93mA
Trace Width >= 15mil
14-,18-,19-,21-,22-,23-,24-,32-,47-
+V1.1S
PWR-D
567mA
BLM21PG220SN1D
Trace Width >= 100mil
With area fill under ASIC
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
658mA
PWR-D
For support USB wakeup --> 3V_S5
Trace Width >= 50mil
Trace Width >= 20mil
2009/09/28
+V3A
BLM18PG221SN1D
+V1.1A
PWR-D
200mA
L844
12
22uF_6.3V
BLM18PG221SN1D
L834
12
L900
12
10-,14-,32-
L840
1
BLM15AG221SN1D
AVDD_SATA
C1291
2
2.2uF_6.3V
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
131mA
C1312
1
2
22uF_6.3V
+V3S
2009/09/28
L838
12
BLM15AG221SN1D
PCIE_VDDR
C1237
22uF_6.3V
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
L843
12
BLM15AG221SN1D
PWR-C
30-
1
2
1
C1270
2
29-
1
2
PWR-B
C1289
2.2uF_6.3V
1
2
1uF_10V
AVDD_USB
PWR-C
C1244
1
2
2.2uF_6.3V
1
2
1uF_10V
1
2
10uF_6.3V
C1228
C1271
1
0.1uF_10V
2
C1238
C1242
1
2
1uF_10V
C1245
1
2
VDDQ--3.3V I/O power
0.1uF_10V
0.1uF_10V
C1285
C1287
1
1
2
2
1.8V : FLASH MEMORY MODE [DEFAULT]
3.3V : IDE MODE
1
2
0.1uF_10V
0.1uF_10V
10uF_6.3V
C1269
VDDAN_11_USB
C1239
C1240
1
1
2
2
VDDPL_33_SATA
0.1uF_10V
C1288
1
2
AVDDTX -- USB Phy Analog I/O power
C1273
1
2
1uF_10V
0.1uF_10V
1
2
1uF_10V
C1290
1
2
0.1uF_10V
1
2
C1272
C1337
2
1 0 8
1 R
1
17mA
% 5 _ 0
2009/11/19
VDDPL_USB
32-
1
2
U822-3
SB800
VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12
VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4
AC21
AA19
AF22 AE25 AF24 AC22
AH1
V6 Y19 AE5
AA2 AB4 AC8 AA7 AA9 AF7
POWER
AE28
VDDPL_33_PCIE
U26
VDDAN_11_PCIE_1
V22
VDDAN_11_PCIE_2
V26
VDDAN_11_PCIE_3
V27
VDDAN_11_PCIE_4
V28
VDDAN_11_PCIE_5
V29
VDDAN_11_PCIE_6
W22
VDDAN_11_PCIE_7
W26
VDDAN_11_PCIE_8
AD14
VDDPL_33_SATA
AJ20
VDDAN_11_SATA_1
AF18
VDDAN_11_SATA_4
AH20
VDDAN_11_SATA_2
AG19
VDDAN_11_SATA_3
AE18
VDDAN_11_SATA_5
AD18
VDDAN_11_SATA_6
AE16
VDDAN_11_SATA_7
A18
VDDAN_33_USB_S_1
A19
VDDAN_33_USB_S_2
A20
VDDAN_33_USB_S_3
B18
VDDAN_33_USB_S_4
B19
VDDAN_33_USB_S_5
B20
VDDAN_33_USB_S_6
C18
VDDAN_33_USB_S_7
C20
VDDAN_33_USB_S_8
D18
VDDAN_33_USB_S_9
D19
VDDAN_33_USB_S_10
D20
VDDAN_33_USB_S_11
E19
VDDAN_33_USB_S_12
C11
VDDAN_11_USB_S_1
D11
VDDAN_11_USB_S_2
AMD_SB820M_FCBGA_605P
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
+V3A
PWR-B
C2002
2.2uF_6.3V
R2000
1
0_5%
PWR-D
2
O / I
O I P G / I C P
O /
I H
S A L F
S S
E R P X E
I C P
A
T A
L A I R E S
Part 3 of 5
0 S
E R O C
VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3
O
VDDAN_11_CLK_4
/ I
VDDAN_11_CLK_5 VDDAN_11_CLK_6
N E
VDDAN_11_CLK_7
G
VDDAN_11_CLK_8
K L C
VDDIO_33_GBE_S
N A L
E
VDDCR_11_GBE_S_1
B G
VDDCR_11_GBE_S_2
VDDIO_GBE_S_1 VDDIO_GBE_S_2
O / I
5 S _ V 3 . 3
5 S
E R O
C
VDDCR_11_USB_S_1
O /
VDDCR_11_USB_S_2
I B
S U
VDDPL_11_SYS_S
L L P
VDDPL_33_USB_S
VDDAN_33_HWM_S
VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9
VDDRF_GBE_S
VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8
VDDCR_11_S_1 VDDCR_11_S_2
VDDIO_AZ_S
VDDPL_33_SYS
VDDXL_33_S
VDDXL_3.3V
N13 R15 N17 U13 U17 V12 V18 W12 W18
K28 K29 J28 K26 J21 J20 K21 J22
V1
M10
L7 L9
M6 P8
A21 D21 B21 K10 L10 J9 T6 T8
F26 G26
M8
A11 B11
M21
L22
F19
D6
L20
VDDPL_USB
5mA
PWR-D
PWR-B
2009/11/20
­2 3
VDDXL_3.3V
Trace Width >= 15mil
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
32-
PWR-B
L841
12
BLM15AG221SN1D
1
C1276
2.2uF_6.3V
2
CKVDD_1.1V -- Internal clock Generator I/O power
0.1uF_10V
0.1uF_10V
C1235
C1231
C1234
1
2
1
1
2
2
1uF_10V
S5_3.3 -- 3.3V standby power
+V1.1S_CKVDD
C1233
1uF_10V
C1207
1
1
2
22uF_6.3V
2
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
VDDIO_33_S
1
1
2
C1274
2.2uF_6.3V
C1281
2.2uF_6.3V
2
S5_1.1 -- 1.1V standby power
VDDCR_11_S
1
1
2
C1229
1uF_10V
C1230
1uF_10V
2
11-,12-,14-,18-,19-,26-,27-,33-
VDDIO_AZ_S
1
C1279
2.2uF_6.3V
2
0.1uF_10V
C1266
1
2
2009/09/28
L842
1
BLM15AG221SN1D
62mA
L836
1
BLM15AG221SN1D
+V3S
2
10-,14-,32-
2
27-Jul-2009ALAN W
VDDPL_3.3V
-
PWR-B
+V3A
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
2 3
PWR-B
VDDPL_USB
VDDPL_1.1V
32-
Trace Width >= 15mil
+V3A +V1.1A
PWR-D
PWR-B
1
2.2uF_6.3V
2
VDDPL_1.1V
32-
PWR-B
1
2.2uF_6.3V
2
C1236
C1232
CHANGE by
14-,18-,19-,21-,22-,23-,24-,32-,47-
+V1.1S
L835
BLM21PG220SN1D
2009/09/28
+V3A
32mA
800mA
PWR-D
12
Trace Width >= 100mil
With area fill under ASIC
PWR-D
Trace Width >= 20mil
10-,14-,32-
+V1.1A
113mA
PWR-D
Trace Width >= 20mil
+V1.5
TBDmA Trace Width >= 20mil
PWR-D
10-,14-,32-
VDDCR_11_USB
0.1uF_10V
C1267
1
2
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
47mA Trace Width >= 15mil
+V1.1A
197mA
PWR-D
C1264
1
2
Trace Width >= 15mil
10uF_6.3V
INVENTEC
TITLE
ST145a-UMA
CODE
CS
SHEET
DOC. NUMBER
OF
32 51
SIZE
A3
REV
X01Model_No
+V1.5
PWR-D
11-,12-,14-,18-,19-,26-,27-,32-
1
R1228 10K_5%_OPEN
HDA_SDOUT
PCI_CLK1 PCI_CLK2 PCI_CLK3
PCI_CLK4 LPC_CLK0 LPC_CLK1
31-,45-
HDA PCI
29­29­29­29­29-,37­29-,48-
2
1
R1227
10K_5%
2
Required Straps:
HDA_SDOUT
PULL
LOW POWER MODE
HIGH
PULL
LOW
PCI_3S_AD(29) PCI_3S_AD(28) PCI_3S_AD(27) PCI_3S_AD(26) PCI_3S_AD(25) PCI_3S_AD(24) PCI_3S_AD(23)
PERFORMANCE MODE (default)
R1244
10K_5%_OPEN
29­29­29­29­29­29­29-
+V3S
1
2
Debug Straps
PCI_3S_AD(28)
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
1
R1279 10K_5%
2
1
R1277
10K_5%_OPEN
2
PCI_CLK1
ALLOW USE PCIE Gen2 (default)
FORCE CLKGEN PCIE Gen1
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
1
R1251 10K_5%_OPEN
2
1
R1253
2.2K_5%_OPEN
2
1
R1278
PCI
10K_5%_OPEN
2
1
R1276
10K_5%
2
PCI_CLK2
Watchdog Timer Enabled
Watchdog Timer
Disabled
(default)
DEL R1250, R1249, R1196, R1247, R1195
1
R1252
2.2K_5%_OPEN
2
1
R1280
PCI
10K_5%_OPEN
2
1
R1282 10K_5%
2
PCI_CLK3
DEBUG STRAP
IGNORE DEBUG STRAP (default) (default)
1
R1281 10K_5%
2
PCI
1
R1283
10K_5%_OPEN
2
PCI_CLK4
non_Fusion CLOCK MODE (default)
FUSION CLOCK MODE
2009/10/08
1
R1198
2.2K_5%_OPEN
2
1
R1248
2.2K_5%_OPEN
2
+V3A
PWR-D
9-,11-,13-,14-,18-,29-,30-,31-,32-,35-,40-,41-,43-,47-,48-
1
R1167 10K_5%_OPEN
2
LPC
1
10K_5%
2
LPC_CLK0
EC ENABLED
EC
DISABLED
(default)
1
R1197
2.2K_5%_OPEN
2
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
PCI_3S_AD(27)
PCI_3S_AD(26)
PCI_3S_AD(25)
PCI_3S_AD(24)
PCI_3S_ AD(23)
R1165
1
R1166 10K_5%
2
LPC
1
R1164
10K_5%_OPEN
2
LPC_CLK1
CLKGEN ENABLED
DISABLED
EXT
1
R1168 10K_5%
INT
2
U822-5
GPIO 199 GPIO 200
TYPE
L : 2.2K
FWH
LPC
L : 2.2K
SPI
RSVD
1
R1163
2.2K_5%
2
N.C
N.C
31­31-
L : 2.2K
L : 2.2K
N.C
N.C
GPIO199 GPIO200
AB16 AC14 AE12 AE14
AF11 AF13 AF16
AH11 AH13 AH16
AJ11 AJ13 AJ16
Y14 Y16
AF9
AG8 AH7
AJ7
A9 B10 K11
B9 D10 D12 D14 D17
E9
F9 F12 F14 F16
C9 G11 F18
D9 H12 H14 H16 H18 J11 J19 K12 K14 K16 K18 H19
Y4
D8
M19
P21 P20 M22 M24 M26 P22 P24 P26 T20 T22 T24 V20 J23
SB800
VSSIO_SATA_1 VSSIO_SATA_2 VSSIO_SATA_3 VSSIO_SATA_4 VSSIO_SATA_5 VSSIO_SATA_6 VSSIO_SATA_7 VSSIO_SATA_8 VSSIO_SATA_9 VSSIO_SATA_10 VSSIO_SATA_11 VSSIO_SATA_12 VSSIO_SATA_13 VSSIO_SATA_14 VSSIO_SATA_15 VSSIO_SATA_16 VSSIO_SATA_17 VSSIO_SATA_18 VSSIO_SATA_19
VSSIO_USB_1 VSSIO_USB_2 VSSIO_USB_3 VSSIO_USB_4 VSSIO_USB_5 VSSIO_USB_6 VSSIO_USB_7 VSSIO_USB_8 VSSIO_USB_9 VSSIO_USB_10 VSSIO_USB_11 VSSIO_USB_12 VSSIO_USB_13 VSSIO_USB_14 VSSIO_USB_15 VSSIO_USB_16 VSSIO_USB_17 VSSIO_USB_18 VSSIO_USB_19 VSSIO_USB_20 VSSIO_USB_21 VSSIO_USB_22 VSSIO_USB_23 VSSIO_USB_24 VSSIO_USB_25 VSSIO_USB_26 VSSIO_USB_27 VSSIO_USB_28
EFUSE
VSSAN_HWM
VSSXL
VSSIO_PCIECLK_1 VSSIO_PCIECLK_2 VSSIO_PCIECLK_3 VSSIO_PCIECLK_4 VSSIO_PCIECLK_5 VSSIO_PCIECLK_6 VSSIO_PCIECLK_7 VSSIO_PCIECLK_8 VSSIO_PCIECLK_9 VSSIO_PCIECLK_10 VSSIO_PCIECLK_11 VSSIO_PCIECLK_12 VSSIO_PCIECLK_13
Part 5 of 5
D N U O R
G
VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52
VSSPL_SYS
AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8
M20
H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20
AMD_SB820M_FCBGA_605P
PULL HIGH
PULL
LOW
USE PCI PLL
(default)
BYPASS PCI PLL
DISABLE ILA AUTORUN
(default)
ENABLE ILA AUTORUN
USE FC PLL
(default)
BYPASS FC PLL
USE DEFAULT PCIE STRAPS
(default)
USE EEPROM PCIE STRAPS
DISABLE PCI MEM BOOT
(default)
ENABLE PCI MEM BOOT
CHANGE by
INVENTEC
TITLE
ST145a-UMA
SB820M-5
SIZE
CODE
CS
SHEET
DOC. NUMBER
33 51
27-Jul-2009ALAN W
A3
REV
X01Model_No
OF
PE_GPIO2
L
H
NB_CRT_G
NB_CRT_R
NB_CRT_B
OFF
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
+V5S
S2
S1
OFF
ON
ON
RGB-B
RGB-B
RGB-B
RGB-B
RGB-B
PWR-E
SSM3K7002FU
+V15A_RC
Close to CONN
23-
23-
23-
1
1
%
%
3 6 9 R
2
1
6
_
9
0
R
4 1
2
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
5
1
3
_
9
0
R
5 1
2
NB_CRT_R
1
5
%
1
1
1
6
_
1
0
C
5
2
1
2
+V5S
12
BLM18BA220SN1
N
E
6
P
1
O
1
6
_
1
2
C
2
0 4 0
L810
12
BLM18BA220SN1
BLM18BA220SN1
N E
7
P
1
1
O
6
_
1
2
C
2
0 4 0
L809
L806
12
N E P O _ 2 0 4 0
CRT_U_L_R
CRT_U_L_G
CRT_U_L_B
V 0
7
5
0
_
1
0
F
1
p
C
2
2 2
L811
12
12
V 0
6
5
0
1
_
0
F
1
p
C
2
2 2
BLM18BB100SN1D
BLM18BB100SN1D
L812
L807
12
V 0 5
2
_
1
6
F
9
p
C
2
2 2
CHENMKO_BAV99_OPEN
BLM18BB100SN1D
CHENMKO_BAV99_OPEN
1
3
2
CRT_HSYNC
CRT_VSYNC
CRT_L_U_R
CRT_L_U_G
CRT_L_U_B
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
+V5S
1 5 0 8
3
D
2
34­34-
1
6
7 0 8
3
D
2
CHENMKO_BAV99_OPEN
Q871
14-
2009/11/29
0 8 D
CRT_5V
3
2
S
D
G
1
CRT_5V
R939
12
33_5%
34-
1
C961
2.2uF_16V
2
34-
2009/10/14
12
R938
33_5%
R937
12
2.2K_5%
R936
12
2.2K_5%
Circuit : Fixed
2009/06/30
1
FUSE800
SMD1812P110TF
2
CN806
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
G1
12
G
CRT_R_HSYNC CRT_R_VSYNC
12
G2
13
G
13
14
14
15
15
SYN_070546HR015M22BZR_15P
RGB-C
RGB-C
NB_VSYNC
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
NB_HSYNC
C960
1uF_6.3V
23-
C959
1uF_6.3V
23-
1 2
1 2
2
2
3
+V5S
5
3
1
R934
100K_5%
2
145
U804 TC7SZ126FU
1
4
U803 TC7SZ126FU
34-
34-
CRT_VSYNC
CRT_HSYNC
SMBUS
SMBUS
NB_CRT_DAT
NB_CRT_CLK
23-
23-
D811
CHENMKO_CHPZ6V2_3P_OPEN
SMBUS
SMBUS
A
CHANGE by
C1C2
C1C2
A
CHENMKO_CHPZ6V2_3P_OPEN
ALAN W 27-Jul-2009
CRT CONN
D809
INVENTEC
TITLE
ST145a-UMA
CRT
SIZE
CODE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REV
5134
+V5A
C1807
1uF_10V
2009/11/20
9-,10-,11-,12-,13-,14-,36-,37-,38-,42-,47-
U830
3
VIN2VOUT
4
GND
HEAT-SINK
1 2
GMT_G1117_33T63Uf_SOT223_3P
7-,9-,10-,11-,12-,13-,47-
1
POWERPAD_2_0610_OPEN
1 2
NB_LCMVCC_EN
+VBATR
1
%
2
5
0
_
0 5
K 0
R
2
2
N E
1
P
1
O
0
_
0
%
5
5
R
_ K
2 0 1
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,40-,41-,43-,47-,48-
+V3A
1
PAD6
V 3
8
.
0
6
8
_
1
F u
C
0 1
2
N E P O _
1
V 0 5
2
_ F p 7 4
RF
23-
R1052
100K_5%
VCC_BKL
PAD507
POWERPAD1x1m
3
2
D
S
4
9
7
1 V 5 2
1
_ F u
2
2 2 . 0
0
6
0
4
8
6
3
G
Q
C
O
1
A
Q867 N.C
2009/10/05
R1802 0_5%
1 4 0 1 C
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,36-,37-,38-,39-,40-,41-,43-,45-,48-
1
C1040 10uF_6.3V
2
LCM_BL
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
700mA
NB_LCM_CLK NB_LCM_DAT
NB_LCM_TXDL0N NB_LCM_TXDL0P NB_LCM_TXDL1N NB_LCM_TXDL1P NB_LCM_TXDL2N NB_LCM_TXDL2P
NB_LCM_TXCLN
NB_LCM_TXCLP
DMIC_CLK DMIC_DAT
+V5S
USB-B USB-B
1
C1003 10uF_6.3V
2
USB_6P USB_6N
1
2
23­23-
23­23­23­23­23-
23-
23-
23-
45-
SMBUS
45­31­31-
R2001
12
270_5%
N
4
E
0
P
0 1
O _
C
1
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
V 0
+V5S
5
2
_ F p 7 4
RF
CH1
34
1
R959
R958
4.7K_5%
4.7K_5%
2
SMBUS
SMBUS
LVDS-A LVDS-A LVDS-B LVDS-B LVDS-C LVDS-C LVDS-D LVDS-D
SMBUS
R961
33_5%
12
R1559
0_5%
R1560
0_5%
12 12
33pF_50V_OPEN
2009/11/29
5
D816
Vp
Vn
2
CMD_1213_02ST_SOT23_5P_OPEN
FOR ESD
SMBUS
1
C1005
2
4 1 8
V
1
0
C
1
5 _ F p
CH2
2 3 . 3
1
2
ACES_87223_3001_30P
SI CHANGE TO 6012B0348301
5 1 8
V
1
0
1
5
C _ F p
2
FOR USB RISE & FALL EDGE ISSUE
3 . 3
3
2
D
S
Q823
G
1
G
AM2321P
1
1
%
4
5
8
_
9
K
R
6 3
2
3
D
Q826
S
SSM3K7002FU
2
1
R985 180K_5%
2
2009/10/06
V 0
1
0
5
0
1
_
7
F
1
p
2
C
0
2
0 1
35-
LID_SW#
NB_LCM_BLEN
RF
3 4 0 1 C
N E P O _ V 0 5 _ F
p 7 4
1
2
VCC_BKL
4 4 0 1 C
1
1
2
2
37-,40-
23-
LCMVCC
V 5 2 _ F p 0 0 7 4
1
35-
700mA
C1045
4.7uF_25v
CHENMKO_BAT54_3P
1
R987 100K_5%
2
1
R1049 100_5%
2
3
D
Q825
G
SSM3K7002FU
S
2
2009/11/12
LCM_PWM
D817
R960
12
3K_5%
35-
PWR-A
N E P
1
6
O
4
_
0 1
V 0
2
C
5 _ F
p 0 0 0 1
13
C1039
0.1uF_16V
CN870 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
N E
8
P
3 0
O
1
_
C
1
V
0 5 _
2
F p 0 0 2
RF
2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
G1
27
G
G2
28
G 29 30
NB_LCM_PWM
EC_LCM_PWM
23-
37-
PWR-A
PWR-A
R1651
12
0_5%
R1652
12
0_5%_OPEN
2009/10/07
35-
LCM_PWM
INVENTEC
TITLE
ST145a-UMA
LCM CONN
CODE
SIZE
A3
CHANGE by SHEET
ALAN W 27-Jul-2009
CS
DOC. NUMBER REV
Model_No X01
OF
5135
HDMI_TX2P
HDMI_TX2N HDMI_TX1P
HDMI_TX1N HDMI_TX0P
HDMI_TX0N HDMI_TXCP
HDMI_TXCN
I = 0.1A
CLOSE TO CONNECTOR
Plug Cable
Unplug Cable
HDMI-D
22-
HDMI-D
22-
HDMI-C
22-
22-
HDMI-C HDMI-B
22-
22-
HDMI-B
HDMI-A
22-
HDMI-A
22-
+V5A
9-,10-,11-,12-,13-,14-,35-,37-,38-,42-,47-
1
C1166
2
1uF_10V
HDMI_HPD_CN
HDMI_HPD_CN
H
L
Place those CAP close to NB
0.1uF_10V
C1132
12
0.1uF_10VC1131
0.1uF_10V
C1134
12
12
C1133
0.1uF_10V
0.1uF_10V
C1129
12
12
C1130
0.1uF_10V
0.1uF_10V
C1135
12
12
C1136
0.1uF_10V
12
DEFAULT_NET_TYPE
36-
R1119
12
91K_5%
1
R1120
200K_5%_OPEN
2
100K_5%R1118
12
Q831
2
S
SSM3K7002FU
G
1
D
3
R1125
R1126
R1127
1
1
715_1%
2
HDMI-D
HDMI-C
HDMI-B
HDMI-A
Q834
MMBT3904
R1116
23­23-
36-
0_5%
12
SMBUS
NB_HDMI_CLK
SMBUS
NB_HDMI_DAT
HDMI_HPD_CN
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
PWR-D
3
C
1
B
E
2
1
%
1
5
4
_
1 1
K 7
R
.
2
2
715_1%
2
SMBUS SMBUS
23-
1
715_1%
2
Plug Cable
Unplug Cable
DGPU_HPD_INTR
+V5S
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
750_1% (6013A0023301)
UMA
M92
499_1% (6013A0076801)
R1121
R1128
1
1
715_1%
715_1%
2
2
DGPU_HPD_INTR
H
L
R1124
R1122
1
1
715_1%
715_1%
2
2
FUSE801
12
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
CHENMKO_BAV99_OPEN
D821
+V5S
D820
BAT54A
R1123
R1143
1
1
715_1%
4.7K_5%
2
2
1A_32V_0603SFF100F
+V5S
1
3
2
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
3
12
R1142
1
4.7K_5%
2
HDMI_C_TX2P
HDMI_C_TX2N
HDMI_C_TX1P
HDMI_C_TX1N
HDMI_C_TX0P
HDMI_C_TX0N
HDMI_C_TXCP
HDMI_C_TXCN
+HDMI_VDD2
1
2
CHANGE by
HDMI CONN
SYN_100042GR019M12BZL_19P
C1196
0.1uF_10v
10 11 12 13 14 15 16 17 18 19
1 2 3 4 5 6 7 8 9
CN818
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
G1
GND
G2
GND
G3
GND
G4
GND
INVENTEC
TITLE
ST145a-UMA
HDMI
DOC. NUMBER
CODE
SIZE
A3
27-Jul-2009ALAN W
CS
SHEET
36 51
REV
X01Model_No
OF
2009/11/29
+V3AL
EC_SCI#
7-,8-,9-,29-,37-
SPI_CS0#
SPI_SO
+V3AL
7-,8-,9-,29-,37-
9 0 5 1 C
V 3
. 6
1 _ F
2 u 0 1
+V3AL
600OHM_25%
31-
L816
12
2009/09/28
7-,8-,9-,29-,37-
I=300mA
1
2
D814
13
CHENMKO_BAT54_3P
D813
1
3
CHENMKO_BAT54_3P
R947
2
100K_5%
37-
R1058 15_5%
37-
12
3.3K_5%
R1057
U813
1
1
SST_SST25VF016B_75_4I_S2AF_SOIC_8P
CE#
2
2
SO
3
WP#
4
VSS
2MByte
1
C1013
0.1uF_16v
C1050
0.1uF_16v
2
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
RESUME_PWEN
1
1
C969
0.1uF_16V
2
C969 Change to 6010B0058801
+V3AL
7-,8-,9-,29-,37-
2009/09/28
L500
600OHM_25%
8
12
VDD
7
12
HOLD#
R1059
3.3K_5%
6
SCK
5
SI
37­37-
8/13
SPI BIOS
1
C970
0.1uF_16v
2
A_RST#
LPC_CLK0
LPC_FRAME#
RSMRST#
A20GATE
SERIRQ
PCI_SERR#
EC_RST#
KB_RST# CHG_LED
MB_ID2
7-,8-,9-,29-,37-
+V3AL
SCAN_OUT(15:0)
0.1uF_16v
C1119
1
2
SPI_CLK SPI_SI
SCAN_IN(7:0)
1
C1014
0.1uF_16v
2
+V3S
1
5 4 9 R
2
23-,29-,48­29-,33­29-,48-
10-,31-
31­29­29-
31­38-
11-,38-
R968
12
10K_5%_OPEN
R970
12
10K_5%
R12841
R12842
38-
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
L808
12
% 5
_ K 0 1
12
R948
47pF_50V_OPEN
C2003
12
R946
12
10K_5%
DEFAULT_NET_TYPE
UMA
NA
38­DEFAULT_NET_TYPE
FET_A
SPI_CLK
GPU_THROT#
SPI_SO
0711
SPI_SI
SPI_CS0#
FET_B
SCAN_OUT(0) SCAN_OUT(1) SCAN_OUT(2) SCAN_OUT(3) SCAN_OUT(4) SCAN_OUT(5) SCAN_OUT(6) SCAN_OUT(7) SCAN_OUT(8) SCAN_OUT(9) SCAN_OUT(10) SCAN_OUT(11) SCAN_OUT(12) SCAN_OUT(13) SCAN_OUT(14) SCAN_OUT(15)
600OHM_25%
DIS
2009/11/29
29-,48-
LPC_AD(0) LPC_AD(1) LPC_AD(2) LPC_AD(3)
0_5%
2009/12/21
NA
FOR ITE 8500
7-,8-,9-,29-,37-
DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE DEFAULT_NET_TYPE
37-
37­37­37-
+V3AL
0 0 9 1 C
LPC_AD(3:0)
TP811
1
%
9
5
8
_
9
K
R
0 1
2
TP821
TP820
TP819
1
V 3 .
2
6
_ F u 2
. 2
126
119 123
106 105 104 103 102 101 100
SCAN_IN(0) SCAN_IN(1) SCAN_IN(2) SCAN_IN(3) SCAN_IN(4) SCAN_IN(5) SCAN_IN(6) SCAN_IN(7)
+VCC_EC
10
22 13
17
15 23 14
16
36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55
+VSTBY_EC
1
C967
0.1uF_16v
2
LAD0
9
LAD1
8
LAD2
7
LAD3 LPCRST#-WUI4-GPD2 LPCCLK
6
LFRAME#
LPCPD#-WUI6-GPE6
GA20-GPB5
5
SERIRQ ECSMI#-GPD4 ECSCI#-GPD3 WRST#
4
KBRST#-GPB6 PWUREQ#-GPC7
GPC0 GPB2
GPG0 FSCK GPG6 FMISO FMOSI FSCE# GPG2
KSO0-PD0 KSO1-PD1 KSO2-PD2 KSO3-PD3 KSO4-PD4 KSO5-PD5 KSO6-PD6 KSO7-PD7 KSO8-ACK# KSO9-BUSY KSO10-PE KSO11-ERR# KSO12-SLCT KSO13 KSO14 KSO15
PWR-C
4
1
1
2
2
1
0
6
1
9
1
1
5
2
Y
Y
Y
Y
C
B
B
B
B
C
T
T
T
T
V
S
S
S
S
V
V
V
V
LPC
#
#
#
#
N
D
B
I
T I
F
T
L
N
A
S
I
S
-
-
-
-
1
0
2
3
I
I
I
I
S
S
S
S
K
K
K
K
8
9
1
0
2
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
5
5
6
6
6
5
6
2
2
8
8
P
P
T
T
7
4
3
2
3
7
9
4
3
7
Y
T
C
B
A
C
T
B
V
S
V
A
V
6
2
8
3
8
8
5
1
5
1
3
5
1
2
5
0
3
Y
E
E
E
E
D
C
C
B
P
P
P
T S V
P
P
G
G
G
G
G
GP
GP
-
-
-
-
-
-
-
#
T
7
6
T
K
D
1
1
S
A
L
N
A
I
C
O
O
C
G
G
S
S
G
G
E
K
K
E
E
GPIO
U805_ 6019B0724201
U805 ITE_IT8502E-KX_L_LQFP_128P
FLASH
KBMX
4
5
6
7
I
I
I
I
S
S
S
S
K
K
K
K
4
3
5
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
6
6
6
S S V
1
S
S
S
S
S
S
S
S
S
S
S
S
V
V
V
V
V
V
A
1
5
9
2
7
3
9
7
4
2
2
1
1
1
R1665
12
220_5%
8 1 8 P T
7
0
0
9
2
1
9
7
7
6
E
D
D
I
I
P
-
-
1
6
G
-
H
G 7 I
P
P U
G
G
L
W
H
-
0
T
8
A
L
L L 0 8 L
E R O C V
2 1
1
2
2009/10/05 TP822 TP823
12
7
6
8
3
4
5
9
9
9
9
9
9
8/14
2
5
4
3
0
1
D
D
D
D
D
D
S
I
I
I
I
I
I
-
-
-
-
-
­U
2
5
4
3
0
1
B
H
H
H
H
H
H
P
P
P
P
P
M
G
G
G
G
G
GP
S
-
-
-
-
9
8
6
7
1
1
1
1
SMCLK2-WUI22-GPF6
I
I
I
I
U
U
U
U
SMDAT2-WUI23-GPF7
W
W
W
W
-
-
-
1
#
1
X
X
N
T
R
U
C
C
R
2
K
/
L
S
C
P
PS2CLK2-WUI20-GPF4 PS2DAT2-WUI21-GPF5
PWM
WAKE UP
RING#-PWRFAIL#-LPCRST#-GPB7
UART
A / D D / A
CLOCK
C968
0.01uF_16V
35-,40-
31-
42-
31-
7-
38-
38­40­40-
31-
R990
10K_5%
SMCLK0-GPB3 SMDAT0-GPB4 SMCLK1-GPC1 SMDAT1-GPC2
PS2CLK0-GPF0 PS2DAT0-GPF1 PS2CLK1-GPF2 PS2DAT1-GPF3
PWM0-GPA0 PWM1-GPA1 PWM2-GPA2 PWM3-GPA3 PWM4-GPA4 PWM5-GPA5 PWM6-GPA6 PWM7-GPA7
TACH0-GPD6 TACH1-GPD7
TMRI0-WUI2-GPC4 TMRI1-WUI3-GPC6
PWRSW-GPE4
RI1#-WUI0-GPD0
RI2-WUI1-GPD1
WUI5-GPE5
TXD-GPB1
RXD-GPB0
ADC0-GPI0 ADC1-GPI1 ADC2-GPI2 ADC3-GPI3 ADC4-GPI4 ADC5-GPI5 ADC6-GPI6 ADC7-GPI7
DAC0-GPJ0 DAC1-GPJ1 DAC2-GPJ2 DAC3-GPJ3 DAC4-GPJ4 DAC5-GPJ5
CK32KE
CK32K
LID_SW# SB_PWRBTN# USBPWR_EN
ME_FLASH_EN TEMP_ALERT#
SLP_S3# CHG_EN# CAPS_LED# LATCH_RES SUS_PWR_DN_ACK
RF_WHITE_LED#
ODD_PW_EN#
MD# BATT_B_DAT BATT_B_CLK SB_PWRGD
110 111 115 116
TP812
117
TP813
118
R1605
12
85
100_5%
TP824
86 87 88 89 90
24
TP802
25 28 29 30 31 32
TP814
34
47 48
120 124
125 18 21
35 112
109 108
66 67 68 69 70 71 72 73
76 77 78 79 80 81
EC_CLK32E
2 128
EC_CLK32
TXC_32.768_10PPM_4P
1
C965 18pF_50V
2
CHANGE by
R967
R969
20-
20­7-,8­7-,8-
14-
38-
35-
38-
20-
38-
14-
20-
14-
9-
12-,13-
37-,42­18-,31-
31-
7-
11-
43-
38-
37-
37-
38-
8­7­8­7­7-
45-
37-,48-
48-
48-
OPEN
X800
4
1
23
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-, 32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
10K_5%
12 12
10K_5%
THM_CLK THM_DAT BATT_CLK
BATT_DAT PCH_SMCLK_THM PCH_SMDAT_THM
CORE_PWEN# ALARM_LATCH DCHG_A DCHG_B
R991 R992
9-,10-,11-,12-,13-,14-,35-,36-,38-,42-,47-
PWR_LED
EC_LCM_PWM AC_LED CPUFAN1_ON# KB_BLON CORE_PWEN_D# GPUTHERM_INT#
TACH0 ALL_PWGD_IN
ALWAYS_PW_EN
CPU_PWEN
EC_PWRBTN# CPUTHERMTRIP# SLP_S5#
ADP_PRES CORE_PWEN
WOL_PWEN# RF_LED#
MB_ID0 MB_ID1 BL_KB_DET BATT_ID ADP_ID BATT_A_IN# I_ADP AC_OK
AMP_EN
WWAN_IND# BT_IND WLAN_IND#
DGPU_PWROK BT_IND#
1
C966 18pF_50V
2
MB_ID0 MB_ID1
EC_PWRBTN#
37­37-
DEFAULT_NET_TYPE
8/13
BT_IND
27-Jul-2009ALAN W
+V5A
10K_5%
12
10K_5%
12
38-
TP_CLK
38-
TP_DAT
8/13
+V3AL
R966
7-,8-,9-,29-,37-
12
37-,42-
100K_5%
1 2
C1012
0.1uF_10V
BOARD ID
+V3AL
7-,8-,9-,29-,37-
N E P
1
1
6
5
O
9
9
_
9
9
%
R
R
%
5
5
_
2
2
_
K
K
0
0
1
1
N E
1
1
P
%
O
4
7
5
_
9
9
_
9
9
%
K
R
R
5
0
2
2
_
1
K 0 1
R993
12
37-,48-
100K_5%
INVENTEC
TITLE
ST145a-UMA
KBC
CODE
CS
SHEET
DOC. NUMBER
OF
37 51
SIZE
A3
REV
X01Model_No
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
+V5A
N
N
E
E
1
P
OP
8
_
O
1
6
_
V
5
6
%
1
1
5
2
R
_
_
F
K
2
u
7
1 .
4
0
RESUME_PWEN
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
KB_BLON
11-,37-
SSM3K7002FU_OPEN
+V5S
PWR-E
1
%
3
5
5
_
6
K
1
0
R
0
2
1
37-
SSM3K7002FU
2
(RF_LED#)
12
5 5 5 1 C
Q858
1
G
2009/10/12
2
S
9 0 4 3 O A
Q869
D
1
G
S
R1567
0_5%
2
S
N E P O _ P X 5 6 V M P
D
S
D
G
1
3
2
G
3
2
+V5S_KBBL
3
8 6 8
+V5A_TP
38-
3
D
9 5 8 Q
1
2009/09/28
CN904
1
Q
1
2
2
3
3
G
4
4
G
ACES_88502_040N_4P
2009/10/08
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
W
(RF_WHUTE_LED#)
A
1
G1 G2
TouchPad Module CONN
+V5A_TP
38-
CN816
1
1
2
2
G1
3
3
SMBUS SMBUS
TP_CLK TP_DAT
37­37-
ACES_50501_00641_001_6P 1
C1167
10uF_6.3V
2
G
G2
4
4
G
5
5
6
6
KeyBoard CONN (30 pin)
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
100_5%
25 26
100_5%
27
150_5%
28
150_5%
29
10K_5%
2
30
ACES_50523_03001_001_30P
38-
RF_LED#_AND
38-
RF_W_LED#_AND
2009/10/08
+V3S
12
R1087
R2004
12
10K_5%
2009/12/22
RF_LED#
RF_WHITE_LED#
SCAN_OUT(15) SCAN_OUT(10) SCAN_OUT(11) SCAN_OUT(14) SCAN_OUT(13) SCAN_OUT(12)
SCAN_OUT(3) SCAN_OUT(6) SCAN_OUT(8) SCAN_OUT(7) SCAN_OUT(4) SCAN_OUT(2)
SCAN_IN(0) SCAN_OUT(1) SCAN_OUT(5)
SCAN_IN(3)
SCAN_IN(2) SCAN_OUT(0)
SCAN_IN(5)
SCAN_IN(4) SCAN_OUT(9)
SCAN_IN(6)
SCAN_IN(7)
SCAN_IN(1)
CAPS_LED#
0_5%
MUTE_LED#
RF_LED#_AND
RF_W_LED#_AND
BL_KB_DET
0.1uF_16V
37-
0.1uF_16V
37-
12
C1610
12 C1611
1
2
1
2
+V5S
5
3
+V5S
5
3
37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37­37-
R1086
37-
PWR-A
R1088
45-
R1089
38-
R1090
38-
R1091
37-
1
%
0
5
0
_
9
K
1
0
R
0
2
1
U103
4
TC7SET08FU
U104
4
TC7SET08FU
12
12 12
1
12
CN815
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
DC-JACK LED
AMBER
PWR-A
R835
12
0_5%
R836
12
0_5%
D827
2
PWR-A
3
PWR-A
12_22_S2ST3D_C30_2C
1
2
3
D
Q845
SSM3K7002FU
S
2
R1334
12
21
470_5%
AMBER# CN3 Pin5
(CHG_LED#)
7-
AMBER#
7-
PWR-A
WHITE#
1
+V5A
I = 6mA
27-Jul-2009ALAN W
+V5S
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
R1335
12
330_5%
INVENTEC
TITLE
ST145a-UMA
KEYBOARD CONN
CODE
CS
SHEET
DOC. NUMBER
SIZE
A3
OF
38 51
REV
X01Model_No
WHITE# CN3 Pin6
(AC_LED#)
37-
CHG_LED
8/18
37-
PWR-A
G1
G
AC_LED
8/18
SSM3K7002FU
R838 560_5%
SSM3K7002FU
WHITE
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
% 5 _ 0 7 4
Q807
3
D
1
G
S
2
+V5A
Q806
3
D
1
G
S
2
1
9 3 8
R
2
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
PWR-E
1
2
SATA LED & HDD-HALTED LED
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
8/18
LED_3S_SATA#
G2
G
30-
SSM3K7002FU
+V3S
1
%
7
5
2
_
3 1
K 0
R
1
2
Q844
3
D
SSM3K7002FU
1
G
S
2
HDD_LOCK_LED
Q846
1
G
29-
3
D
S
2
8/14
150_5%
R1333
12
150_5%
R1318
2009/09/28
1
G
R1317
12
100K_5%
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
POWER LED
8/18
PWR_LED
37-
SSM3K7002FU
Q812
1
G
PWR_LED#
D
S
12_125_W1D_ANPHY_3C
3
2
CHANGE by
D828
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S +V3S
R1288
12
330K_5%_OPEN
1
C1342
4700pF_25V
2
+SD_V1.8S
1
C1362
2.2uF_6.3V
2
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
(0.055A)
CLK_CR48 CR_LED#
0.05A
V
USB-A
6
USB_5P
1
USB-A
USB_5N
_ F u 1
. 0
+V3S
0.05A
1
2
+CPWR_V3S
C1361
0.1uF_16V
1 4
1
3 1
2
C
39-
PWR-C
1
2
C1360
4.7uF_10V
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
1
R1312 0_5%
2
XDCIS
1
R1313
0_5%_OPEN
2
1: For check (Default) 0: For no check
FOR USB RISE & FALL EDGE ISSUE
N
N
2
E
E
1 8
P
P
1
O
O
C
_
_
1
V
V
0
0
5
5
2
_
_
F
F
p
p
0
0
1
1
CLK-USB
29-
330_5% 1 2
CTRL4 CTRL5 CTRL6
R1287
31­31-
39­39­39-
ALCOR_AU6437B52_GEF_GR_QFN_28P
3 1 8 1 C
1 2
29
TML-PAD
128
EXT48IN
2 3 4 5 6 7 8
9 10 11 12 13 14
GPON7
CHIPRESET#
CTRL1 CTRL3
REXT
U827
VD33P
DATA1
DP
DATA0 DATA7DM DATA6
VS33P
CTRL0
VDDU CF_V33
DATA5 CTRL2
V33 CTRL4
DATA4
XDCDN
DATA3
XDCEN
DATA2
XDCIS XDWPN
27 26 25 24 23 22 21 20 19 18 17 16 15
Card Reader CONN
39-
CTRL1
39-
CTRL3
39-
DATA1
39-
DATA0
39-
DATA7
39-
DATA6
39-
CTRL0
39-
DATA5
39-
CTRL2
39-
DATA4
39-
DATA3
39-
DATA2
39-
CTRL7
CN821
39-
P1 39­39­39-
39­39­39­39­39­39­39-
39­39-
39­39­39­39-
SD-CD
P2
SD-WP
P4
SD-DAT0
P3
SD-DAT1
P10
SD-CLK
P19
SD-CMD
P25
SD-DAT2
P23
SD-DAT3
P21
MMC-DATA4
P17
MMC-DATA5
P8
MMC-DATA6
P5
MMC-DATA7
P9
MS-BS
P16
MS-INS
P20
MS-SCLK
P12
MS-DATA0
P11
MS-DATA1
P14
MS-DATA2
P18
MS-DATA3
P7
SD-GND
P15
SD-GND
P6
MS-GND
P24
MS-GND
TAI_R013_P10_HM_44P
CTRL0
CTRL0 AND CTRL0_A TRACE LENGTH SHOTER,
SURROUND WITH GND
CTRL1
CTRL1 AND CTRL1_B TRACE LENGTH SHOTER, SURROUND WITH GND
0_5%
C1338
12
10pF_50v_OPEN
R1273
12
39-
0_5%
C1334
12
10pF_50v_OPEN
CTRL1_B
R1284
CTRL0_A
12
39-
CTRL3
CTRL1 DATA0 DATA1
CTRL2 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7
CTRL0 CTRL4
DATA0 DATA1 DATA2 DATA3
I = 400mA
SD-VCC MS-VCC XD-VCC
XD-CD
XD-R_B
XD-RE
XD-CE XD-CLE XD-ALE
XD-WE
XD-WP-IN
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
XD-GND
XD-GND SD-WP-GND SD-CD-GND
+CPWR_V3S
39-
8/18
P13 P22 X18
X1 X2 X3 X4 X5 X6 X7 X8 X10 X11 X12 X13 X14 X15 X16 X17
X9 X19 P26 P27
V
PWR-C
1 2
CTRL5 CTRL2 CTRL4 CTRL6 CTRL1 CTRL0 CTRL3 CTRL7 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7
1
%
2
5
7
_
2 1
K 1
R
. 5
2
3
6
.
3
6
3
_
1
F
C
u 7
. 4
39­39­39­39­39­39­39­39­39­39­39­39­39­39­39­39-
CHANGE by
INVENTEC
TITLE
ST145a-UMA
AU6433 & CARDREADER CONN
CODE
CS
SHEET
DOC. NUMBER
39 51
27-Jul-2009ALAN W
A3
REVSIZE
X01Model_No
OF
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
ODD_PW_EN#
37-
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
+V15A
9-,14-
+V3S
N E P
1
3
O
8
_
5
%
1
5
R
_
2
Q866
K 0 1
1
G
SSM3K7002FU
1
%
0
5
8
_
5
K
1
0
R
1 5
2
3
D
S
2
+V5S
POWERPAD_2_0610
Q865 6 5
2
13
R1581
V 5
1
2
0
_
9
F
6
u
2
1 1 .
C 0
2009/10/05
+V5S_ODD_MB
PAD506
AO6402AL
4
D
S
G
12
0_5%_OPEN
40-
LID SWITCH
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,41-,43-,47-,48-
R964
12
100K_5%
35-,37-
LID_SW#
C1008
0.01uF_16V
+V3A
U809
1
VDD
GND
2
OUT
MAG_MH248BESO_SOT23_3P
1
2
3
SATA ODD FFC CONN on MB
1.6A
V
V
0
3
.
1
1
1
9
6
_
4
_
F
0
F
u
1
u
2
1
2
.
C
0
0
1
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V5S_ODD_MB
40 mils
40-
N
MD#
E
8
P
8
1
4
1
O
0
1
_
1
1
2
2
C
C
0 4 0
+V3S
% 5 _ K 0 1
37-
RF
SATA_RX1P_CN SATA_RX1N_CN
SATA_TX1N_CN SATA_TX1P_CN
40-
40­40-
C1116
12
0.01uF_16V
C1117
40-
12
0.01uF_16V
SATA_C_RX1P_CN
SATA_C_RX1N_CN
CLOSE TO SATA CONN
FOX_GS12207_11141_9H_20P
SATA HDD FFC CONN on MB
+V5S
1A
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
SATA_RX0P
SATA_RX0N
SATA_TX0N
SATA_TX0P
30­30-
C1396
30­30-
N
1
0
C1369
E
7
0.1uF_16v
P
2
3
1
O _
C
2 0 4 0
RF
Close to HDD CONN
C1395
12
12
0.01uF_16V
1
C1371
10uF_6.3v
2
0.01uF_16V
1
2
10 11 12 13
SATA_RX0P_CN SATA_RX0N_CN
14 15 16 17 18 19 20
FOX_GS12201_1011_9H_20P
1
2
1 2 3 4 5 6 7 8 9
9 7 5
1 R
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20
CN851
SATA RE-DRIVER
R1655
CN813
G1
G
1 2
G2
G
3 4 5 6 7 8 9
G3
G
10 11 12 13 14 15 16 17
G4
G
18 19 20
G5
G
1 2 3 4 5 6 7 8 9 10 11 12 13 14
G1
15
G
G2
16
G
G3
17
G
G4
18
G 19 20
SATA_RX1P SATA_RX1N
SATA_TX1N SATA_TX1P
ST-HP302DLTR interrupt pin default is low / active Hi, BIOS need to programming 22h to change status from active Hi to low
ACCEL_INT
SB_3S_SMDATA
SB_3S_SMCLK
SATA-RX-B
0.01uF_16V
C1603
30­30-
C1604
12
30-,40­30-,40-
TI_SN75LVCP412RTJR_QFN_20P
29-
26-,27-,31­26-,27-,31-
0402_OPEN
2 0402_OPEN
SATA_RX1P_RE
SATA_RX1N_RE
0.01uF_16V
12
R12920_5%
12
R1656
12 1
1
R1319 10K_5%
2
TX_1P
5
TX_1N
4
GND
3
RX_0N
2
RX_0P
1
R1291
10K_5%
12
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
%
%
%
5
5
1
5
1
1
_
_
_
0
K
K
7
7
.
.
4
4
0
0
1
2
6
0
0
2
2
2
1
6
6
R
1
1
R
R
0
7
1
8
6
9
1
0
C
C
N
D
D
C
C
E
V
V
RX_1P
11
RX_1N
12
U101
GND
SATA_TX1N_RE
13
TX_0N
SATA_TX1P_RE
14
TX_0P
15
SATA-TX-B
D
D
D
C
C
L
N
N
N
C
C
M
G
G
V
T
1
8
9
0
2
1
1
2
U828
8
INT_1
12
SDO
13
SDA_SDI_SDO
14
SCL_SPC
7
CS
9
INT_2
2
GND
ST_HP302DLTR8_LGA_14P
SMBus Address is "1D"
SATA-TX-B
V
G
6
7
1
1
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
VDD_IO
RESERVED RESERVED
VDD
GND GND GND
CLOSE TO ODD CONN
1
6
3 11
4 5 10
HARDDRIVE PROTECTION
P/N = 6019B0505201
CHANGE by
+V3S
V 3 1 0 6
1
C
2
0.01uF_16V
C1606
6
1
_
F
u
1
.
0
1
2
12
2
V
0
3 .
6
6
1
_
C
F u 1
0.01uF_16V
40­40-
SATA_RX1N_CN
40­40-
0
V
0
6
6
1
1
_
1
C
F u 1 0
2
. 0
C1605
12
+V3S
1
C1346
4.7uF_6.3V
2
ALAN W 27-Jul-2009
SATA_RX1P_CN
SATA_TX1N_CN SATA_TX1P_CN
TITLE
INVENTEC
ST145a-UMA
SATA HDD & SATA ODD
CODE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REVSIZE
5140
OPTION PART
USB_3P USB_3N
TOUCH SCREEN
+V3A
2009/11/29
FOR ESD
31-
USB-D
31-
N E P O _
N
1
B B 1 U
2
0 V 5 D S E P
1
E
5
P
0 9
O
D
_ B
B 1 U
2
0 V 5 D S E P
2009/11/26
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,43-,47-,48-
V 0
0
1
1
1
_
9
F
1
2
u
C
1
. 0
N
N
5 0
E
6 0 9 D
E
8
P
P
1
O
O
C
_
_
1
1
V
V
0
0
5
5
2
2
_
_
F
F
p
p
0
0
1
1
TP807 TP808 TP809 TP853 TP854
9 0 8 1
JST_SM06B_XSRK_ETB_HF_6P
C
FOR USB RISE & FALL EDGE ISSUE
CN902
G1
G
1
1
2
2
3
3
4
4
5
5
6
6
G2
G
INVENTEC
TITLE
ST145a-UMA
TOUXH SCREEN & FINGERPRINT
DOC. NUMBER
CODE
A3
CS
CHANGE by OF
27-Jul-2009ALAN W
SHEET
41 51
REVSIZE
X01Model_No
ESATA CONN
(without Re-Driver chip)
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
USB_0N
USB_0P
2009/11/29
31-
31-
2009/09/28
C1508
1uF_10V
1
2
L839
1
4
WCM_2012_900T
2A
2
1
1
2
USBPWR_EN
V
ACTIVE HIGH
1
3
.
1
6
9
_
1
F
C
u
+V5A_ESATA
0 3 3
C1247 22uF_6.3V
USB_0N_L
2
USB_0P_L
3
2009/11/21 FOR USB RISE & FALL EDGE ISSUE
37-,42-
42-
1
C1650
22uF_6.3V_OPEN
2
4
3
0
0
8
8
V
V
1
1
0
0
1
1
C
C
5
5
_
_
F
F
p
p
2
2
0
0
1
1
TWIN_EU100_117CRL_TW_11P
USB BOARD Cable on MB
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
12
12
11
11
G
10
10
G2
USBPWR_EN
USB_2P USB_2N
USB_1P USB_1N
31­31-
31­31-
37-,42-
9 8 7 6 5 4 3 2 1
9 8 7 6 5 4 3 2 1
CN803
G
G1
2009/09/28
U820
1
2
3
4
ANPEC_APL3510AXI_TRG_MSOP_8P
CN819
1
VBUS
2
D-
3
D+
4
GND
G1
GND
G2
GND
G3
GND
G4
GND
8
OUT1
GND
7
OUT2
IN1
6
OUT3
IN2
5
EN
OC
5
GND
6
A+
7
A-
8
GND
SATA_C_RX2N
9
B-
SATA_C_RX2P
10
B+
11
GND
PBN Cable CN on MB
PWR_LED#
EC_PWRBTN#
+V5A_ESATA
2A
C1249
12
C1248
12
8/18
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-, 47-
8/18
38­37-
ACES_88502_060N_6P
42-
0.01uF_16V
0.01uF_16V
CN801
1
1
2
2
3
3
4
4
5
5
6
6
30-
SATA_TX2P
30-
SATA_TX2N
30-
SATA_RX2N
30-
SATA_RX2P
G1
G
G2
G
ACES_87213_1200G_12P
SI CHANGE TO 6012B0066401
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
ESATA & USB BOARD CABLE
DOC. NUMBER
CODE
SIZE
A3
Model_No X01
CS
SHEET
OF
REV
5142
DVDD12
43-
TRD0P
TRD0N
TRD1P
TRD1N
TRD2P
TRD2N
TRD3P
TRD3N
PCIE_C_TXP0
PCIE_C_TXN0
PCIE_R_LAN_CLKP
PCIE_R_LAN_CLKN
PCIE_RXP0
PCIE_RXN0
2009/09/28
+V3_LAN
43-,44-
44-
44-
44-
44-
44-
44-
44-
22-
22-
29-
29-
22-
22-
+V3_LAN
43-,44-
Trace Width 40mil
V 3
.
0
1
1
6
6
_
1 1
F
2
2
u
C 2 2
CLOSE TO U12 PIN 44 & 45
1
AVDD33
2
MDIP0
3
MDIN0
4
FB12
5
MDIP1
6
MDIN1
7
GND
8
MDIP2
9
MDIN2
10
AVDD12
11
MDIP3
12
MDIN3
DVDD12
43-
C1155
12
C1187
12
+V3_LAN
43-,44-
1 0 8
C1161
0.1uF_16v
+V12_LAN
43-
8 1 2 R
H T
I W
2
%
4
1
D
8
_
N
0
K
G
1
9
R
4
D
.
1
N
2
U O R R U S
8
7
4
4
2
D
1
N
T
G
U
O R S
3
6
4
5
4
4
4
4
T
R
R
S
S
S
E
D
D
R
D
D
V
V
X
DVDD12
1
9
0
2
4
3
4
4
3
1
2
R
3
L
L
S
D
A
A
N
T
T
D
E
K
V
K
C
A
C
U817
REA_RTL8111DL_VB_GR_LQFP_48P
P
N
_
P
N
I
I
S
S
H
H
5
6
1
1
PCIE_C_RXP0
PCIE_C_RXN0
_
2
K
K
1
L
L
P
N
D
C
C
O
F
E R
7 1
O
F
D
S
S
E
V E
H
H
R
9
0
1
8 1
2
1
2
2
2
LAN_CABLE_IN
0.1uF_10V
0.1uF_10V
2 1 D
D
D
N
V D
G
4
3
1
1
C1163 33pF_50V
2
Z H
M 5 2
C1162
1
33pF_50V
+V3_LAN
43-,44-
43-
7
8
3
3
2
0
1
D
D
E
D
L V A
LED2_EEDI_AUX
D N
O P
G E
G
3
4
2
2
9/18
2
1
1
0.1uF_16v
C1193 pin40
44-
3 3 D D V
LED1_EESK
LED3_EEDO
ISOLATEB
PERSTB
LANWAKEB
CLKREQB
C N
25MHz : 6018A0011301
HEIGHT : 1.3mm for Reference
2
9/18
1
2
8/14
LED_LANRXACT# LED_LANLINK#
DVDD12
43-
36
DVDD12
EECS
GND
DVDD12
VDD3
35
34
R1117
33
R1115
32
31
30
29
28
27
LPC
26
25
12
TP834
1
2
EVDD12
43-
3.6K_5%
1K_5%_OPEN
LPC
29-,48-
31-,48-
43-44-
2009/12/22
43-
LAN_CABLE_IN
2009/09/28
R1566
12
0_5%
31-
Q861
SSM3K7002FU_OPEN
1
43-
3
D
G
S
2
Place close to SB
R1051
8/14
SSM3K7002FU_OPEN
WOL_PWEN#
37-
+V12_LAN
44-
+V3_LAN
43-,44-
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,45-,48-
+V3_LAN
DVDD12
43-,44-
43-
PCIE_RST#
PCIE_WAKE#
CLKREQ_LAN#
CLKREQ_LAN# SB_PCIE_LAN_CLKREQ#
LAN_CABLE_IN#
PWR-E
Close L16 Within 200mil
+V3S
1
2
%
1
1
1
_
1
K
R
1
2
R1114
12
0_5%_OPEN
1
2009/09/28
%
3
1
1
_
1 1
K 5
R
2
1
43-
0_5%
INT
12
200_5%_OPEN
Q824
D
1
G
S
43-
SWF2520CF_4R7K_M
30-
12
R1111
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,47-,48-
3
2
R1050
2
1
220K_5%
(1.2V output:60mils)
L829
12
C1164
22uF_6.3V
LAN_DIS#
31-
SI CHANGE
+V3A
1
C1157
2
0.1uF_10v
1
2
0.1uF_16V
CHANGE by
AM2321P
2
C1165
+V3_LAN
43-,44-
3
S
D
G
1
Q828
1 2
R1564
12
0_5%
8/14
DVDD12
43-
DVDD12
1
2
ALAN W 27-Jul-2009
600mA
pin29
1
2
pin1
C1159
0.1uF_16v
1
2
C1190
0.1uF_16v
1
2
pin37
C1195
0.1uF_16v
Placed near LAN Controller
EVDD12
43-
Placed near LAN Controller
pin19
pin19
V
9
1
8 1 1
2
C
CLOSE TO U12 PIN19
Placed near LAN Controller
(1.2V output:40mils)
pin13
C1156
0.1uF_16v
V
3
8
3
.
.
1
8
6
6
1
_
_
1
2
F
F
C
u
u
1
1
pin10
1
C1158
0.1uF_16v
2
pin36
pin30
V
V
6
6
1
1
2
1
1
1
_
_
9
9 1 1 C
F
F
1
u
2
2
1
u
1
1
.
C
.
0
0
pin39
1
C1194
0.1uF_16v
2
INVENTEC
TITLE
ST145a-UMA
SIZE
CODE
A3
CS
SHEET
Model_No X01
RTL8111DL
DOC. NUMBER
OF
REV
5143
1
C1110
0.01uF_16v
2
BOTH_GST5009_SOP_24P
U812
1 3 2 4 6 5 7 9
8 10 12 11
TCT1 TD1­TD1+ TCT2 TD2­TD2+ TCT3 TD3­TD3+ TCT4 TD4­TD4+
1
C1111
2
0.01uF_16v
MCT1
MX1+ MCT2
MX2+ MCT3
MX3+ MCT4
MX4+
+V3_LAN
43-
1
R1085
24 22
MX1-
23 21 19
MX2-
20 18 16
MX3-
17 15 13
MX4-
14
v
v
v
0
0
0
0
1
1
_
4
_
1
11
F
1
F
u
1
u
1
1
1
0
.
0
C
22
2
.
0
0
1
1
%
5
% 5
_ 5 7
4
5
5
5
_
0
0
5
1
1
7
R
R
2
2
0 0
1
3
_
1
F
1
u
1
1 0
C
. 0
% 5 _
5 7
1
C1112 2200pF_2000V
2
SIZE : 1808
v 0 0 1
5
_
1
1
F
1
u
1
1
C
0
. 0
121
6 5 0 1 R
44-
LAN-A
RD-
44-
LAN-A
RD+
44-
LAN-B
TD-
44-
LAN-B
TD+
44-
LAN-C
RD1-
44-
LAN-C
RD1+
44-
TD1-
LAN-D
44-
TD1+
LAN-D
7 4 0 1 C
2
% 5
6
_
8
5
9
7
R
2
270_5%
2
LAN-A LAN-A LAN-B LAN-C LAN-C LAN-B LAN-D LAN-D
LAN-A LAN-A
LAN-B LAN-B
LAN-C LAN-C
LAN-D LAN-D
1
2
TRD0N TRD0P
TRD1N TRD1P
TRD2N TRD2P
TRD3N TRD3P
C1042
0.01uF_16v
43­43-
43­43-
43­43-
43­43-
1
C1109
0.01uF_16v
2
LAYOUT NOTE : Place termination resistors and caps as close to LAN controller as possible
RD+ RD­TD+ RD1+ RD1­TD­TD1+ TD1-
PWR-E
1
R988
270_5%
2
B1 WHITE+ B2WHITE-
1
44­44-
2 3
44-
4
44-
5
44-
6
44-
7
44-
8
44-
FOX_JM36111_N67D3_7H_12P
RJ45
JACK800
TX+ TX­RX+ P4 P5 RX­P7 P8 AMBER+A1
G
G
AMBER- A2
43-
PWR-A
LED_LANLINK#
43-
LED_LANRXACT#
8/13
8/13
G1
DGND
G2
PWR-A
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
LAN & RJ45 CONN
CS
SHEET
DOC. NUMBERCODE
Model_No
OF
SIZE
A3
REV
X01
5144
+V1.5S
14-,18-,24-,25-,47-,48-
AU_DVDDIO
R1506
12
0_5%
45-
Close to Pin3
HDA_BITCLK
HDA_SDIN0
HDA_SDOUT
HDA_SYNC
HDA_RST#
31-
31-
31-,33-
31-
31-
DMIC_DAT
DMIC_CLK
2009/09/09
35-,45-
35-,45-
AU_DVDDIO
1
C1403
0.1uF_16V
2
N E P
1
5
O
0
_
4
V
2
1
0
C
5 _ F p 0 1
CLOSE TO CODEC 200MIL
N E P
1
1
2
4
O
0
0
_
4
4
V
2
2
1
1
0
C
C
5 _ F p 0 1
45-
Close to Pin9
1
1
C1407 1uF_6.3V
2
2
35-,45-
DMIC_CLK
DMIC_DAT
MUTE_LED#
+V3S
N E P O _ V 0 5 _ F p 0 1
35-,45-
38-
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
37-
AMP_EN
2009/11/12
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
C1406
C1401
0.1uF_16V
10uF_6.3V
12
R1340
33_5%
12
R1339
33_5%
12
10K_5%R1326
C1365
12
2.2uF_16V
1
Close to Pin1
2
U829
1
DVDD_CORE
9
DVDD
3
DVDD_IO
6
HDA_BITCLK
8
SDATA_IN
5
SDATA_OUT
10
HDA_SYNC
11
HDA_RST#
2
DMIC_CLK-GPIO1
4
DMIC0-GPIO2
PWR-A
46
DMIC1-GPIO0-SPDIF_OUT_1
48
SPDIF_OUT_0
47
EAPD
35
CAP-
36
CAP+
7
DVSS
33
AVSS
30
AVSS
26
AVSS
42
PVSS
49
TML-PAD
8/19
IDT_92HD80B1X5NLGXYDX8_QFN_48P
AGND
AVDD AVDD
PVDD PVDD
SENSE_A SENSE_B
HP0_PORT_A_L HP0_PORT_A_R
VREFOUT_A_or_F
HP1_PORT_B_L HP1_PORT_B_R
PORT_C_L
PORT_C_R
VREFOUT_C
SPKR_PORT_D_L+
SPKR_PORT_D_L-
SPKR_PORT_D_R-
SPKR_PORT_D_R+
PORT_E_L
PORT_E_R
PORT_F_L PORT_F_R
PC_BEEP
MONO_OUT
CAP2
VREFFILT
VREG
AVDD
45-
1
C1367
2
0.1uF_16V
27
AGND
38
39 45
13 14
28 29 23
31 32
19 20 24
40 41
43 44
15 16
17 18
12
25
22
21
34
V-
37
1
4 6 3 1
2
C
AGND
Close to Audio Codec
AGND
45-
SENSE_A
46-
HP_L_JACK
46-
HP_R_JACK
46-
MIC_L
46-
MIC_R
46-
MIC-REF
45-
SPK_OUT_L+
45-
SPK_OUT_L-
45-
SPK_OUT_R-
45-
SPK_OUT_R+
C1408
2
V
V
3
3
.
.
6
6
6
1
1
6
_
8
_
6
F
3
F
3
1
u
1
u
2
2
2
C
2
.
C
.
2
2
AGND
AGND
1
C1363
2
1uF_10V
0.1uF_10V
1
V 3
. 6
7
_
8 3
F
1
u 0
C
1
AGND
2
AGND
9 0 4 1 C
1
C1385
10uF_10V
1 2
R1331
V 0 1 _ F u 1
. 0
14-,20-,34-,35-,36-,38-,40-,41-,47-
KC_FBMA_11_160808_700A10T
1
C1383
2
1uF_10V
AGND
12
100K_5%
R1342
12
47K_5%
0.1uF_10V
1
%
1
5
4
_
3
K
1
0
R
1
2
12
1
C1384
2
0.1uF_16V
AGND
C1389
12
Q855
SSM3K7002FU
+V5S
L852
AVDD
45-
+V3S
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
1
%
8
5
2
_
3
K
1
0
R
1
2
3
D
31-
1
G
PCSPKR
S
2
SENSE_A
PLACE CLOSE TO PIN 13 WITHIN 500MIL
PORT
A
B
C
D
E
F
AVDD
45-
45-
1
R1332
2.49K_1%
2
R1330
R1329
1
C1388 1000pF_50v
2
AGND
Discription
NO USE
Headphone
Microphone
SPKR
NO USE
NO USE
12
10K_1%
12
20K_1%
46-
MICS
46-
HPS
Sense
HPS
MICS
2009/09/28
AGND
V 0 1
1
_ F u
2
1
. 0
AGND
2009/09/09
INT-SPEAKER CONN
SPK_OUT_R+
SPK_OUT_R­SPK_OUT_L­SPK_OUT_L+
45-
45­45­45-
CN905
1
1
2
2
G1
3
3
G
G2
4
4
G
ACES_50224_00401_001_4P
C1393
12
0.1uF_16V_OPEN
AGND
PAD805
POWERPAD_2_0610
AGND
C1392
12
0.1uF_16V_OPEN
AGND
C1391
12
0.1uF_16V_OPEN
AGND
FOR EMI
CHANGE by
INVENTEC
TITLE
ST145a-UMA
AUDIO CODEC IDT_92HD80
DOC. NUMBERSIZE
CODE
A3
27-Jul-2009ALAN W
CS
SHEET
45 51
REV
X01Model_No
OF
Normal OPEN
MIC JACK
45-
MICS
2009/09/28
6 5 2 1 3 7
JACK801
SINGA_2SJ2311_000111_6P
1
2
MIC-REF
C1317 220pF_50V
45-
BLM11P600S BLM11P600S
1
2
L847
2
1
L846
12
C1319 220pF_50V
C1299
1
2
0.1uF_16v
1
R1257
4.7K_5%
2
1
R1256
4.7K_5%
2
C1315
1uF_50V
C1316
2
1
2
AGND
1
C1318 1uF_6.3v
1uF_50V
2
45-
MIC_R
45-
1
MIC_L
2009/11/12
HP_R_JACK
HP_L_JACK
45-
45-
20K_5%
R1315
EMI
Close Conn
AUDIO-B
AUDIO-B
1
2
AGND
1
R1289
20K_5%
2
C1314
12
0.1uF_16v
R1314
12
16_5% R1290
12
16_5%
AGND
AUDIO-B
AUDIO-B
L849
12
BLM11P600S
L848
12
BLM11P600S
C1344
0.1uF_16v
EMI
AGND
EMI
2
3
1
D824 PHP_PESD5V2S2UT_SOT23_3P
2009/09/28
SINGA_2SJ2311_000111_6P
12
0.1uF_16v
6 5 2 1 3 7
JACK802
AGND
Normal OPEN
HP JACK
INVENTEC
TITLE
ST145a-UMA
AUDIO JACK
CODE
CS
SHEET
DOC. NUMBER
46 51
SIZE
27-Jul-2009ALAN W
A3
REV
X01Model_No
OFCHANGE by
AUDIO-B
AUDIO-B
1
1
C1368
C1345
0.1uF_10V
2
1
2
AGND
2
HPS
0.1uF_10V
45-
EMI
Close Conn
C1343
S809
SCREW330_700_0_1P
CPU's screws
S808
SCREW330_700_0_1P
S804
SCREW330_700_0_1P
SCREW330_700_0_1P
S803
For NB
S10
SCREW220_380_420_1P
S815
SCREW1.2_0_5_1P
S06
SCREW220_380_420_1P
S814
SCREW1.2_0_5_1P
S05
SCREW315_500_1P
FIX9
FIX_MASK
FIX15
FIX_MASK
FIX21
FIX_MASK
FIX10
FIX_MASK
FIX16
FIX_MASK
FIX22
FIX_MASK
FIX13
FIX_MASK
FIX19
FIX_MASK
FIX20
FIX_MASK
FIX804
FIX_MASK
C1251
0.1uF_25V
C1253
0.1uF_25V
C1250
0.1uF_25V
FIX807
FIX_MASK
S812
SCREW300_700_1P
12
+V1.1S+V3A
12
12
FIX803
FIX_MASK
S816
SCREW300_800_1P
+VBATR +V3A
7-,9-,10-,11-,12-,13-,35-,47-
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
VCC_NB
13-,24-
FIX801
FIX802
FIX800
FIX806
FIX_MASK
FIX_MASK
FIX_MASK
S802
SCREW300_800_1P SCREW300_800_1P
FIX_MASK
S818
SCREW300_550_700_1P
+VBATR
7-,9-,10-,11-,12-,13-,35-,47-
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
+V5S
14-,18-,19-,21-,22-,23-,24-,32-
+VBATR +V1.5S
+V1.5S
12
0.1uF_25V
C1257
12
0.1uF_25V
C1255
12
0.1uF_25V
14-,18-,24-,25-,45-,47-,48-
+V5A
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
C1256
7-,9-,10-,11-,12-,13-,35-,47-14-,18-,24-,25-,45-,47-,48-
FIX805
FIX_MASK
S800
S807
SCREW300_800X875S_800_1P
+V5S +V3A
14-,20-,34-,35-,36-,38-,40-,41-,45-,47-
C1252
0.1uF_25V
+VBATR +V5A
7-,9-,10-,11-,12-,13-,35-,47-
C1701
0.1uF_25V
For SB
S813
SCREW300_800_1P
S817
SCREW300_892X750S_1P
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-,48-
2
1
9-,10-,11-,12-,13-,14-,35-,36-,37-,38-,42-,47-
12
S801
SCREW300_800_1P
S811
SCREW300_800_1P
EMI
INVENTEC
TITLE
ST145a-UMA
SCREW
SIZE
A3
CHANGE by SHEET
28-Jul-2009ALAN W
CS
DOC. NUMBER
OF
47 51
REVCODE
X01Model_No
31-
USB_7P
31-
USB_7N
BT_IND
2009/11/21
FOR USB RISE & FALL EDGE ISSUE
9-,11-,13-,14-,18-,29-,30-,31-,32-,33-,35-,40-,41-,43-,47-
BTOFF
DEFAULT_NET_TYPE
CLKREQ_WLAN#
BLUETOOTH CONN
SI CHANGE TO 6012B0341901
BTVCC
48-
CN823
G1
G
1
1
2
2
3
3
4
37-
2
1
0
0
8
8
V
V
1
1
0
0
1
1
5
5
C
C
_
_
F
F
p
p
2
2
7
7
.
.
4
4
+V3A
I = 70mA
1
R1336 10K_5%
2
R1337
12
30-,48-
39K_5%
2009/10/08
48-
4
5
5
6
6
G2
JST_SM06B_XSRK_ETB_HF_6P
G
BTVCC
Q854 AM2321P 2
3
D
S
1
%
0
G
5
6
_
6
C1394
0.1uF_16v
SSM3K7002FU
12
R1254
0_5%
1
0
1
7
R
4
2
Q870
3
D
1
G
S
2
INT
1 2
1
2
31-
48-
PWR-B
C1397 10uF_6.3v
2009/10/09
SB_PCIE_WLAN_CLKREQ#
DEFAULT_NET_TYPE
DEFAULT_NET_TYPE
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
PCIE_WAKE#
CLKREQ_WLAN#
PCIE_R_WLAN_CLKN
PCIE_R_WLAN_CLKP
PCIE_C_TXN1
PCIE_C_TXP1
BTOFF
A_RST#
LPC_CLK1
PCIE_RXN1 PCIE_RXP1
WLAN CONN (MINICARD)
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-, 37-,38-,39-,40-,41-,43-,45-,48-
Peak (mA)
2,750mA
+V3.3A
500mA
+V1.5
31-,43-
30-,48­48-
29­29-
23-,29-,37­29-,33-
22­22-
22­22-
+V3S
WLAN_PRIORITY
R885
TP800
12
0_5%_OPEN
CN804 CHANGE TO 6026B0184301
WLAN_RF_OFF#
WLAN_POWER_OFF
Normal (mA)
1,100mA
375mA
CN804
1
WAKE#
3 5 7
9 11 13 15
17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
G1 G2
ACES_88908_5204_52P
+3.3Vaux COEX_1 COEX_2 CLKREQ#
UIM_PWR
GND
UIM_DATA
UIM_CLK
REFCLK-
UIM_RESET
REFCLK+
UIM_VPP
GND
Reserved-UIM_C8
W_DISABLE#
Reserved-UIM_C4
GND PERn0 PERp0 GND GND PETn0 PETp0 GND GND +3.3Vaux +3.3Vaux GND Reserved Reserved Reserved Reserved +3.3Vaux
GND
PERST#
+3.3Vaux
SMB_CLK
SMB_DATA
USB_D-
USB_D+
LED_WWAN#
LED_WLAN# LED_WPAN#
+1.5V
+1.5V
GND
1.5V
GND
GND
GND
GND
GND
GND
PCH
GPIO57
GPIO35
2 4 6 8 10 12 14 16
18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
+V3S
1
4.7uF_6.3v
2
29-,37­29-,37­29-,37­29-,37­29-,37-
13
CHENMKO_BAT54_3P
14-,18-,24-,25-,45-,47-,48-
+V1.5S
SB800\820
GPIO12
GPIO176
C924
D808
LPC_FRAME# LPC_AD(3) LPC_AD(2) LPC_AD(1) LPC_AD(0)
30-
29-,43-
1
C892
1uF_6.3v
2
DEFAULT_NET_TYPE
WLAN_RF_OFF# PCIE_RST#
6 1 8
V
V
1
0
0
1
1
C
5
5
_
_
F
F
p
p
2
2
0
0
1
1
0.5A
31­31-
7 1 8 1 C
C922
0.1uF_16v
+V1.5S
14-,18-,24-,25-,45-,47-,48-
1
C891
2
47pF_50V
V 3
. 6
1
_
3
F
2
2
u
9
2
C
. 2
1
2
PWR-C
NA
10-,12-,14-,20-,23-,24-,26-,27-,29-,30-,31-,32-,33-,35-,36-,37-,38-,39-,40-,41-,43-,45-,48-
+V3S
1
USB_10N
R922
USB_10P
10K_5%
2
1
R921
10K_5%
2
37­37-
1
2
C921
47pF_50V
RF
WLAN_IND# BT_IND#
CHANGE by
ALAN W 27-Jul-2009
INVENTEC
TITLE
ST145a-UMA
WLAN & BT CONN
CODE DOC. NUMBER
SIZE
A3
Model_No X01
CS
SHEET
OF
REV
5148
CHANGE by
ALAN W 21-Dec-2009
INVENTEC
TITLE
ST145a-UMA
WWAN & SIM CARD CONN
SIZE
A3
DOC. NUMBER
Model_No X01
CS
SHEET
OF
REVCODE
5149
USB BOARD
USB BOARD Cable ON UB
+V5A_UB
USBPWR_EN_UB
USB_8P_UB USB_8N_UB
USB_9P_UB USB_9N_UB
S24
SCREW300_800_1P
UB_DGND
USB_8N_UB
USB_8P_UB
USB_9N_UB
USB_9P_UB
50-
ACES_87213_1200G_12P
50-
50­50-
50­50-
UB_DGND
50-
2
50-
3
WCM_2012_900T
Close to USB CON
50-
50-
WCM_2012_900T
Close to USB CON
12
12
11
11
G
10
10
G
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CN6000
S25
SCREW300_800_1P
L6000
2
3
1
4
L6001
G2 G1
2009/11/29
D N G D _ B U
USBPWR_EN_UB
UB_DGND
C6003
47uF_6.3V
U6000
+V5A_UBPWR
50-
Vcc
PHP_PRTR5V0U2X_SOT143_4P_OPEN
1
4
+V5A_UBPWR
U6002
50-
PHP_PRTR5V0U2X_SOT143_4P_OPEN
330uF_6.3V
2
C6017
1uF_10V
C6002
1 2
UB_DGND
USB_L_8N
USB_L_8P
1 2
UB_DGND
(2A)
+V5A_UB
50-
1
12
50-
ANPEC_APL3510AXI_TRG_MSOP_8P
UB_DGND
+V5A_UBPWR
50-
50mil
SYN_020133GR004M52CZL_4P-001
UB_DGND
IO 2IO3
NA
14
GND
UB_DGND
+V5A_UBPWR
50-
50mil
C6000
47uF_6.3V
USB_L_9N
USB_L_9P
SYN_020133GR004M52CZL_4P-001
UB_DGND
2IO3IO
NA
1GNDVcc4
UB_DGND
Circuit : Fixed
2009/06/29
+V5A_UBPWR
50-
OUT1
OUT2
OUT3
I=2000mA
UB_DGND
2009/11/29
8
1
0 1 6
2
C
8
7
6
5
OC
1
2
3
4
U6001
GND
IN1
IN2
EN
USB CONN01
2009/12/21
CN6001
G1
1
G
VCC
2
G2
D-
G
3
G3
D+
G
4
G4
G
G
UB_DGND
USB CONN02
2009/12/21
CN6002
G1
1
G
VCC
2
G2
D-
G
3
G3
D+
G
G4
4
G
G
UB_DGND
PWR_LED#_PBN
V 3
. 6 _ F u 0 5 1
Circuit : Fixed
2009/06/29
POWER LED
D5001
50-
EVL_19_217_W1D_AP1Q2QY_3T
21
POWER BUTTON
SW1 SI USE : 6026B0154801
SW5000
214
MITSUMI_SOT_152HST_4P
3
50-
PWR_SW#_PBN
POWER BOTTON BOARD
+V5A_PBN
R5000
12
470_5%
10/05
PBN_GND
CHANGE by
50-
8/17
PBN Cable CN on PBN
+V5A_PBN
50-
8/17
PWR_LED#_PBN
PWR_SW#_PBN
PBN_GND
50­50-
1
PBN_GND
S26
SCREW230_430_1P
27-Jul-2009ALAN W
SMDPAD6_100_28X118
2
PBN_GND
3
D5000
PHP_PESD3V3S2UT_SOT23_3P
TITLE
SIZE
A3
PAD5000
1 2 3 4 5 6
S27
SCREW230_430_1P
INVENTEC
ST145a-UMA
EXT USB CONN
CODE REVDOC. NUMBER
CS
SHEET
OF
50 51
X01Model_No
ST145AU 13-Oct-2009
INVENTEC
TITLE
ST145AU-6050A2313401-MB-X01-35
SIZE
CODE DOC. NUMBER
A3
CS
REV
5151
OFSHEETCHANGE by
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