Highly Parallel System Architecture in Compaq Servers
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First Edition (August 1999)
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0166-0899-A
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(cont.)
Highly Parallel System Architecture
0166-0899-A
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ECHNOLOGY BRIEF
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NTRODUCTION
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System bandwidth is critical to businesses running complex transaction, database, internet/intranet,
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and file/print applications. As an industry leader, Compaq anticipated the need for increased
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bandwidth to accommodate the growth of these business-critical tools and pursued possible
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solutions. In 1997, after cooperative development efforts with Reliance Computer Corporation,
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Compaq introduc ed the Highly Parallel System Architecture t o deliver increased system throughp ut
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and performance when compared to traditional X86-based designs.
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The Highly Parallel System Architecture is a high-performance, industry-standard architecture that
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addresses the need for greater system bandwidth. This design also delivers increased memory
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scalability and overall microprocessor performance for servers.
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A
RCHITECTURE OVERVIEW
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Offering parallelism in multiple ways, the Highly Parallel System Architecture provides maximum
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bandwidth to ensure the highest levels of application performance. Under similar operating
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conditions, servers with this architecture significantly outperform those with traditional
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architectures. This balanced, high-performance system design incorporates:
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• Multiple data paths in I/O subsystem
• Balanced system resources
• A new memory architecture
• Advanced symmetric multiprocessing support
These characteristics are discussed in detail in the sections that follow.
For one view of the enhanced performance of this architecture, see benchmark summary
ECG052/1198
Price:Performance in its Class
800 MB/ s Processor Bus (at 100 MH z)
800 MB/s
Memory Bus
Figure 1: An example configuration of the Highly Parallel System Architecture
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Compaq ProLiant 3000 Continues to Provide Best Performance and
133 MB/s
Peer-PCI Bus
(cont.)
Memory
Controller
at www.compaq.com.
CPUCPU
Memory Banks
for up to 4 GB
ECC SDRAM
PCI
Controller
PCI Devices
Highly Parallel System Architecture
Memory
Controller
PCI
Controller
133 MB/s
Peer-PCI Bus
800 MB/s
Memory Bus
0166-0899-A
3
ECHNOLOGY BRIEF
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I/O S
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Compaq servers with the Highly Parallel System Architecture have dual peer-PCI buses to increase
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system I/O bandwidth. A single PCI bus provides I/O bandwidth of up to 133 MB/s (or 533MB/s
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for a 64/66 PCI bus), which must be shared by peripherals such as the SCSI controllers, array
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controllers, and a network interface controller. With dual-peer PCI buses, multiple requests can be
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processed in parallel. Each bus can provide peak bandwidth in parallel with the other controller,
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allowing an aggregate I/O bandwidth of up to 267 MB/s. This implementation provides twice the
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bandwidth of single bus architectures and reduces overall system latency to decrease system
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bottlenecks.
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The dual PCI buses also permit greater system I/O integration and expandability, supporting up to
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12 PCI devices twice the number supported on single bus implementations. This allows Compaq
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servers with the Highly Parallel System Architecture to integrate other PCI components, such as the
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SCSI and network controllers on the system board and still deliver up to eight available PCI-based
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I/O expansion slo t s.
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The dual peer-PCI buses are wide high-speed buses that support 64-Bit, 66-MHz PCI, and PCI Hot
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Plug I/O technology. Future enhancements from Compaq will allow the Highly Parallel System
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Architecture to support PCI-X technology. For more information about PCI-X, see technology brief
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ECG070/0299,
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Another benefit of dual-peer PCI buses is the ability to balance system resources. Critical system
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resources re si de on separate buses to he l p balance throughput and impr ove system efficiency: With
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peripherals divided between two PCI buses, there is less competition for access. This results in
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better performance.
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A new, standards-based memory architecture delivers significantly greater bandwidth and
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scalability by using dual memory controllers. While traditional memory architectures use a single
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memory controller to process all memory requests, the Highly Parallel System Architecture’s dual
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memory controllers provide independently parallel, multipath access to memory from all processors
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and I/O devices. Each memory controller provides bandwidth of up to 800 MB/s. The aggregate
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peak bandwidth of up to 1.6 GB/s is two to four times that of other systems.
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Dual memory controllers permit up to 4 GB of error checking and correcting (ECC) SDRAM. This
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is the highest system memory capacity available on the market in an Intel-based, dual processor
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capable server.
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In addition, the 1-to-1 interleave memory scheme of the dual memory controllers allows customers
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the option of upgrading memory by one dual in-line memory module (DIMM) at a time, as opposed
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to the four DIMMs required in wider buses with 4-to-1 interleave schemes. Customers can purchase
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only as much memory as is required, making incremental upgrades to suit specific needs.
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The Highly Parallel System Architecture is a standards-based design that permits the use of third-
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party memory. However, Compaq has not tested and does not support third-party memory in its
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servers.
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The Highly Parallel System Architecture also supports symmetric multiprocessing (SMP), although
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the system-level parallelism is independent of the number of processors.
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SMP has been supported on RISC/UNIX servers for a number of years. Many people have not,
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however, associated Microsoft Windows NT and the applications that run on it with SMP.
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Windows NT does support SMP; and users can reap the benefits when running many demanding
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UBSYSTEM
PCI-X Technology: An Evolution of the PCI Bus
EMORY ARCHITECTURE
DVANCED SYMMETRIC MULTIPROCESSING
(cont.)
Highly Parallel System Architecture
.
0166-0899-A
4
multi-threaded: having the
ability to process more
than one transaction at a
time.
ECHNOLOGY BRIEF
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business applications. Transactions and analyses performed in enterprise environments require
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tremendous numbers of calculations. Fortunately, many of these applications are
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otherwise lend themselves well to multiprocessing.
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The Highly Parallel System Architecture provides excellent scalability for increased system
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performance under Windows NT, as well as Novell NetWare and UNIX, supporting the use of
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multiple Intel Pentium II, Pentium III, Pentium II Xeon, or Pentium III Xeon processors to meet the
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widest possible range of customer needs. The processors shar e the processor bus, so instructions
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can be processed simultaneously. Configuration of the Highly Parallel System Architecture varies
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slightly between the Compaq servers that include this architecture. For precise information about
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spe cific server s with this architecture, please visit the Compaq website (www.compaq.com).
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C
ONCLUSION
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As the bandwidth requirements of business-critical applications continue to increase, Compaq has
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taken the lead in developing advanced solutions to meet the needs of enterprise customers. The
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Highly Parallel System Architecture implemented in Compaq servers improves overall system
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performance by delivering increased bandwidth to critical subsystems, including memory and I/O.
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Multiple data paths, large high-speed data buses, and balanced system resources make it the best,
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most cost-effective choice for uncompromising performance with today’s demanding business
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applications.
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Compaq servers with this architecture outperform comparably configured servers that do not use
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this architecture; however, there are several other factors, such as requirements for reliability,
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serviceability and expansion, to be considered when determining which product is best for a given
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application. For more information about specific product offerings, please visit the Compaq
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website at www.compaq.com.
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(cont.)
Highly Parallel System Architecture
multi-threaded
or
0166-0899-A
5
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