HP 8840, 8840W Schematics

A
hexainf@hotmail.com
1 1
B
C
D
E
Compal Confidential
Schematics Document
2 2
INTEL AUBURNDALE with IBEX core logic
Cartier UMA
3 3
LA-4902P
2009-12-07
4 4
A
B
REV:1.0
Security Classification
Issued Date
C
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
D
Title
Size Docume nt Number Re v
Cust om
Date : Sheet o f
Compal Electronics, Inc.
Cover Sheet
LA-4902P
E
1 47Monda y, December 1 4, 2009
0.3
A
Compal Confidential
B
C
Cartier UMA
D
XDP Conn.
Page 4
E
Accelerometer
LIS30 2DLTR
File Name : LA-4902P
1 1
2 2
Express Card 54
EM C 21 13
DP Panel
VGA
Display Port
PCIE X1 + USB X1
Audio Board
Page 4
Page 20
Page 18
Page 19
WWAN Card
PCIE X1
Thermal Sensor
Fan Con trol
Page 24
Page 4
USB2.0
eDP
DP-D
FDI
Intel Ibex Peak M
PCI-E BUS
10/1 00/1000 LAN Intel Hansville GbE
PHY
Page 21
RJ45 CONN
3 3
Page 22
WLAN Card
WLAN + PCIE X1
Page 23
1394 port
Rico R5C835
PCI BUS
Controller
Page 27
Page 27 Audio Board
Smart Card
SD/MMC Slot
LPC BUS
RTC CKT.
Page 12
LE D
Audio Board
Mobile
CPU Dual Core
Socket-rPGA989
37.5mm*37. 5mm
Page 4,5,6,7,8
10 71p i ns
25mm*27mm
Page 12,13,14,15,16,17
ONFI Interface
Braidwood
NAND Flash Card
DMI X4
Page 24
Page 24
Dual Channel
DP-C ; DP-B
USB2.0
Azalia
SATA0
SATA1
DDR3 -SO-DIMM X 2DDR3 1066/1333M Hz 1.5V
BAN K 0, 1, 2, 3
DP X 2(Docking)
USB x2(Docking)
Page 28
Page 28
FingerPrinter VFM451 USBx1
Page 31
USB conn x 3(For I/O) BT Conn USB x 1
USB x1(Camara)
MDC V1.5
Audio CKT
IDT 92HD75
Audio Board
SATA ODD Connector
Page 26
Page 20
Page 25
Page 12
2.5" SATA HDD Connector
Page 12
Page 9,10
Clock Generator IC S9L PRS397
daughte r board
RJ1 1
TPA6047A
AMP & Audio Jack
Page 36
(2) PS/2 In terfaces (2) USB 2.channels (2) SATA Channels (2) Display Port Channels (1) Seria l Port (1) Parall el Port (1) Li ne In
Docking CONN.
(1) Lin e Out
Power OK CKT.
Page 32
4 4
Power On/Off CKT.
Page 25
DC/DC Interface CKT.
Page 33
A
TPM1.2
SLB9635TT
Page 31 page 29
Touch Pad CONN.
TrackPoint CONN.
SPI ROM 8 M B
B
SMSC KBC 1098
Page 25
Page 25
Page 31
Int.KBD
Page 25
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SMSC Super I/O
SMCS47N217N
COM1 LPT ( Docking ) ( Docking )
Page 30 Page 30
2008/09/15 2009/12/31
Page 30
Compal Secret Data
Deciphered Date
D
Title
Size Docume nt Number Re v
Cust om
Date : Sheet o f
(1) RJ45 (10/100/1000) (1) VGA (1) 2 LAN indicator LED's (1) Power Button (1) I2C interface
Compal Electronics, Inc.
Block Diagram
LA-4902P
E
Page 26
CK505
Page 11
Page 25
Audio Board
0.3
2 47Wedn esday, De cember 09, 200 9
A
hexainf@hotmail.com
Voltage Rails
State
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
1 1
( O MEANS ON X MEANS OFF )
+RTCVCC
power plane
O
O
O
O
O
O
+B
+3VL +0.75V
O
O
O
O
O
X
+5VALW
+3VALW
O
O
O
O
X
X X X
+3VM
+1.05VM
O
O
O
O
X
X
+1.5V
O
X X
X
+5VS
+3VS
+1.5VS
+VCCP
+CPU_CORE
+1.05V S
+1.8VS
OO
OO
X
X
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build CONN@ : means ME part.
Install below 45 level BOM structure for ver. 0.1
45@ : means just put it in the BOM of 45 level.
Install below 43 level BOM structure for ver. 0.1
DEBUG@ : means just build when PCIE port 80 CARD function enable.
N10M@ : Install for N10M Graphic controller
1098@ : Install for 1098 KBC controller
Remove before MP
SMBUS Control Table
SOURCE
SMB_EC_CK1 SMB_EC_DA1
SMBCLK SMBDATA
SML0CLK SML0DATA
SML1CLK SML1DATA
SMSC1098
Calpella
Calpella
Calpella
BATT
V
X X X
THERMAL
SODIMM CLK CHIP
XDP G-SENSOR
X
X X
V V
X
X
X X
MINI CARD
X
V V
X
X
X X
DOCK
X
V
X X
SENSOR
NIC
X X X
V
X
X X
V
X
V
X
V
Security Classification
Issued Date
Reserve below BOM structure for ver. 0.1
1091@ : Install for 1091 KBC controller
2008/09/15 2009/12/31
A
Compal Secret Data
Deciphered Date
Title
Size Docume nt Number Re v
Cust om
Date : Sheet o f
Compal Electronics, Inc.
Notes List
LA-4902P
3 47Wedn esday, De cember 09, 200 9
0.3
Layout rule 1 0mil w i:dth trace length < 0.5 ", spa cing 20mil
A A
H_PE CI15
to power; PU to VCCP at power side also
H_PRO CHOT#41
H_THER MTRIP#15
H_CPU RST#
H_PM _SYNC14
H_CP UPWR GD
H_CP UPWR GD15
B B
PM_DRA M_PWRGD14
from power
VTTPWR GOOD32
BUF_PLT_R ST#15
Processor P ullups
H_CAT ERR#
H_PRO CHOT#_D
C C
H_CPU RST#_R
DDR3 Compen sation Signals
SM_RCOMP0
R52 100_0402_1%
SM_RCOMP1
R53 24.9_0402_1%
SM_RCOMP2
R54 130_0402_1%
Layout Note :Please these resistors n ear Processor
1
1 2
1 2
1 2
1 2
TP_SKTOCC#
T1TPC12
H_CAT ERR#
H_P ECI_ISO
R16
1 2
0_0402_5%
H_PRO CHOT#_D
R17
1 2
0_0402_5%
H_THE RMTRIP#_R
R19
1 2
0_0402_5%
R20
1 2
0_0402_5%
R21
1 2
0_0402_5%
SYS_AG ENT_PWR OK
R22
1 2
0_0402_5%
VCCPW RGOOD _0
R24
1 2
0_0402_5%
VDD PWRGO OD_R
R26
1 2
0_0402_5%
H_PW RGD_XDP_RH_PW RGD_XDP
R30
1 2
0_0402_5%
PLT_RST#_R
R31
1 2
1.5K_0402 _5%
R39 49.9_0402_1%
1 2
1 2
R42 68_0402_5%
1 2
R45 68_0402_5%@
1 2
1 2
1 2
COMP3
R220 _0402_1%
COMP2
R520 _0402_1%
COMP1
R74 9.9_0402_1%
COMP0
R94 9.9_0402_1%
H_CPU RST#_R
H_PM _SYNC_ R
12
R33 750_0402_1%
+VCCP
JCPU 1B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
IC,A UB_CFD _rPGA,R 1P0
CON N@
JTAG MAPPING
XDP_TRST#
MISC THERMAL
PWR MANAGEMENT
09/2/5 HP
Close to XDP
1 2
R55 51_0402_5%
REMOTE thermal sensor
D D
REMOTE2+
C4
2200P_0402_ 50V7K
REMOTE2-
1
2
1
C
Q1
2
B
MMBT3904WH_SOT323-3
E
3 1
Layout Note:
place near t he hot test s pot area fo r NB & t op SODI MM.
CLOCKS
DDR3
JTAG & BPM
2
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PM_EXT_TS#[0] PM_EXT_TS#[1]
MISC
2
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
3
PM_EXTTS#0
CLK_C PU_BCLK
A16
CLK_C PU_BCLK#
B16
CLK_CP U_XDP
AR30
CLK_CP U_XDP#
AT30
CLK_EXP
E16
CLK_EXP#
D16
A18 A17
F6
SM_RCOMP0
AL1
SM_RCOMP1
AM1
SM_RCOMP2
AN1
PM_EXTTS#0
AN15
PM_EXTTS#1
AP15
XDP_ PRDY#
AT28
XDP_PREQ#
AP27
XDP_TCK
AN28
TCK
XDP_TMS
AP28
TMS
XDP_TRST#
AT27
XDP_TDI
AT29
TDI
XDP_TDO
AR27
TDO
XDP_TDI_M
AR29
XDP_TDO_M
AP29
XDP_DBRESET #
AN25
XDP_BPM#0
AJ22
XDP_BPM#1
AK22
XDP_BPM#2
AK24
XDP_BPM#3
AJ24
XDP_BPM#4
AJ25
XDP_BPM#5
AH22
XDP_BPM#6
AK23
XDP_BPM#7
AH23
T2 TPC12
1 2
R18 0_0402_5%
+VCCP
09/2/5 HP
CFG1 25
CFG1 35
CFG1 45
CFG1 55
C1
0.1U_0 402_16V4Z
@
R846 1K_0402_5%
1 2
+VCCP
1
2
CLK_C PU_BCLK 15 CLK_C PU_BCLK# 15
CLK_EXP 13 CLK_EXP# 13
CLK_D P 13 CLK_D P# 13
PM_EXTTS#1_R 9,10
10/09 HP
@
PM_PWR BTN#_R
XDP_BPM#0
R1013 0_0402_5% R1010 0_0402_5%@
XDP_BPM#1
R1014 0_0402_5% R1009 0_0402_5%@
XDP_BPM#2
R1015 0_0402_5% R1011 0_0402_5%@ R1016 0_0402_5% R1012 0_0402_5%@
PM_PWR BTN#_R12,14
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
CFG1 75 CFG1 0 5 CFG1 65
H_CP UPWR GD
H_PW RGD_XDP
T110TPC12 T111TPC12
C3
0.1U_0 402_16V4Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PM_EXTTS#1
VDD PWRGO OD_R
09/07/02 HP
from DDR
12
XDP_PREQ# XDP_ PRDY#
R25 1K_0402_5%
1 2
1 2
R27 0_0402_5%
Thermal Sensor EMC2113 with CPU PWM FAN
+3VS
R35 68_0402_5%
1 2
+3VS_THER
1
SI1 NO1 5
09/2/5 HP
2
THERM_ SCI#15
+3VS
H_THER MTRIP#
1 2
R1 10K_0402_5%
1 2
R3 10K_0402_5%
SI1 NO3 0
R14
1.5K_0402_ 1%
1 2
750_0402_1%
1 2
R15
+1.5V
Q88 SSM3K7002F _SC59-3
D
S
13
G
2
R1989 100K_0402_5%@
2
C1035
0.1U_0 402_16V4Z
1
09/07/02 HP
CPU XDP Connector
JP1
1 3 5
XDP_BPM#0_R XDP_BPM#1_R
XDP_BPM#2_R XDP_BPM#3_RXDP_BPM#3
XDP_BPM#4 XDP_BPM#5
XDP_BPM#6 XDP_BPM#7
H_CP UPW RGD_R PM_PWR BTN#_R
XDP_TCK
1 2
C2 2200P_04 02_50V7K
FAN_P WM-R
R1082
1 2
@
1 2
R48 10K_0402_5%
1 2
R51 0_0402_5%
SI1 NO2 5
09/2/5 HP
2008/09/15 2009/12/31
7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
SAMTE_BSH -030-01-L-D-A CON N@
H_THE RMDC
H_TH ERMDA
ADDR _SEL
10K_0402_5%
Add 0ohm a nd 0.1u
Compal Secret Data
4
+VCCP
VCCP_ 1.5VSPW RGD 32
R1133 1K_0402_5%
1 2
GPIO50 from PCH
S3 CPU Pow er Rail Change
GND0 OBSFN_A0 OBSFN_A1 GND2 OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16
U54
1
DN
2
DP
3
VDD
4
PWM_IN
5
ADDR_SEL
6
ALERT#
7
SYS_SHDN#
8
SMDATA
Deciphered Date
4
XDP_TDO
DRAMRST # 9,10
PCH_ DDR_RS T 15
GND1 OBSFN_C0 OBSFN_C1
GND3
OBSDATA_C0 OBSDATA_C1
GND5
OBSDATA_C2 OBSDATA_C3
GND7 OBSFN_D0 OBSFN_D1
GND9
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
DP2/DN3
DN2/DP3
TRIP_SET
SHDN_SEL
GND
PWM
TACH
SMCLK
GND
EMC2113-2-AX_QFN 16_4X4
17
1 2
R10 51_0402_5%
This shall place near XDP
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
CLK_CP U_XDP
40
CLK_CP U_XDP#
42 44
XDP_RST#_R
46
XDP_DBRE SET#_R
48 50
XDP_TDO
52
XDP_TRST#
54
XDP_TDI
56
XDP_TMS
58 60
XDP_RST#_R
REMOTE2+
16
REMOTE2-
15
R38
R43
FAN_PW M_OUT
TACH
2.05K_0402_1%
10K_0402_5%
14
13
12
11
10
9
5
+VCCP
CFG8 5 CFG9 5
CFG0 5 CFG1 5
CFG2 5 CFG3 5
CFG1 1 5
CFG4 5 CFG5 5
CFG6 5 CFG7 5
+VCCP
1K_0402_5%
R28
1 2 1 2
R29 0_0402_5%
@
1 2
R32 0_0402_5%
FAN_P WM-R
09/2/5 HP
R44
10K_0402_5%
@
R9980_04 02_5%
10K_0402_5%
SMB_CLK_S3 9,10, 11,13,26SMB_DATA_S39,10,1 1,13,26
1 2
R47
SI1 NO3
09/3/9 HP
H_CPU RST# XDP_DBRESET #
PLT_RST#
1 2
R910 0_0402_5%
2
C884
0.1U_0 402_16V4Z
1
@
10/16 HP Add
+3VS
+3VS
2
@
C1047
0.1U_0 402_16V4Z
1
+5VS
+3VS
1 2
HP 10/21
R23 1K_0402_5%
1 2
XDP_DBRESET # 12,14
PLT_RST# 1 2,15,21,2 3,25,31
FAN_PW M 29
09/2/5 HP
R997 10K_0402_5%
ACES_85205 -04001
CON N@
1 2 3 4 5 6
JP2
1 2 3 4 G5 G6
DB1 No8 2
SI1 NO3 9
R997 : i nsta ll R44: un inst all
09/4/10 HP
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
Auburndale(1/5)-Thermal/XDP
LA-4902P
5
4 47Wed nesda y, Decem ber 09, 2 009
0.3
1
hexainf@hotmail.com
JCP U1A
DMI_CRX_PTX_N014 DMI_CRX_PTX_N114 DMI_CRX_PTX_N214 DMI_CRX_PTX_N314
DMI_CRX_PTX_P014 DMI_CRX_PTX_P114
A A
DMI_CRX_PTX_P214 DMI_CRX_PTX_P314
DMI_CTX_PRX_N014 DMI_CTX_PRX_N114 DMI_CTX_PRX_N214 DMI_CTX_PRX_N314
DMI_CTX_PRX_P014 DMI_CTX_PRX_P114 DMI_CTX_PRX_P214 DMI_CTX_PRX_P314
FDI_CTX_ PRX_N014 FDI_CTX_ PRX_N114 FDI_CTX_ PRX_N214 FDI_CTX_ PRX_N314 FDI_CTX_ PRX_N414 FDI_CTX_ PRX_N514 FDI_CTX_ PRX_N614 FDI_CTX_ PRX_N714
FDI_CTX_ PRX_P014 FDI_CTX_ PRX_P114 FDI_CTX_ PRX_P214 FDI_CTX_ PRX_P314 FDI_CTX_ PRX_P414 FDI_CTX_ PRX_P514
B B
FDI_CTX_ PRX_P614 FDI_CTX_ PRX_P714
FDI _FSY NC014 FDI _FSY NC114
FDI_ INT14
FDI _LSYN C014 FDI _LSYN C114
FDI_CTX_ PRX_N0 FDI_CTX_ PRX_N1 FDI_CTX_ PRX_N2 FDI_CTX_ PRX_N3 FDI_CTX_ PRX_N4 FDI_CTX_ PRX_N5 FDI_CTX_ PRX_N6 FDI_CTX_ PRX_N7
FDI_CTX_ PRX_P0 FDI_CTX_ PRX_P1 FDI_CTX_ PRX_P2 FDI_CTX_ PRX_P3 FDI_CTX_ PRX_P4 FDI_CTX_ PRX_P5 FDI_CTX_ PRX_P6 FDI_CTX_ PRX_P7
FDI _FSY NC0 FDI _FSY NC1
FDI_ INT
FDI _LSY NC0 FDI _LSY NC1
A24 C23 B22 A21
B24 D23 B23 A22
D24 G24 F23 H23
D25 F24 E23 G23
E22 D21 D19 D18 G21 E19 F21 G18
D22 C21 D20 C18 G22 E20 F20 G19
F17 E17
C17
F18 D17
DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]
DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]
DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]
DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]
FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7]
FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7]
FDI_FSYNC[0] FDI_FSYNC[1]
FDI_INT
FDI_LSYNC[0] FDI_LSYNC[1]
PEG_ICOMPO
PEG_RCOMPO
DMI Intel(R) FDI
PCI EXPRESS -- GRAPHICS
C C
IC,A UB_CFD _rPGA,R1 P0
CON N@
PEG_ICOMPI
PEG_RBIAS
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
B26 A26 B27 A25
K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31
J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30
L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26
L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25
2
EXP_ICOMPI
EXP_RBIAS
C903 0.1U_04 02_10V7K
C904 0.1U_04 02_10V7K
1 2
1 2
R56 49.9_0402_1 %
1 2
R57 750_0402_1%
1 2
DB2: No . 69
MB_C_DP _DATA0_N
MB_C_DP_D ATA0_P
C905 0.1U_0402 _10V7K
C858 0.1U_0402 _10V7K
Layout rule:trace length < 0.5"
MB_DP_AUXN 20
MB_DP_AUXP 20
1 2
1 2
Q65
SSM3K7002F _SC59-3
MB_DP_DAT A0_N 20
MB_DP_DAT A0_P 20
+VCCP
D
S
3
12
R801
7.5K_0402 _1%
13
2
G
12
R800 100K_0402_5%
MB_DP _HPD 20
+V_D DR_CPU_ REF0 +V_D DR_CPU_ REF1
CFG04 CFG14 CFG24 CFG34 CFG44 CFG54 CFG64 CFG74 CFG84 CFG94 CFG1 04 CFG1 14 CFG1 24 CFG1 34 CFG1 44 CFG1 54 CFG1 64 CFG1 74
T21 T PC12
R65
0_0402_5%@
1 2 1 2
0_0402_5%@
R66
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG 10 CFG 11 CFG 12 CFG 13 CFG 14 CFG 15 CFG 16 CFG 17 CFG 18
AP25
AL25 AL24 AL22 AJ33
AM30 AM28 AP31
AL32
AL30 AM31 AN29 AM32 AK32 AK31 AK28
AJ28 AN30 AN32
AJ32
AJ29
AJ30 AK30
AG9 M27 L28
J17 H17 G25 G17 E31 E30
H16
B19 A19
A20 B20
U9 T9
AC9 AB9
C1 A3
J29
J28
A34 A33
C35 B35
4
JCPU 1E
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86
RSVD15 RSVD16
RSVD17 RSVD18
RSVD19 RSVD20
RSVD21 RSVD22
RSVD_NCTF_23 RSVD_NCTF_24
RSVD26 RSVD27
RSVD_NCTF_28 RSVD_NCTF_29
RSVD_NCTF_30 RSVD_NCTF_31
RESERVED
RSVD32 RSVD33
RSVD34 RSVD35
RSVD36
RSVD_NCTF_37
RSVD38 RSVD39
RSVD_NCTF_40 RSVD_NCTF_41
RSVD_NCTF_42 RSVD_NCTF_43
RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52
RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57
RSVD58
RSVD_TP_59 RSVD_TP_60
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75
RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85
5
AJ13 AJ12
AH25 AK26
AL26 AR2
AJ26 AJ27
AP1 AT2
AT3 AR1
AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32
E15 F15 A2
KEY
D15 C15 AJ15 AH15
R60
0_0402_5%
1 2 1 2
0_0402_5%
R61
@
@
09/2/16 HP
AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3
V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9
AP34
VSS
T128TPC12
T129TPC12
6/30 HP
Deciphered Date
4
IC,A UB_CFD _rPGA,R 1P0
CON N@
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
Auburndale(2/5)-DMI/PEG/FDI
LA-4902P
5
5 47Wed nesda y, Decem ber 09, 2 009
0.3
CFG Straps for PROCESSOR
CFG7CFG0
R67 3.01K_0402_ 1%@
1 2
PCI-Express Configurat ion Select
1: Single PEG 0: Bifurcat ion enabled
CFG0
Not applica ble for Cla rksfield Processor
CFG3
CFG3-PCI Ex press Stati c Lane Reversal
CFG3
D D
1
CFG4
CFG4-Displa y Port Presence
CFG4
@
R69 3.01K_0402_ 1%
1 2
1: Normal O peration 0: Lane Num bers Reversed
15 -> 0, 14 ->1, .....
R70 3.01K_0402_ 1%
1 2
1: Disabled ; No Physic al Display Port attached to Embedded D isplay Port
0: Enabled; An externa l Display Port device is c onnected to the Embedded Display Port
2
-240mV for Pre-ES1
R68 3.01K_0402_ 1%
1 2
Only tempor ary for ear ly CFD samp les (rPGA/BGA)
@
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
1
2
3
4
5
AR10 AT10
JCP U1D
W8
SB_CK[0]
W9
SB_CK#[0]
B5
SB_DQ[0]
A5
SB_DQ[1]
C3
SB_DQ[2]
B3
SB_DQ[3]
E4
SB_DQ[4]
A6
SB_DQ[5]
A4
SB_DQ[6]
C4
SB_DQ[7]
D1
SB_DQ[8]
D2
SB_DQ[9]
F2
SB_DQ[10]
F1
SB_DQ[11]
C2
SB_DQ[12]
F5
SB_DQ[13]
F3
SB_DQ[14]
G4
SB_DQ[15]
H6
SB_DQ[16]
G2
SB_DQ[17]
J6
SB_DQ[18]
J3
SB_DQ[19]
G1
SB_DQ[20]
G5
SB_DQ[21]
J2
SB_DQ[22]
J1
SB_DQ[23]
J5
SB_DQ[24]
K2
SB_DQ[25]
L3
SB_DQ[26]
M1
SB_DQ[27]
K5
SB_DQ[28]
K4
SB_DQ[29]
M4
SB_DQ[30]
N5
SB_DQ[31]
AF3
SB_DQ[32]
AG1
SB_DQ[33]
AJ3
SB_DQ[34]
AK1
SB_DQ[35]
AG4
SB_DQ[36]
AG3
SB_DQ[37]
AJ4
SB_DQ[38]
AH4
SB_DQ[39]
AK3
SB_DQ[40]
AK4
SB_DQ[41]
AM6
SB_DQ[42]
AN2
SB_DQ[43]
AK5
SB_DQ[44]
AK2
SB_DQ[45]
AM4
SB_DQ[46]
AM3
SB_DQ[47]
AP3
SB_DQ[48]
AN5
SB_DQ[49]
AT4
SB_DQ[50]
AN6
SB_DQ[51]
AN4
SB_DQ[52]
AN3
SB_DQ[53]
AT5
SB_DQ[54]
AT6
SB_DQ[55]
AN7
SB_DQ[56]
AP6
SB_DQ[57]
AP8
SB_DQ[58]
AT9
SB_DQ[59]
AT7
SB_DQ[60]
AP9
SB_DQ[61] SB_DQ[62] SB_DQ[63]
AB1
SB_BS[0]
W5
SB_BS[1]
R7
SB_BS[2]
AC5
SB_CAS#
Y7
SB_RAS#
AC6
SB_WE#
DDR SYSTEM MEMORY - B
SB_CKE[0]
SB_CK[1] SB_CK#[1] SB_CKE[1]
SB_CS#[0] SB_CS#[1]
SB_ODT[0] SB_ODT[1]
SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
M3
V7 V6 M2
AB8 AD6
AC7 AD1
D4 E1 H3 K1 AH1 AL2 AR4 AT8
D5 F4 J4 L4 AH2 AL4 AR5 AR8
C5 E3 H4 M5 AG2 AL5 AP5 AR7
U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1
DDR_B _DM0 DDR_B _DM1 DDR_B _DM2 DDR_B _DM3 DDR_B _DM4 DDR_B _DM5 DDR_B _DM6 DDR_B _DM7
DDR_B _DQS#0 DDR_B _DQS#1 DDR_B _DQS#2 DDR_B _DQS#3 DDR_B _DQS#4 DDR_B _DQS#5 DDR_B _DQS#6 DDR_B _DQS#7
DDR _B_DQS0 DDR _B_DQS1 DDR _B_DQS2 DDR _B_DQS3 DDR _B_DQS4 DDR _B_DQS5 DDR _B_DQS6 DDR _B_DQS7
DDR_B _MA0 DDR_B _MA1 DDR_B _MA2 DDR_B _MA3 DDR_B _MA4 DDR_B _MA5 DDR_B _MA6 DDR_B _MA7 DDR_B _MA8 DDR_B _MA9 DDR_B _MA10 DDR_B _MA11 DDR_B _MA12 DDR_B _MA13 DDR_B _MA14 DDR_B _MA15
M_CLK _DDR2 10 M_CLK _DDR#2 10 DDR_C KE2_DIMMB 10
M_CLK _DDR3 10 M_CLK _DDR#3 10 DDR_C KE3_DIMMB 10
DDR_C S2_DIMMB# 10 DDR_C S3_DIMMB# 10
M_ODT2 10 M_ODT3 10
DDR _B_DM[ 0..7] 10
DDR _B_DQS #[0..7] 10
DDR _B_DQ S[0..7] 10
DDR _B_MA[0.. 15] 10
JCP U1C
A A
DDR _A_D[0 ..63]9
B B
C C
DDR_A _BS09 DDR_A _BS19 DDR_A _BS29
DDR _A_CAS#9 DDR _A_RAS#9 DDR_A _WE#9
DDR _A_D0 DDR _A_D1 DDR _A_D2 DDR _A_D3 DDR _A_D4 DDR _A_D5 DDR _A_D6 DDR _A_D7 DDR _A_D8 DDR _A_D9 DDR _A_D10 DDR _A_D11 DDR _A_D12 DDR _A_D13 DDR _A_D14 DDR _A_D15 DDR _A_D16 DDR _A_D17 DDR _A_D18 DDR _A_D19 DDR _A_D20 DDR _A_D21 DDR _A_D22 DDR _A_D23 DDR _A_D24 DDR _A_D25 DDR _A_D26 DDR _A_D27 DDR _A_D28 DDR _A_D29 DDR _A_D30 DDR _A_D31 DDR _A_D32 DDR _A_D33 DDR _A_D34 DDR _A_D35 DDR _A_D36 DDR _A_D37 DDR _A_D38 DDR _A_D39 DDR _A_D40 DDR _A_D41 DDR _A_D42 DDR _A_D43 DDR _A_D44 DDR _A_D45 DDR _A_D46 DDR _A_D47 DDR _A_D48 DDR _A_D49 DDR _A_D50 DDR _A_D51 DDR _A_D52 DDR _A_D53 DDR _A_D54 DDR _A_D55 DDR _A_D56 DDR _A_D57 DDR _A_D58 DDR _A_D59 DDR _A_D60 DDR _A_D61 DDR _A_D62 DDR _A_D63
AJ10
AL10 AK12
AK11
AM10 AR11
AL11
AT11 AP12 AM12 AN12 AM13
AT14
AT12
AL13 AR14 AP14
A10
SA_DQ[0]
C10
SA_DQ[1]
C7
SA_DQ[2]
A7
SA_DQ[3]
B10
SA_DQ[4]
D10
SA_DQ[5]
E10
SA_DQ[6]
A8
SA_DQ[7]
D8
SA_DQ[8]
F10
SA_DQ[9]
E6
SA_DQ[10]
F7
SA_DQ[11]
E9
SA_DQ[12]
B7
SA_DQ[13]
E7
SA_DQ[14]
C6
SA_DQ[15]
H10
SA_DQ[16]
G8
SA_DQ[17]
K7
SA_DQ[18]
J8
SA_DQ[19]
G7
SA_DQ[20]
G10
SA_DQ[21]
J7
SA_DQ[22]
J10
SA_DQ[23]
L7
SA_DQ[24]
M6
SA_DQ[25]
M8
SA_DQ[26]
L9
SA_DQ[27]
L6
SA_DQ[28]
K8
SA_DQ[29]
N8
SA_DQ[30]
P9
SA_DQ[31]
AH5
SA_DQ[32]
AF5
SA_DQ[33]
AK6
SA_DQ[34]
AK7
SA_DQ[35]
AF6
SA_DQ[36]
AG5
SA_DQ[37]
AJ7
SA_DQ[38]
AJ6
SA_DQ[39] SA_DQ[40]
AJ9
SA_DQ[41] SA_DQ[42] SA_DQ[43]
AK8
SA_DQ[44]
AL7
SA_DQ[45] SA_DQ[46]
AL8
SA_DQ[47]
AN8
SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51]
AM9
SA_DQ[52]
AN9
SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
AC3
SA_BS[0]
AB2
SA_BS[1]
U7
SA_BS[2]
AE1
SA_CAS#
AB3
SA_RAS#
AE9
SA_WE#
DDR SYSTEM MEMORY A
SA_CK[0] SA_CK#[0] SA_CKE[0]
SA_CK[1] SA_CK#[1] SA_CKE[1]
SA_CS#[0] SA_CS#[1]
SA_ODT[0] SA_ODT[1]
SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AA6 AA7 P7
Y6 Y5 P6
AE2 AE8
AD8 AF9
B9 D7 H7 M7 AG6 AM7 AN10 AN13
C9 F8 J9 N9 AH7 AK9 AP11 AT13
C8 F9 H9 M9 AH8 AK10 AN11 AR13
Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9
DDR_A _DM0 DDR_A _DM1 DDR_A _DM2 DDR_A _DM3 DDR_A _DM4 DDR_A _DM5 DDR_A _DM6 DDR_A _DM7
DDR_A _DQS#0 DDR_A _DQS#1 DDR_A _DQS#2 DDR_A _DQS#3 DDR_A _DQS#4 DDR_A _DQS#5 DDR_A _DQS#6 DDR_A _DQS#7
DDR _A_DQS0 DDR _A_DQS1 DDR _A_DQS2 DDR _A_DQS3 DDR _A_DQS4 DDR _A_DQS5 DDR _A_DQS6 DDR _A_DQS7
DDR_A _MA0 DDR_A _MA1 DDR_A _MA2 DDR_A _MA3 DDR_A _MA4 DDR_A _MA5 DDR_A _MA6 DDR_A _MA7 DDR_A _MA8 DDR_A _MA9 DDR_A _MA10 DDR_A _MA11 DDR_A _MA12 DDR_A _MA13 DDR_A _MA14 DDR_A _MA15
M_CLK _DDR0 9 M_CLK _DDR#0 9 DDR_C KE0_DIMMA 9
M_CLK _DDR1 9 M_CLK _DDR#1 9 DDR_C KE1_DIMMA 9
DDR_C S0_DIMMA# 9 DDR_C S1_DIMMA# 9
M_ODT0 9 M_ODT1 9
DDR _A_DM[ 0..7] 9
DDR _A_DQS #[0..7] 9
DDR _A_DQ S[0..7] 9
DDR _A_MA[0.. 15] 9
DDR _B_D[0 ..63]10
DDR_B _BS010 DDR_B _BS110 DDR_B _BS210
DDR_ B_CAS#10 DDR_ B_RAS#10 DDR_B _WE#10
DDR _B_D0 DDR _B_D1 DDR _B_D2 DDR _B_D3 DDR _B_D4 DDR _B_D5 DDR _B_D6 DDR _B_D7 DDR _B_D8 DDR _B_D9 DDR _B_D10 DDR _B_D11 DDR _B_D12 DDR _B_D13 DDR _B_D14 DDR _B_D15 DDR _B_D16 DDR _B_D17 DDR _B_D18 DDR _B_D19 DDR _B_D20 DDR _B_D21 DDR _B_D22 DDR _B_D23 DDR _B_D24 DDR _B_D25 DDR _B_D26 DDR _B_D27 DDR _B_D28 DDR _B_D29 DDR _B_D30 DDR _B_D31 DDR _B_D32 DDR _B_D33 DDR _B_D34 DDR _B_D35 DDR _B_D36 DDR _B_D37 DDR _B_D38 DDR _B_D39 DDR _B_D40 DDR _B_D41 DDR _B_D42 DDR _B_D43 DDR _B_D44 DDR _B_D45 DDR _B_D46 DDR _B_D47 DDR _B_D48 DDR _B_D49 DDR _B_D50 DDR _B_D51 DDR _B_D52 DDR _B_D53 DDR _B_D54 DDR _B_D55 DDR _B_D56 DDR _B_D57 DDR _B_D58 DDR _B_D59 DDR _B_D60 DDR _B_D61 DDR _B_D62 DDR _B_D63
IC,A UB_CFD _rPGA,R1 P0
CON N@
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
IC,A UB_CFD _rPGA,R1 P0
CON N@
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
Title
Size Docum ent Num ber R ev
Cus tom
4
Dat e: Sheet o f
Compal Electronics, Inc.
Auburndale(3/5)-DDR3
LA-4902P
5
6 47Wed nesda y, Decem ber 09, 2 009
0.3
1
hexainf@hotmail.com
+CPU _CORE
JCP U1F
A A
B B
C C
D D
48A 15A18A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
IC,A UB_CFD _rPGA,R1 P0
CON N@
CPU CORE SUPPLY
1
POWER
SENSE LINES
1.1V RAIL POWER
PROC_DPRSLPVR
CPU VIDS
VSS_SENSE_VTT
VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8
VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32
VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VTT_SELECT
ISENSE
VCC_SENSE VSS_SENSE
VTT_SENSE
PSI#
AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15
AN33
AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34
G15
10U_0805_6 .3V6M
1
2
H_VI D0 H_VI D1 H_VI D2 H_VI D3 H_VI D4 H_VI D5 H_VI D6 PM_DP RSLPVR_R
C66
H_VTTVID1 = Low, 1.1V
H_VTTVID1 = High, 1.05V
AN35
R75 0_0402_5%
1 2
AJ34 AJ35
1 2
R76 0_0402_5%
B15 A15
Close to CPU
VCCS ENSE
VSSSENS E
10U_0805_6 .3V6M
C58
1
1
2
2
22U_0805_6 .3V6M
C45
1
1
2
2
+VCCP
22U_0805_6 .3V6M
C67
1
2
PSI# 41
H_VI D[0.. 6] 41
1 2
R74 0_0402_5%
H_VTTVID 1 38
IMVP_IMON 41
VCCS ENSE VSSSENS E
VTT_SENSE 38 VSS_SENSE_VTT 38
1 2
R77 100_0402_1%
1 2
R78 100_0402_1%
2
+VCCP
10U_0805_6 .3V6M
10U_0805_6 .3V6M
C39
C40
1
2
10U_0805_6 .3V6M
22U_0805_6 .3V6M
C57
C49
1
2
+CPU _CORE
C59
1
@
2
47P_0402_5 0V8J
47P_0402_5 0V8J
C61
C60
1
@
@
2
11/6 add to follow des ign guide.
CPU
PROC _DPRSLP VR 41
VCCS ENSE 41 VSSSENS E 41
+CPU _CORE
2
3
+GFX_CORE
10U_0805_6 .3V6M
10U_0805_6 .3V6M
C879
C878
1
1
2
2
1
1
+
+
C974
C973
2
2
330U_X_2VM_R6M
47P_0402_5 0V8J
47P_0402_5 0V8J
C62
1
1
@
2
2
10U_0805_6 .3V6M
1
2
10U_0805_6 .3V6M
1
2
SI1 NO3 6
C972
330U_X_2VM_R6M
+VCCP
C72
1
2
10U_0805_6 .3V6M
C881
C880
1
2
1
+
2
330U_X_2VM_R6M
+VCCP
1
2
22U_0805_6 .3V6M
C73
10U_0805_6 .3V6M
C75
JCPU 1G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
IC,A UB_CFD _rPGA,R 1P0
CON N@
GRAPHICS
FDI PEG & DMI
+1.5V to +1.5V_CPU_VDDQ Transfer
SI7326DN- T1-E3_PAK1212-8
Q89
0.1U_04 02_10V6K
C1023
1
R1984
1 2
0_0402_5%
2
RUN ON
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
+1.5V_ CPU_VDD Q+1.5V
1 2 35
0.1U_04 02_10V6K
C1024
4
1
2
RUNON 33
Compal Secret Data
4
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
GRAP HIC S VI Ds
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
4
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18
DDR3 - 1.5V RAILS
VTT0_59 VTT0_60 VTT0_61 VTT0_62
VTT1_63 VTT1_64 VTT1_65
1.1V1.8V
VTT1_66 VTT1_67 VTT1_68
VCCPLL1 VCCPLL2 VCCPLL3
C1020
1 2
0.1U_04 02_10V6K
C1021
1 2
0.1U_04 02_10V6K
C1022
1 2
0.1U_04 02_10V6K
C1025
1 2
0.1U_04 02_10V6K
3A
POWER
0.6A
Stich CAP b etween 1.5V and 1.5V-CPU_VDDQ
Deciphered Date
AR22 AT22
AM22 AP22 AN22 AP23 AM23 AP24 AN24
AR25 AT25 AM24
AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
P10 N10 L10 K10
J22 J20 J18 H21 H20 H19
L26 L27 M26
1
2
1
@
+
2
1U_060 3_10V4Z
C78
1
2
+1.5V_ CPU_VDD Q+1.5V
5
VCC_AXG_S ENSE 43 VSS_AXG_SENSE 43
GFXVR_ VID_0 43 GFXVR_ VID_1 43 GFXVR_ VID_2 43 GFXVR_ VID_3 43 GFXVR_ VID_4 43 GFXVR_ VID_5 43 GFXVR_ VID_6 43
GFXVR_EN 43 GFXVR _DPRSLPVR 43 GFXVR_IMO N 43
1U_060 3_10V4Z
1U_060 3_10V4Z
C51
C50
1
2
10U_0805_6. 3V6M
330U_D 2_2VY_R7M
C63
C64
1
2
1U_060 3_10V4Z
C79
1
1
2
2
SLP_S333
1U_060 3_10V4Z
1
2
10U_0805_6. 3V6M
1
2
22U_0805_6 .3V6M
1
2
22U_0805_6 .3V6M
1
2
2.2U_0 603_6.3V4Z C80
+1.5V_ CPU_VDD Q
1U_060 3_10V4Z
C52
C53
1
2
C65
+VCCP
10U_0805_6 .3V6M
C71
C70
1
2
+VCCP
22U_0805_6 .3V6M
C77
C76
1
2
+1.8VS
10U_0805_6 .3V6M
C81
1
1
2
2
+1.5V_ CPU_VDD Q
SLP_S3
11/10 for Auburndal e pre-ES1
GFXVR_E N
1U_060 3_10V4Z
C54
1
2
4.7U_0 603_6.3V6K C82
R1135 220_0402_1%
1 2
13
D
Q90
2
SSM3K7002F _SC59-3
G
S
R967
4.7K_0402 _5%
1 2
7/2/2009 HP
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
Auburndale(4/5)-PWR
LA-4902P
5
06/30HP
0.3
7 47Wed nesda y, Decem ber 09, 2 009
1
JCP U1H
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
A A
B B
C C
D D
VSS8
AR17
VSS9
AR15
VSS10
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
IC,A UB_CFD _rPGA,R1 P0
CON N@
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30
2
JCP U1I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
IC,A UB_CFD _rPGA,R1 P0
CON N@
VSS
3
+CPU _CORE
10U_0805_6 .3V6M
22U_0805_6 .3V6M
C83
1
2
1
2
C84
1
2
@
10U_0805_6 .3V6M
22U_0805_6 .3V6M
C993
C96
1
2
10U_0805_6. 3V6M
C85
1
2
22U_0805_6 .3V6M
10U_0805_6 .3V6M
C113
C111
1
1
2
2
@
22U_0805_6 .3V6M
22U_0805_6 .3V6M
C97
1
2
1
2
C98
1
2
10U_0805_6. 3V6M
22U_0805_6. 3V6M
C112
C86
1
2
@
CPU CORE
10U_0805_6 .3V6M
C116
1
1
2
2
@
22U_0805_6 .3V6M
C99
1
1
2
2
10U_0805_6. 3V6M
C114
1
1
2
2
22U_0805_6 .3V6M
C88
22U_0805_6 .3V6M
C100
22U_0805_6. 3V6M
C115
@
Under cavity
SI1 NO3 0
VSS_N CTF1_R
AT35
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7
NCTF
AT1 AR34 B34 B2 B1 A35
VSS_N CTF2_R VSS_N CTF3_R VSS_N CTF4_R VSS_N CTF5_R VSS_N CTF6_R VSS_N CTF7_R
T98 TPC12 T99 TPC12 T100 TPC12
22U_0805_6 .3V6M
1
2
@
10U_0805_6 .3V6M
1
2
22U_0805_6 .3V6M
22U_0805_6 .3V6M
C989
C93
C987
1
1
2
C991
1
2
1
2
2
@
@
10U_0805_6 .3V6M
10U_0805_6 .3V6M
C992
C95
1
1
2
2
4
10U_0805_6 .3V6M
22U_0805_6 .3V6M
C90
C89
1
1
2
2
@
22U_0805_6 .3V6M
22U_0805_6 .3V6M
C101
1
2
1
2
@
C102
1
2
10U_0805_6. 3V6M
C87
22U_0805_6 .3V6M
C990
10U_0805_6 .3V6M
C104
22U_0805_6 .3V6M
1
2
10U_0805_6 .3V6M
1
2
330U_X_2VM_R6M
1
+
2
22U_0805_6 .3V6M
C91
1
2
22U_0805_6 .3V6M
C994
C103
1
2
330U_X_2VM_R6M
C105
1
+
2
VSS_N CTF2_R
VSS_N CTF1_R
VSS_N CTF6_R
0.1U_0 402_16V4Z
VSS_N CTF7_R
10U_0805_6 .3V6M
22U_0805_6 .3V6M
C92
C988
1
2
C94
1
2
Inside cavity
05/ 20 chan ge MLCC par t r efer enc es fo r powe r t eam requ est
10u F: C10 3 C 993 C94 C97 C1 16 C 11
、、、、 、、、、 、、、、
C89 C98 C9 9 C1 00
、、、、 、、、、 、、、、
C10 2 C 91 C 84 C96
、、、、 、、、、 、、、、
C11 1
、、、、
C88
22uF : t he o ther s
between Inductor and socket
330U_X_2VM_R6M
330U_X_2VM_R6M
C106
1
+
2
R79
100K_0402_5%
R80
100K_0402_5%
R81
100K_0402_5%
R82
100K_0402_5%
C107
+3VS
12
+3VS
12
+3VS
12
2
1
+3VS
12
470U_D 2_2VM_R4.5M
1
+
2
C1048
C108
@
2
5
2
5
470U_D 2_2VM_R4.5M
C109
1
2
61
34
61
34
C110
1
+
+
@
2
05/ 20 chan ge C105 ~ C 108 to SGA 00001 Q80
Q2A 2N7002DW H_SOT363-6
CRACK _BGA
Q2B 2N7002DW H_SOT363-6
CRACK _BGA
Q3A 2N7002DW H_SOT363-6
CRACK _BGA
Q3B 2N7002DW H_SOT363-6
@
、、、、
22U_0805_6. 3V6M
C117
1
1
2
2
5
BC99 4 C9 88 C 92
、、、、 、、、、
3 C9 0
、、、、
C101
、、、、
BC83
22U_0805_6. 3V6M
22U_0805_6. 3V6M
CRACK _BGA 17 ,29
10U_0805_6. 3V6M
C119
C118
C120
1
1
2
2
@
BGA Ball Cracking Prevention and Detection
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
Auburndale(5/5)-GND/Bypass
LA-4902P
5
8 47Wed nesda y, Decem ber 09, 2 009
0.3
+3VS
hexainf@hotmail.com
1
+1.5V +1.5V
DDR3 SO-DIMM A
3 A
3 A @1 . 5 V
@ 1 . 5 V
3 A3 A
@ 1 . 5 V@ 1 . 5 V
JDIMA 1
CON N@
VREF_DQ1VSS1
0.1U_0 402_16V4Z
2.2U_0 805_16V4Z
C121
1
1
2
2
1
2
DDR _A_D0
C122
DDR _A_D1
DDR_A _DM0
DDR _A_D2 DDR _A_D3
DDR _A_D8 DDR _A_D9
DDR_A _DQS#1 DDR _A_DQS1
DDR _A_D10 DDR _A_D11
DDR _A_D16 DDR _A_D17
DDR_A _DQS#2 DDR _A_DQS2
DDR _A_D18 DDR _A_D19
DDR _A_D24 DDR _A_D25
DDR_A _DM3
DDR _A_D26 DDR _A_D27
DDR_C KE0_DIMM A
DDR_A _BS2
DDR_A _MA12 DDR_A _MA9
DDR_A_ MA8 DDR_A _MA5
DDR_A _MA3 DDR_A _MA1
M_CLK _DDR0 M_CLK _DDR#0
DDR_A _MA10 DDR_A _BS0
DDR_A _WE# DDR _A_CAS# M_ODT0
DDR_A _MA13 DDR_C S1_DIMMA #
DDR _A_D32 DDR _A_D33
DDR_A _DQS#4 DDR _A_DQS4
DDR _A_D34 DDR _A_D35
DDR _A_D40 DDR _A_D41
DDR_A _DM5
DDR _A_D42 DDR _A_D43
DDR _A_D48 DDR _A_D49
DDR_A _DQS#6 DDR _A_DQS6
DDR _A_D50 DDR _A_D51
DDR _A_D56 DDR _A_D57
DDR_A _DM7
DDR _A_D58 DDR _A_D59
R87
1 2
10K_0402_5%
0.1U_0 402_16V4Z
2.2U_040 2_6.3V6M C144
C143
1
2
3
VSS2
5
DQ0
7
DQ1 VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9 VSS925VSS10
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2 DQS247VSS17
49
VSS18
51
DQ18 DQ1953VSS19
55
VSS20
57
DQ24 DQ2559VSS21 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3 A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1 VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
10K_0402_5%
R88
12
VTT1
205
G1
FOX_AS0A 626-U2RN-7F
DQ4 DQ5
VSS3
DQS0
VSS6
DQ6
DQ7 VSS8 DQ12 DQ13
DM1
DQ14 DQ15
DQ20 DQ21
DM2
DQ22 DQ23
DQ28 DQ29
DQS3
DQ30 DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35 DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47 DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA
VTT2
A15 A14
A7
A6 A4
A2 A0
CK1
BA1
S0#
SCL
G2
SI1: No 44
+V_DD R_REF_D IMMA_DQ
A A
B B
C C
D D
09/2/16 HP
DDR_C KE0_DIMMA6
DDR_A _BS26
M_CLK _DDR06 M_CLK _DDR#06
DDR_A _BS06
DDR_A _WE#6 DDR _A_CAS#6
DDR_C S1_DIMMA#6
Reserved
TOP
1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
2
DDR _A_D4 DDR _A_D5
DDR_A _DQS#0 DDR _A_DQS0
DDR _A_D6 DDR _A_D7
DDR _A_D12 DDR _A_D13
DDR_A _DM1 DRAMRST #
DDR _A_D14 DDR _A_D15
DDR _A_D20 DDR _A_D21
DDR_A _DM2
DDR _A_D22 DDR _A_D23
DDR _A_D28 DDR _A_D29
DDR_A _DQS#3 DDR _A_DQS3
DDR _A_D30 DDR _A_D31
DDR_C KE1_DIMM A
DDR_A _MA15 DDR_A _MA14
DDR_A_ MA11 DDR_A _MA7
DDR_A_ MA6 DDR_A _MA4
DDR_A _MA2 DDR_A _MA0
M_CLK _DDR1 M_CLK _DDR#1
DDR_A _BS1 DDR _A_RAS#
DDR_C S0_DIMMA #
M_ODT1
DDR _A_D36 DDR _A_D37
DDR_A _DM4
DDR _A_D38 DDR _A_D39
DDR _A_D44 DDR _A_D45
DDR_A _DQS#5 DDR _A_DQS5
DDR _A_D46 DDR _A_D47
DDR _A_D52 DDR _A_D53
DDR_A _DM6
DDR _A_D54 DDR _A_D55
DDR _A_D60 DDR _A_D61
DDR_A _DQS#7 DDR _A_DQS7
DDR _A_D62 DDR _A_D63
PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3
+0.75V
2
+0.75VS
0 . 6 5 A @ 0
0 . 6 5 A @ 0 .7 5 V
. 75 V
0 . 6 5 A @ 00 . 6 5 A @ 0
. 75 V. 75 V
DDR _A_D[0 ..63]6
DDR _A_DM[ 0..7]6
DDR _A_DQ S[0..7]6
DDR _A_DQS #[0..7]6
DDR _A_MA[0.. 15]6
DRAMRST # 4,10
DDR_C KE1_DIMMA 6
M_CLK _DDR1 6 M_CLK _DDR#1 6
DDR_A _BS1 6 DDR _A_RAS# 6
DDR_C S0_DIMMA# 6 M_ODT0 6
M_ODT1 6
0.1U_0 402_16V4Z
C141
1
1
2
2
SMB_DATA_S3 SMB_CLK_S3
2.2U_0 805_16V4Z
C142
SI1: No 44
+V_DD R_REF_D IMMA_CA
JP20
3
3
2
2
1
1
ACES_85204 -03001
CON N@
For ME/AMT debug
PM_EXTTS#1_R 4,10 SMB_DATA_S3 4,10,11 ,13,26
SMB_CLK_S3 4,10,1 1,13,26
3
+1.5V
12
R83 1K_0402_1%
R84 1K_0402_1%
SI1: No 21 SI1: No 27
5
G2
4
G1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
09/4/10 HP
Layo ut N ote: Pla ce n ea r D IMMA
10U_0603_6 .3V6M
1
2
+V_DD R_REF_D IMMA_DQ
SI1: No 44
09/4/27 HP
+1.5V
10U_0603_6 .3V6M
10U_0603_6 .3V6M
C127
C126
1
1
2
2
2008/09/15 2009/12/31
R1100 1K_0402_1%
R1101 1K_0402_1%
10U_0603_6 .3V6M
10U_0603_6 .3V6M
C129
C128
1
2
C130
1
2
Compal Secret Data
4
+1.5V
12
+V_DD R_REF_D IMMA_CA
12
10U_0603_6 .3V6M
C131
1
1
2
2
Deciphered Date
4
5
Layo ut N ote: Sha red bet ween t he tw o SO-D IMMs. Pla ce two cap aci tors clo se to the VR and o ne be twe en the two SOD IMM s
Layo ut N ote: Pla ce n ea r D IMMA
SI1: No 48
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
C132
C133
1
@
@
2
09/4/28 HP
SI2 NO9
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
C134
C135
1
@
2
1
1
+
@
2
2
+0.75VS
330U_D 2_2VY_R7M
C123
C136
1
2
Title
Size Docum ent Num ber R ev
Cus tom
LA-4902P
Dat e: Sheet
C138
C137
1U_0402 _6.3V6K
C139
1U_0402 _6.3V6K
C140
10U_0603_6 .3V6M
1U_0402 _6.3V6K
1
1
2
2
1U_0402 _6.3V6K
1
2
C124
1
1
2
2
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
5
9 47Wed nesda y, Decem ber 09, 2 009
10U_0603_6 .3V6M
of
C125
10U_0603_6 .3V6M
1
2
0.3
1
2
3
4
5
SI1: No 44
+V_DD R_REF_D IMMB_DQ
2.2U_0 805_16V4Z
0.1U_0 402_16V4Z
1
+3VS
C145
2
DDR_C KE2_DIMMB6
DDR_B _BS26
M_CLK _DDR26 M_CLK _DDR#26
DDR_B _BS06
DDR_B _WE#6 DDR_ B_CAS#6
DDR_C S3_DIMMB#6
2.2U_04 02_6.3V6M
1
2
1
A A
B B
C C
D D
09/2/16 HP
+VREF _DQ_DIMMB
DDR _B_D0 DDR _B_D1
1
C146
DDR_B _DM0
2
DDR _B_D2 DDR _B_D3
DDR _B_D8 DDR _B_D9
DDR_B _DQS#1 DDR _B_DQS1
DDR _B_D10 DDR _B_D11
DDR _B_D16 DDR _B_D17
DDR_B _DQS#2 DDR _B_DQS2
DDR _B_D18 DDR _B_D19
DDR _B_D24 DDR _B_D25
DDR_B _DM3
DDR _B_D26 DDR _B_D27
DDR_C KE2_DIMM B
DDR_B _BS2
DDR_B _MA12 DDR_B _MA9
DDR_B_ MA8 DDR_B _MA5
DDR_B _MA3 DDR_B _MA1
M_CLK _DDR2 M_CLK _DDR#2
DDR_B _MA10 DDR_B _BS0
DDR_B _WE# DDR _B_CAS# M_ODT2
DDR_B _MA13 DDR_C S3_DIMMB #
DDR _B_D32 DDR _B_D33
DDR_B _DQS#4 DDR _B_DQS4
DDR _B_D34 DDR _B_D35
DDR _B_D40 DDR _B_D41
DDR_B _DM5
DDR _B_D42 DDR _B_D43
DDR _B_D48 DDR _B_D49
DDR_B _DQS#6 DDR _B_DQS6
DDR _B_D50 DDR _B_D51
DDR _B_D56 DDR _B_D57
DDR_B _DM7
DDR _B_D58 DDR _B_D59
1 2
10K_0402_5%
0.1U_0 402_16V4Z
C165
C166
1
2
+1.5V +1.5V
DDR3 SO-DIMM B
3 A
3 A @1 . 5 V
@ 1 . 5 V
3 A3 A
@ 1 . 5 V@ 1 . 5 V
JDIMB 1 CON N@
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1 VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9 VSS925VSS10
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2 DQS247VSS17
49
VSS18
51
DQ18 DQ1953VSS19
55
VSS20
57
DQ24 DQ2559VSS21 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1 VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
R91
1 2
R92 10K_0402 _5%
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
+0.75V
BOT
VSS3
DQS0
VSS6
VSS8 DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQS3
DQ30 DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
VSS31
DQ38 DQ39
VSS33
DQ44
DQ45 VSS35 DQS#5
DQS5
VSS38
DQ46
DQ47 VSS40
DQ52
DQ53 VSS42
VSS43
DQ54
DQ55 VSS45
DQ60
DQ61 VSS47 DQS#7
DQS7
VSS50
DQ62
DQ63 VSS52
EVENT#
VTT2
DDR _B_DQS #[0..7]6
DDR _B_D[0 ..63]6
2.2U_0 805_16V4Z
C160
1
2
DDR _B_DM[ 0..7]6
DDR _B_DQS [0..7]6
DDR_ B_MA[0.. 15]6
SI1: No 44
+V_DD R_REF_D IMMB_CA
3
Layo ut N ote: Pla ce n ea r D IMMB
10U_0603_6 .3V6M
C149
1
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/09/15 2009/12/31
2
DDR _B_D4
4
DQ4 DQ5
DQ6 DQ7
DM1
DM2
A15 A14
A11
A7
A6 A4
A2 A0
CK1
BA1
S0#
NC2
DM4
DM6
SDA SCL
G2
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
2
DDR _B_D5
DDR_B _DQS#0 DDR _B_DQS0
DDR _B_D6 DDR _B_D7
DDR _B_D12 DDR _B_D13
DDR_B _DM1 DRAMRST #
DDR _B_D14 DDR _B_D15
DDR _B_D20 DDR _B_D21
DDR_B _DM2
DDR _B_D22 DDR _B_D23
DDR _B_D28 DDR _B_D29
DDR_B _DQS#3 DDR _B_DQS3
DDR _B_D30 DDR _B_D31
DDR_C KE3_DIMM B
DDR_B _MA15 DDR_B _MA14
DDR_B_ MA11 DDR_B _MA7
DDR_B_ MA6 DDR_B _MA4
DDR_B _MA2 DDR_B _MA0
M_CLK _DDR3 M_CLK _DDR#3
DDR_B _BS1 DDR _B_RAS#
DDR_C S2_DIMMB #
M_ODT3
+VREF _CA
DDR _B_D36 DDR _B_D37
DDR_B _DM4
DDR _B_D38 DDR _B_D39
DDR _B_D44 DDR _B_D45
DDR_B _DQS#5 DDR _B_DQS5
DDR _B_D46 DDR _B_D47
DDR _B_D52 DDR _B_D53
DDR_B _DM6
DDR _B_D54 DDR _B_D55
DDR _B_D60 DDR _B_D61
DDR_B _DQS#7 DDR _B_DQS7
DDR _B_D62 DDR _B_D63
PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3
0 . 6 5 A @ 0
0 . 6 5 A @ 0 .7 5 V
. 75 V
0 . 6 5 A @ 00 . 6 5 A @ 0
. 75 V. 75 V
DRAMRST # 4,9
DDR_C KE3_DIMMB 6
M_CLK _DDR3 6 M_CLK _DDR#3 6
DDR_B _BS1 6 DDR _B_RAS# 6
DDR_C S2_DIMMB# 6 M_ODT2 6
M_ODT3 6
0.1U_0 402_16V4Z
C159
1
2
PM_EXTTS#1_R 4,9 SMB_DATA_S3 4,9,11 ,13,26
SMB_CLK_S3 4,9,1 1,13,26
+0.75VS
+1.5V
1
2
R1102 1K_0402_1%
R1103 1K_0402_1%
10U_0603_6 .3V6M
C150
+1.5V
12
+V_DD R_REF_D IMMB_DQ
12
SI1: No 44
09/4/27 HP
10U_0603_6 .3V6M
10U_0603_6 .3V6M
C152
C151
1
1
2
2
Compal Secret Data
Deciphered Date
10U_0603_6 .3V6M
10U_0603_6 .3V6M
C154
C153
1
1
2
2
4
R1104 1K_0402_1%
R1105 1K_0402_1%
0.1U_0 402_16V4Z C155
1
@
2
+1.5V
12
+V_DD R_REF_D IMMB_CA
12
SI1: No 48
0.1U_0 402_16V4Z C156
1
1
@
2
2
Layo ut N ote: Pla ce n ea r D IMM
09/4/28 HP
+0.75VS
0.1U_0 402_16V4Z C157
1
@
2
C977
C158
1
+
@
2
Title
Size Docum ent Num ber R ev
Dat e: Sheet
330U_D 2_2VY_R7M
0.1U_0 402_16V4Z
1U_040 2_6.3V6K
1U_040 2_6.3V6K
1U_040 2_6.3V6K
C161
C162
1
2
C163
1
1
2
2
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
LA-4902P
5
1U_040 2_6.3V6K
C164
1
2
0.3
of
10 47Wedn esday, Decembe r 09, 20 09
1
hexainf@hotmail.com
A A
2
3
3VS_1.5V S
4
5
VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
VDD_CPU
CPU_0T CPU_0C
VSS_CPU
CPU_1T CPU_1C
VDD_CPU_IO
VDD_SRC
TGND
+3VS_CK505 + 1.05VS_CK505+3VS_CK505 +1.05VS_ CK505
32
SCL
31
SDA
30 29 28 27 26 25
24 23 22 21 20 19 18 17
33
SMB_CLK_S3 SMB_DATA_S3 REF_ 0/CPU_S EL
CLK_XTAL_IN CLK_XTAL_OUT
CK_P WRGD
R_CLK _BUF_BC LK CLK_BU F_BCLK R_CLK _BUF_BC LK# CLK_B UF_BCLK#
R94 33_0402_5%
1 2
R101 0_0402_5%
1 2
R103 0_0402_5%
1 2
1
C885 10P_0402_5 0V8J
2
CLK_1 4M_PCH
@
SMB_CLK_S3 4,9,1 0,13,26 SMB_DATA_S3 4,9,10 ,13,26 CLK_14 M_PCH 13
CLK_B UF_BCLK 13 CLK_B UF_BCLK# 13
U2
1
VDD_DOT
2
CLK_B UF_DOT9613 CLK_B UF_DOT96#13
CLK_ BUF_CKS SCD13 CLK_ BUF_CKSS CD#13
CLK_D MI13 CLK_D MI#13
B B
CLK_B UF_DOT96 CLK_B UF_DOT96#
CLK _BUF_CK SSCD CLK_ BUF_CKS SCD#
CLK_D MI CLK_D MI#
R93 0_0402_5%
1 2
R95 0_0402_5%
1 2
R98 0_0402_5%
1 2
R99 0_0402_5%
1 2
R100 0_0402_5%
1 2
R102 0_0402_5%
1 2
L_CLK _BUF_DOT96 L_CLK _BUF_DOT96#
L_CLK _BUF_CKS SCD L_CLK _BUF_CKS SCD#
L_CLK _DMI L_CLK _DMI#
CPU_STO P#
VSS_DOT
3
DOT_96
4
DOT_96#
5
VDD_27
6
27MHZ
7
27MHZ_SS
8
VSS_27
9
VSS_SRC
10
SRC_1T
11
SRC_1C
12
VSS_SRC
13
SRC_2T
14
SRC_2C
15
VDD_SRC_IO
16
CPU_STOP#
RTM890N-6 32-GRT_QFN32_5X5
REF_0/CPU_SEL
CKPWRGD/PD#
CLK Ge n feat ure 1. 5V supp ort 6/29
+3VS
+1.5VS
1 2
3VS_1.5V S
C175
1
2
R1129 0_0603_ 5%
1 2
R1130 0_0603_ 5%
47P_0402_ 50V8J
0.1U_0 402_16V4Z C177
C176
1
2
@
+1.05VS_C K505+1.05VS
1 2
R127 0_0603_ 5%
C C
10U_08 05_10V4Z
1
2
C178
10U_08 05_10V4Z
1
2
Close to U2
0.1U_0 402_16V4Z C180
C179
1
2
CPU_STO P#
R126 10K_0402_5%
0.1U_0 402_16V4Z
1
2
47P_0402_5 0V8J
0.1U_0 402_16V4Z
C181
C183
C182
1
1
2
2
1 2
+3VS_CK505
+3VS
+3VS_CK505
1 2
R108 0_0603_ 5%
Close to U2
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
10U_08 05_10V4Z
C172
C171
1
1
2
1
2
2
0.1U_0 402_16V4Z
C173
C174
1
1
2
2
C167
33P_0402_ 50V8J
14.31818MHZ_ 20P_1BX14318BE1A
CLK_XTAL_OUT
CLK_XTAL_IN
Y1
12
2
2
C168
33P_0402_ 50V8J
1
1
CK_P WRGD
Q4
SSM3K7002F _SC59-3
1 2
13
D
S
R97 10K_0402_5%
2
G
1
2
0.1U_0 402_16V4Z
+3VS_CK505
C1049
CLK_E N# 41
Close to U2 within 500mil
(Def aul t)
0 133MHz
1
100MHz 100MHz
CPU_1PIN 30 CPU_0
133MHz
09/2/5 HP
+1.05VS
1 2
R141 10K_0402_5%@
1 2
R143 10K_0402_5%
REF_ 0/CPU_S EL
@
REF_ 0/CPU_S EL
C184
1 2
10P_0402_ 50V8J
EMI Capacitor
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
CLOCK GENERATOR
LA-4902P
5
11 47Wedn esday, Decembe r 09, 20 09
0.3
1
PCH_RTC X1
1 2
R158 10M_0402_5%
18P_0402_5 0V8J
1
1
C189
A A
2
C833 47P_0402_5 0V8J
C834 47P_0402_5 0V8J
C835 47P_0402_5 0V8J
C836 47P_0402_5 0V8J
+3VALW
R173 10K_0402_5%
R1999 10K_0402_ 5%
B B
iTPM ENABLE/DISABLE
+3VS
R181 1K_0402_5%@
Enable=Stuff Disable=No Stuff
C C
+3VALW +3VALW +3VALW +3VALW
PCH Pin
D D
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
PCH_JTAG_RST#
OSC4OSC
NC3NC
Y3
2
HDA_B IT_CLK_MDC
1 2
HDA_B IT_CLK_C ODEC
@
1 2
HDA_S DOUT_MDC
@
1 2
HDA_S DOUT_CO DEC
1 2
@
1 2
1 2
1 2
for SMSC EC
notice KBC state
12
R183 200_0402_5%@
PCH_JTAG_T MS PCH_JT AG_RST#PCH_JT AG_TDO PCH_JTAG _TDI
12
R189 100_0402_1%@
1 2
R194 51_0402 _5%
RefDes PCH JTAG Pre-Production PCH JTAG Production
R184 R190 R1067 No Install No Inst all
R189 R1068 No Install No Inst all 51ohm R185 R191 R1069 R194 R186 R192 R1070 51ohmNo Install No In stall
PCH_RTC X2
32.768 KHZ_12.5P F_Q13MC14610002
1
C190 18P_0402_5 0V8J
2
LID_S W#
GPIO13
KBC_S PI_SI_R
KBC_S PI_CLK_R29
KBC_S PI_CS0#_R29
KBC_S PI_CS1#_R29
12
R184 200_0402_5%@
12
R190 100_0402_1%@
PCH_JT AG_TCK
ES1 No Install No Install
200ohm 100ohm
200ohm 100ohm No Install No In stall 51ohm 20Kohm 10Kohm
1
1U_060 3_10V4Z
R163
+RTCV CC
1 2
20K_0402_1%
1 2
R164 20K_0402_1%
1U_0603 _10V4Z
HDA_B IT_CLK_MDC25 HDA_B IT_CLK_C ODEC25 HDA_ SYNC_ MDC25 HDA_ SYNC_ CODEC25 HDA_ SPKR25
HDA_R ST#_MDC25 HDA_R ST#_COD EC25
HDA_ SDIN025
HDA_ SDIN125
HDA_S DOUT_MDC25 HDA_S DOUT_CO DEC25
AQUAW HITE_BATLED
09/2/5 HP
KBC_S PI_SI_R29
KBC_SP I_SO29
09/2/5 HP
ES2
100ohm
200ohm 100ohm
200ohm No Inst all 100ohm
51ohm 20Kohm 10Kohm
12
R185 200_0402_5%@
12
R191 100_0402_1%@
No Install200ohm No Install 51ohm No InstallR183 No Install
No Install 51ohm 51ohm No Install No Install
1
12
C191
SHORT PADS
2
1
SI1 NO4 1
C192
09/4/27 HP
2
R165 33_0402_5%
1 2
R166 33_0402_5%
1 2
R167 33_0402_5%
1 2
R168 33_0402_5%
1 2
R169 33_0402_5%
1 2
R170 33_0402_5%
1 2
R171 33_0402_5%
1 2
R172 33_0402_5%
1 2
R847 1K_0402_5%
09/2/5 HP
R939 15_0402_5%
1 2
1 2
R176 0_0402_ 5%
1 2
R180 0_0402_ 5%
R940 15_0402_5%
1 2
SI2 NO7
+RTCV CC +3VS
CLRP 1
R186 20K_0402_5%
@
R192 10K_0402_5%
@
AQUAW HITE_BATLE D_R
1 2
SI1 NO7
09/3/9 HP
12
12
2
1 2
R159 1M_0402_5%
1 2
R161 330K_0402_5%
High = Inte rnal VR Ena bled(Default)
PCH_RTC X1 PCH_RTC X2
PCH_R TCRST#
PCH_S RTCRST#
SM_IN TRUDER#
PCH_I NTVRMEN
HDA_B IT_CLK
HDA _SYN C
HDA_ SPKR
HDA_R ST#
HDA_ SDIN0
HDA_ SDIN1
HDA_S DOUT
GPIO13
PCH_JT AG_TCK
PCH_JTAG_T MS
PCH_J TAG_TDI
PCH_JT AG_TDO
SPI_C LK_PCH
SPI_C S0#_PCH
SPI_C S1#_PCH
SPI_MO SI_PCH
PCH_JT AG_TDO
PCH_JTAG_T MS
PCH_J TAG_TDI
PCH_JT AG_RST#
330K_0402_5% @
AQUAW HITE_BATLED#25 ,29
SM_IN TRUDER# SIRQ
PCH_I NTVRMEN
U4A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
JTAG_RST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IBEXPEAK- M_FCBGA1071
R1067 51_0402_5%@
1 2
R1068 51_0402_5%@
1 2
R1069 51_0402_5%@
1 2
R1070 51_0402_5%@
1 2
+3VS
1 2
2
G
R964
@
AQUAW HITE_BATLED
1 2 13
D
Q66 SSM3K7002F _SC59-3
S
R965
GPIO33 iA MT Ena ble /D isable
Hi Disable
Lo Enable De fault
2
R160 10K_0402_5%
R162 10K_0402_5%
LOW=Default HIGH=No Reboot
RTCIHD A
SAT A
SPI JTAG
+1.05VS
10K_0402_5%
1 2
12
@
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
LPC
SERIRQ
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA1RXN SATA1RXP SATA1TXN SATA1TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
D33 B33 C32 A32
C34
A34 F34
AB9
AK7 AK6 AK11 AK9
AH6 AH5 AH9 AH8
AF11 AF9 AF7 AF6
AH3 AH1 AF3 AF1
AD9 AD8 AD6 AD5
AD3 AD1 AB3 AB1
AF16
AF15
T3
Y9
V1
USB_O C#015 USB_O C#115
USB_O C#215 USB_O C#315
USB_O C#415 USB_O C#515
USB_O C#615 USB_O C#715
HDA_ SPKR
SIRQ
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0
SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1
SATA_PRX_DTX_N2 SATA_PRX_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2
SATA_PRX_DTX_N4 SATA_PRX_DTX_P4 SATA_PTX_DRX_N4 SATA_PTX_DRX_P4
SATA_PRX_DTX_N5 SATA_PRX_DTX_P5 SATA_PTX_DRX_N5 SATA_PTX_DRX_P5
SATAICO MPIPCH_JT AG_RST#
SATA_DET#0
HDD_H ALTLED_ R
PCH_JT AG_TCK
3
1 2
R175 37.4_0402_1 %
1 2
R177 10K_0402_1%
LPC_L AD0 23,29 ,30,31 LPC_L AD1 23,29 ,30,31 LPC_L AD2 23,29 ,30,31 LPC_L AD3 23,29 ,30,31
LPC_LF RAME# 23, 29,30,31
LPC_L DRQ#0 30
SIRQ 27, 29,30,31
SATA_PRX_DTX_N0 23 SATA_PRX_DTX_P0 23 SATA_PTX_DRX_N0 23 SATA_PTX_DRX_P0 23
SATA_PRX_DTX_N1 23 SATA_PRX_DTX_P1 23 SATA_PTX_DRX_N1 23 SATA_PTX_DRX_P1 23
09/2/5 HP
+1.05VS
+3VS
SATA_LED# 25,28
R1071
0_0402_5%
12
SI1 NO2 2
SI1 NO2
09/3/9 HP
NAND_ DET# 24
SI1 NO6 0
09/5/4 HP
SATA_PRX_DTX_N2 28 SATA_PRX_DTX_P2 28 SATA_PTX_DRX_N2 28 SATA_PTX_DRX_P2 28
SATA_PRX_DTX_N4 26 SATA_PRX_DTX_P4 26 SATA_PTX_DRX_N4 26 SATA_PTX_DRX_P4 26
SATA_PRX_DTX_N5 28 SATA_PRX_DTX_P5 28 SATA_PTX_DRX_N5 28 SATA_PTX_DRX_P5 28
HDD_H ALTLED 25
4
10K_0402_5%
HDD_H ALTLED
SATA_DET#0
PCH XDP Conn.
JP15
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7 1 2 1 2
1 2 1 2
XDP_FN1
R85233_0402_5%@
XDP_FN2
R85433_0402_5%@
XDP_FN3
R85633_0402_5%@
XDP_FN0
R85033_0402_5%@
DB1 NO 77
XDP_FN4
R107233_0402_5%@
1 2 1 2
1 2
+3VS
1 2
1 2
1 2
R8660_0402_5%
T122TPC12 T123TPC12
PWR _GD29,32
PM_PWR BTN#_R4,14
SI1 NO2 2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
XDP_FN5
R86033_0402_5%@
XDP_FN6
R86233_0402_5%@
XDP_FN7
R86433_0402_5%@
PWR _GD
XDP_PW RBTN#_R
09/2/5 HP
PCH_J TAG_TCK_R
R8710_ 0402_5%
2008/09/15 2009/12/31
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH -030-01-L-D-A CON N@
Compal Secret Data
Deciphered Date
4
ITPCLK#/HOOK5
RESET#/HOOK6
+3VS
R178
@
GND1 OBSFN_C0 OBSFN_C1
GND3
OBSDATA_C0 OBSDATA_C1
GND5
OBSDATA_C2 OBSDATA_C3
GND7 OBSFN_D0 OBSFN_D1
GND9
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
ITPCLK/HOOK4
VCC_OBS_CD
DBR#/HOOK7
GND15
TRST#
TMS
GND17
1
2
1 2
1 2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
TD0
54 56
TDI
58 60
D1
1
BAV70W_S OT323-3
C211
1U_0603 _10V4Z
Plac e n ear IBE X-M
R179 10K_0402_5%
XDP_FN1 6
R848 33_0402_5%@
XDP_FN1 7
R849 33_0402_5%@
XDP_FN8
R851 33_0402_5%@
XDP_FN9
R853 33_0402_5%@
XDP_FN1 0
R855 33_0402_5%@
XDP_FN1 1
R857 33_0402_5%@
XDP_FN1 2
R859 33_0402_5%@
XDP_FN1 3
R861 33_0402_5%@
XDP_FN1 4
R863 33_0402_5%@
XDP_FN1 5
R865 33_0402_5%@
+3VS
1K_0402_5%
R867
1 2
PCH_J TAG_TDO#_R
PCH_J TAG_TDI_R PCH_JTAG _TMS_R
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
5
RTC Conn.
CON N@
BATT1.1+VREG3_511 25+RTCV CC
JBAT1 ACES_85205 -0200
2
R193
3
1 2
W=20 mil sW=20 mil s
12 12
12 12
12 12
12 12
12 12
R868 0_0402_5% R869 0_0402_5% @ R870 0_0402_5% R872 0_0402_5%
Compal Electronics, Inc.
IBEX-M(1/6)-HDA/JTAG/SATA
LA-4902P
1K_0402_5%
12 12 12 12
SI1 NO2 2
W=20 mil s
PCH_XDP _GPIO28 15 PCH_XD P_GPIO0 15
PCH_XDP _GPIO20 13 PCH_XDP _GPIO18 13
SATA_DET#0
HDD_H ALTLED_ R
PCH_XDP _GPIO36 15 PCH_XDP _GPIO37 15 ,20
PCH_XDP _GPIO16 15 PCH_XDP _GPIO49 15
PLT_RST# 4 ,15,21,23 ,25,31
XDP_DBRESET # 4,14
PCH_JT AG_TDO PCH_JT AG_RST#PCH_J TAG_RST#_R PCH_J TAG_TDI PCH_JTAG_T MS
5
1
2
12 47Wedn esday, Decembe r 09, 20 09
GPIO_28
GPIO_0
09/2/16 HP
GPIO_36 GPIO_37 GPIO_16 GPIO_49
0.3
1
hexainf@hotmail.com
A A
PCIE_PRX_ DTX_N225
EXP
WLAN
NIC
B B
SI, No6 1
09/5/4 HP
EXP
C C
WLAN
PCIE_PRX_DTX_P225 PCIE_PTX_ C_DRX_N225 PCIE_PTX_ C_DRX_P225
PCIE_PRX_ DTX_N423 PCIE_PRX_DTX_P423 PCIE_PTX_ C_DRX_N423 PCIE_PTX_ C_DRX_P423
PCIE_PRX_ DTX_N621 PCIE_PRX_DTX_P621 PCIE_PTX_ C_DRX_N621 PCIE_PTX_ C_DRX_P621
PCH_XD P_GPIO1812
CLK_P CIE_LAN_ REQ1#21
R207 10K_0402_5%
+3VS
CLK_PCIE_ EXP#25 CLK_PCIE _EXP25
PCH_XD P_GPIO2012
CLKREQ_EXP #25
CLK_P CIE_MCAR D#23 CLK_P CIE_MCAR D23
CLKRE Q_WLAN#23
1 2
NIC
C212 0.1U_04 02_10V7K C213 0.1U_04 02_10V7K
C214 0.1U_04 02_10V7K C215 0.1U_04 02_10V7K
C218 0.1U_04 02_10V7K C219 0.1U_04 02_10V7K
+3VALW
09/3/9 HP
R208 0_0402_5% R209 0_0402_5%
+3VS
+3VALW
09/3/9 HP
R211 0_0402_5% R212 0_0402_5%
+3VALW
+3VALW
+3VALW
1 2 1 2
1 2 1 2
1 2 1 2
R875 10K_0402_5%
1 2
R1119 0_ 0402_5%
SI1 NO5
1 2 1 2
R941 10K_0402_5%
1 2
R972 0_0402_5%
1 2
R942 10K_0402_5%
1 2
SI1 NO5
1 2 1 2
R943 10K_0402_5%
1 2
R944 10K_0402_5%
1 2
R1057 10K _0402_5%
1 2
PCIE_PRX_ DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_ DRX_N2 PCIE_PTX_DRX_P2
PCIE_PRX_ DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_ DRX_N4 PCIE_PTX_DRX_P4
PCIE_PRX_ DTX_N6 PCIE_PRX_DTX_P6 PCIE_PTX_ DRX_N6 PCIE_PTX_DRX_P6
1 2
CLK_PC IE_EXP#_R CLK_PC IE_EXP_R
CLK_P CIE_MCAR D#_R CLK_P CIE_MCAR D_R
2
U4B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1# / GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2# / GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4# / GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5# / GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ# / GPIO56
IBEXPEAK- M_FCBGA1071
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1ALERT# / GPIO74
SMBus
PCI-E*
Link
Cont rol ler
PEG_A_CLKRQ# / GPIO47
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
Clock Flex
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_BCLK_N CLKIN_BCLK_P
CLKIN_DOT_96N CLKIN_DOT_96P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
B9
H14
C8
J14
C6
G8
M14
E10
G12
T13
T11
T9
H1
AD43 AD45
AN4 AN2
AT1 AT3
AW24 BA24
AP3 AP1
F18 E18
AH13 AH12
P41
J42
AH51 AH53
AF38
T45
P43
T42
N50
SMBALERT#
SMBCLK
SMBDATA
SML0ALERT#
SML0CLK
SML0DATA
SML1ALERT#
SML1CLK
SML1DATA
PEG_C LKREQ#
CLK_EXP#_R CLK_EXP_R
CLK_D P#_R CLK_ DP_R
XTAL25_IN XTAL25_OUT
R215
1 2
22_0402_5%
SI1 NO8 8
3
8/31/2009 HP
SML0CLK 21
SML0DATA 21
CL_CL K1 23
CL_DATA1 23
CL_RST1# 23
SI1 NO5
09/3/9 HP
R41 0_0402_5%
1 2
R59 0_0402_5%
1 2
R11 0_0402_5%
1 2
R13 0_0402_5%
1 2
CLK_D MI# 11 CLK_D MI 11
CLK_B UF_BCLK# 11 CLK_B UF_BCLK 11
CLK_B UF_DOT96# 11 CLK_B UF_DOT96 11
CLK_ BUF_CKS SCD# 11 CLK _BUF_CKS SCD 11
CLK_1 4M_PCH 11
CLK_ PCI_FB 15
R213 90.9_0402_ 1%
1 2
T102 TPC12
T103 TPC12
CLK_14M_S IO 30
C887
1
@
10P_0402_5 0V8J
2
DDR
intel LAN
EC_THERMAL
+1.05VS
CLK_EXP# 4 CLK_EXP 4
CLK_D P# 4 CLK_ DP 4
4
SMB_CLK_S3
SMB_DATA_S3
PEG_C LKREQ#
SMBCLK
SMBDATA SMB_DATA_S3
+3VS
SML1CLK
SML1DATA
1 2
R195 10K_040 2_5%
1 2
R197 10K_040 2_5%
1 2
R204 10K_040 2_5%
Q5A 2N7002DW H_SOT363-6
6 1
2
Q5B 2N7002DW H_SOT363-6
3 4
5
2N7002DW H_SOT363-6
2
2N7002DW H_SOT363-6
5
SMB_CLK_S3
Q77A
Q77B
61
34
+3VALW
SI1 NO3 2
09/4/10 HP
XTAL25_IN
XTAL25_OUT
SMBCLK
+3VS
SMBDATA
SML0CLK
SML0DATA
SML1CLK
SML1DATA
SML0ALERT#
SMBALERT#
SML1ALERT#
SMB_CLK_S3 4,9,1 0,11,26
SMB_DATA_S3 4,9,10 ,11,26
CAP_C LK 25,29
CAP_DAT 25,29
1 2
R196 2.2K_0 402_5%
1 2
R198 2.2K_0 402_5%
1 2
R200 2.2K_0 402_5%
1 2
R202 2.2K_0 402_5%
1 2
R203 4.7K_0 402_5%
1 2
R205 4.7K_0 402_5%
1 2
R206 10K_040 2_5%
1 2
R935 10K_040 2_5%
1 2
R936 10K_040 2_5%
5
09/2/16 HP
This circui t will add/ delete in INTEL ES2 s ample to test.
1 2
R210 1M_0402_5%
Y4
1 2
25MHZ_20 P_1BG25000CK1A
18P_0402_ 50V8J
C222
1
2
18P_0402_ 50V8J
C1034
1
2
+3VALW
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet
Compal Electronics, Inc.
IBEX-M(2/6)-PCI-E/SMBUS/CLK
LA-4902P
5
of
13 47Wedn esday, Decembe r 09, 20 09
0.3
5
4
3
2
1
R230
R302
@
12
U4D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
LVDSB_DATA3
AA52
CRT_BLUE
AB53
CRT_GREEN
AD53
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
AD48
DAC_IREF
AB51
CRT_IRTN
IBEXPEAK- M_FCBGA1071
10/17 HP re move to P14 (close U5
DAC_ GRN
DAC _BLU
R303
@
150_0402_1%
12
LVDS
CRT
L7,L9,L11 a re 39uH
10P_0402_ 50V8J
C280
1
1
@
@
2
2
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
10P_0402_ 50V8J
C281
1
@
2
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
Pla ce cloce to U5
L
L7 0805CS-680 XJLC_0805
1 2
L9 0805CS-680 XJLC_0805
1 2
L11 0805CS-680 XJLC_0805
1 2
10P_0402_ 50V8J
C282
BJ46 BG46
BJ48 BG48
BF45 BH45
T51 T53
BG44 BJ44 AU38
BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38
Y49 AB49
BE44 BD44 AV40
BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36
U50 U52
BC46 BD46 AT38
BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36
DPB_AUX# DPB_AUX DPB _R
DPB_TXN0 DPB_TXP0 DPB_TXN1 DPB_TXP1 DPB_TXN2 DPB_TXP2 DPB_TXN3 DPB_TXP3
DPC_AUX # DPC_AUX DP C_RSYS_RS T#
DPC_TXN0 DPC_TXP0 DPC_TXN1 DPC_TXP1 DPC_TXN2 DPC_TXP2 DPC_TXN3 DPC_TXP3
DPD_C _AUX# DPD_C _AUX
DPD_C_TX N0 DPD_C_TXP0 DPD_C_TX N1 DPD_C_TXP1 DPD_C_TX N2 DPD_C_TXP2 DPD_C_TX N3 DPD_C_TXP3
DPB _R
DP C_R
DP D_R
1
2
R1017 R1018
R1019 R1020
DAC_ RED_RDAC_ RED
DAC_ GRN_R
DAC _BLU_R
1
C283
2
27P_0402_5 0V8J
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
1 2
R822 100K_040 2_5%
1 2
R823 100K_040 2_5%
1 2
R824 100K_040 2_5%
1
C284
2
27P_0402_5 0V8J
R818
C920 0.1U_04 02_10V7K
1 2
C921 0.1U_04 02_10V7K
1 2
C922 0.1U_04 02_10V7K
1 2
C923 0.1U_04 02_10V7K
1 2
C924 0.1U_04 02_10V7K
1 2
C925 0.1U_04 02_10V7K
1 2
C926 0.1U_04 02_10V7K
1 2
C927 0.1U_04 02_10V7K
1 2
C928 0.1U_04 02_10V7K
1 2
C929 0.1U_04 02_10V7K
1 2
1 2
C1050 0.1 U_0402_16V4Z
L8 0805CS-680 XJLC_0805
1 2
L10 0805CS-680 XJLC_0805
1 2
L12 0805CS-680 XJLC_0805
1 2
C285
27P_0402_5 0V8J
+3VS
+3VS
+3VS
R819
2.2K_0402_5%
DPB_C TRLCLK 28 DPB_CTR LDATA 28
DPC_C TRLCLK 28
DPC_C TRLDATA 28
DPD_C TRLCLK 19
DPD_C TRLDATA 19
DP D_R
RED _R 28
GREE N_R 28
BLUE _R 28
DPB_AUX# 28 DPB_AUX 28 DPB_ HPD 28
DPB_TXN0 28 DPB_TXP0 28 DPB_TXN1 28 DPB_TXP1 28 DPB_TXN2 28 DPB_TXP2 28 DPB_TXN3 28 DPB_TXP3 28
DPC_AUX # 28 DPC_AUX 28 DPC_ HPD 28
DPC_TXN0 28 DPC_TXP0 28 DPC_TXN1 28 DPC_TXP1 28 DPC_TXN2 28 DPC_TXP2 28 DPC_TXN3 28 DPC_TXP3 28
DPD_AUX # 19 DPD_AUX 19 DPD_ HPD 19
DPD_TXN0 19 DPD_TXP0 19 DPD_TXN1 19 DPD_TXP1 19 DPD_TXN2 19 DPD_TXP2 19 DPD_TXN3 19 DPD_TXP3 19
DMI_CTX_PRX_N05 DMI_CTX_PRX_N15 DMI_CTX_PRX_N25 DMI_CTX_PRX_N35
DMI_CTX_PRX_P05 DMI_CTX_PRX_P15 DMI_CTX_PRX_P25
D D
PGD_ IN29
09/5/18 HP
SI, No8 2
C C
B B
DMI_CTX_PRX_P35
DMI_CRX_PTX_N05 DMI_CRX_PTX_N15 DMI_CRX_PTX_N25 DMI_CRX_PTX_N35
DMI_CRX_PTX_P05 DMI_CRX_PTX_P15 DMI_CRX_PTX_P25 DMI_CRX_PTX_P35
+1.05VS
1 2
R222 49.9_04 02_1%
XDP_DBRESET #4,12
VGATE41
R1124
1 2
1K_0402_5%
M_PWROK32
PM_DRA M_PWRGD4
RPGOO D37 PM_RSMRST#29
+3VALW
SUS_P WR_ACK29
PM_PWR BTN#_R4,12 PWRBT N_OUT#25, 28,29
AC_PR ESENT29
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_IR COMP
1 2
R223 0_0402_5%
VGATE
1 2
R225 0_0402_5%
R226 0_0402_5%
09/2/5 HP
R227 0_0402_5%
R228 10K_0402_5% R958 10K_0402_5%
1 2
R229 0_0402_5%
PM_CL KRUN#
1 2
PM_DR AM_PWRGD
1 2 1 2
1 2
AUXPWR OK
LOW_BA T_R
IBEX_R#
SI, No5 8
SYS_RS T#
LOW_BA T_R
PM_SLP_LAN#
IBEX_R#
PCIE_ WAKE#
AC_PR ESENT
09/5/18 HP
SI, No8 2
U4C
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
A6
BATLOW# / GPIO72
F14
RI#
IBEXPEAK- M_FCBGA1071
1 2
R232 10K_04 02_5%
09/5/4 HP
1 2
R234 10K_04 02_5%@
1 2
R235 10K_04 02_5%
1 2
R236 10K_04 02_5%
1 2
R909 10K_04 02_5%
1 2
R238 10K_04 02_5%
@
1 2
R237 10K_04 02_5%
+3VS
+3VALW
VGATE
SLP_S3#
SLP_S4#
SLP_S5#
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
1 2
R876 10K_040 2_5%@
1 2
R877 10K_040 2_5%@
1 2
R878 10K_040 2_5%@
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
SLP_S4#
SLP_S3#
SLP_M#
PMSYNCH
SLP_LAN#
1 2
R224 10K_04 02_5%
TP23
BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12
BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
FDI_CTX_ PRX_N0 FDI_CTX_ PRX_N1 FDI_CTX_ PRX_N2 FDI_CTX_ PRX_N3 FDI_CTX_ PRX_N4 FDI_CTX_ PRX_N5 FDI_CTX_ PRX_N6 FDI_CTX_ PRX_N7
FDI_CTX_ PRX_P0 FDI_CTX_ PRX_P1 FDI_CTX_ PRX_P2 FDI_CTX_ PRX_P3 FDI_CTX_ PRX_P4 FDI_CTX_ PRX_P5 FDI_CTX_ PRX_P6 FDI_CTX_ PRX_P7
FDI_ INT
FDI _FSY NC0
FDI _FSY NC1
FDI _LSY NC0
FDI _LSY NC1
PCIE_ WAKE#
PM_CL KRUN#
SUS_C LK
PM_SLP_LAN#
FDI_CTX_ PRX_N0 5 FDI_CTX_ PRX_N1 5 FDI_CTX_ PRX_N2 5 FDI_CTX_ PRX_N3 5 FDI_CTX_ PRX_N4 5 FDI_CTX_ PRX_N5 5 FDI_CTX_ PRX_N6 5 FDI_CTX_ PRX_N7 5
FDI_CTX_ PRX_P0 5 FDI_CTX_ PRX_P1 5 FDI_CTX_ PRX_P2 5 FDI_CTX_ PRX_P3 5 FDI_CTX_ PRX_P4 5 FDI_CTX_ PRX_P5 5 FDI_CTX_ PRX_P6 5 FDI_CTX_ PRX_P7 5
FDI_ INT 5
FDI _FSY NC0 5
FDI _FSY NC1 5
FDI _LSYN C0 5
FDI _LSYN C1 5
PCIE_ WAKE# 23 ,25
PM_CL KRUN# 27 ,29,30,31
8/31 HP
T130TPC12
T26 TPC12
SLP_S5# 28
SLP_S4# 33,40
SLP_S3# 25,29,3 2,33,35,3 8,39
PM_SLP_M# 29 ,32,33
H_PM _SYNC 4
PM_SLP_LAN# 29,33 ,40
09/3/9 HP
ENABLT20 ENAV DD20
INV_PW M20
SI1 NO6
09/3/9 HP
CRT _DDC_CL K18 CRT_D DC_DATA18
CRT _HSYN C18 CRT _VSYNC18
PV
DB2: No . 66
T125
PAD
T126
PAD
T127
PAD
T97
PAD
SI1 NO3 3
DAC _BLU DAC_ GRN DAC_ RED
1K_0402_0.5%
R301
150_0402_1% @
150_0402_1%
12
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
2
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
IBEX-M(3/6)-DMI/GPIO/LVDS
LA-4902P
1
14 47Wedn esday, Decembe r 09, 20 09
0.3
5
hexainf@hotmail.com
PCI_ AD[0. .31]27
D D
PCI_C BE0#27 PCI_C BE1#27 PCI_C BE2#27 PCI_C BE3#27
PCI_R EQ2#27
C C
PCI_GN T2#27
PCI_ PIRQE#27 ODD_D ET#23 PCI_ PIRQG#27 ACCEL _INT#26
PCI_RS T#23, 27
PCI_ SERR#27, 29,31 PCI_ PERR#27
PCI _IRD Y#27 PCI_ PAR27 PCI_D EVSEL#27 PCI_F RAME#27
PCI_STOP #27 PCI_ TRDY#27
B B
A A
PLT_RST#4,12,21 ,23,25,31
PCI _PIRQE#
1 8
PCI_STO P#
2 7
PCI_ PIRQD #
3 6 4 5
PCI_R EQ2#
1 8
PCI_R EQ1#
2 7
PCI_F RAME#
3 6
PCI_ TRDY#
4 5
PCI _IR DY#
1 8
PCI _PERR#
2 7
PCI_D EVSEL#
3 6
PCI _SERR#
4 5
PCI_R EQ0#
1 8
PCI _PIRQB#
2 7
ODD_ DET#
3 6
PCI_R EQ3#
4 5
PCI_G NT3#
1 2
R282 1K_0402 _5%@
A16 swap ov eride Strap /Top-Block Swap Overri de jumper
PCI_GNT3#
PCI _AD0 PCI _AD1 PCI _AD2 PCI _AD3 PCI _AD4 PCI _AD5 PCI _AD6 PCI _AD7 PCI _AD8 PCI _AD9 PCI_ AD10 PCI_ AD11 PCI_ AD12 PCI_ AD13 PCI_ AD14 PCI_ AD15 PCI_ AD16 PCI_ AD17 PCI_ AD18 PCI_ AD19 PCI_ AD20 PCI_ AD21 PCI_ AD22 PCI_ AD23 PCI_ AD24 PCI_ AD25 PCI_ AD26 PCI_ AD27 PCI_ AD28 PCI_ AD29 PCI_ AD30 PCI_ AD31
PCI _PIRQA# PCI _PIRQB# PCI_ PIRQC # PCI_ PIRQD #
PCI_R EQ0# PCI_R EQ1# PCI_R EQ2# PCI_R EQ3#
PCI_G NT0#
T112TPC12
MODEM_D ISABLE#
T113TPC12
PCI_G NT2# PCI_G NT3#
PCI _PIRQE# ODD_ DET# PCI _PIRQG# ACCEL _INT#
PCI _SERR# PCI _PERR#
PCI _IR DY#
PCI_D EVSEL# PCI_F RAME#
PCI_L OCK#
PCI_STO P# PCI_ TRDY#
CLK_ PCI_KBC _R CLK _PCI_FB_ R CLK_PC I_TPM_R CLK_P CI_1394_R CLK_P CI_DB_P
RP28
8.2K_080 4_8P4R_5% RP5
8.2K_080 4_8P4R_5% RP6
8.2K_080 4_8P4R_5% RP8
8.2K_080 4_8P4R_5%
Low=A16 swap override/To p-Block Swap Overri de enabled High=Default
5
+3VS
H40 N34 C44 A38 C36
J34 A40 D45 E36 H48 E40 C40
M48 M45
F53
M40 M43
J36 K48 F40 C42 K46
M51
J52 K51
L34 F42
J40 G46 F44
M47
H36
J50 G42 H47 G34
G38 H51 B37 A44
F51 A46 B45
M53
F48 K45 F36 H53
B41 K53 A36 A48
K6
E44 E50
A42 H44 F46 C46
D49
D41 C48
M7
D5
N52 P53 P46 P51 P48
U4E
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
PIRQA# PIRQB# PIRQC# PIRQD#
REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54
GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55
PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5
PCIRST#
SERR# PERR#
IRDY# PAR DEVSEL# FRAME#
PLOCK#
STOP# TRDY#
PME#
PLTRST#
CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4
IBEXPEAK- M_FCBGA1071
PCI _PIRQA#
1 8
THER M_SCI#
2 7
PCI_ PIRQC #
3 6
PCI _PIRQG#
4 5
ACCEL _INT#
1 8
PCI_L OCK#
2 7 3 6 4 5
NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11
NVR AM
NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15
PCI
NV_WR#0_RE# NV_WR#1_RE#
USB
CLK_P CI_SIO30
CLK_P CI_KBC29
CLK_P CI_DEBU G23
CLK_ PCI_DB31 CLK_ PCI_FB13 CLK_PCI_T PM31
CLK_P CI_139427
RP7
8.2K_08 04_8P4R_5%
RP9
8.2K_08 04_8P4R_5%
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_ALE NV_CLE
NV_RCOMP
NV_RB#
NV_WE#_CK0 NV_WE#_CK1
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N
USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
+3VS
4
AY9 BD1 AP15 BD8
AV9 BG8
AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6
BD3 AY6
@
1 2
AU2
R246 32.4_04 02_1%
AV7
AY8 AY5
AV11 BF5
USB20 _N0
H18
USB20_P 0
J18
USB20 _N1
A18
USB20_P 1
C18
USB20 _N2
N20
USB20_P 2
P20
USB20 _N3
J20
USB20_P 3
L20
USB20 _N4
F20
USB20_P 4
G20 A20 C20 M22 N22 B21 D21
USB20 _N8
H22
USB20_P 8
J22
USB20 _N9
E22
USB20_P 9
F22
USB20 _N10
A22
USB20_P 10
C22
USB20 _N11
G24
USB20_P 11
H24
USB20 _N12
L24
USB20_P 12
M24
USB20 _N13
A24
USB20_P 13
C24
USBR BIAS
B25
D25
Within 500 mils
USB_O C#0
N16
USB_O C#1
J16
USB_O C#2
F16
USB_O C#3
L16
USB_O C#4 USB_O C#1
E14
USB_O C#5
G16
USB_O C#6
F12
USB_O C#7
T15
C956 47P_0402_ 50V8J
C958 47P_0402_ 50V8J
C959 47P_0402_ 50V8J
C957 47P_0402_ 50V8J
1
1
1
1
@
@
@
@
2
2
2
2
8/31 HP
USB20 _N0 26 USB20_P0 26 USB20 _N1 26 USB20_P1 26 USB20 _N2 26 USB20_P2 26 USB20 _N3 26 USB20_P3 26 USB20 _N4 25 USB20_P4 25
USB20 _N8 26 USB20_P8 26 USB20 _N9 24 USB20_P9 24 USB20 _N10 31 USB20_P1 0 31 USB20 _N11 28 USB20_P1 1 28 USB20 _N12 20 USB20_P1 2 20 USB20 _N13 28 USB20_P1 3 28
1 2
R247 22.6_04 02_1%
R1026 47 _0402_5%
R248 22_0402_5%
R880 22_0402_5%
R251 22_0402_5% R253 22_0402_5% R258 22_0402_5%
R256 22_0402_5%
C961 47P_0402_ 50V8J
C960 47P_0402_ 50V8J
C962 47P_0402_ 50V8J
1
1
1
@
@
@
2
2
2
BUF_PLT_R ST#4
USB_O C#0 12 USB_O C#1 12 USB_O C#2 12 USB_O C#3 12 USB_O C#4 12 USB_O C#5 12
USB_O C#7 12
1 2
1 2
1 2
1 2 1 2 1 2
1 2
CONN
CONN
CONN
CONN
EXPRESS
Bluetooth
WWAN
Fingerpr int
DOCK
USB Ca mera
DOCK
SI1 NO6 7
09/2/5 HP
4
+3VS
7/2/2009 HP
SI1 NO2 4
09/4/10 HP
+3VALW
USB_O C#3
PCH_X DP_GPIO36
USB_O C#5 USB_O C#6 USB_O C#7
CLK_ PCI_KBC _R
CLK_P CI_DB_P CLK _PCI_FB_ R CLK_PC I_TPM_R
CLK_P CI_1394_R
1 2
R843 0_0402_ 5%
+3VS
5
U6
P
IN1
4
O
IN2
G
3
3
R239 10K_0402_5%
1 2
PCH_XD P_GPIO012
OCP#42
RUN SCI_EC #29
THERM_ SCI#4
PCH_ DDR_RS T4
LAN_ DIS#21 ,22
PCH_XDP _GPIO1612
ALS_EN#20
WWA N_DET#24
WW AN_TRANSMIT _OFF#24 ,25
PCH_XDP _GPIO2812
STP_PCI#
SATA_CLKR EQ#
PCH_XDP _GPIO3612
PCH_XDP _GPIO3712,20
DOC K_ID028
09/2/5 HP
DOC K_ID128
CLK_P CIE_LAN_ REQ#21
R485 10K_0402_5%
1 2
PCH_XDP _GPIO4912
WLAN _TRANSMIT_OF F#23
PCH_ NCTF617 PCH_ NCTF717
PCH_N CTF1917
PCH_N CTF2617
1 2
R968 0_0402_ 5%
1 2
R970 0_0402_ 5%
1 2
R971 0_0402_ 5%
1 2
R1073 0_0402_ 5%
1 2
R1074 0_0402_ 5%
1 2
R1990 0_0402_ 5%
SI1 NO4 5
09/4/27 HP
dele te R969
PLT_RST#
1
2
SN74A HC1G08D CKR_SC70-5@
3
PCH_X DP_GPIO0
RUN SCI_E C#
THER M_SCI#
GPIO8
GPIO15
PCH_X DP_GPIO16
ALS_EN#
WW AN_DET#
GPIO24
WW AN_TRANSM IT_OFF#
PCH_X DP_GPIO28
STP_PCI #
SATA_CLKR EQ#
PCH_X DP_GPIO36
PCH_X DP_GPIO37
DOC K_ID0
DOC K_ID1
CLK_P CIE_LAN _REQ#
GPIO48
PCH_X DP_GPIO49
WLAN _TRANSMIT_O FF#
BT_OFF 26
FPR_ OFF 31USB_O C#6 12 NPCI_ RST# 29 ,30
ISO_PR EP# 28 LED_L INK_LAN# _R 21,22 EXPRESS_ CD# 25
PCI_G NT0#
MODEM_D ISABLE#
PCI_GNT0#
0 0 1 1 1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U4F
Y3
BMBUSY# / GPIO0
C38
TACH1 / GPIO1
D37
TACH2 / GPIO6
J32
TACH3 / GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
AA2
SATA4GP / GPIO16
F38
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
H10
MEM_LED / GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI# / GPIO34
V6
SATACLKREQ# / GPIO35
AB7
SATA2GP / GPIO36
AB13
SATA3GP / GPIO37
V3
SLOAD / GPIO38
P3
SDATAOUT0 / GPIO39
H3
PCIECLKRQ6# / GPIO45
F1
PCIECLKRQ7# / GPIO46
AB6
SDATAOUT1 / GPIO48
AA4
SATA5GP / GPIO49
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
BH53
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ50
VSS_NCTF_24
BJ52
VSS_NCTF_25
BJ53
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
IBEXPEAK- M_FCBGA1071
R249 1K_0402_5%@
R254 1K_0402_5%@
Boot BIOS S trap
MODEM_DISAB LE# Boot BIOS Loc ation
0 1 0
2008/09/15 2009/12/31
1 2
1 2
LPC* Reserved(NA ND) PCI SPI
GPIO
NCTF
RSVD
Compal Secret Data
2
CLKOUT_PCIE6N CLKOUT_PCIE6P
CLKOUT_PCIE7N
MISC
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
CPU
CLKOUT_PCIE7P
PROCPWRGD
THRMTRIP#
INIT3_3V#
Deciphered Date
2
A20GATE
PECI
RCIN#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
TP24
AH45 AH46
AF48 AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
CLK_P CIE_LAN# _R
CLK_P CIE_LAN_ R
PCH_ PECI_ R
KB_RST#
H_THER MTRIP#_L
T29 T PC12
T30 T PC12
T31 T PC12
T32 T PC12
T33 T PC12
T34 T PC12
T35 T PC12
T36 T PC12
T37 T PC12
T38 T PC12
T39 T PC12
T40 T PC12
T41 T PC12
T42 T PC12
T43 T PC12
T44 T PC12
T45 T PC12
T46 T PC12
T47 T PC12
T48 T PC12
T49 T PC12
T50 T PC12
T51 T PC12
T52 T PC12
T53 T PC12
T54 T PC12
1
33_0402_5% 33_0402_5%
12 12
R218 R220
1 2
1 2
0_0402_5%
1 2
56_0402_5%
SI1 NO2 4
09/4/10 HP
SI1 NO4 5
09/4/27 HP
SI1 NO5 9
09/5/4 HP
09/2/5 HP
SI1 NO2 9
09/4/10 HP
SI1 NO3 1
Title
Size Docum ent Num ber R ev
Cus tom
LA-4902P
Dat e: Sheet o f
+3VS
R24210K_040 2_5%
R24454.9_0402_1 %
R245
NPCI_ RST#
SATA_CLKR EQ#
PCH_X DP_GPIO49
WW AN_DET#
ALS_EN#
RUN SCI_E C#
R243
12
GATEA20 29
CLK_C PU_BCLK# 4
CLK_C PU_BCLK 4
H_P ECI 4
KB_RST# 29
H_CP UPWR GD 4
H_THER MTRIP# 4
+VCCP
dele te R268
PCH_X DP_GPIO16
DOC K_ID0
DOC K_ID1
GPIO48
STP_PCI #
WLAN _TRANSMIT_O FF#
WW AN_TRANSM IT_OFF#
GPIO24
GPIO15
ISO_P REP#
CLK_P CIE_LAN _REQ#
USB_O C#0
USB_O C#2
USB_O C#4
EXPRESS_C D#
PCH_X DP_GPIO28
LED_L INK_LAN# _R
LAN_ DIS#
GPIO8
Compal Electronics, Inc.
IBEX-M(4/6)-PCI/USB/RSVD
1
CLK_P CIE_LAN# 21
CLK_P CIE_LAN 21
R250 10K_0402_5%
1 2
R255 10K_0402_5%
1 2
R259 10K_0402_5%
1 2
R261 100K_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
15 47Wedn esday, Decembe r 09, 20 09
R263 10K_0402_5%
R266 10K_0402_5%
R271 10K_0402_5%
R273 10K_0402_5%
R275 10K_0402_5%
R277 10K_0402_5%
R962 10K_0402_5%
R252 10K_0402_5%
R257 10K_0402_5%
R260 10K_0402_5%
R262 1K_0402_5%
R264 10K_0402_5%
R267 10K_0402_5%
R270 10K_0402_5%
R1117 10K _0402_5%
R959 10K_0402_5%
R960 10K_0402_5%
R1075 10K _0402_5%
R1083 10K _0402_5%
R961 10K_0402_5%
R844 0_0402_5%@
+3VS
+3VALW
+3VM_LAN
0.3
1
TPC12
TPC12
T115
T114
+1.05VM
1U_0402 _6.3V6K
1
C231
A A
+1.05A?
SI1 NO3 7
22U_0805_6 .3V6M
1
C976
2
B B
C C
+RTCV CC
D D
T55PAD
1
C975
2
1 2
C255
1 2
C256
1 2
C260
1 2
C262
2
1 2
C233 0.1U _0402_16V4Z
+1.05VM
22U_0805_6 .3V6M
22U_0805_6 .3V6M
1
C240
C239
2
C242
1 2
0.1U_0 402_16V4Z
+1.8VS
+V1.05 S_VCCA_A_DP L
+V1.05 S_VCCA_B_DP L
+1.05VS
1U_040 2_6.3V6K
C251
1
2
0.1U_0 402_16V4Z
+V1.1A _INT_VCC SUS
0.1U_0 402_16V4Z
+3VALW
0.1U_0 402_16V4Z
+3VS
0.1U_0 402_16V4Z
+VCCP
C266
1
2
C272
1
2
1
2
C252
1
2
0 . 2 A @ 3 .
0 . 2 A @ 3 . 3V
0 . 2 A @ 3 .0 . 2 A @ 3 .
0 . 4 A @ 3 .
0 . 4 A @ 3 . 3V
0 . 4 A @ 3 .0 . 4 A @ 3 .
0 . 1 A @ 1 .
0 . 1 A @ 1 . 1V
0 . 1 A @ 1 .0 . 1 A @ 1 .
4.7U_0 603_6.3V6K
2222 mA @ 3 . 3 V
1U_040 2_6.3V6K
C236
1
2
22U_0805_6 .3V6M
C241
1
2
+VCCRTCEXT
1U_040 2_6.3V6K
1U_040 2_6.3V6K
C253
1
2
+VCCSST
0.1U_0 402_16V4Z C268
C267
1
2
m A @ 3 . 3 V
m A @ 3 . 3 Vm A @ 3 . 3 V
0.1U_0 402_16V4Z
C273
1
2
AP51
AP53
AF23
AF24
AD38
AD39
AD41
1U_0402 _6.3V6K
AF43
AF41
AF42
1U_0402 _6.3V6K
AU24
BB51 BB53
BD51 BD53
AH23
AJ35
AH35
AF34
AH34
AF32
3 V
3 V3V
3 V
3 V3V
1 V
1 V1V
AT18
0.1U_0 402_16V4Z
1
AU18
2
U4J
VCCACLK[1]
VCCACLK[2]
VCCLAN[1]
VCCLAN[2]
Y20
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
V39
VCCME[7]
V41
VCCME[8]
V42
VCCME[9]
Y39
VCCME[10]
Y41
VCCME[11]
Y42
VCCME[12]
V9
DCPRTC
0.035A
VCCVRM[3]
0.072A
VCCADPLLA[1] VCCADPLLA[2]
0.073A
VCCADPLLB[1] VCCADPLLB[2]
VCCIO[21] VCCIO[22] VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]
V12
DCPSST
Y22
DCPSUS
P18
VCCSUS3_3[29]
U19
VCCSUS3_3[30]
U20
VCCSUS3_3[31]
U22
VCCSUS3_3[32]
V15
VCC3_3[5]
V16
VCC3_3[6]
Y16
VCC3_3[7]
V_CPU_IO[1]
>1mA
V_CPU_IO[2]
A12
VCCRTC
IBEXPEAK- M_FCBGA1071
0.052A
0.344A
1.998A
3.208A
2mA
POWER
USB
Clock and Miscellaneous
PCI/GPIO/LPC
0.032A
SAT A
CPU
RTC PCI/GPIO/LPC
0.163A
>1mA
>1mA
0.357A
6mA
HDA
VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]
VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]
VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]
VCCSUS3_3[28]
VCCIO[56]
V5REF_SUS
V5REF
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCSATAPLL[1] VCCSATAPLL[2]
VCCIO[9]
VCCVRM[4]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16]
VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]
VCCME[13] VCCME[14] VCCME[15] VCCME[16]
VCCSUSHDA
2
V24 V26 Y24 Y26
V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3 AK1
AH22
AT20
AH19
AD20
AF22
AD19 AF20 AF19 AH20
AB19 AB20 AB22 AD22
AA34 Y34 Y35 AA35
L30
+1.05VS
1
C232 1U_0402 _6.3V6K
2
+3VALW
0.1U_0 402_16V4Z
C234
1
2
+1.05VS
ICH_ V5REF_ SUS
ICH_ V5REF _RUN
+3VS
1
C246
0.1U_0 402_16V4Z
2
+3VS
1 2
C254 0.1U_ 0402_16V4Z
+1.8VS
+PCH_ VCC1_1_20 +PCH_ VCC1_1_21 +PCH_ VCC1_1_22 +PCH_ VCC1_1_23
1
C271 1U_0402 _6.3V6K
2
0.1U_0 402_16V4Z
C235
1
2
T117TPC12 T118TPC12
1U_0402 _6.3V6K
C261
1
2
R290 0_0402_ 5%
1 2
R291 0_0402_ 5%
1 2
R292 0_0402_ 5%
1 2
R293 0_0402_ 5%
1 2
R296 0_0402_5%
1 2
+1.05VS
+1.05VM
+3VALW
+1.05VS
+1.8VS
3
+1.05VS
+1.05VS
+1.05VS
1U_0402 _6.3V6K
C247
1
2
C9320.1U _0402_16V4Z
1 2
1 2
R881 0_0402 _5%
+1.05VS
1 2
10UH_LB201 2T100MR_20%_0805
1U_0402 _6.3V6K
1 2
10UH_LB201 2T100MR_20%_0805
1U_0402 _6.3V6K
1U_060 3_10V4Z
C226
1
2
T116
TPC12
1U_0402 _6.3V6K
C243
1
2
1U_0402 _6.3V6K
C248
1
2
T119 TPC 12
L5
L6
+3VS
C264
C270
C227
1
2
C244
1
2
C249
1
2
AB24
10U_0805_6 .3V6M
AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31
AJ30 AJ31
AK24
BJ24
AN20 AN22 AN23 AN24 AN26 AN28
BJ26
BJ28 AT26 AT28 AU26 AU28
1U_0402 _6.3V6K
AV26 AV28
AW26 AW28
BA26 BA28 BB26 BB28 BC26 BC28
10U_0603_6 .3V6M
BD26 BD28 BE26 BE28 BG26 BG28 BH27
AN30 AN31
AN35
AT22
BJ18
AM23
SI2 NO9
+V1.05 S_VCCA_A_DP L
1
2
+V1.05 S_VCCA_B_DP L
1
2
U4G
VCCCORE[1] VCCCORE[2] VCCCORE[3]
1.524A
VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]
VCCIO[24]
0.042A
VCCAPLLEXP
VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53]
VCCIO[54] VCCIO[55]
VCC3_3[1]
0.035A
VCCVRM[1]
6mA
VCCFDIPLL
VCCIO[1]
IBEXPEAK- M_FCBGA1071
1
C263
+
47U_B2_6.3 V-M
2
1
C269
+
47U_B2_6.3 V-M
2
POWER
VCC CORE
DMI
PCI E*
NAND / SPI
FDI
SI1: No 49
09/4/28 HP
4
0.069A
CRTLVDS
0.030A
0.059A
HVCMOS
0.061A
0.156A
0.085A
VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
VSSA_DAC[2]
VCCALVDS
VSSA_LVDS
VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
VCCVRM[2]
VCCDMI[1]
VCCDMI[2]
VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]
VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]
AE50
AE52
AF53
AF51
AH38
AH39
AP43 AP45 AT46 AT45
AB34
AB35
AD35
AT24
AT16
AU16
AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15
AM8 AM9 AP11 AP9
100_0402_1%
10U_0805_6 .3V6M
0.01U_0 603_16V7K
C229
C228
1
1
2
2
09/2/16 HP
+3VS
1 2
C238 0.1U _0402_16V4Z
+1.8VS
+VCCP
1 2
C245 1U_0 603_10V4Z
+V_NV RAM_VCCQ
0.1U_0 402_16V4Z
C250
1
2
+3VM
0.1U_0 402_16V4Z
C257
1
2
12
R294
L43
1 2
10UH_LB201 2T100MR_20%_0805
0.1U_0 402_16V4Z
C230
1
Item 145(Ja son_20081126)
2
21
09/2/5 HP
D2
CH751H -40PT_SOD323-2
ICH_ V5REF_ SUS
1
C274 1U_0402 _6.3V6K
2
5
+3VS
R295
100_0402_1%
+5VS +3VS+3VALW+5VALW
12
21
D3
CH751H- 40PT_SOD323-2
ICH_ V5REF _RUN
20 mi ls20 mi ls
1
C275 1U_0402 _6.3V6K
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
IBEX-M(5/6)-PWR
LA-4902P
5
16 47Wedn esday, Decembe r 09, 20 09
0.3
1
hexainf@hotmail.com
2
3
4
5
U4I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
B39
VSS[166]
B43
VSS[167]
B47
A A
B B
C C
D D
VSS[168]
B7
VSS[169]
BG12
VSS[170]
BB12
VSS[171]
BB16
VSS[172]
BB20
VSS[173]
BB24
VSS[174]
BB30
VSS[175]
BB34
VSS[176]
BB38
VSS[177]
BB42
VSS[178]
BB49
VSS[179]
BB5
VSS[180]
BC10
VSS[181]
BC14
VSS[182]
BC18
VSS[183]
BC2
VSS[184]
BC22
VSS[185]
BC32
VSS[186]
BC36
VSS[187]
BC40
VSS[188]
BC44
VSS[189]
BC52
VSS[190]
BH9
VSS[191]
BD48
VSS[192]
BD49
VSS[193]
BD5
VSS[194]
BE12
VSS[195]
BE16
VSS[196]
BE20
VSS[197]
BE24
VSS[198]
BE30
VSS[199]
BE34
VSS[200]
BE38
VSS[201]
BE42
VSS[202]
BE46
VSS[203]
BE48
VSS[204]
BE50
VSS[205]
BE6
VSS[206]
BE8
VSS[207]
BF3
VSS[208]
BF49
VSS[209]
BF51
VSS[210]
BG18
VSS[211]
BG24
VSS[212]
BG4
VSS[213]
BG50
VSS[214]
BH11
VSS[215]
BH15
VSS[216]
BH19
VSS[217]
BH23
VSS[218]
BH31
VSS[219]
BH35
VSS[220]
BH39
VSS[221]
BH43
VSS[222]
BH47
VSS[223]
BH7
VSS[224]
C12
VSS[225]
C50
VSS[226]
D51
VSS[227]
E12
VSS[228]
E16
VSS[229]
E20
VSS[230]
E24
VSS[231]
E30
VSS[232]
E34
VSS[233]
E38
VSS[234]
E42
VSS[235]
E46
VSS[236]
E48
VSS[237]
E6
VSS[238]
E8
VSS[239]
F49
VSS[240]
F5
VSS[241]
G10
VSS[242]
G14
VSS[243]
G18
VSS[244]
G2
VSS[245]
G22
VSS[246]
G32
VSS[247]
G36
VSS[248]
G40
VSS[249]
G44
VSS[250]
G52
VSS[251]
AF39
VSS[252]
H16
VSS[253]
H20
VSS[254]
H30
VSS[255]
H34
VSS[256]
H38
VSS[257]
H42
VSS[258]
IBEXPEAK- M_FCBGA1071
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]
H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14
U4H
AB16
VSS[0]
AA19
VSS[1]
AA20
VSS[2]
AA22
VSS[3]
AM19
VSS[4]
AA24
VSS[5]
AA26
VSS[6]
AA28
VSS[7]
AA30
VSS[8]
AA31
VSS[9]
AA32
VSS[10]
AB11
VSS[11]
AB15
VSS[12]
AB23
VSS[13]
AB30
VSS[14]
AB31
VSS[15]
AB32
VSS[16]
AB39
VSS[17]
AB43
VSS[18]
AB47
VSS[19]
AB5
VSS[20]
AB8
VSS[21]
AC2
VSS[22]
AC52
VSS[23]
AD11
VSS[24]
AD12
VSS[25]
AD16
VSS[26]
AD23
VSS[27]
AD30
VSS[28]
AD31
VSS[29]
AD32
VSS[30]
AD34
VSS[31]
AU22
VSS[32]
AD42
VSS[33]
AD46
VSS[34]
AD49
VSS[35]
AD7
VSS[36]
AE2
VSS[37]
AE4
VSS[38]
AF12
VSS[39]
Y13
VSS[40]
AH49
VSS[41]
AU4
VSS[42]
AF35
VSS[43]
AP13
VSS[44]
AN34
VSS[45]
AF45
VSS[46]
AF46
VSS[47]
AF49
VSS[48]
AF5
VSS[49]
AF8
VSS[50]
AG2
VSS[51]
AG52
VSS[52]
AH11
VSS[53]
AH15
VSS[54]
AH16
VSS[55]
AH24
VSS[56]
AH32
VSS[57]
AV18
VSS[58]
AH43
VSS[59]
AH47
VSS[60]
AH7
VSS[61]
AJ19
VSS[62]
AJ2
VSS[63]
AJ20
VSS[64]
AJ22
VSS[65]
AJ23
VSS[66]
AJ26
VSS[67]
AJ28
VSS[68]
AJ32
VSS[69]
AJ34
VSS[70]
AT5
VSS[71]
AJ4
VSS[72]
AK12
VSS[73]
AM41
VSS[74]
AN19
VSS[75]
AK26
VSS[76]
AK22
VSS[77]
AK23
VSS[78]
AK28
VSS[79]
IBEXPEAK- M_FCBGA1071
VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]
VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47
+3VS
12
R297
100K_0402_5%
PCH_ NCTF615
+3VS
R298
100K_0402_5%
PCH_ NCTF715
+3VS
R299
100K_0402_5%
PCH_ NCTF1915
+3VS
R300
100K_0402_5%
PCH_ NCTF2615
12
12
2
12
5
61
Q7A 2N7002DW H_SOT363-6
2
34
Q7B 2N7002DW H_SOT363-6
5
61
Q8A 2N7002DW H_SOT363-6
34
Q8B 2N7002DW H_SOT363-6
CRACK _BGA
CRACK _BGA
CRACK _BGA
CRACK _BGA 8, 29
BGA Ball Cracking Prevention and Detection
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
IBEX-M(6/6)-GND
LA-4902P
5
17 47Wedn esday, Decembe r 09, 20 09
0.3
1
2
3
4
5
CRT Connector
A A
+CRTV DD+RCRT _VCC+5VS
W=40mi ls
JP4
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
SUYI N_070912 FR015S22 9ZR
CON N@
+CRTV DD
R313
2.2K_0402 _5%
12
Pla ce cloce to VGA
L
16
G
17
G
R314
2.2K_0402 _5%
12
6 1
Q11A
2N7002KDW H_SOT363-6
2N7002KDW H_SOT363-6
2
3 4
Q11B
+3VS
R315
R316
2.2K_0402 _5%
2.2K_0402 _5%
12
12
5
CRT_D DC_DATA 14D_DD CDATA28
CRT _DDC_CL K 14
0_0402_5%
D4 CH491 D_SC59
2 1
0.1U_0 402_16V4Z
R2002
1 2
1
C276
2
D_D DCDATA
D_DD CCLK
F1
R30975_0402_1%
21
VGA_G ND
VGA_R ED_R
VGA_G RN_R
VGA_B LUE_R
Close to JP 4 9/11
1.1A_8V_S MD1812P110TF(H F)
R30875_0402_1%
R30775_0402_1%
12
12
12
D_DD CCLK28
1
D63
2
3
@
DAN217 GT146_SC59-3
74AHCT1G1 25GW_SOT353-5
CRT _HSYN C14
CRT _VSYNC14
Near to JP4
1
D64
D65
2
3
@
@
DAN217 GT146_SC59-3
DAN217 GT146_SC59-3
just ch ange par t n umber beca use no foot pri nt
2
1
3
D66
2
@
DAN217 GT146_SC59-3
+5VS
C286
0.1U_0 402_16V4Z
1 2
1
5
P
OE#
A2Y
G
3
L51 KC FBMA-L1 0-160808-600LMT 0603
1
1
D67
2
3
3
@
+CRTV DD
DAN217 GT146_SC59-3
+5VS
C287
0.1U_0 402_16V4Z
1 2
U7
4
H SYNC D _HS YNC
R311 0_0603_5%
1
5
U8
P
VS YNC D _VS YNC
4
OE#
A2Y
G
74AHCT1G1 25GW_SOT353-5
3
Pla ce cloce to VGA
L
1 2
R312 0_0603_5%
1 2
VGA_R ED28
VGA_G RN28
VGA_BLU28
C288
5P_0402_50 V8C
1
2
C963
1
C289 5P_0402_50 V8C
2
1 2
L52 KC FBMA-L1 0-160808-600LMT 0603
1 2
L53 KC FBMA-L1 0-160808-600LMT 0603
1 2
10P_0402_5 0V8J
10P_0402_5 0V8J
10P_0402_5 0V8J
C965
C964
1
1
1
2
2
2
layout note: D_HSYNC & D_VS YNC sh ould be routed to do cking connec tor th en to VGA connec tor
10P_0402_5 0V8J
C277
C278
1
2
D_HSYNC 28
D_V SYNC 28
10P_0402_5 0V8J
10P_0402_5 0V8J
C279
1
1
2
PV
2
VGA_G ND
VGA_B LUE_R VGA_G RN_R VGA_R ED_R D_ HSYN C D_V SYNC
B B
C C
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
CRT Connector
LA-4902P
5
18 47Wedn esday, Decembe r 09, 20 09
0.3
5
hexainf@hotmail.com
4
3
2
1
D D
D75
@
+1.5VS
0.1U_0 402_16V4Z
0.01U_04 02_16V7K
0.01U_04 02_16V7K
C1016
C1015
C1014
1
1
2
2
C C
Add Pericom PI2EQXDP10 1 to DP port 6/30
DPD_TXP014 DPD_TXN014 DPD_TXP114 DPD_TXN114
DPD_TXP214 DPD_TXN214
B B
DPD_TXP314 DPD_TXN314
C1018
1
1
2
2
+3VS_DP
+3VS
DPD_AUX #
1 2
F2
R1988 100K_0402_5%
0.1U_0 402_16V4Z
1U_0402 _6.3V6K
1U_0402 _6.3V6K
C1017
C1019
1
1
2
2
DPD_C TRLDATA 14 DPD_C TRLCLK 14
DPD_AUX 14
DP_C_D ATA0_P DP_C_ DATA0_N DP_C_D ATA1_P DP_C_ DATA1_N
DP_C_D ATA2_P DP_C_ DATA2_N
DP_C_D ATA3_P DP_C_ DATA3_N
DPD_ HPD_R DCA D
DPD_AUX # 14
DPD_AUX
R1987 100K_0402_5%
1 2
C1026 0. 1U_0402_10V7K
1 2
C1027 0. 1U_0402_10V7K
1 2
C1028 0. 1U_0402_10V7K
1 2
C1029 0. 1U_0402_10V7K
1 2
C1030 0. 1U_0402_10V7K
1 2
C1031 0. 1U_0402_10V7K
1 2
C1032 0. 1U_0402_10V7K
1 2
C1033 0. 1U_0402_10V7K
1 2
DPD_ HPD 14
+1.5VS
+3VS_DP
DPD_TXP0 DPD_TXN0 DPD_TXP1 DPD_TXN1
DPD_TXP2 DPD_TXN2
DPD_TXP3 DPD_TXN3
DPD_C _AUX_L DPD_C _AUX_L#
U335
32
35
30
34
33
31
29
36
37
GND
1
D0+
2
D0-
3
D1+
4
D1-
5
VDD15
6
D2+
7
D2-
8
GND
9
D3+
10
D3-
VCC33
DDCSCL
DDCSDA
AUXSRC-
AUXSRC+
AUX_SINK+
VDD1511CAD12HPDSRC13CAD_SINK14HPD_SINK15NC16VDD1517GND
VDD15
AUX_SINK-
D0+A
D0-A
D1+A
D1-A GND
D2+A
D2-A
VDD15
D3+A
D3-A
18
28 27 26 25 24 23 22 21 20 19
PI2EQXDP1 01ZFEX_TQFN36
+3VS
SDM10U 45-7_SOD523-2
NANO SMDC05 0F 0.5A 13.2V POL Y-FUSE
21
2 1
SI2 NO8
12
R825 0_1206_5%
+3VS_DP
C897
1
2
DP_DATA 0_P DP_DA TA0_N DP_DATA 1_P DP_DA TA1_N
DP_DATA 2_P DP_DA TA2_N
DP_DATA 3_P DP_DA TA3_N
+DPA_3V
0.1U_0 402_16V4Z
+3VS_DP
C898
10U_08 05_10V4Z
1
JDP1
2
12
12
R937
5.1M_0402_5%
R938 1M_0402_5%
DPD_ HPD_R DPD_C _AUX_L#
DPD_C _AUX_L
DCA D DP_DA TA3_N
DP_DATA 3_P DP_DA TA2_N
DP_DATA 2_P DP_DA TA1_N
DP_DATA 1_P DP_DA TA0_N
DP_DATA 0_P
20
DP_PWR
19
RTN
18
HP_DET
17
AUX_CH-
16
GND
15
AUX_CH+
14
GND
13
CA_DET
12
LANE3-
11
LANE3_shield
10
LANE3+
9
LANE2-
8
LANE2_shield
7
LANE2+
6
LANE1-
5
LANE1_shield
4
LANE1+
3
LANE0-
2
LANE0_shield
1
LANE0+
MOLEX_105020-0001
CON N@
GND GND GND GND
24 23 22 21
Change connecting eDP to PCH DP 11/24
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
2
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
Display Port Connector
LA-4902P
1
19 47Wedn esday, Decembe r 09, 20 09
0.3
1
1 2
A A
B+
12
@
R2007
220K_0402_5%
R2008
100K_0402_5% @
1 2
R2014 0_0805_5%
SI2303CDS -T1-E3_SOT23-3
Q96
12
C1054
@
0.22U_0 603_25V7K
HP request 9/16
D
S
13
@
G
2
INVPW R_B+
47P_0402_5 0V8J
C294
1
@
2
C1053 1U_0805_25 V6K
1 2
2
+LC DVDD+3VS
47P_0402_5 0V8J
C292
1
12
C296
680P_0402_5 0V7K
USB20 _N12_R
+5VALW
@
2
@
D14
4
IO1
VIN
3
GND
IO2
PRTR5V0U 2X_SOT143-4
P/N cha nge to S C30 0000 P00 , CM 1293 A-02S R
1
2
2
1
680P_0402_5 0V7K
C293
USB20 _P12_R
3
+5VKBL +5VS +5VS
Q78
SI2301CDS -T1-GE3_SOT23-3
S
1 3
D
G
2
Key_Board_Light power Control
4
SI1 NO8
09/3/9 HP
DIS P_OFF# ENABLT
SI1 NO9
10K_0402_5%
2
1 3
D
09/3/9 HP
LID_S W#
G
Q79 SSM3K7002F _SC59-3
S
12
R1077
R1090
1 2
2K_0402_5%
D13
2 1
CH751H -40PT_SOD323-2
LID_S W#
5
12
R324
100K_0402_1%
ENABLT 14
LID_S W# 25,2 9
8/31 HP
LCD/PANEL BD. CONN.
JEDP 1
MB_DP_DAT A0_P5
B B
MB_DP_DAT A0_N5
1
C303
2
+LC DVDD
INV_PW M14
ALS_EN#15
+5VKBL
680P_0402_5 0V7K
R912
1 2
+3VS
0_0805_5%
DIS P_OFF#
WEBC AM_ON
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31
ACES_50238 -03071-002
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
11
12
USB20 _P12_R
14
13
14
USB20 _N12_R
16
15
16
18
17
18
20
19
20
22
21
22
24
23
24
26
26
25
28
27
28
30
29
30
32
G1
G2
MB_DP_AUXP 5 MB_DP_AUXN 5
MB_DP _HPD 5
+5VS
INVPW R_B+
Modify from HP 10/16
1 2
R3250_0402_5%
L41
@
1
1
4
4
1 2
2
2
3
3
WCM-20 12-900T_4P
R3260_0402_5%
USB20_P1 2 15
USB20 _N12 15
Change eDP LCD conn ector to 30pin for Coxial cable 9/13
C C
MB_DP_AUXN
12
R1028 100K_0402_5%
@
+3VS
MB_DP_AUXP
12
R58 100K_0402_5%
12
R50 100K_0402_5%
+3VS
2
D D
12
R1027 100K_0402_5%
@
1
SI1 NO4 5
09/4/27 HP
PCH_XDP _GPIO3712,15
1 2
R329 0_0402_5%
WEBC AM_ON
R330
100K_0402_5%
1 2
LCD POWER CIRCUIT
12
R333 100_0402_1%
SI1 NO4 5
09/4/27 HP
SSM3K7002F _SC59-3
ENA VDD14
100K_0402_1%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
13
D
Q9
S
12
R336
Deciphered Date
4
R335 47K_0402_5%
2
G
1
OUT
2
IN
GND
3
C298
1
@
2
1 2
0.1U_0 402_16V4Z
Q16 DTC124EKA T146_SC59-3
+5VS
47P_0402_5 0V8J
C306
0.1U_0 402_16V4Z
0.01U_04 02_16V7K
C299
1
2
1
2
4.7U_0 805_10V4Z
C300
C301
1
1
2
2
Q15
D
S
AP2301GN 1 P_SOT23
1 3
G
2
R334 1M_0402_5%
1 2
C305 0.1U_0402_16V4 Z
1
C307
4.7U_0 805_10V4Z
2
Title
LCD CONN & Q-Switch & GPIO Ext.
Size Docum ent Num ber R ev
Dat e: Sheet o f
1 2
Compal Electronics, Inc.
LA-4902P
5
+3VS+LCD VDD+LC DVDD
1
C308
4.7U_0 805_10V4Z
2
20 47Wedn esday, Decembe r 09, 20 09
@
0.3
1
hexainf@hotmail.com
+3VM
R433
A A
SI, No6 1
09/5/4 HP
B B
C C
SI, No7 8
LAN_ACT#22, 28
CLK_P CIE_LAN_ REQ1#13
CLK_P CIE_LAN_ REQ#15 PLT_RST#4,12,15 ,23,25,31
CLK_P CIE_LAN15 CLK_P CIE_LAN#15
PCIE_PRX_DTX_P613 PCIE_PRX_D TX_N613
PCIE_PTX_ C_DRX_P613 PCIE_PTX_ C_DRX_N613
SML0CLK13 SML0DATA13
LAN_ DIS#15 ,22
LED_L INK_LAN#22
LED_L INK_LAN# _R15, 22
0_0603_5%
1 2
1
2
R437 0_0402_5%
1 2
C495 0.1U_0402_10V6K
1 2
C497 0.1U_0402_10V6K
1 2
R438 0_0402_5%
1 2
R439 0_0402_5%
1 2
R442 0_0402_5%
1 2
R1078 0_0402_5%@
1 2
09/2/5 HP
R445 10K_0402_5%@
1 2
R447 10K_0402_5%@
1 2
+3VM_LAN
0.1U_0 402_16V4Z
10U_08 05_10V4Z
C492
1
2
R1118 0_0 402_5%
1 2
R928 0_0402_5%@
1 2
LAN_ACT #
R450 1K_0402_5%
R451 3.01K_0402 _1%
2
C493
PLT_RST#_LAN
PCIE_PRX_ DTX_P6_C PCIE_PRX_ DTX_N6_C
LAN_SM_ CLK LAN_SM_DAT
LAN_ PHYPC _R
LANLINK _STATUS#
T61TPC12 T62TPC12
LAN_JTAG_TMS LAN_JTAG_ TCK
XTAL2 XTAL1
1 2
1 2
U18
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
WG8257 7LM_QFN48P
PCIE
SMBUS
JTAG LED
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_VCC3P3_1 RSVD_VCC3P3_2
VDD3P3_IN
VDD3P3_OUT
VDD3P3_15 VDD3P3_19 VDD3P3_29
VDD1P0_47 VDD1P0_46 VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40 VDD1P0_22 VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
3
+1.0VM_LAN
0.1U_0 402_16V4Z
C488
09/2/5 HP
13 14
17 18
20 21
23 24
6
VCT
1 2 5
4
15 19 29
47 46 37
43
11
40 22 16 8
7
49
R440 3.01K_040 2_1%
1 2
R441 3.01K_040 2_1%
1 2
+3.3VM_LAN _OUT
+3.3VM_LAN _OUT_R
+1.0VM_LAN 4
+1.0VM_LAN 3
+1.0VM_LAN 2
LAN_C TRL_18
1
2
1 2
R443 0_0603 _5%
1 2
R444 0_0603 _5%
1 2
R446 0_0603 _5%
1 2
R448 0_0603 _5%
1 2
R449 0_0603 _5%
T124 TPC12
LAN_M DI0P 22 LAN_M DI0N 22
LAN_M DI1P 22 LAN_M DI1N 22
LAN_M DI2P 22 LAN_M DI2N 22
LAN_M DI3P 22 LAN_M DI3N 22
TRM_CT 22
R2013 0_0603_5%
1 2
R429 0_0603_5%
1 2
22U_0805_6 .3V6M
SI1 NO8 5
C489
1
2
+3VM_LAN
1
C503 1U_0603 _10V4Z
2
+1.0VM_LAN+3VM_LAN
4
From Power
+1.05VM_LAN
5
Add 10 P for 200uW overdriv e 2/2
DB2: No . 70
1 2
C6 10P_04 02_50V8J
25MHZ _18PF_X5H025 000DI1H-H
Y5
1 2
2
C508
33P_0402_5 0V8J
D D
1
C509
33P_0402_ 50V8J
1
2
XTAL2
XTAL1
2
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Dat e: Sheet
Compal Electronics, Inc.
Intel 82566 Nineveh
LA-4902P
5
of
21 47Wedn esday, Decembe r 09, 20 09
0.3
1
A A
Add on 11/11.
SI1 NO1 9
Add on 11/14.
LED_L INK_LAN# _R15, 21
LED_L INK_LAN_ DOCK#28
R1080 0_0 402_5%
1 2
Q80
SSM3K7002F _SC59-3
D
1 3
2
S
G
SI1 NO1 7
09/3/27 HP
B B
Item 141(Ja son_20081126)
+3VM_LAN
@
1 2
LAN_M DI0P21
LAN_M DI0N21
1 2
C515 1U_ 0402_6.3V6K
LAN_M DI1P21
LAN_M DI1N21
LAN_M DI2P21
R1004
0_0402_5%
@
R929
TRM_CT21
C C
1 2
0_0402_5%
SI1 NO2 6
09/4/10 HP
SI1 NO6 3
LAN_M DI0P
LAN_M DI0N
TRM_CTR
LAN_M DI1P
LAN_M DI1N
TRM_CTR
LAN_M DI2P
2
LED_L INK_LAN#
09/2/5 HP
12
11
10
9
8
7
6
3
LED_L INK_LAN#
LAN_ACT #
1 2
1 2
C514680P_0402_5 0V7K@
C517680P_0402_5 0V7K@
LAN_ACT#21, 28
LED_L INK_LAN#21
LAN_ DIS# 15, 21
T63
TD4-
1:1
TD4+
TCT4
TD3-
1:1
TD3+
TCT3
TD2-
MX4-
MX4+
MCT4
MX3-
MX3+
MCT3
MX2-
MDO0+
13
14
15
16
17
18
19
MDO0-
MCT0
MDO1+
MDO1-
MCT1
MDO2+
MDO0+ 28
MDO0- 28
C516 0.01U_0402_50V7K
1 2
MDO1+ 28
MDO1- 28
C519 0.01U_0402_50V7K
1 2
MDO2+ 28
R456
75_0402_1%
1 2
R458
75_0402_1%
1 2
4
+3VM_LAN
R946
10K_0402_5%
12
DB1 No7 6
+3VM_LAN_L ED
R454 300_0603_5%
1 2
+3VM_LAN
R455
10K_0402_5%
12
+3VM_LAN_L ED
R457 300_0603_5%
1 2
MDO3-
MDO3+
MDO1-
MDO2-
MDO2+
MDO1+
MDO0-
MDO0+
JP6
13
Yellow LED+
14
Yellow LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED+
12
Green LED-
FOX_JM3611 3-P1123-7F
CON N@
20 mil 20 mil
R460 100K_0402_5%
DOC K_ID28
16
SHLD1
9
DETECT PIN1
10
DETCET PIN2
15
SHLD1
+3VM_LAN +3VM_LAN_L ED
S
12
2
G
5
2
3
D57 PJSOT05C_ SOT23-3
@
1
D
13
Q22
G
AP2301GN 1 P_SOT23
2
13
D
Q23 SSM3K7002F _SC59-3
S
LAN_M DI2N21
LAN_M DI3P21
SI1 NO5 0
09/4/28 HP
1
1
2
C978
D D
2
C980
C979
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
TRM_CTR
1
1
2
2
C981
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
LAN_M DI2N
TRM_CTR
LAN_M DI3P
TRM_CTR
5
TD21+
4
TCT2
3
TD1-
2
TD1+
1
TCT1
350uH_N S892402P
1:1
1:1
MX2+
MCT2
MX1-
MX1+
MCT1
MDO2-
20
21
22
23
24
MCT2
MDO3-LAN_M DI3N
MDO3+
MCT3
MDO2- 28
C521 0.01U_0402_50V7K
1 2
MDO3- 28LAN_M DI3N21
MDO3+ 28
C523 0.01U_0402_50V7K
1 2
R459
75_0402_1%
1 2
R461
75_0402_1%
1 2
C524 1000P_1808_3K V7K
1 2
plac e 1 cap acit or at e ach pin (1, 4,7,1 0)
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
Magnetic & RJ45
LA-4902P
5
22 47Wedn esday, Decembe r 09, 20 09
0.3
1
hexainf@hotmail.com
2
3
4
5
WLAN (Half mini Card)
Reserv e for port80 card use fo r FCS i n factor y side. 10/1 7
DEG_F RAME# DEBUG _AD3 DEBUG _AD2 DEBUG _AD1 DEBUG _AD0
PCI_R ST#_R
PCIE_ WAKE#
R471 10K_0402_5%@
1 2
CLK_P CIE_MCA RD# CLK_P CIE_MCAR D
CLK_ PCI_DEB UG
R472 0_0402_5%
1 2
R473 0_0402_5%
1 2
CL_CL K1
R924
CL_DATA 1
R925
CL_RST# 1
R926
0.01U_0 402_16V7K
C528
C529
1
1
2
2
0.1U_04 02_10V6K
1
@
2
G
2
1 3
+1.5VS
4.7U_0 805_10V4Z
0.1U_0 402_16V4Z C530
1
2
S
Q24 SI2305ADS- T1-GE3_SOT23-3
+3V_WLA N
D
WLAN _TRANSMIT_O FF# 15
PCIE_ WAKE#1 4,25
CLKRE Q_WLAN#13
CLK_P CIE_MCAR D#13 CLK_P CIE_MCAR D13
CLK_ PCI_DEBU G15
PCIE_PRX_ DTX_N413 PCIE_PRX_DTX_P413
PCIE_PTX_ C_DRX_N413 PCIE_PTX_ C_DRX_P413
CL_CL K113 CL_DATA 113 CL_RST1 #13
+3V_WLA N
0.1U_0 402_16V4Z
C526
1
2
10K_0402_5%
12
R474
@
4.7U_0 805_10V4Z
C883
1
2
R475
1 2
220K_0402_1%
C939
0.01U_0 402_16V7K
SI, No5 4
C525
1
2
+3VALW
A A
09/5/4 HP
SI, No7 6
MC2_DI SABLE29
B B
XMIT_D_OFF#
Add to preve nt lea kage issue .
2 1
D15 CH751H -40PT_SOD323-2
R464 0_0402_5% R465 0_0402_5% R466 0_0402_5% R467 0_0402_5% R468 0_0402_5%
R469 0_0402_5%
PCI_R ST#_R
PCIE_ C_RXN4 PCIE_ C_RXP4
+3V_WLA N
0_0402_5%
CL_CL K1-R
12
CL_DAT A1-R
12
CL_RST 1#-R
12
T64 T PC12
0_0402_5% 0_0402_5%
1 2 1 2 1 2 1 2 1 2
1 2
JP7
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
FOXCO NN AS0B22 6-S40N-7F 52P
CON N@
GND2
2 4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
LPC_L AD3 LPC_L AD2 LPC_L AD1 LPC_L AD0
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
DEG_F RAME# DEBUG _AD3 DEBUG _AD2 DEBUG _AD1 DEBUG _AD0
XMIT_D_OFF#
WL_L ED#
LPC_L FRAME# 12, 29,30,31 LPC_L AD3 12,29 ,30,31 LPC_L AD2 12,29 ,30,31 LPC_L AD1 12,29 ,30,31 LPC_L AD0 12,29 ,30,31
PCI_RS T# 15,27
PLT_RST# 4 ,12,15,21 ,25,31
WL_LE D# 25
+3V_WLA N
+1.5VS
SATA HDD CONN.
SI, No6 2
09/5/4 HP
C C
JHDD1
CON N@
RSVD
GND
GND
GND
3.3V
3.3V
3.3V GND GND GND
GND
GND
1 2
A+
A-
B-
B+
V5 V5 V5
V12 V12 V12
3 4 5 6 7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0
+5VS
+5VS
1
2
Placea caps. nea r HDD CONN.
1
23
PTH
24
PTH
25
NPTH
26
NPTH
SANTA_1 92601-1_NR
D D
Place caps. near HDD CONN.
1 2 1 2
1 2 1 2
Near CONN side.
10U_08 05_10V4Z
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
C193
C195
C194
1
1
2
2
C1850.01U_0402_16V7 K C1860.01U_0402_16V7 K
C1870.01U_0402_16V7 K C1880.01U_0402_16V7 K
0.1U_0 402_16V4Z
1
2
SATA_PTX_DRX_P0SATA_PTX_C_DRX_P0 SATA_PTX_DRX_N0
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0
C196
SATA_PTX_DRX_P0 12 SATA_PTX_DRX_N0 12
SATA_PRX_DTX_N0 12 SATA_PRX_DTX_P0 12
2
3
SATA ODD CONN.
Place caps.
10U_08 05_10V4Z
C209
1
2
Deciphered Date
near OD D CONN.
10U_08 05_10V4Z
C210
1
2
1 2 1 2
1 2 1 2
1
C206
0.1U_0 402_16V4Z
2
4
SATA_PTX_DRX_P1
C1980.01U_0402_16V7 K
SATA_PTX_DRX_N1
C1990.01U_0402_16V7 K
SATA_PRX_DTX_N1
C2000.01U_0402_16V7 K
SATA_PRX_DTX_P1
C2020.01U_0402_16V7 K
@
ODD_D ET# 15
JOD D1
CON N@
1
17
NPTH
16
NPTH
15
PTH
14
PTH
TYCO_1 735491-3
GND
GND
GND
GND GND
TX+
TX-
RX+ RX-
DP
V5 V5
MD
2 3 4 5 6 7
8 9 10 11 12 13
SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1
SATA_PRX_C_DTX_N1 SATA_PRX_C_DTX_P1
R174 0_0402_5%@
1 2
+5VS
+5VS
Near CONN side.
0.1U_0 402_16V4Z C207
1
2
1U_060 3_10V4Z
C208
1
2
Placea caps. n ear ODD CON N.
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/09/15 2009/12/31
Compal Secret Data
SATA_PTX_DRX_P1 12 SATA_PTX_DRX_N1 12
SATA_PRX_DTX_N1 12 SATA_PRX_DTX_P1 12
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
WLAN/ODD/HDD
LA-4902P
5
23 47Wedn esday, Decembe r 09, 20 09
0.3
1
WWAN (Full mini Card)
JP9
1
1
3
3
5
5
7
7 9910
A A
T65 T PC12 T66 T PC12
+3V_WW AN
T67
TPC12
D17
M_WXMIT_OFF#
WW AN_TRANSMIT _OFF#15 ,25
B B
CH751H -40PT_SOD323-2
21
111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152
GND153GND2
FOXCO NN AS0B2 26-S40N-7F 52P
CON N@
2
+3V_WW AN
2
2
4
4
6
6
8
8
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
UIM_P WR UIM_DAT A UIM_C LK UIM_RST UIM_VPP
M_WXMIT_OFF#
WW AN_DET#
WW _LED#
09/4/10 HP
SI1 NO2 4
WWA N_DET# 15
USB20 _N9 15 USB20_P9 15
WW _LED# 25
MC1_DI SABLE29
R1091
10K_0402_5%
1 2
@
R1106
1 2
220K_0402_1%
0.1U_04 02_10V6K @
+3VALW
3
SI1 NO7 7
09/5/14 HP
C545
1
2
+3V_WW AN
C547
39P_0402_5 0V8J
39P_0402_5 0V8J
C546
39P_0402_5 0V8J
1
1
2
2
4
+3V_WW AN
0.01U_04 02_16V7K
C542
1
2
4.7U_0 805_10V4Z
0.1U_0 402_16V4Z C544
C543
1
1
2
2
5
Close to JP14
U21
@
1
6
CH1
CH4
2
5
Vn
Vp
4
CH23CH3
S DIO (BR) NUP43 01MR6T1 TSOP- 6
1
VCC
2
RST
3
CLK
8
GND
9
GND
+3V_WW AN
+3V_WW AN
D16
@
1
DAN217GT 146_SC59-3
0.1U_0 402_16V4Z
1
2
3
2
UIM_P WR UIM_RST UIM_C LK
C548
18P_0402_5 0V8J
1
4.7U_0 805_10V4Z
@
2
C550
C549
1
2
C969
+3VALW
G
2
1
2
SI1 NO1 0
09/3/9 HP 09/4/27 HP
chan ge part nu mber
S
Q70 SI2305ADS- T1-GE3_SOT23-3
D
1 3
7W
R1092
@
0_0805_5%
JP10
CON N@
4
UIM_VPP UIM_DAT A
+3VS+3V_WWAN
R491
@
12
47K_0402_5%
GND
5
VPP
6
I/O
7
DET
12
TAITW_ PMPAT6-06GLBS7N14N0
UIM_P WR
NAND
C C
+V_NV RAM_VCCQ
NAND_ DET#12
R495 0_0603_5%
1 2
+3VS
R1089
1 2
10K_0402_5%
+1.8VS
Move these parts near PCH
8/31 HP
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
4
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
WWAN/NAND
LA-4902P
5
24 47Wedn esday, Decembe r 09, 20 09
0.3
1
hexainf@hotmail.com
+3VS
12
R932
61
2
47K_0402_5%
WL/BT_LED#
Q63A
2N7002DWH_ SOT363-6
2009/04/24 SI-1 2009/08/30 HP PV
A A
WL_LED#23
WWAN_T RANSMIT_OFF#15,24
WW_LED #24
BT_LED26
WL_LED#
WW_L ED#
R1111
0_0402_5%
1 2
R1112
0_0402_5%
1 2
BT_LED
R933 100K _0402_5%
WL_LED#
R934 100K _0402_5%@
5
1 2
1 2
34
Q63B 2N7002DWH_ SOT363-6
Change schemat ic for Gobi2 WWAN off of LED issue 9/13
B B
MDC 1.5 Conn.
1 2
HDA_SD OUT_MDC
HDA_ SYNC_MD C HDA_S DIN1_MDC
HDA_SD OUT_MDC12
HDA_ SYNC_MD C12 HDA_ SDIN112 HDA_RST#_ MDC12
C C
R593 33_0402_5%
CONN@
1 3 5 7 9
11
JP21
1 3 5 7 9 11
2
SI, No5 3
09/5/4 HP
ACES_88020-12101_12P
2
2
4
4
6
6
8
8
10
10
12
12
GND13GND14GND15GND16GND17GND
18
SDPWR0_MS PWR_XDPWR27
+3VS
C685
@
C682
1
2
USB20_N415 USB20_P415 EXPRESS_CD#15
PCIE_WAK E#14,23 CLKREQ_EXP#13 CLK_PCIE_EXP#13 CLK_PCIE_EXP13 PCIE_PRX_DTX_N213 PCIE_PRX_DTX_P213 PCIE_PTX_C_DRX_N213 PCIE_PTX_C_DRX_P213 SLP_S3#14,29,32,33,35,3 8,39 PLT_RST#4,12, 15,21,23,31
+1.5VS A_SD#29 SDDATA1_MSDATA027 SDDATA1_MSDATA127 SDDATA2_MSDATA227 SDDATA3_MSDATA327 MMC_D427 MMC_D527 MMC_D627 MMC_D727 SDCLK_MMCCLK27 SD_MMC_CMD27 SD_WP27
SD_CAR D_DET#27
R594 0_0402_5%
1 2
1 2
10P_0402_50V8J
+3VS
1000P_0402_50V7K
C683
0.1U_0402_16 V4Z
1
2
3
+5VALW
AUDIO BOARD CONNECTOR (MALE)
USB20_N4 USB20_P4 EXPRESS_CD#
PCIE_WA KE# CLKREQ_EXP# CLK_PCIE_EXP# CLK_PCIE_EXP PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_C_DRX_N2 PCIE_PTX_C_DRX_P2 SLP_S3# PLT_RST#
+5VS
HDA_BIT_ CLK_MDC 12
JP5
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
GND
GND
E&T_1000-F68E-04R
CONN@
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
DB2: No. 70
C684
4.7U_0805_10 V4Z
1
@
2
+5VS
1
2
HDD_HA LTLED SATA_LED# AMBER_BATLED# AQUAWHITE_ BATLED# WL/BT_LED# STB_LED#
T/P BOARD.
TP_DATA29 TP_CLK29
C689
0.1U_0402_16 V4Z
+3VS
LINE_IN _SENSE 28 DOCK_HP S# 28 DOCK_ LINE_IN_L 28 DOCK _LINE_IN_ R 28 DLINE_OUT _L 28 DLINE_O UT_R 28
HDA_BIT _CLK_CODEC 12 HDA_SD OUT_CODEC 12 HDA_ SDIN0 12 HDA_ SYNC_C ODEC 12 HDA_RS T#_CODEC 12 HDA_SP KR 12
+3VALW
MUTE_LED_CNTL 29
+3VL
R1084 0_0402_5%
1 2
+5VS
2
3
D32 PACDN04 2Y3R_SOT23-3
@
1
SI, No5 3
09/5/4 HP
021 1 EM I
HDD_HA LTLED 12 SATA_LED# 12,28 AMBER_BATLED# 29 AQUAWHITE_ BATLED# 12,29
STB_LED# 28
IEEE1394_TPBN0 27 IEEE1394_TPBP0 27
IEEE1394_TPAN0 27 IEEE1394_TPAP0 27
DB2: No. 80
SI2 No 5
JP25
7
887
5
665
4
334
2
112
ACES_85203-04021
CONN@
4
KSO11 KSO0 KSO2 KSO5 KSI_D_14 KSI_D_8 KSI_D_12 KSI_D_10 KSI_D_0 KSI_D_4 KSI_D_2 KSI_D_1 KSI_D_3 KSO3 KSO8 KSO4 KSO7 KSO6 KSO10 KSO1 KSI_D_5 KSI_D_6 KSI7 KSI_D_13 KSI_D_11 KSI_D_9 KSO9 KSO12 KSO13
JP36
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
61 62
HIROSE FH12HP-30S-1 SV 55 30P
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
GND1 GND2
INT_KBD CONN.
CONN@
GND3 GND4
KSO11
2
2
KSO0
4
4
KSO2
6
6
KSO5
8
8
KSI_D_14
10
10
KSI_D_8
12
12
KSI_D_12
14
14
KSI_D_10
16
16
KSI_D_0
18
18
KSI_D_4
20
20
KSI_D_2
22
22
KSI_D_1
24
24
KSI_D_3
26
26
KSO3
28
28
KSO8
30
30
KSO4
32
32
KSO7
34
34
KSO6
36
36
KSO10
38
38
KSO1
40
40
KSI_D_5
42
42
KSI_D_6
44
44
KSI7
46
46
KSI_D_13
48
48
KSI_D_11
50
50
KSI_D_9
52
52
KSO9
54
54
KSO12
56
56
KSO13
58
58
60
60
63 64
KSI0
KSI1
KSI2
KSO11 KSO0 KSO2 KSO5
100P_1206_8P4C_50V8K
KSI_D_0 KSI_D_4 KSI_D_2 KSI_D_1
100P_1206_8P4C_50V8K
KSO7 KSO6 KSO10 KSO1
100P_1206_8P4C_50V8K
D24
KSI_D_0
2
1
1
1
KSI_D_8
3
DAP202UGT106_S C70-3 D26
KSI_D_1
2
KSI_D_9
3
DAP202UGT106_S C70-3 D28
KSI_D_2
2
KSI_D_10
3
DAP202UGT106_S C70-3
D23~D29 change HF P/N
did not link database
KSO[0. .13]29
KSI[ 0..7]29
CP1
@
2 3 4 5
CP3
@
2 3 4 5
CP5
@
2 3 4 5
5
81 7 6
81 7 6
81 7 6
KSI3
KSI4
KSI5
KSI6
KSO[0. .13]
KSI[ 0..7]
KSI_D_14 KSI_D_8
2
KSI_D_12
3
KSI_D_10
4 5
100P_1206_8P4C_50V8K
KSI_D_3 KSO3
2
KSO8
3
KSO4
4 5
100P_1206_8P4C_50V8K
KSI_D_5 KSI_D_6
2
KSI7
3
KSI_D_13
4 5
100P_1206_8P4C_50V8K
KSI_D_11 KSI_D_9
2
KSO9
3
KSO12
4 5
100P_1206_8P4C_50V8K
D23
2
1
3
DAP202UGT106 _SC70-3 D25
2
1
3
DAP202UGT106 _SC70-3 D27
2
1
3
DAP202UGT106 _SC70-3 D29
2
1
3
DAP202UGT106 _SC70-3
CP2
CP4
CP6
CP7
KSI_D_3
KSI_D_11
KSI_D_4
KSI_D_12
KSI_D_5
KSI_D_13
KSI_D_6
KSI_D_14
@
81 7 6
@
81 7 6
@
81 7 6
@
81 7 6
SI N o. 2 3
SW1
@
TJG-533-V-T/R_6P
3
1
ON/OF F#
2
4
5
6
Please Put this s witch at TO P sid e & wi ll remo ve after D B2
SW1 just cha nge P/N to S N100 000W 10 f or H F pa rt
3
12
SI1 NO6 6
WL/BT_LED#
ON/OF F# LID_SW #
+3VL
+VREG3_51125
1 2
C889
ACES 85203-1 2021 12P P1.0
+3VL +3VS
R590 5.1K _0402_5%
R591 5.1K _0402_5%
12
12
CAP_CLK13,29 CAP_DAT1 3,29 CAP_INT29
R592
10K_0402_5%
D D
12
D74
1
@
2
3
1
DAN217GT146_SC59-3
CAP_RST_EC29
D73
1
@
2
3
1000P_0402_50V7K
C888
DB2: No. 71
STB_LED#28
LID_SW #20,29
DAN217GT146_SC59-3
8/31 HP
0.1U_0603_50 V4Z
2 4 6
8 10 12 14 16 18 20 22 24
JP37
2 4 6 8 10 12 14 16 18 20 22 24
CONN@
1 3 5 7
9 11 13 15 17 19 21 23
+VREG3_51125
1 3
CAP_RST_EC
5
WL/BT_LED#
7 9
CAP_CLK
11
CAP_DAT
13
CAP_INT
15 17
STB_LED#
19
ON/OF F#
21
LID_SW #
23
+3VL
12
R1986
100K_0402_1%
6/30 H P
2
+3VS
Power ButtonCAP SWITCH BOARD.
+3VL
12
R596 100K_0402_5%
1 2
R597 47_0402_5%
ON/OF F# 28
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C690
1U_0603_10V4Z
2
2008/09/15 2009/12/31
D31
CH751H-40PT_ SOD323-2
7/20 HP
Compal Secret Data
Deciphered Date
1 2
R598 100K_0402_5%@
@
21
4
+3VALW
PWRBTN_OUT# 14,28,29
TrackPoint CONN.
+5VS
1
C688
0.1U_0402_16 V4Z
2
+5VS
DB2: No. 80
JP24
1
2
1
2
3
4
3
4
5
SP_CLK29ON/OFFB TN_KBC# 29
Title
Size Doc ument Nu mber Re v
Date : Sheet
Compal Electronics, Inc.
MDC/KBD/ON_OFF/LID
LA-4902P
5
6
7
7
8
9
9
10
11
11
12
ACES_87153-08011
CONN@
5
6 8 10 12
SP_DATA 29
of
25 47Wedne sday, Dec ember 09, 2009
0.3
1
+5VALW USB_VCCA+5VALW
12
R601
U30
1 2
SLP_S433
A A
SLP_S4
C692
4.7U_0805_10V4Z
3 4
1
(2A,100mils ,Via NO.=4)
2
8
GND
OUT
7
IN
OUT
6
OUT
IN
5
OC#
EN#
UP7534BRA8-15 MSOP 8P
10K_0402_5%
W=100m ils
+
C693
150U_B2_6.3VM_R35M
0.1U_0402_16V4Z
1000P_0402_50V7K
C694
1
2
C695
1
1
2
2
DB1 NO74
USB_VCCA US B_VCCB
J1
1 2
+5VALW USB_VCCB+5VALW
SLP_S4
B B
C941
4.7U_0805_10V4Z
C C
1
C698
4.7U_0805_10V4Z
2
+5VALW USB_VCC D+5VALW
U62
1
GND
2
IN
3
IN
4
EN#
1
UP7534BRA8-15 MSOP 8P
(2A,100mils ,Via NO.=4)
2
PAD-SHORT 2x 2m
U31
@
1 2 3 4
UP7534BRA8-15 MSOP 8P
(2A,100mils ,Via NO.=4)
8
GND
OUT
7
IN
OUT
6
OUT
IN
5
OC#
EN#
8
OUT
7
OUT
6
OUT
5
OC#
12
R1008 10K_0402_5%
C942
12
R604 10K_0402_5%
W=100m ils
C699
W=100m ils
150U_B2_6.3VM_R35M
1
+
2
SI2 NO9
1
+
2
C943
150U_B2_6.3VM_R35M
@
0.1U_0402_16V4Z
1
2
1000P_0402_50V7K
0.1U_0402_16V4Z C701
C700
1
1
2
2
USB20R_N1
1000P_0402_50V7K
C944
1
2
USB_VCC D
USB20R_N3
P/N chan ge t o S C30000 0P00, CM129 3A-02S R
2
JP27
1
@
D33
4
3
PRTR5V0U2X_SOT143-4
USB20R_P1
SUYIN 02013 3MR004S536ZL 4PCO NN@
USB20R_P3
1
2
2
3
3
4
4
5
GND
6
GND
7
GND
8
GND
SUYIN 02013 3MR004S536ZL 4PCO NN@
2
IO1
VIN
1
GND
IO2
JP28
1
1
2
2
3
3
4
4
5
GND
6
GND
7
GND
8
GND
SUYIN 02013 3MR004S536ZL 4PCO NN@
JP39
1
1
2
2
3
3
4
4
5
GND
6
GND
7
GND
8
GND
USB20R_N0 USB20R_P0
USB_VCCA
USB20R_N0
P/N chan ge t o S C30000 0P00, CM129 3A-02S R
USB20R_N1 USB20R_P1
USB_VCCB
@
D34
2
4
IO1
VIN
1
3
GND
IO2
PRTR5V0U2X_SOT143-4
P/N chan ge t o S C30000 0P00, CM129 3A-02S R
USB20R_N3 USB20R_P3SLP_S4
@
D62
2
4
IO1
VIN
1
3
GND
IO2
PRTR5V0U2X_SOT143-4
USB20R_P0
3
BT Connector
JP26
1
1
2
2
USB20_P8_R
R599 0_0402_5%
3
3
USB20_N8_R
4
4
5
5
6
GND
7
GND
ACES_87212-05G0
CONN@
BT_OFF15
USB20_P015
USB20_N015
USB20_P115
USB20_N115
USB20_P315
USB20_N315
1 2
L331
1
1
4
4
WCM-2012-900T_4P
1 2
1 2
L332
1
1
4
4
WCM-2012-900T_4P
1 2
1 2
L333
1
1
4
4
WCM-2012-900T_4P
1 2
@
@
@
R19910_0402_5%
2
2
3
3
R19920_0402_5%
R19930_0402_5%
2
2
3
3
R19940_0402_5%
R19950_0402_5%
2
2
3
3
R19960_0402_5%
R600 0_0402_5%
USB20_N8 USB20_P8
AP2301GN 1P_SOT23
12
R602 10K_0402_5%
R603
1 2
220K_0402_5%
USB20R_P0
USB20R_N0
USB20R_P1
USB20R_N1
USB20R_P3
USB20R_N3
EMI 7/22
1 2 1 2
2
3
1
Q33
S
G
SSM3K7002FU_SC70-3
D58
PJDLC05H_SOT23-3
D
13
2
12
13
D
Q94
2
G
S
+3VAUX_BT
R2003
470_0402_5%
+3VAUX_BT+3VALW
C696 0.1U_0402_16V4Z
1
2
USB20_P8 15 USB20_N8 15 BT_LED 25
C697 10U_0805_10V4Z
1
2
4
5
ACCELEROMETER
Make sure t he part s ODM nu mber isH P302DLT R8-MBD 1 0/17
+3VS_ACL_IO
+3VS_ACL
+3VS_ACL
+3VS +3VS_ACL +3VS_ACL_IO
ACCEL_INT#15
SMB_DATA_S34,9,10, 11,13 SMB_CLK_S34, 9,10,11,13
R607 10K_0402_5%
12
Must be pl aced i n the cent er of the system.
L
Chan ge U30 p art desc ription from LIS3 02DLTR L GA to HP 302DLTR 8 as HP chang e list. 12/03
U32
LIS302DL
1
VDD_IO
6
VDD
8
INT 1 INT 29GND
12
SDO
13
SDA / SDI / SDO
14
SCL / SPC
7
CS
HP302DLTR8_LGA14_3X5
SI1 NO75
GND GND GND
RSVD RSVD
2 4 5 10
3 11
C702
1
2
+3VS_ACL
+3VS_ACL
0.1U_0402_16V4Z
10U_0805_6.3V6M
C703
1
2
ESATA function
SI1 No72
09/5/14 HP
D D
USB_VCC C
4
USB20R_N2
3
P/N chan ge t o S C30000 0P00, CM129 3A-02S R
+5VALW USB_VCC C+5VALW
U33
1
GND
2
IN
3
SLP_S4
C704
4.7U_0805_10V4Z
@
D36
2
IO1
VIN
1
GND
IO2
PRTR5V0U2X_SOT143-4
USB20R_P2
IN
4
EN#
1
UP7534BRA8-15 MSOP 8P
(2A,100mils ,Via NO.=4)
2
1
USB20R_N2 USB20R_P2
USB20R_P2
USB20R_N2
E-SATA CONN.
JP29
CONN@
USB
1
VBUS
2
D-
3
D+
4
GND
5
GND
6
A+
ESATA
7
A-
8
GND
9
B-
10
B+
11
GND
12
GND
13
GND
Boss
14
GND
Boss
15
GND
TAIWI_EU016-117CRL-TW
SATA_PTX_DRX_P412
SATA_PTX_DRX_N412
16 17
12
R606 10K_0402_5%
8
OUT
7
OUT
6
OUT
5
OC#
USB20_P215
USB20_N215
W=100m ils
1
+
C705
2
150U_B2_6.3VM_R35M
C706
1
2
0.1U_0402_16V4Z
C707
1 2
L334
1
1
4
4
WCM-2012-900T_4P
1 2
1000P_0402_50V7K
1
2
@
SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4
SATA_PRX_C_DTX_N4 SATA_PRX_C_DTX_P4
R19970_0402_5%
2
2
3
3
R19980_0402_5%
2
Chang e TI t o Perico m PI3EQX 4951ST_ PEND And add 1.5 power ra il opti on 6/30
C10030.01U_0402_16V7K
1 2
C10040.01U_0402_16V7K
SATA_PRX_C_DTX_P4
SATA_PRX_C_DTX_N4
3
+3VS_1.5VS
1 2
C10100.01U_0402_16V7K
12
C10090.01U_0402_16V7K
12
R1123 4.7K_0402_5%
1 2
R1121 4.7K_0402_5%
1 2
R1120 4.7K_0402_5%
1 2
R2010 4.7K_0402_5%
1 2
@
R2011 4.7K_0402_5%
1 2
@
SATA Redriver
U68
SATA_PTX_DRX_P4_R
SATA_PTX_DRX_N4_R
SATA_PRX_C_DTX_N4_R
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
1
2
11
12
7
17
8
9
AI+
AI-
BI+
BI-
EN
MODE
B_EM / B_EQ
A_EM / B_EM
+3VS_1.5VS
6
10
20
16
AO+
VDD18
VDD18
VDD18
VDD18
AO-
BO+
BO-
GND / A_EN#
GND / B_EN#
GND / A_EM
GND / A_EQ18HEATGND
3
13
19
21
2008/09/15 2009/12/31
Compal Secret Data
4
C100 7, C1 008 near JP29 C100 5, C1 006 near U 4
SATA_PTX_C_DRX_P4_R
15
SATA_PTX_C_DRX_N4_R
14
SATA_PRX_DTX_P4_RSATA_PRX_C_DTX_P4_R
5
SATA_PRX_DTX_N4_R
4
+3VS +1.5VS+3VS_1.5VS
@
1 2
R1131 0_0603_5%
PI2EQX4951SLZDEX_TQFN20_4X4
TI & Perico m select
Deciphered Date
C1007 0.01U_0402_16V7K
1 2
C1008 0.01U_0402_16V7K
1 2
C1005 0.01U_0402_16V7K
C1006 0.01U_0402_16V7K
1 2
R1132 0_0603_5%
SATA_PTX_C_DRX_P4
12
12
SATA_PTX_C_DRX_N4
SATA_PRX_DTX_P4 12
SATA_PRX_DTX_N4 12
+3VS_1.5VS
C1012
0.1U_0402_16V4Z
C1013
C1011
1U_0603_10V4Z
1
2
Title
Size Doc ument Numbe r R ev
Date: Sh eet of
0.01U_0402_16V7K
1
1
2
Near U68 VCC pin
2
Compal Electronics, Inc.
USB & BT Connector & Acclerometer
LA-4902P
5
26 47Wednesday , December 09, 2009
0.3
1
hexainf@hotmail.com
PCI_ AD[0. .31]15
+3VS
A A
R782
100K_0402_1 %
12
CBS_GRS T#
1
C808 1U_0603_10 V6K
2
SDCLK _MMCCLK
R947
10_0402_5%
12
@
4.7P_0 402_50V8C
C907
1
@
2
B B
PCI_ AD22 CBS_I DSEL
Layout Note: Add GND shield.
CLK_P CI_139415
PM_CL KRUN#14,29, 30,31
C C
SI1 NO1 1
09/3/9 HP
just ch ange par t numb er, wai ting for dat abas e
+SC_PW R
R784
1 2
470_0402_5%
+3VS
+SC_PW R
CLK_P CI_1394
R783
12
@
C809
1
@
2
D70 1N4 148WS-7-F_ SOD323-2
1 2
D71 1N4 148WS-7-F_ SOD323-2
1 2
D72 1N4 148WS-7-F_ SOD323-2
1 2
1 2
R804 15K_0402_5%
1 2
R1093 15K_04 02_5%
1 2
R1094 15K_04 02_5%
10_0402_5%
4.7P_0 402_50V8C
PCI_C BE3#15 PCI_C BE2#15 PCI_C BE1#15 PCI_C BE0#15
PCI_ PAR15 PCI_F RAME#15 PCI_ TRDY#15 PCI _IRD Y#15 PCI_STOP #15 PCI_D EVSEL#15
PCI _PERR#15 PCI _SERR#15, 29,31
PCI_R EQ2#15 PCI_GN T2#15
PCI_RS T#15, 23
R788 10K_0402_5%@
1 2
R789 0_0402_5%
1 2
R790 10K_0402_5%
1 2
R931 47_0402_5%
1 2
1 2
R795 10K_04 02_5%
PCI_ PIRQE#15 PCI_ PIRQG#15
R798 10K_0402_5%
+3VS
1 2 1 2
R799 100K_0402_5%
PCI_ AD31 PCI_ AD30 PCI_ AD29 PCI_ AD28 PCI_ AD27 PCI_ AD26 PCI_ AD25 PCI_ AD24 PCI_ AD23 PCI_ AD22 PCI_ AD21 PCI_ AD20 PCI_ AD19 PCI_ AD18 PCI_ AD17 PCI_ AD16 PCI_ AD15 PCI_ AD14 PCI_ AD13 PCI_ AD12 PCI_ AD11 PCI_ AD10 PCI _AD9 PCI _AD8 PCI _AD7 PCI _AD6 PCI _AD5 PCI _AD4 PCI _AD3 PCI _AD2 PCI _AD1 PCI _AD0
PCI_C BE#3 PCI_C BE#2 PCI_C BE#1 PCI_C BE#0
PCI _PAR PCI_F RAME# PCI_ TRDY# PCI _IR DY# PCI_STO P# PCI_D EVSEL#
PCI _PERR# PCI _SERR#
PCI_R EQ2# PCI_G NT2#
CLK_P CI_1394
CBS_GRS T#
PME#
SC_RST SC_C LK_RS C_CLK SC_DATA SC_C D# SCSEN SE
SC_DATA
SC_RST
SC_C LK
U48
121
AD31
122
AD30
123
AD29
124
AD28
125 126 127
1 4 5 7
9 10 12 13 14 27 28 29 30 31 32 34 36 39 40 41 42 43 44 45 46
2 15 26 37
25 16 18 17 21 19
3 22 24
120 119
117 116
82
114
78
89 88 87 86 85
112 113
77 81
98
101 105 109
C819 12P_0402_5 0V8J
C822 12P_0402_5 0V8J
C823 12P_0402_5 0V8J
R5C835
AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
C/BE3# C/BE2# C/BE1# C/BE0#
PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR#
REQ# GNT#
PCICLK PCIRST# GBRST# CLKRUN# PME#
SCRST SCCLK SCIO SCCD# SCSENSE
INTA# INTB#
HWSPND# TEST
AGND AGND AGND AGND
R5C835-TQ FP128P_TQFP128_14X14
1 2
1 2
1 2
SMART Card Connector
JP38
20
191920 171718
D D
151516 131314 111112 9910 778 556 334 112
E-T_6900- Q10N-00R
CON N@
+SC_PW R
18
SC_RST
16 14 12 10 8 6 4 2
GND
SC_C LK
GND
SC_DATA
GND
SC_C D#
Layout Note: Add GN D shield
1
+SC_PW R
1
2
C906
0.1U_0 402_16V4Z
GND
GND
GND
2
VCC_PCI3V VCC_PCI3V VCC_PCI3V VCC_PCI3V
VCC_RIN
VCC_ROUT VCC_ROUT VCC_ROUT VCC_ROUT VCC_ROUT
VCC_3V
VCC_MD3V
AVCC_PHY3V AVCC_PHY3V AVCC_PHY3V
VCC_SC
TPBIAS0
MDIO00 MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06 MDIO07 MDIO08 MDIO09 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 MDIO15 MDIO16 MDIO17 MDIO18 MDIO19
SCVCC5EN# SCVCC3EN#
UDIO0/SRIRQ#
2
6 23 38 118
92
11 33 59 91 111
79
54
97 104 108
90
110
107
TPAP0
106
TPAN0
103
TPBP0
102
TPBN0
70 69 63 68 67 66 65 64 62 60 58 57 56 55 53 52 51 50 49 48
83 84
95
XI
96
XO
100
REXT
99
VREF
76 75
UDIO1
74
UDIO2
73
UDIO3
72
UDIO4
71
UDIO5
8
GND
20
GND
35
GND
47
GND
61
GND
80
GND
93
GND
94
GND
115
GND
128
GND
IEEE1394_T PBN0 IEEE1394_T PBP0 IEEE1394_T PAN0 IEEE1394_T PAP0
0.01U_0 402_16V7K
0.01U_0 402_16V7K
C791
C792
1
1
2
2
+3V_ PHY
IEEE1394_T PBIAS0
IEEE1394_T PAP0 IEEE1394_T PAN0
IEEE1394_T PBP0 IEEE1394_T PBN0
SD_CA RD_DET#
XD_CE# SD_W P SDPW R0_MSPWR_X DPWR XDWP# 3IN1_L ED# TP_MSEXTCK SD_MMC_C MD SDCLK _MMCCLK_R SDDATA0_M SDATA0 SDDATA1_M SDATA1 SDDATA2_M SDATA2 SDDATA3_M SDATA3 MMC_D4 MMC_D5 MMC_D6 MMC_D7 XDCLE XDALE
SCV CC5EN# SCV CC3EN#
R5C832XI R5C832XO
SIRQ TP_UD IO1 TP_UD IO2 UD IO3 UD IO4 UD IO5
Layout Note: Please them close to U14.
IEEE1394_T PBIAS0
R930 0_0402_5%
1 2
270P_0402_5 0V7K
5.1K_040 2_1%
C946
R1029
12
1
2
56.2_0402_ 1%
56.2_0402_ 1%
R1030
R1031
12
12
56.2_0402 _1%
56.2_0402 _1%
R1033
R1032
12
12
0.33U_ 0603_16V4Z
0.01U_0 402_16V7K C947
1
1
@
2
2
+3VS
0.01U_0 402_16V7K
0.01U_0 402_16V7K C794
C793
C948
C795
1
1
2
1
2
C806
SDDATA1_M SDATA0 25 SDDATA1_M SDATA1 25 SDDATA2_M SDATA2 25 SDDATA3_M SDATA3 25
1
2
2
0.01U_0 402_16V7K
+3VS
1
10U_08 05_10V4Z
0.01U_0 402_16V7K
2
C802
1
2
C807
IEEE1394_T PBIAS0
IEEE1394_T PAP0 25 IEEE1394_T PAN0 25
IEEE1394_T PBP0 25 IEEE1394_T PBN0 25
SD_CA RD_DET# 25
T89TPC12
T90TPC12
SD_W P 25 SDPW R0_MSPWR_X DPWR 25
T91TPC12
T92TPC12
SD_MMC_C MD 25
MMC_D4 25 MMC_D5 25 MMC_D6 25 MMC_D7 25
T93PAD
T94PAD
SIRQ 12, 29,30,31
T95TPC12
T96TPC12
SDA
1 2
R797 0_0402_5%
EEPROM@
3
10U_08 05_10V4Z
0.01U_0 402_16V7K
0.47U_ 0603_16V4Z
0.47U_ 0603_16V4Z
1
1
1
2
2
2
C803
C805
C804
GND
GND
GND
GND
SDCLK _MMCCLK 25
GND Layout Note: Add GN D shie ld for SDCLK_ MMCCLK.
1 2
R796 0_0402_5%
EEPROM@
EEPROM@
1 2
C818 0.1U_0 402_16V4Z U49
EEPROM@
1
A0
VCC
2
A1
3
A2
SCL
4
GND
SDA
AT24C02BN -SH-T_SO8
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Layout Note: Place close to R5C835 and Shield GN D for SDCLK_MSCLK
+3VS
0.01U_0 402_16V7K
1
1
2
2
C797
8 7
WP
6 5
10U_08 05_10V4Z
0.1U_0 402_16V4Z
0.01U_0 402_16V7K
1
1
2
2
C800
C798
C799
+SC_PW R
0.01U_0 402_16V7K
10U_08 05_10V4Z
1
1
2
2
C810
C811
Layout Note: Shield GND for SDPWR0_MSPW R_XDPWR
Layout Note: Shield GND for CBS_CCLK_INTERNAL and CBS_CCLK
0.01U_0 402_16V7K
1
2
SCL
+3VS
SCL SDA
12
EEPROM@
R803 510_0402_5%
C796
1 2
15P_0603_5 0V8J
C801
1 2
15P_0603_5 0V8J
Layout Note: Add GN D shield for 13 94.and Same l ength as TPA+/- ,TPB+/-
C815
DB2 NO7 4
R794
10K_0603_1%
12
SI1 NO4 7
SI2 NO2
0.1U_0 402_16V4Z
SCV CC3EN#
+3VS
SCV CC5EN#
SCVC C3E N#
2008/03/13 2009/05/11
Compal Secret Data
4
Layout Note: Place close to R5C835 and Shield GN D for SD_CLK
R5C832XI
12
need 50PPM or better
X1
24.576MHz_1 6P_3XG-24576-43E1
R5C832XO
+5VS
R1085
2
C966
1
2
G
R1088
1 2
100K_0402_5%
Function set pin define
Pull-down Disable MS,xD Card,serial ROMPull-down Pull-up
Deciphered Date
4
L35 MBK201 2601YZF_2P
1 2
+3VS
Layout Note: Place thes e cap close to U21
SD,MMC,MS,XD muti-function pin define
MDIO PIN Na me MDIO00
SD Card PIN Na me SDCD#
MMC Ca rd PIN Na me MMCCD#
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
SDWP#
SDPWR0
SDPWR1
SDLED#
MMCPWR
MMCLED#
MDIO07
MDIO08
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
SDCCMD
SDCCLKMDIO09
SDCDAT0
SDCDAT1
SDCDAT2
SDCDAT3
MMCCMD
MMCCLK
MMCDAT0
MMCDAT1
MMCDAT2
MMCDAT3
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7
MDIO18
MDIO19
+SC_PW R
AP2301GN- HF_SOT23-3
Q58
10K_0402_5%
12
SSM3K7002 F_SC59-3
13
D
S
Q82
3 1
2
0.1U_0 402_16V4Z
1
2
AP2301GN- HF_SOT23-3 Q57
C968
R1110 1K_0402_5%
@
1 2
SCV CC3EN#
SCVC C3E N# SCVCC5 EN# +SC_ PWR
0 0 0 1 1 1
UDIO3 UDIO5UDIO4 Function
Pull-downPull-upPull-up Enable serial EEPROM
Pull-upPull-upPull-up Ensable MS,xD Card,disable serial ROM
UD IO5 UD IO3 UD IO4
R785 100K_0402_5%
1 2
R786 10K_0402_5%@
1 2
R787 10K_0402_5%@
R791 100K_0402_5% R792 10K_0402_5% R793 10K_0402_5%
1 2
@
1 2 1 2 1 2
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
1394+2 in 1 Card
LA-4902P
+3VS
5
10U_0805_6 .3V6M
1
2
C812
2
5
+3V_ PHY
0.01U_0 402_16V7K
1000P_0402 _25V8J
1
1
2
2
C813
C814
MS Card PIN Na me
MSCD#
XD Card PIN Na me XDCD0#
XDCD1#
XDCE#
XDR/B#
MSPWR
XDPWR
XDWP#
MSLED#
XDLED#
MSEXTCK
MSBS
MSCCLK
MSCDAT0
MSCDAT1
MSCDAT2
MSCDAT3
XDWE#
XDRE#
XDCDAT0
XDCDAT1
XDCDAT2
XDCDAT3
XDCDAT4
XDCDAT5
XDCDAT6
XDCDAT7
XDCLE
XDALE
AP2309 AGN-HF 1P SOT 23-3
Q84
31
3 1
2
1 0
27 47Wedn esday, Decembe r 09, 20 09
+3V S
+5V S
+3V S +5V S NUL L
+3VS
1
12
2
C9670.1U_04 02_16V4Z
R1086100K_0402_5%
0.3
1
VA
C720 0.1U _0603_50V4Z
(1) PCI Exp ress x1 channels (2) PS/2 In terf aces (2) USB 2.c hannels (2) SATA Ch annels (2) Display Port Channels (1) Serial P ort (1) Paralle l Port (1) Line In (1) Line Out (1) RJ45 (1 0/100/1000)
A A
(1) V GA (1) 2 LAN i ndicator LED's (1) Power B utton (1) I2C int erface
MDO3+22
MDO2+22
B B
DPB_TXP014 DPB_TXN014
DPB_TXP114 DPB_TXN114
DPB_TXP214 DPB_TXN214
DPB_TXP314 DPB_TXN314
DPB_AUX14 DPB_AUX#14
C C
C719 0.1U _0603_50V4Z
1
1
2
2
MDO3+
MDO3-22
MDO2-22
MDO3-
MDO2+ MDO2-
DETECT
+5VS
09/2/5 HP
2
1
2
3
DPB_TXP0 DPB_TXN0
DPB_TXP1 DPB_TXN1
DPB_TXP2 DPB_TXN2
DPB_TXP3 DPB_TXN3
DPB_AUX DPB_AUX#
DOCK CONN. 184PIN
VIN VA
HCB2012KF -121T50_0805
1 2
HCB2012KF -121T50_0805
1 2
@
PJSOT24C_ SOT23-3 D68
VA
12A
Add one mor e bead for 8A requirement 7/1
JP32A
190
P1
188
188
187
187
186
186
185
185
184
184
183
183
182
182
181
181
180
180
179
179
178
178
177
177
176
176
175
175
174
174
173
173
172
172
171
171
170
170
169
169
168
168
167
167
166
166
165
165
164
164
163
163
162
162
161
161
160
160
159
159
158
158
157
157
156
156
155
155
154
154
153
153
152
152
151
151
150
150
149
149
148
148
147
147
146
146
145
145
144
144
FOX_QL0094 L-D26601-5H
L33
L330
3
DOCKING CONNECT
189
G1
1
1
MDO1+
2
2
MDO1-
3
3
4
4
MDO0+
5
5
MDO0-
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
09/2/5 HP
14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
DPC_TXP0
31
DPC_TXN0
32 33
DPC_TXP1
34
DPC_TXN1
35 36
DPC_TXP2
37
DPC_TXN2
38 39
DPC_TXP3
40
DPC_TXN3
41 42
DPC_AUX
43
DPC_AUX #
44 45
+5VS
+5VS
C721
1
2
10U_08 05_10V4Z
MDO1+ 22 MDO1- 22
MDO0+ 22 MDO0- 22
4
C722
C723
C724
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
1
1
1
2
2
2
LED_L INK_LAN_ DOCK# 22 LAN_ACT# 21,22
USB20 _N11 15 USB20_P1 1 15
DPC_TXP0 14 DPC_TXN0 14
DPC_TXP1 14 DPC_TXN1 14
DPC_TXP2 14 DPC_TXN2 14
DPC_TXP3 14 DPC_TXN3 14
DPC_AUX 14 DPC_AUX # 14
0.1U_0 402_16V4Z
STB_LED#25
SI1 NO1 9
5
SI1 NO1 8
09/4/27 HP
+5VALW
2
G
DP_C EC DPB _HPD14 SLP_S5#14
ADP_S IGNAL
DPB_C TRLCLK14
DPB_CTR LDATA14
LPTSTB#30 LPTAFD#30 LPTERR#30 LPTACK#30 LPTB USY30 LPTPE30 LPTSLCT30 LPD730 LPD630 LPD530 LPD430 LPD330 LPD230 LPD130 LPD030 LPTSLCTIN #30 LPTINIT#30
SATA_LED#1 2,25 DOC K_ID22 ISO_PR EP#15
SATA_PTX_DRX_P512 SATA_PTX_DRX_N512
SATA_PRX_DTX_P512 SATA_PRX_DTX_N512
USB20 _N1315 USB20_P1 315
SATA_PTX_DRX_P212 SATA_PTX_DRX_N212
SATA_PRX_DTX_P212 SATA_PRX_DTX_N212
R1095 10K_0402_5%
1 2
STB_LED #_R
13
D
Q85 SSM3K7002F _SC59-3
S
T105TPC12
DP_ CEC
R634 1K_0402_5%
ADP_S IGNAL
LPTSTB# LPTAFD# LPTERR# LPTACK# LPTBU SY LPTPE LPTSLCT LPD7 LPD6 LPD5 LPD4 LPD3 LPD2 LPD1 LPD0 LPTSLCTIN # LPTINIT# STB_LED #_R
DOC K_ID ISO_P REP#
1 2
09/2/5 HP
SATA_PTX_DRX_P2 SATA_PTX_DRX_N2
09/2/5 HP
6
DOC K_ID
1 2
R633 10K_04 02_5%
JP32B
143
143
142
142
141
141
140
140
139
139
138
138
137
137
136
136
135
135
134
134
133
133
132
132
131
131
130
130
129
129
128
128
127
127
126
126
125
125
124
124
123
123
122
122
121
121
120
120
119
119
118
118
117
117
116
116
115
115
114
114
113
113
112
112
111
111
110
110
109
109
108
108
107
107
106
106
105
105
104
104
103
103
102
102
101
101
100
100
99
99
98
98
97
97
96
96
95
95
192
G2
194
G4
196
G6
198
G8
200
G10
FOX_QL0094 L-D26601-5H
7
+3VALW
DC AD2DC AD1
46
46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94
G1 G3 G5 G7 G9
DP_ CEC2
47 48
ON/O FF#_D OCK
49
VA_ON#
50 51 52 53 54 55 56 57
D_D DCDATA
58
D_DD CCLK
59 60 61 62
R_DO CK_RE D
63 64
R_DO CK_GR N
65
R_D OCK_BLU
66 67
DC D#1
68
RI#1
69
DTR#1
70
CTS#1
71
RTS#1
72
DSR #1
73
TXD1
74
RXD1
75
SER _SHD
76 77 78 79 80
KBD_DAT A
81
KBD_C LK
82
PS2_DATA
83
PS2_CLK
84 85
DOCK_ HPS#
86 87
DLIN E_IN_L
88
DLIN E_IN _R
89 90
DLINE _OUT_L
91
DLINE _OUT_R
92 93
DETECT
94
191 193 195 197 199
VA_ON#
1K_0402_5%
T106 TPC 12
DP_C EC2 DPC_ HPD 14
DPC_C TRLCLK 14
D_DD CDATA 18 D_DD CCLK 18 D_V SYNC 18 D_HSYNC 18
R883 0_0402_ 5%
1 2
R884 0_0402_ 5%
1 2
R885 0_0402_ 5%
1 2
DCD #1 30 RI#1 30 DTR#1 30 CTS#1 30 RTS#1 30 DSR# 1 30 TXD1 30 RXD1 30 SER_ SHD 30 DOC K_ID0 15 DOC K_ID1 15
KBD_DATA 29 KBD_C LK 29 PS2_DATA 29 PS2_CLK 29 LINE _IN_SENS E 25 DOCK_ HPS# 25
DOC K_LINE_I N_L 25 DOC K_LINE _IN_R 25
DLINE _OUT_L 25 DLINE _OUT_R 25
R632
DPC_C TRLDATA 14
12
8
1
C718
0.1U_0 402_16V4Z
2
DOC K_RED
DOC K_GRN DOC K_BLU
09/2/5 HP
DOC K_RED
2009 /09 /03 rese rve for au to p owe r on /off when dock
C1046
@
0.1U_04 02_10V6K
D D
ISO_P REP#
DMN66D0LD W-7_SOT363 -6
R2005 0_0402_5%
R2006 0_0402_5%
1
@
10K_0402_5%
1
2
Q95A
@
1 2
1 2
@
R2004
+3VALW
12
61
2
ON/O FF#
3
@
Q95B DMN66D0LD W-7_SOT363 -6
5
4
ON/O FF#_D OCK
2009/09/03 Compal
ON/O FF#ON/OF F#_DOCK
PWRBT N_OUT#
2
ON/O FF# 25
PWRBT N_OUT# 14, 25,29
U36
VGA_R ED18 VGA_G RN18 V GA_BLU18
DOC K_RED DOC K_BLUDOC K_GRN
1
NO
2
GND
NC3COM
TS5A3157_S C70-6
IN
L
H
3
DOC K_ID DOC K_ID DOC K_ID
6
IN
VCC
5
4
NC<-->COM
ON
OFF
+3VS +3VS +3VS
C748
12
0.1U_0 402_16V4Z
NO<-->COM
OFF
ON
4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
DOC K_GRN
DOC K_BLU
U37
1
NO
2
GND
NC3COM
TS5A3157_S C70-6
2008/09/15 2009/12/31
R919 150_0402_1%
1 2
R920 150_0402_1%
1 2
R921 150_0402_1%
1 2
ADD by HP 1 0/17
6
IN
5
VCC
4
Compal Secret Data
C749
0.1U_0 402_16V4Z
Deciphered Date
6
10/04 HP
DOC K_RED
C745 0.1U_04 02_16V4Z@
DOC K_GRN DOC K_BLU
U38
1
12
2
TS5A3157_SC 70-6
7
6
NO
IN
5
GND
VCC
4
NC3COM
Title
Size Docum ent Num ber R ev
Cus tom
Dat e: Sheet o f
Compal Electronics, Inc.
DOCK CONN
LA-4902P
1 2
C746 0.1U_04 02_16V4Z@
1 2
C747 0.1U_04 02_16V4Z@
1 2
0.1U_0 402_16V4Z
BLUE_ R 14GREE N_R 14RED _R 14
C750
12
28 47Wedn esday, Decembe r 09, 20 09
8
0.3
1
hexainf@hotmail.com
+3VL
RP16
KSI3
1 8
KSI2
2 7
KSI1
3 6
KSI0
4 5
10K_8P4R_ 5%
RP18
KSI7
1 8
KSI6
+5VS
R951
@
22P_0402_5 0V8J
C760
1
2
R717 0_0402_5%
2 7 3 6 4 5
10K_8P4R_ 5%
1 8 2 7 3 6 4 5
10K_8P4R_ 5%
1 8 2 7 3 6 4 5
10K_8P4R_ 5%
SI1 NO6 6
C995 10P_04 02_50V8J C996 10P_04 02_50V8J C997 10P_04 02_50V8J C998 10P_04 02_50V8J C999 10P_04 02_50V8J C1000 10P_04 02_50V8J C1001 10P_04 02_50V8J C1002 10P_04 02_50V8J
CLK_P CI_KBC
10_0402_5%
12
4.7P_0 402_50V8C
C908
1
@
2
12
@
RP26
RP27
Y7
3
G G
2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
4
1
C763
1
2
KSI5 KSI4
TP_CLK TP_DATA KBD_C LK KBD_DAT A
SP_CLK SP_DATA PS2_DATA PS2_CLK
C761
32.768 KHZ_12.5PF_Q TFM28-32768K1
+RTCV CC
1U_060 3_10V4Z
C764
22P_0402_5 0V8J
1
2
12
R710 0_0402_5%
0.1U_0 402_16V4Z
1
2
SPI_S I31
KBC_S PI_SI_R12
SPI_C S0#31 KBC_S PI_CS0#_R12 SPI_SO31 KBC_S PI_SO12
TP_CLK TP_DATA SP_CLK SP_DATA PS2_CLK PS2_DATA KBD_C LK KBD_DAT A
SPI_C LK31 MC2_D ISABLE23
KBC_S PI_CS1#_R12
MC1_D ISABLE24
PM_SLP_LAN#14,33 ,40 PMC35 OCP_ A_IN42
+VCC0
1
09/2/5 HP
1 2
R949 0_0402_5%
1 2
R950 22_0402_5%
KSO[ 0..13]25
SPI_C S0#_KBC
SPI_S O_KBC
SI2 NO7
T131 T PC12
T132 T PC12
KSI[ 0..7]25
TP_CLK25 TP_DATA25 SP_CLK25 SP_DATA25 PS2_CLK28 PS2_DATA28
PM_CL KRUN#14,27, 30,31 SIRQ12,27,3 0,31 CLK_ PCI_KBC15 RUN SCI_E C#15
LPC_L AD312,23,3 0,31 LPC_L AD212,23,3 0,31 LPC_L AD112,23,3 0,31 LPC_L AD012,23,3 0,31
LPC_L FRAME#1 2,23,30,31 NPCI_ RST#15,30
BAT_ALARM36 KBC_S PI_CLK_R12
SPI_C S1#31
KSI0
KSI1
+VCC0
1 2
R953 0_0402_ 5%
1 2
R1113 300_060 3_5%
1 2
R1114 300_060 3_5%
TP_CLK TP_DATA SP_CLK SP_DATA PS2_CLK PS2_DATA
CLK_P CI_KBC RUN SCI_E C#
SPI_C S1#_KBC
09/2/5 HP
SI2 NO7
08/11/09 remove all options of 1091
A A
B B
C C
D D
CR Y1 CR Y2
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
1
2
128 127
97 96 95 94
21 20 19 18 17 16 13 12 10
9 8 7 6 5
29 28 27 26 25 24 23 22
35 36 61 62 66 67
55 57 54 76
51 50 48 46
52 53
70 71
68
1 2
3 30 31 32 33 34 43 44
2
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
C752
C753
C754
1
1
2
2
U40
FLDATAOUT HSTDATAOUT/GPIO45 FLCS0# HSTCS0#/GPIO44 FLDATAIN HSTDATAIN/GPIO43
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12/GPIO00/KBRST KSO13/GPIO18
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
IMCLK IMDAT KCLK KDAT EMCLK EMDAT
CLKRUN# SER_IRQ
Powe r Mgmt/ SIRQ
PCI_CLK EC_SCI#
LAD[3] LAD[2] LAD[1]
LPC
LAD[0]
Bus
LFRAME# LRESET#
XTAL1 XTAL2
VCC0
Alarm [CKT#2]/GPIO36 HSTCLK/GPIO41 FLCLK GPIO39 HSTCS1#/GPIO42 FLCS1# GPIO38 GPIO37 ADC1/GPIO46 ADC_TO_PWM_IN
KBC1098-N U_TQFP128_14X14
1 2
C982 2200P_0402_ 50V7K
1 2
C983 2200P_0402_ 50V7K
SI, No5 7
09/5/4 HP
add R11 13~R 1116 an d C9 82~ C984, thes e s houl d be pl aced at pin s n earb y ( excep t R11 16)
2
3
System Board ID Detect
+3VL
4.7U_0 805_10V4Z
0.1U_0 402_16V4Z C756
C755
1
1
2
2
14
106
119
49
VCC1
VCC139VCC158VCC184VCC1
VCC1
VCC2
Keyb oard/Mo use Interface
ADP_PRES[CKT#2]/GPIO27/WK_SE05
Gene ral Pur pose I/ O Interface
SMSC_1098-NU_TQFP-128P
Access Bus I nterface
72
AGND
VSS11VSS37VSS47VSS56VSS
AVSS
VSS82VSS
45
104
117
1 2
1 2
0.1U_0 402_16V4Z R659 0_0402 _5%
C757
1
2
CFETA/OUT7/nSMI
GPIO11/AB2A_DATA
GPIO12/AB2A_CLK
GPIO13/AB2B_DATA
GPIO14/AB2B_CLK GPIO15/FAN_TACH1 GPIO16/FAN_TACH2
32KHZ_OUT/GPIO22/WK_SE01
RESET_OUT#/GPIO06
ADC_TO_PWM_OUT/GPIO19
PWR_LED#/8051TX
Misc ellaneo us
FDD_LED#/8051RX
AC[CKT#2]/GPIO23
AVSS
R1116 0_0402_5%
C984 2 200P_0402_50V7K
GPIO28 GPIO29 GPIO30 GPIO31 GPIO32
OUT0/(SCI)
OUT1/IRQ8#
OUT8/KBRST
OUT9/PWM2
OUT10/PWM0
PWM_CHRGCTL
GPIO01 GPIO02
GPIO03 GPIO04/KSO14 GPIO05/KSO15
GPIO07/PWM3
GPIO08/RXD
GPIO09/TXD
GPIO17/A20M
GPIO20/PS2CLK GPIO21/PS2DAT
GPIO24/KSO16
AB1A_DATA
AB1A_CLK
AB1B_DATA
AB1B_CLK
GPIO25
GPIO26/KSO17
NC_CLOCKI
PWRGD
VCC1_RST#
TEST PIN
CFETB/GPIO10
BAT_LED#
ADC2/GPIO40
Q/GPIO33
GPIO34
GPIO35
AVCC
1 2
+3VS
KSO3 KSO2 KSO1 KSO0
C758 4.7U _0805_10V4Z
15
CAP
93 98 99 100 126
124 125
123 122 121 120 118
107 79 80 81 83
85 86 87
88 89 90 91 92 101 102
103 105 4 74
111 112
109 110
73
108 59 75 60 78 77 38
69
116 113 115 114
41 42 65 64 63 40
1 2
R665 0_0402_5%
1 2
GREEN _BATLED#
KBRST#
D40 C H751H-40PT_S OD323-2
THM_TRAVEL#
SLP_S3#
PM_RSMRST# CRACK _BGA GPIO9
AB2A_DATA
R670 0_0402_5%
AB2A_CL K
AB1A_DATA AB1A_CL K
AB1B_DATA AB1B_CL K
EA#
32K_CLK PGD_ IN PWR _GD
TEST
1 2
R671 0_0402_5%
1 2
R672 0_0402_5%
1 2
R673 0_0402_5%
1 2
R675 0_0402_5%
1 2
R676 1K_0402_5%@
1 2
R679 0_0402_5%
1 2
R680 220_0402_1%
1 2
R1023 0_0 402_5%
1 2
R686 1K_0402_5%
1 2
R1024 0_0 402_5%
1 2
R690 100K_0402 _5%
1 2
1 2
R1115 300_060 3_5%
R694 0_0402_5%
1 2
21
T120TPC 12
T121TPC 12
+3VL
DB1 No7 9
+3VL
+3VL
SI, No3 5
R102 1 R emov ed R102 2 I nsta ll ( mai n ba tte ry s elec tion) R102 3 I nsta ll ( OCP fun ctio n) R102 4 I nsta ll ( tra vel bat tery sel ectio n) R694 I nsta ll ( SMS C CB B w ill req uired it)
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
Compal Secret Data
4
R657 0_0402_5%@
1 2
R658 0_0402_5%@
1 2
R660 0_0402_5%@
1 2
R661 0_0402_5%@
1 2
SI1 NO4 2
8/31 HP
PM_SLP_M# 14, 32,33 SUS_P WR_ACK 14 AC_PRE SENT 14 MUTE_LED_ CNTL 25 PCI _SERR# 1 5,27,31
KBC_P WR_ON 37 AQUAW HITE_BATLED# 12,25
KB_RST# 15 FAN_PW M 4 BAT_PWM_OUT 35 CHGC TRL 35
THM_TRAVEL# 34 ON/OF FBTN_KBC # 25
SLP_S3# 14,25,3 2,33,35,3 8,39 8051_R ECOVER# 31
PM_RSMRST# 14 CRACK _BGA 8, 17
CAP_DAT 13,25 CAP_C LK 13,25 CELLS 35 A_SD# 25 ADP_DET# 42 THM_MAIN# 34 GATEA20 15
KBD_C LK 28 KBD_DATA 28 PWRBT N_OUT# 14, 25,28 ADP_P RES 33,3 5,42
AB1A_DATA 34 AB1A_CLK 34
AB1B_DATA 34 AB1B_CLK 34
CAP_IN T 25
ADP_E N 42 PM_PWR OK 41 PWR _GD 12,3 2 VCC1 _PWRGD 37,42 OCP 42
FET_B 36 AMBER_BAT LED# 25 8051TX 31 8051RX 31
AC_AD P_PRES 35 ADP_ A_ID 42 LATCH 36 LID_S W# 20,2 5 CAP_RS T_EC 25
to Pow er
SI, No6 8
PGD _IN14
SI, No5 3
09/5/4 HP
to Pow er
to Pow er
to Pow er to Pow er
09/05/8 HP
Deciphered Date
4
Q10A 2N7002DW H_SOT363-6
6 1
@
2
Q10B 2N7002DW H_SOT363-6
3 4
@
5
SI1 NO7 4
ADP_ EN
09/2/20 HP
61
2
DB1 No8 2
R1021 0_04 02_5%@
1 2
R1022 0_04 02_5%
1 2
to Pow er to Pow er
SI, No5 3
09/5/4 HP
Main Ba tter y se lec tion
08/11/17 HP
BATSELB_A#
FET_A 36
KB_RST#
to Pow er
KBRST#
VCC1 _PWRG D
to Pow er
09/2/10 HP
CRACK _BGA
GPIO9
to Pow er
KBC_P WR_ON
LATCH
FET_A
09/02/10 HP
PGD_ IN
PM_RSMRST#
PM_PWR OK PW R_GD
SI, No7 0
SI, No8 2
09/5/18 HP
09/2/10 HP
R699 10K_0402_5%@
1 2
R700 100K_0402_5%
1 2
SI, No5 6
09/5/4 HP
0.1U_0 402_16V4Z
0.1U_0 402_16V4Z
C1052
C1051
1
1
@
@
2
2
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
09/5/8 HP
FET_B
0.1U_0 402_16V4Z
Compal Electronics, Inc.
LA-4902P
5
DB2 NO7 2
+3VL
R1122
10K_0402_5%
@
Q87A 2N7002DW H_SOT363-6
@
AQUAW HITE_BATLED#
09/2/5 HP
Q10 B Q 10A
Build Phase
DB1
X
DB2
X X
X
X
DBx
SI1
SI2
SIx
X
X X
X X
PV
PVx X
X -- > m eans ins tal led
09/2/5 HP
R62 10 K_0402_5%
1 2
10/03 HP
SI, No5 5
09/5/4 HP
R893 10K_0402_5%@
1 2
R894 10K_0402_5%
1 2
R895 100K_0402 _5%
1 2
R1081 10 K_0402_5%
1 2
R896 10K_0402_5%
1 2
R897 10K_0402_5%
1 2
R898 10K_0402_5%
1 2
R899 10K_0402_5%
1 2
RP20
4.7K_080 4_8P4R_5%
AB1A_CL K AB1A_DATA AB1B_CL K AB1B_DATA
1
@
C1055
2
KBC1098
5
34
Q87B
5
@
2N7002DW H_SOT363-6
R65 7R65 8R66 0R6 61
X
X
+3VL
1 8 2 7 3 6 4 5
29 47Wedn esday, Decembe r 09, 20 09
+3VS
+3VL
0.3
1
A A
RP31
SIO_GP IO46
18
SIO_GP IO45
27
SIO_GP IO44
36
SIO_GP IO43
45
10K_8P4 R_5%
RP33
SIO_ IRQ
18
SIO_GP IO12
27
SIO_GP IO10
36 45
10K_8P4 R_5%
B B
C C
+3VS
R1060
1 2
R1062
1 2
R1063
1 2
R1064
1 2
1 2
R2000 4.7 K_0402_5%
SIO_GP IO23
10K_0402_ 5%
SIO_GP IO41
10K_0402_ 5%
SIO_GP IO42
10K_0402_ 5%
SYSOPT
10K_0402_ 5%
LPCP D#
8/31 HP
+3VS
SER_ SHD28
Base I/O Address
0 = 02Eh 1 = 04Eh
R1059 10K_0402_ 5%
1 2
2
12
@
LPC_ LAD012 ,23,29,3 1 LPC_L AD112 ,23,29,31 LPC_ LAD212 ,23,29,3 1 LPC_L AD312 ,23,29,31
LPC_LF RAME#12,23,29 ,31
LPC_ LDRQ#012
NPCI _RST#1 5,29
PM_C LKRUN#14,2 7,29,31
CLK_ PCI_SIO15
CLK_14M _SIO13
SI1 NO43
09/4/27 HP
R1098
1 2
0_0402_5%
@
R1099
10K_0402_ 5%
R1065 10_0402_5%@
C954 18P_040 2_50V8J
SIR Q12,27 ,29,31
1 2
SER_ SHD_GPIO 47
CLK_14 M_SIOCLK_ PCI_SIO
12
R1066 10_0402_5%@
1
C955 10P_040 2_50V8J
2
@
LPCP D#
PM_C LKRUN#
CLK_ PCI_SIO
SIR Q SIO_PME#
CLK_14 M_SIO
SIO_GP IO41 SIO_GP IO42 SIO_GP IO43 SIO_GP IO44 SIO_GP IO45 SIO_GP IO46
SIO_GP IO10 SYSOPT SIO_GP IO12 SIO_ IRQ
SIO_GP IO23
DCD #1
1 8
RI #1
2 7
CTS#1
3 6
DSR# 1
4 5
4.7K_08 04_8P4R_5%
U65
9
LAD0
11
LAD1
12
LAD2
13
LAD3
14
LFRAME#
15
LDRQ#
16
PCI_RESET#
17
LPCPD#
18 19 20
6
8
21 22 24 25 26 27 28 29 30 31 32 33 34
57
LPC I/F
CLKRUN# PCI_CLK SER_IRQ IO_PME#
CLK14
CLO CK
GPIO41 GPIO42 GPIO43 GPIO44 GPIO45
GPIO
GPIO46 GPIO47 GPIO10 GPIO11/SYSOPT GPIO12/IO_SMI# GPIO13/IRQIN1 GPIO14/IRQIN2 GPIO23
POWER
EPAD
LPC47N 217N-ABZJ _QFN56_8X8
*
RP29
SERIAL I/FPARALLEL I/F
RXD1
TXD1
DSR1#
RTS1# CTS1# DTR1#
DCD1#
INIT#
SLCTIN#
SLCT
BUSY ACK#
ERROR#
ALF#
STROBE#
3
+3VS
RXD1 2 8
RXD1
54
TXD1
55
DSR# 1
56
RTS#1
1
CTS#1
2
DTR# 1
3
RI #1
4
RI1#
DCD #1
5
LPTINIT #
35
LPTSLC TIN#
36
LPD0
37
PD0
LPD1
39
PD1
LPD2
40
PD2
LPD3
41
PD3
LPD4
42
PD4
LPD5
43
PD5
LPD6
44
PD6
LPD7
45
PD7
LPTSLCT
47
LPTPE
48
PE
LPTB USY
49
LPTACK#
50
LPTER R#
51
LPTAFD #
52
LPTSTB#
53
6/30 HP
7
VTR
10
VCC
23
VCC
38
VCC
46
VCC
R1058 1K_0 402_5%
1 2
TXD1 28 DSR# 1 28 RTS#1 2 8 CTS#1 2 8 DTR#1 28 RI# 1 28 DCD#1 28
LPTINIT# 2 8 LPTSLCT IN# 28 LPD0 2 8 LPD1 2 8 LPD2 2 8 LPD3 2 8 LPD4 2 8 LPD5 2 8 LPD6 2 8 LPD7 2 8 LPTSLCT 28 LPTPE 28 LPTBU SY 28 LPTACK# 2 8 LPTERR# 28 LPTAFD # 28 LPTSTB# 28
C950 0. 1U_0402_16 V4Z
C951 0. 1U_0402_16 V4Z
1
1
2
2
C953 4. 7U_0805_10 V4Z
C952 0. 1U_0402_16 V4Z
+3VS
1
1
2
2
+5VS
CH751H -40PT_SOD3 23-2
LPD1 LPD0 LPTSLC TIN# LPTINIT #
LPD5 LPD4 LPD3 LPD2
LPTPE LPTSLCT LPD7 LPD6
LPTSTB# LPTAFD # LPTACK# LPTB USY
LPTER R#
4
D69
2 1
RP30
1 8 2 7 3 6 4 5
4.7K_08 04_8P4R_5%
RP32
1 8 2 7 3 6 4 5
4.7K_08 04_8P4R_5%
RP34
1 8 2 7 3 6 4 5
4.7K_08 04_8P4R_5%
RP35
1 8 2 7 3 6 4 5
4.7K_08 04_8P4R_5%
R1061
1 2
4.7K_04 02_5%
5
+5VS_P RN
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/09 2009/09/09
Compal Secret Data
Deciphered Date
4
Compal Electronics, Inc.
Title
Size Do cument Numbe r R ev
Dat e: Sheet of
LPC47N217N-ABZJ_QFN
LA-4902P
5
30 47Wed nesday , Dec ember 09, 2009
0.3
1
hexainf@hotmail.com
Finger Printer
A A
+3VALW
Q34 AP2301GN 1P _SOT23
S
D
13
C714 0.1U _0402_16V4Z
G
2
R611 10K_0402_5%
1 2
R616 220K_0402_1%
FPR_ OFF15
B B
1 2
C715 10U_ 0805_10V4Z
1
1
2
2
USB20 _N1_PWR
USB20 _N1015 USB20_P1 015
+5VALW
USB20 _N10
P/N cha nge to S C30 0000 P00 , CM 1293 A-02S R
2
SI, No1 4
SI2, No 5
JP30
2
112
4
334 665 887
ACES_85203 -04021
CON N@
D37
2
4
IO1
VIN
1
3
GND
IO2
PRTR5V0U 2X_SOT143-4
5 7
USB20_P 10
3
TPM1.2 on board
1 2
C708 22P_04 02_50V8J
1
2
GG
1 2
C713 22P_04 02_50V8J
+3VS
8/31 HP
4.7K_0402 _5%
@
0_0402_5%
6/30 HP
R615
R617
1 2
+3VS
12
12
@
R2001
4.7K_0402_ 5%
4
+3VS
+3VALW
C712
TPM_XTALI
12
Y632.768K HZ_12.5PF_QTF M28-32768K1
R608
4
3
10M_0402_5%
TPM_XTALO
1 2
LPC_L AD012,23,2 9,30 LPC_L AD112,23,2 9,30 LPC_L AD212,23,2 9,30 LPC_L AD312,23,2 9,30 LPC_L FRAME#1 2,23,29,30
SIRQ12,27,2 9,30 CLK_PCI_ TPM15
C71610 P_0402_50V8K @
PM_CL KRUN#14,27, 29,30
@
1 2
R612 10_0402_5%
1
2
LPC_L AD0 LPC_L AD1 LPC_L AD2 LPC_L AD3 LPC_L FRAME# PLT_RST# LPC_P D# SIRQ CLK_PCI _TPM
TPM_XTALO
TPM_XTALI
0.1U_0 402_16V4Z
1
1
2
2
U34
26
LAD0
23
LAD1
20
LAD2
17
LAD3
22
LFRAME#
16
LRESET#
28
LPCPD#
27
SERIRQ
21
LCLK
SL B 96 35 T
SL B 96 35 T T 1 .2
SL B 96 35 TSL B 96 35 T
15
CLKRUN#
7
PP
14
XTALO
13
XTALI/32K IN
19
24
VDD
TESTB1/BADD
GND
18
25
C711
0.1U_0 402_16V4Z
C710
0.1U_0 402_16V4Z
C709
1
2
10
5
VSB
VDD
VDD
GPIO
GPIO2
T 1. 2
T 1. 2T 1. 2
TEST1
NC NC NC
GND
GND
GND
SLB 9635 T T 1.2_TSSOP28
4
11
0.1U_0 402_16V4Z
TPM_GPIO
6
TPM_GPIO2
2
Base I/O Address 0 = 02Eh 1 = 04Eh*
R613
0_0402_5%
8
1 2
9
3 12 1
T86TPC12 T87TPC12
4.7K_0402 _5%
1 2
R614
4.7K_0402 _5%
+3VS
12
R610
@
5
DB2: No . 67
BIOS ROM(8MB)
SI1: No 28
+3VL
09/4/10 HP
8MB SPI ROM
C C
+3VL
SPI_C S0#29
SPI_C LK29
SPI_S I29
D D
SPI_H OLD#_0 SPI_H OLD#_1
SPI_C LK_JP SPI_C LK
SPI_SI _JP SPI_ SI
1 2
R625 0_0402_5% R626 15_0402_5%
1 2
R627 15_0402_5%
1 2
1 2
R628 0_0402_5%
1 2
R629 22_0402_5%
R1096 100K_0402_5%
@
1 2
20mils
R1034 3. 3K_0402_5%
R2009 15_0 402_5%
1 2
R2012 15_0 402_5%
1 2
Close SPI ROM
SPI_C S0#SPI_C S0#_JP
SPI_SOSPI_SO _JP
1
0.1U_0 402_16V4Z
1 2
+3VL
+3VL
1
C949
20mils
20mils
2
SPI_W P#
SPI_H OLD#_1
SPI_C S0#
1 2
R623 3.3K_0402_5%
CON N@
VSS
Q
4
2
SI1: No 20
SPI_S O_R
SPI ROM SCKET
U63
25mA
8
VCC
3
W
7
HOLD
1
S
6
C
5
D
64M MX 25L6405DZNI-12 G WSON 8P
SI1: No 40
SPI_W P#
1 2
R624 0_0402_ 5%@
Apply part n umber of 64Mb SPI ROM
2
8MB SPI ROM
DB2: No . 73
SI2 NO7
1 2
R1035
24.9_0402_ 1%
16 PIN
8 PIN ,16 PI N Co-lay out
SPI_C LK
R954
10_0402_5%
12
@
4.7P_0 402_50V8C
C909
1
@
2
SPI_SO 29
8 PIN
DB2: No . 81
&U2
45@
S IC FL 64M W25Q64BVSSIG SOIC 8P SPI ROM
SPI ROM
LPC Debug Port
8051_R ECOVER#
No connect anything
CLK_ PCI_DB15
LPC_L FRAME#1 2,23,29,30 SIRQ12,27,2 9,30 PLT_RST#4,12,15 ,21,23,25 PCI _SERR#15, 27,29 LPC_L AD012,23,2 9,30 LPC_L AD112,23,2 9,30 LPC_L AD212,23,2 9,30 LPC_L AD312,23,2 9,30
8051TX29 8051RX29 8051_R ECOVER#29 DEBUG _KBCRST37
SPI_C S1#29
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/09/15 2009/12/31
CLK _PCI_DB
SIRQ
8051_R ECOVER#
SPI_C LK_JP SPI_C S0#_JP SPI_SI _JP SPI_S O_JP SPI_H OLD#_0
Compal Secret Data
R620 100K_0402 _5%
B+_DEBU G
Deciphered Date
4
1 2
JP31
1
Ground
2
LPC_PCI_CLK
3
Ground
4
LPC_FRAME#
5
+V3S
6
LPC_RESET#
7
+V3S
8
LPC_AD0
9
LPC_AD1
10
LPC_AD2
11
LPC_AD3
12
VCC_3VA
13
PWR_LED#
14
CAPS_LED#
15
NUM_LED#
16
VCC1_PWRGD
17
SPI_CLK
18
SPI_CS#
19
SPI_SI
20
SPI_SO
21
SPI_HOLD#
22
Reserved
23
Reserved
24
Reserved
ACES_87216 -2404
CON N@
+3VL
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
TCG/BIOS ROM/PS2/SW LPC DEBUG
LA-4902P
5
31 47Wedn esday, Decembe r 09, 20 09
0.3
1
1.5V_POK40
+5VS
A A
GFXVR _PWRGD43
B B
+0.75VS
M_PWROK14
SLP_S3#14, 25,29,33 ,35,38,39
+3VS
+1.05VS
2
1 2
R735 3.3K_ 0402_5%
1 2
R736 76.8K_0402 _1%
1 2
R739 11.5K_ 0402_1%
1 2
R741 3.3K_0 402_5%
CH751H- 40PT_SOD323-2
1 2
R742 3.3K_0 402_5%
CH751H- 40PT_SOD323-2
@
1 2
R745 3.3K_ 0402_5%
1 2
R749 49.9K_ 0402_1%
1 2
R750 16.2K_ 0402_1%
12
R751
56.2K_0402 _1%
3
R732
1 2
1M_0402_5%
+5VALW
8
1 2
R737 10K_0402 _5%
2VREF _51125
D44
21
D45
21
1
C773
3300P_0402_ 25V7K
2
+1.8VS
+1.5VS
3300P_0402_ 25V7K
1
C774
2
49.9K_0402 _1%
27.4K_040 2_1%
1 2
R763
23.2K_040 2_1%
1 2
R776
R777
R738 34.8K_ 0402_1%
R740 49.9K_ 0402_1%
R747 10K_0402 _5%
12
1 2
1 2
1 2
2VREF _393
1
C913
2
3300P_0402_ 25V7K
2VREF _393
R982
1 2
2VREF _393
2VREF _393
10K_0402_5%
2VREF _393
3
+
2
-
1
C772 1000P_0402_ 50V7K
2
1 2
1M_0402_5%
5
+
6
-
1 2
1M_0402_5%
3
+
2
-
U42A
P
G
LM393DR_ SO8
4
R744
+5VALW
8
P
G
4
R981
+5VALW
8
P
G
4
1
O
U42B
7
O
LM393DR_S O8
U57A
1
O
LM393DR_S O8
4
+3VS
12
R734 10K_0402_5%
1 2
J2 SHORT P ADS
VCCP_ POK38
MC74A HC1G08DF T2G SC70 5P
+3VALW
5
U43
1
P
IN1
2
IN2
G
3
ESD request 9/16
5
VCCP _EN 38
SLP_S3#
MC74A HC1G08DF T2G SC70 5P
4
O
12
0.1U_0 402_16V4Z
1
@
C1056
12
2
R743
4.99K_040 2_1%
R748
2.49K_040 2_1%
PWR _GD 12,2 9
VTTPWR GOOD 4
6
+3VALW
5
U336
1
P
IN1
4
O
2
IN2
G
3
7/7/20 09 HP
VCCP_ 1.5VSPW RGD 4
7
8
MDC STANDOFF
H7
H6
HOLEA
HOLEA
1
R568
R567
41.2K_0402 _1%
1 2
R569
71.5K_0402 _1%
12
12
12
1
C910 1000P_0402 _25V8J
2
R565 10K_0402_5%
C527
3300P_0402_ 50V7K
12
2 1
CH751H- 40PT_SOD323-2
1 2
1 2
1 2
D60
1 2
2VREF _51125
86.6K_0402 _1%
2VREF _51125
C C
1.05VM_LAN _POK40
+3VM
+1.05VM
PM_SLP_M#14,29 ,33
R386
3.3K_0402 _5%
09/2/7 HP
D D
R564 3.3K_0402 _5%
R566 46.4K_040 2_1%
R509 14.7K_040 2_1%
1 2
1N4148W S-7-F_SOD32 3-2
just ch ange par t numb er, wai ting for dat abas e
R562 1M_0402_5%
D61
12
+5VALW
U338
1
IN+
5
VCC+
2
GND
4
OUT
3
IN-
LMV331 IDCKRG4_SC 70-5
7/15/2009 Jo hnson
R571 1M_0402_5%
1 2
1 2
C816
0.068U 16V K X7R 0402
DB1 NO7 8
+3VALW
R563
3.3K_0402 _5%
1 2
M_PWROK
12
R570 1K_0402_5%
M_PWROK 14
1
H12
H13
H14
H10 HOLEA
1
H19 HOLEA
FM3
HOLEA
1
1
1
H11 HOLEA
1
H20 HOLEA
FM4
1
H15 HOLEA
1
HOLEA
HOLEA
1
1
H8
H9
HOLEA
HOLEA
1
1
H18
H17
HOLEA
HOLEA
1
1
FM1
FM2
1
1
1
H21 HOLEA
1
H1 HOLEA
H2 HOLEA
1
H22
H23
HOLEA
HOLEA
1
1
H4
H3 HOLEA
1
H5
HOLEA
HOLEA
1
1
1
ZZZ1
PCB-MB
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
3
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
2008/09/15 2009/12/31
Compal Secret Data
Deciphered Date
6
Title
Size Docum ent Num ber R ev
Dat e: Sheet
7
Compal Electronics, Inc.
POK CKT
LA-4902P
of
32 47Wedn esday, Decembe r 09, 20 09
8
0.3
1
hexainf@hotmail.com
2
3
4
5
+1.05VM_LAN to +1.05VS Transfer
SI7326DN- T1-E3_PAK1212-8
U45
C780
10U_08 05_10V4Z
C781
A A
0.1U_0 402_16V4Z
1
1
R983
1 2
2
0_0402_5%
2
RUN ON
+1.05VS+1.05VM _LAN
1 2 35
4
SI1 NO6 4
C783
10U_08 05_10V4Z
1
2
+3VALW to +3VM Transfer
PM_SLP_LAN#14,29 ,40
+3VALW +3VM
C779
0.1U_0 402_16V4Z
12
1
2
13
D
2
G
S
R761 47K_0402_5%
R762
1 2
4.7K_0402 _5%
Q43 SSM3K7002F _SC59-3
Q40
AP2301GN 1 P_SOT23
D
S
13
G
2
LAN_ EN
C777
0.1U_0 402_16V4Z
1
1
C778 10U_080 5_10V4Z
2
2
+3VALW to +3VS Transfer
4
RUN ON
0.1U_0 402_16V4Z
+3VS+3VALW
1 2 35
C785
1
2
12
R766 470_0402_5%
1
C787
0.01U_0 402_16V7K
2
1
C789 10U_080 5_10V4Z
2
+1.05VM_LAN to +1.05VM Transfer
10U_08 05_10V4Z
0.1U_0 402_16V4Z C786
1
2
ADP_P RES29 ,35,42
+1.05VM_LAN +1.05VM
SI7326DN- T1-E3_PAK1212-8
U55
C892
10U_08 05_10V4Z
C893
0.1U_0 402_16V4Z
1
1
2
2
R974 330K_0402_5%
1 2
B+
2
G
13
D
S
4
R1025
1 2
820K_0402_5%
Q71
SSM3K7002F _SC59-3
1 3
10/17 HP cor rect it
+3VL
12
R767 100K_0402_5%
SLP_S426
SLP_S4
13
D
2
G
S
1 2 35
Q68
SSM3K7002F _SC59-3
D
S
G
2
PM_SLP_M
Q48 SSM3K7002F _SC59-3
SI1 NO6 4
C895
10U_08 05_10V4Z
C986
330U_B2_2VM _R15M
1
1
+
@
2
2
+3VL
12
R768 100K_0402_5%
SLP_S3
SLP_S37
SLP_S3#14, 25,29,32 ,35,38,39SLP_S4#14,4 0
2
G
13
D
Q49 SSM3K7002F _SC59-3
S
PM_SLP_M#14,2 9,32
B+
R764
330K_0402_5%
B B
SLP_S3
2
G
ADP_P RES29 ,35,42
12
1
C784
2
10U_080 5_10V4Z
12
J3 SHORT PADS
13
D
Q45 SSM3K7002F _SC59-3
S
SI7326DN- T1-E3_PAK1212-8
U46
12
R765 820K_0402_5%
13
D
Q46
2
SSM3K7002F _SC59-3
G
S
+5VALW to +5VS Transfer
SI7326DN- T1-E3_PAK1212-8
U47
C C
1
C790 10U_080 5_10V4Z
2
4
RUN ON
+5VS+5VALW
1 2 35
C788
1
2
Discharge circuit-2 for V-M
+1.05VM
12
R759 470_0402_5%
13
2
G
D
S
SSM3K7002F _SC59-3
LAN_ ENPM_SLP_M
Q41
+1.5V to +1.5VS Transfer
SI1 NO8 0
SI7326DN- T1-E3_PAK1212-8
Q61
C899
10U_0805_1 0V4K
C900
0.1U_04 02_10V6K
1
PM_SLP_M
PM_SLP_M#
1
2
2
+3VL
12
13
D
2
G
S
R984
1 2
0_0402_5%
RUN ON
R915 100K_0402_5%
Q60 SSM3K7002F _SC59-3
4
+3VM
12
R760 470_0402_5%
13
D
Q42
2
SSM3K7002F _SC59-3
G
S
+1.5VS+1.5V
1 2 35
RUNON 7
C902
10U_0805_1 0V4K
C901
0.1U_04 02_10V6K
1
1
2
2
SI1 NO4 6
+VCCP +GFX_CORE
12
R1109 470_0402_5%
61
2
Q86A 2N7002DW H_SOT363-6
SLP_S3 SLP_S4
0.1U_04 02_10V6K
0.1U_04 02_10V6K
0.1U_04 02_10V6K
C1036
1
2
@
0.1U_04 02_10V6K
C1041
1
2
2VREF_ 51125
C1044
1
2
C1037
1
2
C1042
1
2
0.1U_04 02_10V6K
0.1U_04 02_10V6K
C1038
C1039
C1040
1
1
1
2
2
2
@
0.1U_04 02_10V6K
0.1U_04 02_10V6K
C1043
1
2
0.1U_04 02_10V6K
C1045
1
2
EMI requet 8/22
12
R1108 470_0402_5%
34
Q86B 2N7002DW H_SOT363-6
5
+3VS
0.1U_04 02_10V6K
+1.05VS
Discharge circuit-1
+1.05VS +1.5VS +1.8VS
12
R769 470_0402_5%
13
2
G
1
D
Q50 SSM3K7002F _SC59-3
S
SLP_S3
D D
+3VS +5VS
12
2
G
R771 470_0402_5%
13
D
Q52 SSM3K7002F _SC59-3
S
R770 220_0402_1%
1 2
13
D
SLP_S3 SLP_S3SLP_S3
2
G
Q51 SSM3K7002F _SC59-3
S
2
2
G
12
R772 470_0402_5%
13
D
Q53 SSM3K7002F _SC59-3
S
12
R773 470_0402_5%
13
2
G
Issued Date
D
Q54 SSM3K7002F _SC59-3
S
2008/09/15 2009/12/31
SLP_S3
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+1.5V +0.75VS
12
R774 470_0402_5%
13
2
G
D
Q55 SSM3K7002F _SC59-3
S
SLP_S4 SLP_S 3
Compal Secret Data
Deciphered Date
4
2
G
09/6/30 HP
R775 22_0402_5%
1 2
13
D
Q56 SSM3K7002F _SC59-3
S
Title
Size Docum ent Num ber R ev
Dat e: Sheet o f
Compal Electronics, Inc.
DC/DC Circuits
LA-4902P
5
33 47Wedn esday, Decembe r 09, 20 09
0.3
1
2
3
4
PJP1
3
GND1
4
GND2
6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
100K_0402_5%
BATT+
SMD SMC
GND
7
8
9
B/I TS
PR9
GND_1
GND_2
GND_3
GND_4
@FOX_JPD11 3E-LB103-7F
PR2 1M_0402_1%
PR4
MMBT3906H PNP SOT23-3
PQ30
1
2 3 4 5
6
1K_0402_5%
+3VL
A A
PJP2
@SUYIN _200046GR008G1 02ZR_8P-T
B B
THM_MAIN#29
SSM3K7002F U_SC70-3
OCP_ ADJ42
C C
PCN 1
@SUYIN _20163S-06G1-K
210K_0402_1%
1 2
D D
BAV99WT1G_SC7 0-3
5
SINGAL
1
PWR1
2
PWR2
@PJSOT 24CH 3P C/A SO T-23
12
12
PQ29
13
D
2
G
S
PR91
220K_0402_5%
PR92
294K_0402_1%
1 2
PR11
1 2
1
PD18
2
3
1
ADPIN
PL1
12
PC2 1000P_0402_50V7K
12
PR5
100_0402_5%
VL
2
12
PC28
100P_0402_50V8 J
SMB3025500YA_2 P
1 2
100P_0402_50V8J
12
12
PR6
PC8
100P_0402_50V8 J
1
3
PD16 BAV99WT1G_SC7 0-3
12
12
PR15
100_0402_5%
PC29 100P_0402_50V8J
1
PD20 BAV99WT1G_SC7 0-3
2
3
PC3
12
100_0402_5%
1
2
3
PR7
1K_0402_5%
1 2
12
PC4
VMB_A
12
PC5 1000P_0402_50V7K
12
PC9 100P_0402_50V8J
PD17 BAV99WT1G_SC7 0-3
+3VL
ADP IN
2
3
12
PC1
1
PD1
100P_0402_50V8 J
12
PR3
VL+3VL
3
C
1
12
69.8K_0402_1%
E
B
2
2
PR88
1 2
12
PR89
100K_0402_1%
12
PR90
150K_0402_1%
3
2
12
PC27
1
100P_0402_50V8 J
PD2
PJSOT2 4CH 3P C/A SOT -23
1K_0402_5%
1
2
3
PD15 BAV99WT1G_SC7 0-3
3
1
PR14
100_0402_5%
PD3
PJSOT2 4CH 3P C/A SOT -23
2
PC7
100P_0402_50V8 J
12
PD19 BAV99WT1G_SC7 0-3
1
3
VIN
12
1000P_0402_50V7K
PL2
SMB3025500YA_2 P
1 2
+3VL
VMB_B
SMB3025500YA_2 P
1 2
12
PC11 1000P_0402_50V7K
AB1B_DATA 29
AB1B_CLK 29THM_TRAVEL#29
2
12
PR1 @15K_0402_5%
BATT_A
12
PC6 .01U_0402 _50V4Z
AB1A_DATA 29
AB1A_CLK 29
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C (Need to be checked)
BATT_B
PL3
12
PC10 .01U_0402 _50V4Z
Close to CPU
1
PC1103
2
@0.1U_040 2_10V6K
0.1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2VREF_511 25
12
PH1 100K_060 3_1%_TSM1A104F4361RZ
PR12
53.6K +-1 % 0603
12
12
PC12
0.1U 25V K X7R 0603
2008/09/15 2009/09/15
PR16
19.1K +-1 % 0402
2VREF_511 25
Compal Secret Data
1 2
1 2
PR13
75K_0402_1%
150K_0402_1%
Deciphered Date
3
PR17
12
12
PC13
1000P_0402_50V7K
5
6
PR8
470K_0402_1%
1 2
8
P
+
O
-
G
PU15B LM393D R SO 8P
4
VL
PR10 100K_0402_5%
1 2
13
D
PQ1
7
Title
Size Docum ent Numb er Re v
Cus tom
Dat e: Sheet o f
2
G
SSM3K7002F U_SC70-3
S
Compal Electronics, Inc.
DC-IN/ BATTERY CONN
LA-4902P
4
EN0 37
34 44Wed nesday, De cember 0 9, 2009
ADP_SIGNAL
A
hexainf@hotmail.com
VIN
8 7
5
VL
3
+
2
-
12
PR140
23.7K_0402_1%
7
O
12
PC124
0.1U_0402 _10V7K
1
PQ102 AO4407AL 1P SO8
4
12
PR105 15K_0402_5%
13
D
S
1 2
PR138 100K_0402_5%
1 2
8
PR139 1M_0402_5%
P
1
O
G
PU10A LMV393 DR2G SO 8P OP COMPARATOR
4
BAT_PWM_OUT29
+3VL
12
PR120 22K_0402_5%
AC_A ND_CHG
PQ101 AO4407L 1 P SO8
1 2 3 6
1 1
2 2
3 3
4 4
0.1U_0603 _25V7K
200K_0402_5%
ADP_EN #
100K_0402_1%
P2
12
PR119 200K_0402_1%
12
PR123
41.2K_0402_1%
VIN
12
PR128
1 2
PC101
1 2
PR101
1 2
PR136
P2
12
PR127
76.8K_0402_1%
12
PR131
10K_0603_0.1%
2VREF_511 25
P2BATT
24.3K +-1 % 0603
@76.8K_0402_1%
4
12
PR111 150K_0402_5%
PR135
100K_0402_1%
1 2
1 2
PR137
1 2
5
+
6
-
2VREF_511 25
VL
3
+
2
-
8 7
5
PR118 255K_0402_1%
8
P
G
PU103B LMV393 DR2G SO 8P OP COMPARATOR
4
PR125 604K_0402_1%
1 2
8
P
O
G
PU103A LMV393 DR2G SO 8P OP COMPARATOR
4
P4
1 2 36
1 2
PR103
47K_0402_5%
2
G
PQ104 SSM3K7002F U_SC70-3
1 2
PR114
422K_0402_1%
PC116
1U_0603_6.3 V6M
AC Detector High 11.85 Low 10.55
ADP_PRES 29, 36,42
Charge Detector High 17.588 Low 17.292
+3VL
12
PR129
22K_0402_5%
+3VL
1 2
PR104 56K_0402_1%
0.01U_040 2_16V7K
SLP_S3#
14,15,25,29,32,33,37,38,39
1 2
PC111 1U_0603_6.3 V6M
12
PR113 453K_0402_1%
12
12
PR115 1M_0402_1%
AC_ADP_PRES
29,36, 42
PC107
43.2K_0402_1%
IADAPT42
12
PR109
0_0402_5%
1 2
BQ24740V REF
+3VL
PR116
100P_0402_50V8J
CHGC TRL
B
12
10
11
12
13
14
1K_0402_5%
1 2
ACDET
+3VL
7
LPREF
8
IADSLP
9
AGND
VREF
VDAC
VADJ
EXTPWR
ISYNSET
IADAPT
15
IADAPT
12
PC119
PR130
PD103
1SS355_SOD323-2
0.047U_04 02_16V7K
Note: X7R type
PR102
0.01_2512_1%
1
2
ACP
PC105
1U_0603_6.3 V6M
1 2
12
PC108
0.1U_0603 _50V7K
4
ACDET
BAT
LPMD
SRN
18
12
3
19
12
PC122 1U_0603_6.3 V6M
12
470K_0402_5%
5
6
ACSET
PU101 BQ24740 RHDR_QFN28_5X5
SRSET
17
16
BATT
12
PR124 147K_0402_1%
12
PC123
4
3
ACN
2
ACP
ACN
SRP
CELLS
20
PR122
210K_0402_1%
2
G
PR134
B+
PL101
@HCB2012K F-121T50_0805
1 2
1 2
PL103
1.2UH +-30% 1231 AS-H-1R2N=P3 2.9A
12
PC106 @0.1U_060 3_25V7K
CHG EN#
1
29
TP
CHGEN
28
PVCC
BTST
HIDRV
PH
REGN
LODRV
PGND
DPMDET
21
12
+3VL
12
PR126
100K_0402_5%
12
PR133 220K_0402_5%
CHG EN#
13
D
PQ109 BSS138L T1G 1N SOT23 W/ D
S
PC109 1U_0805_25V6K
BST_CHG
27
DH_ CHG
26
LX_CHG
25
RE GNVAD J
24
DL_C HG
23
22
SRSET 42
CHGC TRL 29
B
2
1 2
PC118
12
1U_0603_10V6K
+3VL
E
3
PQ108 MMBT3906H PNP SOT23-3
C
1
1 2
PR150
47K_0402_5%
C
1
+
PC125
2
PR110 10_0805_1%
1 2
1 2
PR121
0_0402_5%
1 2
PR145
0_0402_5%
PD102
12
RLS4148_LL34-2
0.1U_0603 _50V7K
ACDETACDET
12
12
12
PC102
4.7U_0805 _25V6-K
47U 2 5V M D ESR 0.36 FK
PC110
0.1U_0402 _10V7K
1 2
PR117 100K_0402_5%
1 2
PC120
PR132 300K_0402_5%
PC103
CELLS
12
12
4.7U_0805 _25V6-K
CHG_B+
29
IADAPT
P4P2
CHG_B+
PC104
4.7U_0805 _25V6-K
578
PQ106 AO4466L 1N SO8
3 6
241
578
3 6
241
PQ107 AO4468L 1N SO8
12
PC121 @0.1U_060 3_25V7K
PR142
11K_0402_5%
1 2
1U_0603_10V6K
PQ103
AO4407AL 1P SO8
4
PR106 0_0402_5%
1 2
PR144
8 7
5
P2
12
1
2
3
12
1 2 3 6
PL102 10UH +-20 % #919AQ-H-100M=P3 5.3A
1 2
PR141
4.7_1206_5%
1 2 12
PC126
680P_0603_50V8J
12
PC127
49.9K_0402_1%
D
PR112
0.01_1206_1%
1 2
12
PC113
PC112
4.7U_0805 _25V6-K
+IN
V-
-IN
PU104
LMV321AS5X_G SOT23 5P OP
1 2
39.2K_0402_1%
4.7U_0805 _25V6-K
OUTPUT
PR143
1 2
PC117
0.1U_0402 _10V7K
5
V+
4
+5VALW
BATT
12
PC114
4.7U_0805 _25V6-K
PMC 29
12
12
PC128
PC115
4.7U_0805 _25V6-K
4.7U_0805 _25V6-K
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2008/09/15 2009/09/15
Compal Secret Data
Deciphered Date
C
Title
Size Docum ent Numb er Re v
Dat e: Sheet o f
Compal Electronics, Inc.
Charger
LA-4902P
D
35 44Wed nesday, De cember 0 9, 2009
0.1
A
1 2
PR1100
2VREF_51125
BATT
12
1 1
12
PR1105
93.1K_0603_1%
PR1109 20K_0402_1%
12
PR1103
10K_0402_5%
1M_0402_5%
VL
12
PC1100
8
5
6
0.1U_0603_50 V4Z
P
+
7
O
-
G
PU10B LMV393DR2G SO 8P OP COMPARATOR
4
+3VL
12
PR1104 100K_0402_5%
BAT_ALARM 29
B
BATT_B
BATT_A
B+_DEBUG
C
Vin
1SS355_SOD323-2
2
3
PD1102
12
PD1100 CH715FPT SC70
1
D
2 1
PD1110 RLZ27V
PR1101
0_0402_5%
1 2
B++ 51125_PWR
12
PD1101
1SS355_SOD323-2
PR1106
100_0805_5%
1 2
12
PC1102
0.1U_0603_50 V4Z
12
PR1110
8.06K_0402_1%
13
D
CFET_B
2
G
PQ1100
S
SSM3K7002FU_SC70-3
PQ1102
LATCH32
S
G
2
PR1112
0_0402_5%
D
1 2
13
BSS84LT1G_SOT23-3
BATT_IN
BATT
2 2
12
PR1114 470K_0402_5%
1
2
CFET_A
PR1119
10K_0402_5%
1 2
BATT_IN
PR1117
10K_0402_5%
CFET_A
2
34
PQ1106B 2N7002KDW H 2N SOT363-6 PANJIT
5
12
61
PQ1106A
2N7002KDW H 2N SOT363-6 PANJIT
1 2
PD1106 1SS355_SOD323-2
PQ1105 PMBT2222A_SOT23-3
3
BATT
3 3
4 4
FET_A 29
FET_B 29
1 2
PR1127
10K_0402_5%
CFET_B
BATT_IN
PR1126
10K_0402_5%
5
CFET_B
61
PQ1112A 2N7002KDW H 2N SOT363-6 PANJIT
2
12
PR1122 470K_0402_5%
1
2
3
12
1 2
PD1109 1SS355_SOD323-2
34
PQ1112B 2N7002KDW H 2N SOT363-6 PANJIT
PQ1111
PR1115 470K_0402_5%
1 2
3 6 2 1
PQ1107 AO4407AL 1P SO8
PQ1109
AO4407AL 1P SO8
1 2 3 6
470K_0402_5%
1 2
PR1124
PMBT2222A_SOT23-3
PD1107 SX34H SMA
4
4
PD1108 SX34H SMA
BATT_IN
21
BATT_A_P
5
7 8
8 7
5
21
BATT_IN
5
2
5
7 8
PQ1108 AO4407AL 1P SO8
PQ1110
AO4407AL 1P SO8
8 7
5
BATT_B_P
5
2
34
PQ1113B 2N7002KDW H 2N SOT363-6 PANJIT
PQ1113A
61
2N7002KDW H 2N SOT363-6 PANJIT
4
4
34
PQ1114B 2N7002KDW H 2N SOT363-6 PANJIT
61
PQ1114A 2N7002KDW H 2N SOT363-6 PANJIT
12
PR1118
4.7K_0402_5%
12
36 2 1
1 2 36
PR1120 470K_0402_5%
12
PR1121 470K_0402_5%
12
PR1125
4.7K_0402_5%
BATT_A
BATT_B
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2008/09/15 2009/09/15
Compal Secret Data
Deciphered Date
C
Title
Size Docume nt Number Re v
Cust om
Date : Sheet o f
Compal Electronics, Inc.
Battery selector
LA-4902P
D
36 44W ednesday, December 09 , 2009
A
hexainf@hotmail.com
B
C
D
E
2VREF_51125
12
PC302
1U_0603_16V6K
1 1
PR301
13.7K_0402_1%
+3VALWP
B+
PL301
HCB2012KF -121T50_0805
1 2
2 2
+3VALWP
150U 6.3V M B2 LESR45 M
3 3
2N700 2KDWH 2N SOT363-6 PANJIT
4 4
PC310
ENTRI P1
61
PQ305A
SSM3K7002F U_SC70-3
B++
12
PC317
1000P_0402_50V7K
PL302
4.7_1206_5%
PC312
13
D
S
12
PC303
4.7U_0805 _25V6-K
12
12
PR311
12
ENTRI P2
34
PQ305B 2N700 2KDWH 2N SOT363-6 PANJIT
5
PR316
100K_0402_5%
1 2
330K_0402_5%
2
G
12
PC301
0.1U_0402 _25V6
4.7UH +-20% MSC DRI-74D-4R7M-E 4A
1
+
2
1000P_0603_50V8J
2
PQ307
PR317
PD305 1SS355_SOD323-2
PD301 1SS355_SOD323-2
PQ301 SIS412D N-T1-GE3 1N POW ERPAK1212-8
2.2U_0805 _10V6K
3 5
241
3 5
241
PQ304 AON7 406L 1N DFN
PR309
0_0402_5%
1 2
VL
12
12
12
12
KBC_PWR_ON 29
PR328
100K_0402_5%
DEBUG_KBCRST 29,31,42
VCC1_PWRGD 29 ,31,42
12
PC307
PC308
0.1U_0402 _10V7K
+5VALWP
+3VALWP
+3VLP
1 2
B++
PR307
1 2
2.2_0402_5%
PR313
@1M_0402_1%
1 2
PJP301
1 2
PAD- OPEN 4x4m PJP303
1 2
PAD- OPEN 4x4m
EN0 34
A
B
1 2
PR303
20K_0402_1%
1 2
PR305
107K_0402_1%
1 2
BST_3V
UG_3V UG_5V
LX_3V
LG_3V
PR315
@620K_0402_5%
25
P PAD
7
VO2
8
VREG3
9
VBST2
10
DRVH2
11
LL2
12
DRVL2
12
2VREF_51125
+5VALW
+3VALW
PJP302
2 1
PAD- OPEN 2x2m
PJP304
2 1
PAD- OPEN 2x2m
PJP305
2 1
PAD- OPEN 2x2m
ENTRI P2
4
5
6
13
3
VFB2
VREF
TONSEL
ENTRIP2
GND
VIN
SKIPSEL
EN0
15
16
14
12
0.1U_0603 _25V7K
PC314
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)
+VREG3_51125+3VLP
VL+5VLP
+3VL+3VEXTLP
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/09/15 2009/09/15
C
PR302
30.9K_0402_1%
1 2
PR304
20K_0402_1%
1 2
PR306
75K_0402_1%
ENTRI P1
1 2
1
2
VFB1
ENTRIP1
24
VO1
23
PGOOD
22
VBST1
21
DRVH1
20
LL1
19
DRVL1
VREG5
VCLK
PU301
17
18
TPS51125RG ER_QFN24_4X4
+5VLP
12
1 2
@0_0402_5%
PC322
@10U_0805_10V6K
1U_0603_10V6K
12
PC315
22U_0805_6.3V6 M
PR308
2.2_0402_5%
BST_5V
1 2
LX_5V
LG_5V
+3VL
12
PR314 @100K_0402_5%
51125_PW R
B++
PR319
P2
PR320
255K_0402_1%
12
PC321
PR321
Compal Secret Data
Deciphered Date
+5VALWP
12
PC318
1000P_0402_50V7K
PC309
0.1U_0402 _10V7K
1 2
RPGOO D 14
DEBUG_KBCRST29
12
12
11.5K_0402_1%
12
0.1U_0402 _25V6
PR310
PC305
PC319
D
12
4.7U_0805 _25V6-K
UG1_5VUG1_3V
12
V+
OUT
12
PC304
0_0402_5%
1 2
10U_0805_10V6K
PU302
LMV321AS5X_G SOT23 5P OP
1
+IN
2
V-
3
-IN
PC306
4.7U_0805 _25V6-K
+5VLP
PR325
220K_0402_5%
+5VLP
5
4
B++
PQ302 SIS412DN -T1-GE3 1N POWE RPAK1212-8
3 5
241
3 5
241
PQ303 AON7 702L 1N DFN
PL303
4.7UH_P CMC063T-4R7MN_5.5A_ 20%
1 2
12
PR312
4.7_1206_5%
12
PC313 1000P_0603_50V8J
1
+
PC311
2
150U 6.3V M B2 LESR45 M
+5VALWP
+3VEXTLP
PU303
1
VIN
12
2
3
12
PR326
470K_0402_5%
1 2
PR327
680K_0402_5%
Cus tom
VOUT
GND
EN
FB
APL5317
PR324
16.5K_0402_1%
12
PD304
1SS355_SOD323-2
Title
Size Docum ent Numb er Re v
Dat e: Sheet o f
Compal Electronics, Inc.
12
PR322
12
64.9K_0402_1%
12
PR323
20K_0402_1%
5
4
12
3.3VALWP/5VALWP
LA-4902P
E
PC320
2.2U_0603 _10V6K
0.1
37 44Wed nesday, De cember 0 9, 2009
A
1 1
B+
1 2
2 2
PL401
HCB2012KF -121T50_0805
1 2
1 2
PC417
PC418
@680P_0603_50V7K
@680P_0603_50V7K
12
PC416
1000P_0402_50V7K
SLP_S3#14,15,25,29,32,33,35,37,39
VCCP_EN32
VCCP_B+
12
PC401
0.1U_0402 _25V6
+6269_VCC
2.2U_0603 _6.3V6K
12
PC402
4.7U_0805 _25V6-K
PC407
12
PC403
4.7U_0805 _25V6-K
12
1 2
PR406
@0_0402_5%
1 2
PR428
0_0402_5%
12
PC404
4.7U_0805 _25V6-K
PR405
0_0402_5%
1 2
PR427
10K_0402_5%
VCCP_P OK32
1
2
3
4
12
PC411 @10K_0402_5%
+3VS
12
PR401
@10K_0402_5%
17
PU401
VIN
VCC
FCCM
EN
+VCCP
12
16
GND
PGOOD
COMP5FB6FSET
LX_VCCP
15UG14
PHASE
B
BST_VCCP
DH_ VCCP
13
8
7
1 2
PR402
2.2_0603_5%
+5VALW
12
PR403
0_0402_5%
BOOT
12
PVCC
DL_ VCCP
11
LG
10
PGND
SE_VC CP
9
ISEN
VO
ISL62 69ACRZ-T_QFN16
+VCCP
0.22U_060 3_16V7K
PR404
2.2_0603_5%
1 2
1 2
1 2
7.87K +-1 % 0402
1 2
PR417
0_0603_5%
1 2
PC405
+6269_VCC
PC406
2.2U_0603 _6.3V6K
PR407
C
578
PQ401
DH_V CCP1
AO4474L 1N SO8
3 6
241
PQ402
3 5
241
AON6 718L 1N DFN
PL402
0.47U 20% FDVE063 0-H-R47M=P3 17.7A
1 2
12
PR408
4.7_1206_5%
PC412
1 2
1000P_0603_50V7K
1
+
PC408
2
D
+VCCP
1
1
+
+
PC409
2
PC410
2
12
PR409
12
PC414
22P_0402_50V8J
3 3
H_VTTVID17
H_VTT VID1= Low, 1.1V H_VTT VID1= High, 1.05V
4 4
A
1 2
PR416
75K +-1% 040 2
25.5K +-1 % 0402
12
PC415
6800P_0603_50V7K
FB_ VCCP
PR410
49.9K_0402_1%
1 2
12
PR412
1.96K_0402_1%
12
12
PR411
1.58K_0402_1%
PC419
B
PC413
0.01U_040 2_16V7K
1 2
PR413 10_0402_5%
1 2
PR414
12
0_0402_5%
1 2
PR415 0_0402_5%
@0.1U_040 2_25V6
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+VCCP
VTT_SENSE 7
VSS_SENSE_VTT 7
2008/09/15 2009/09/15
Compal Secret Data
Deciphered Date
C
330U 2V Y D2 LE SR9M EEFS X H1.9
330U 2V Y D2 LE SR9M EEFS X H1.9
(18A,720mils ,Via NO.= 36)
Title
Size Docum ent Numb er Re v
Dat e: Sheet o f
Compal Electronics, Inc.
1.05V_VCCP
LA-4902P
330U 2V Y D2 LE SR9M EEFS X H1.9
D
38 44Wed nesday, De cember 0 9, 2009
0.1
A
hexainf@hotmail.com
B
C
D
1 1
+5VALW
PR604
47K_0402_5%
SLP_S3#14,15,25,29,32,33,35,37,38
1 2
1 2
PD601 1SS355_SOD323-2
12
PC606
+1.8VSP
0.1U_0402 _16V7K
12
PC611
0.1U_0402 _25V6
PR608
402K_0402_1%
12
PC610
1 2
10U 1 0V K X5R 0805 H1.25
316K_0402_1% PR607
1 2
12
PC608
0.1U_0402 _16V7K
1 2
0_0402_5%
PC609
10U 1 0V K X5R 0805 H1.25
2 2
3 3
+5VALW
PL601
HCB1608KF -121T30_0603
1 2
12
PR602 10K_0402_5%
34
2N700 2KDWH 2N SOT363-6 PANJIT
5
PQ601B 2N700 2KDWH 2N SOT363-6 PANJIT
+0.75VSP
1 2
PR609
+1.5V
12
PC601
10U_0805_6.3V6 M
61
2
PQ601A
PJP601
1 2
PAD- OPEN 3x3m
PU602
1
FB
2
GND
3
SW
4
IN
5
BS
MP2121DQ-LF -Z_QFN10_3X3
EN/SYNC
GND
POK
10
9
8
SW
7
IN
6
11
TP
PU601
VIN1VCNTL
2
12
0.1U_0402 _10V7K
PC604
PR605
0_0402_5%
1 2
12
PC607
@
0.1U_0402 _16V7K
GND
3
VREF
4
VOUT
G2992F1U_ SO8
PC605 10U_0805_6. 3V6M
12
12
PR601
1K_0402_1%
PC602
@10U_0805 _10V4Z
12
PR603 1K_0402_1%
12
(2A,80mils ,Via NO.= 4)
+0.75VS
6
5
NC
7
NC
8
NC
9
TP
+0.75VSP
SLP_S3# 3 9,41,45
PL602
1.2UH +-30% 1231 AS-H-1R2N=P3 2.9A
1 2
12
PC603 1U_0603_10V6K
+5VALW
+1.8VSP
12
12
PD602
@
B340A_SMA2
PR606
<BOM Struct ure>
4.7_1206_5%
12
PC612
<BOM Struct ure>
680P_0603_50V7K
12
12
PC613
PC614
22UF 6.3V M X5R 0 805 H1.25
22UF 6.3V M X5R 0 805 H1.25
PJP602
4 4
+1.8VSP
1 2
PAD- OPEN 3x3m
Security Classification
2008/09/15 2009/09/15
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
(1.5A,60mils ,Via NO.= 3)
+1.8VS
Compal Secret Data
Deciphered Date
C
Title
Size Docum ent Numb er Re v
Dat e: Sheet o f
Compal Electronics, Inc.
0.75VSP/1.8VSP
LA-4902P
D
39 44Wed nesday, De cember 0 9, 2009
0.1
A
B
C
D
PR516
PM_SLP_LAN#14,29,32,33
1 1
+5VALW
+5VALW
2 2
1 2
PR518
316_0402_1%
PC520
1U_0603_10V6K
12
SLP_S4#14,33
3 3
+5VALW
+5VALW
1 2
PR522
316_0402_1%
PC522
1U_0603_10V6K
0_0402_5%
+1.05VMP_LAN
+1.05VMP_LAN
PR521
0_0402_5%
+1.5VP
+1.5VP
12
12
PC519
12
@1000P_0402_50V7K
1 2
PR519 0_0402_5%
PR503
1 2
4.12K_0402_1%
1 2
PC526
@10P_0402_50V8J
10K_0402_1%
12
PC524
12
@1000P_0402_50V7K
1 2
PR520 0_0402_5%
PR501
1 2
10.2K_060 3_0.1%
1 2
PC525
@10P_0402_50V8J
10K_0603_0.1%
PR524 255K_0402_1%
1 2
PR504
PR523 255K_0402_1%
1 2
PR502
UG_1.0 5V
LX_1.05V
PR517
1 2
+5VALW
LG_1.05V
UG_1.5 V
LX_1.5V
PR515
1 2
+5VALW
LG_1.5V
PC511
0.1U_0402 _10V7K
1 2
15.4K +-1 % 0402
PC510
0.1U_0402 _10V7K
1 2
15.4K +-1 % 0402
12
PC521
4.7U_0805 _10V6K
12
PC523
4.7U_0805 _10V6K
PR509
0_0402_5%
1 2
PR508
0_0402_5%
1 2
UG1_1.0 5V
UG1_1. 5V
AO4712L 1N SO8
PQ503
PQ502 SIS412D N-T1-GE3 1N POW ERPAK1212-8
3 5
241
578
PQ504 AO4712L 1N SO8
3 6
241
3 5
241
786
5
4
123
PR511
2.2_0402_5%
BST_1.05V
1 2
1
PU501
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
12
PU502
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
12
14TP15
VBST
EN_PSV
DRVH
TRIP
V5DRV
DRVL
GND7PGND
TPS511 17RGYR_QFN 14_3.5x3.5
8
1.05VM_LAN_POK 32
BST_1.5V
1
14TP15
VBST
EN_PSV
DRVH
TRIP
V5DRV
DRVL
GND7PGND
TPS511 17RGYR_QFN 14_3.5x3.5
8
LL
LL
13
12
11
10
9
PR510
2.2_0402_5%
1 2
13
12
11
10
9
+1.05VM_LAN_B+
12
PC504
0.1U_0402 _25V6
12
12
PC506
PC505
1000P_0402_50V7K
2.2UH_PCMC 063T-2R2MN_8A_20%
1 2
12
PR513
4.7_1206_5%
12
PC517 1000P_0603_50V8J
PJP501
+1.05VMP_LAN
12
PQ501 SIS412D N-T1-GE3 1N POW ERPAK1212-8
1 2
PAD- OPEN 4x4m
1.5V_B+
12
12
PC502
PC501
0.1U_0402 _25V6
1000P_0402_50V7K
2.2UH_PCMC 063T-2R2MN_8A_20%
1 2
PC508
12
PR512
4.7_1206_5%
12
PC516 1000P_0603_50V8J
4.7U_0805_25V6 M
PL503
4.7U_0805 _6.3V6K
4.7U_0805_25V6 M
PL502
4.7U_0805 _6.3V6K
PL501
HCB1608KF -121T30_0603
1 2
12
PC507
4.7U_0805_25V6 M
12
PC514
+1.05VM_LAN
PL504
HCB1608KF -121T30_0603
1 2
12
PC509
4.7U_0805_25V6 M
12
PC513
B+
+1.05VMP_LAN
1
+
PC515
2
220U_B2_2 .5VM_R25M
(8A,320mils ,Via NO.= 16)
B+
+1.5VP
1
+
PC512
2
220U_B2_2 .5VM_R25M
1.5V_POK 32
PJP502
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2008/09/15 2009/09/15
Compal Secret Data
Deciphered Date
C
+1.5VP
1 2
PAD- OPEN 4x4m
Title
Size Docum ent Numb er Re v
Dat e: Sheet o f
(8A,320mils ,Via NO.= 16)
+1.5V
Compal Electronics, Inc.
1.5VP/1.05VMP
LA-4902P
D
40 44Wed nesday, De cember 0 9, 2009
0.1
8
hexainf@hotmail.com
H H
H_V ID0
H_VI D07
H_V ID1
H_VI D17
H_V ID2
H_VI D27
H_V ID3
H_VI D37
H_V ID4
H_VI D47
H_V ID5
H_VI D57
H_V ID6
H_VI D67
PROC _DPRSL PVR7
H_PR OCHOT#4
PR227 @4.0 2K_0402_1%
12
PR235
8.06K_04 02_1%
PC227
150P_04 02_50V8J
VCCS ENSE7
VSSSEN SE7
PM_PWR OK13,15,30
PROC _DPRSL PVR
CLK_ EN#1 2
VGATE15
+VCC P
1 2
10P_040 2_25V8J
<BOM S tructure>
1 2
PSI#
PSI#7
1 2
PR223 147K _0402_1%
+VCC P
PC220 @56 P_0402_50V8
1 2
1 2
@470K_0 402_5%_TSM0B474J470 2RE
12
PC222
1000P_04 02_50V7K
1 2
PC225
1 2
PR241
412K_0402_1 %
PR251 0_0 402_5%
PR263 0_0 402_5%
1 2
1 2
0_0402_5%
1 2
1 2
G G
F F
E E
D D
C C
B B
PR219 0_0402_5%
1 2
12
PR225
PH202
1 2
PR236
562_0402_1 %
1 2
3.16K +-1% 0402
ISE N2
ISE N1
VSUM-
1 2
+3VALW
47K_0402_ 1%
PR221 @1K _0402_5%
PR283 1K_ 0402_5%
1 2
PR224
68_0402_5%
1 2
PC221
22P_040 2_50V8J
390P_0402 _50V7K
1 2
PC224
PR238
330P_0402_5 0V7K
1000P_040 2_50V7K
1 2
PR209 0_0 402_5%
PR215
12
PC236
PC237
0.22U_06 03_10V7K
0.22U_06 03_10V7K
PC244
PC247
10
41
12
12
12
7
1 2 3 4 5 6 7 8 9
CLK_ EN#
PU201
PGOOD PSI# RBIAS VR_TT# NTC VW COMP FB ISEN3 ISEN2
AGND
12
39
40
CLK_EN#
ISEN111VSEN12RTN13ISUM-14ISUM+15VDD
PC248
330P_0402 _50V7K
37
38
VR_ON
DPRSLPVR
35
VID4
UGATE2 PHASE2
LGATE2
LGATE1
PHASE1
VIN
IMON18BOOT119UGATE1
ISL6288 3HRZ-T_QF N40_5X5
17
16
20
12
PC228
1U_0603_ 10V6K
82.5_0402_1%
PR250
12
PC245
0.01U_04 02_25V7K
PR260
1.3K_04 02_1%
1 2
VID031VID132VID233VID334VID536VID6 BOOT2
VSSP2
VCCP
PWM3
VSSP1
12
1 2
1 2
PC229
0.22U_06 03_25V7K
6
H_V ID0
H_V ID1
H_V ID2
H_V ID3
H_V ID4
H_V ID5
H_V ID6
PROC _DPRSL PVR
PC211 1U_0603 _10V6K
1 2
30 29 28 27 26 25 24 23 22 21
12
PC223 1U_0603 _10V6K
PR242 0_0 402_5%
PR244 1_0 402_5%
+5VALW
PR228 0_0402_5%
1 2
CPU_B+
+5VALW
11K_0402_ 1%
12
0.22U_06 03_10V7K
PC242
12
12
12
12
12
12
12
12
PR239 0_0 402_5%
PR246
12
0.047U_0 603_16V7K
PC243
PR262
PR266 @1K_ 0402_5%
PR267 @1K_ 0402_5%
PR268 1K_0 402_5%
PR269 @1K_ 0402_5%
PR270 @1K_ 0402_5%
PR271 1K_0 402_5%
PR272 @1K_ 0402_5%
PR273 1K_0 402_5%
1 2
PR240 @442K_040 2_1%
1 2
12
12
PC230
0.047U_0 603_16V7K
VSSSE NSE
VSUM+
12
PR252
2.61K_04 02_1%
12
12
PH201
10KB_06 03_5%_ERT J1VR103J
11K_0402_1%
VSUM-
+VCC P
IMVP_I MON 7
+1.05VS
H_V ID0
H_V ID1
H_V ID2
H_V ID3
H_V ID4
H_V ID5
H_V ID6
PROC _DPRSL PVR
BOOST _CPU2
UGATE _CPU2
PHAS E_CPU2
LGATE _CPU2
5
PR280 1K_0 402_5%
12
PR281 1K_0 402_5%
12
PR282 @1K_ 0402_5%
12
PR275 1K_0 402_5%
12
PR276 1K_0 402_5%
12
PR277 @1K_ 0402_5%
12
PR278 1K_0 402_5%
12
PR279 @1K_ 0402_5%
12
PR208
2.2_060 3_5%
12
BOOST_ CPU1
UGATE _CPU1
PR248
2.2_060 3_5%
PHAS E_CPU1
LGATE _CPU1
PC209
0.22U_0 603_10V7K
1 2
12
4
PR249
0_0603_5%
PR274 0_0603_5%
PC240
0.22U_0 603_10V7K
1 2
12
UGATE 1_CPU1
12
UGATE 1_CPU2
578
578
3 6
3 6
241
3 5
241
241
3 5
241
3
CPU_B+
12
PC201
1000P_04 02_50V7K
PQ201 AO4474L 1N SO8
PQ202 TPCA80 36-H 1N SOP-ADV
12
PC231
1000P_04 02_50V7K
PQ205 AO4474L 1N SO8
PQ206 TPCA80 36-H 1N SOP-ADV
2
PL201
SMB3025 500YA_2P
12
12
12
PC207
PC202
PC203
4.7U_080 5_25V6-K
2200P_04 02_50V7K
4.7U_080 5_25V6-K
12
PR211
4.7_1206 _5%
12
PC210
1000P_06 03_50V7K
12
12
PC252
PC232
0.1U_040 2_25V6
2200P_04 02_50V7K
12
PR253
4.7_1206 _5%
12
PC246
1000P_06 03_50V7K
12
12
PC204
PC208
PC241
4.7U_080 5_25V6-K
4.7U_080 5_25V6-K
12
PR213
3.65K + -1% 0603
12
12
PC234
PC233
4.7U_080 5_25V6-K
4.7U_080 5_25V6-K
12
PR255
3.65K + -1% 0603
12
12
0.1U_040 2_25V6
LF2 V2N
12
PR214
10K_0402_ 1%
ISE N2 VSUM+
PC238
4.7U_080 5_25V6-K
12
PR256
ISE N1
VSUM+
12
PC212
PC213
@680P_06 03_50V7K
@680P_06 03_50V7K
PL202
0.36UH 20% PCMC 104T-R36 MN1R105 3 0A
1
2
CPU_B+
12
12
PC239
4.7U_080 5_25V6-K
PL204
0.36UH 20% PCMC 104T-R36 MN1R105 3 0A
1
LF1 V 1N
2
10K_0402_ 1%
4
3
4
3
1
12
1
+
PC206
2
100U 25V M D8 (6.3X7.7) FK
VSUM-
VSUM-
12
PR216 1_0402_5%
12
PR257 1_0402_5%
B+
+CPU _CORE
+CPU _CORE
12
A A
8
7
PC250
0.1U_040 2_16V7K
6
5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2008/10/31 2009/10/31
Compal Secret Data
Deciphered Date
3
Compal Electronics, Inc.
Title
Size Do cument Numbe r R ev
Dat e: Sheet of
2
CPU_CORE
LA-3942P
41 44Wed nesday , Dec ember 09, 2009
1
0.1
5
BQ24740V REF
12
PR1000 165K_0402_1%
IADAPT35
D D
CFET_A36
BSS138L T1G 1N SOT23 W/D
ADP_PR ES
C C
VIN
2
G
ADP_SI GNAL
100_0402_5%
1 2
10K_0402_1%
1 2
150K_0402_5%
13
D
PQ1002
S
SSM3K7002F U_SC70-3
1 2
PR1022
PR1013
PR1014
2
PQ1000
1 3
D
BSS138L T1G 1N SOT23 W/D
G
S
S
OCP_ ADJ 34
G
2
13
D
PQ1001
BSS84LT1G 1P SOT23-3
1
2
3
12
PQ1003
12
PR1030 68K_0402_5%
12
PR1040 33K_0402_5%
12
PR1042
8.06K_0402_1%
12
+3VL
E
3
B
2
C
PQ1006
1
MMBT3906H PNP SOT23-3
PD1004
12
PR1046
8.66K_0402_1%
12
12
ADP_ A_ID
PR1059
45.3K_0402_1%
PR1045
B B
4.7K_0402_5%
1SS355_SOD323-2
4
PC1000
0.22U_060 3_10V7K
1 2
+IN
V-
-IN
PU1000
LMV321AS5X_G SOT23 5P OP
PR1018 100K +-1% 04 02
D
S
13
G
2
5
V+
4
OUTPUT
PD1000
1SS355_SOD323-2
12
+5VS
12
PC1001
0.01U_040 2_16V7K
12
PR1017 2K_0402_5%
PD1001 1SS355_SOD323-2
1 2
12
1
PR1025
2
3.9K_0402_5%
PC1003
3900P_0402_50V7K
1 2
PR1032
100_0402_5%
2N700 2KDWH 2N SOT363-6 PANJIT
PQ1007B
1 2
PR1028
100K_0402_5%
OCP_ A_IN
34
3
C
PQ1005
2
B
MMBT3904W H NPN SOT323-3
E
3 1
12
PD1003 GLZ4.7B_L L34-2
ADP_EN # 35
5
VCC1 _PWRGD 29, 31,37
SRSET 35
OCP_A _IN 29
OCP
29
0.01U_040 2_16V7K
PR1010
27.4K_0402_1%
PC1002
12
12
2
PR1021 100K_0402_1%
1 2
PR1023 @0_0402_5%
1 2
PR1011 200K_0402_1%
1 2
PU1
1
IN+
2
GND
3
IN-
LMV331I DCKRG4_SC70-5
1 2
12
PR1015 100K_0402_1%
+5VS
5
VCC+
4
OUT
PR1016 100K_0402_1%
+3VS
+3VS
1 2
13
D
2
G
S
+3VS
1
PR1019 10K_0402_5%
1 2
PR1020 0_0402_5%
PQ1004 SSM3K7002F U_SC70-3
12
PR1012 10K_0402_5%
OCP# 15
2VREF_511 25
12
PR1063 130K_0402_1%
A A
12
PR1065 10K_0402_1%
1 2
PR1062
1M_0402_5%
VL
8
3
P
+
2
-
G
4
1 2
PR1066
10K_0402_5%
5
1
O
PU15A LM393D R SO 8P
ADP_ A_ID
+3VL
12
PR1064 22K_0402_5%
ADP_A _ID 29
ADP_DET# 29
2N700 2KDWH 2N SOT363-6 PANJIT
PQ1007A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
@10 91
61
2
ADP_E N 29
2008/09/15 2009/09/15
3
Compal Secret Data
Deciphered Date
Title
Size Docum ent Numb er Re v
Cus tom
2
Dat e: Sheet o f
Compal Electronics, Inc.
ADP_OCP
LA-4902P
42 44Wed nesday, De cember 0 9, 2009
1
5
hexainf@hotmail.com
4
3
2
1
B+
D D
PR704
10_0402_5%
1 2
VSS_AXG_SENSE7
VCC_AXG_SEN SE7
+GFX_CORE
C C
PR706
10_0402_5%
1 2
150P_0402_50V8J
PC720
PL701
SMB3025500YA_2 P
1 2
1 2
PC709 1000P_0402_50V7K
1 2
PC712 330P_0402_50V7K
PR710 10K +-1% 040 2
12
12
PR1009
17.8K_0402_1%
825K_0402_1%
1 2
12
GFX_B+
12
PC701
2200P_0402_50V7K
12
PR711
1 2
PC716
100P_0402_50V8J
PC721
22P_0402_50V8J
1 2
12
12
PC702
4.7U_0805 _25V6-K
PC711 330P_0402_50V7K
PC717
1000P_0402_50V7K
8.06K_0402_1%
PC703
4.7U_0805 _25V6-K
PR1008
12
PC704
4.7U_0805 _25V6-K
12
12
PC727
PC705
@0.1U_040 2_25V6
4.7U_0805 _25V6-K
+5VALW
PR701
1_0603_5%
12
12
PC706 1U_0603_6.3 V6M
29
AGND
7
VSEN
6
FB
5
COMP
4
PR712
47K_0402_1%
12
+GFX_CORE
VW
12
3
RBIAS
2
PGOOD
1
CLK_EN#
12
12
PR720
@10K_0402_1%
PR702
0_0603_5%
ISUM+
ISUM-
8
10
11
9
RTN
PU701 ISL62881H RZ-T_QFN28_4X4
28
12
VIN
VDD
ISUM
ISUM+
VID5
VID626VR_ON27DPRSLPVR
25
24
1 2 12
13
IMON
VID323VID4
PC707
0.22U_060 3_25V7K
BST_GFX
14
BOOT
UGATE
PHASE
VSSP
LGATE
VCCP
VID0
VID1
VID2
22
PR715 @442K_0402_1%
1 2
12
PR703
22.6K_0402_1%
1 2
PR705
2.2_0603_5%
15
LX_GFX
16
17
DL_GFX
18
19
20
21
1 2
PR734 0_0402_5%
12
PC708
0.22U_040 2_6.3V6K
1 2
PC710
0.22U_060 3_16V7K
PR733
0_0603_5%
1 2
PR713
1 2
0_0603_5%
12
PC718
2.2U_0603 _6.3V6K
+1.05VS
GFXVR_IMON7
VSS_AXG_SENSE 7
DH_GFX1DH_GFX
+5VALW
578
PQ701 AO4474L 1N SO8
3 6
241
3 5
241
PQ702 AON6 718L 1N DFN
12
PR707
2.2_1206_5%
PC719
1 2
680P_0603_50V7K
1 2
12
PR708
3.65K_0805_1%
1 2
PR714
2.61K_0402_1%
1 2
11K_0402_1%
PC722 .1U_0402_ 16V7K
PL702
PH701
1 2
10KB_0603 _5%_ERTJ1VR103J
PR717
1 2
.56UH +-20% ETQ P4LR56 WFC 21 A
12
PR709 0_0402_5%
+GFX_CORE
GFXVR_P WRGD
PR7210_0402_5%
12
PR7220_0402_5%
12
PR7240_0402_5%
B B
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/10/31 2009/10/31
3
Compal Secret Data
Deciphered Date
12
PR7260_0402_5%
12
PR7270_0402_5%
12
PR7280_0402_5%
12
PR7300_0402_5%
12
PR7310_0402_5%
12
PR7320_0402_5%
12
GFXVR_VI D_0 7 GFXVR_VI D_1 7 GFXVR_VI D_2 7 GFXVR_VI D_3 7 GFXVR_VI D_4 7 GFXVR_VI D_5 7 GFXVR_VI D_6 7 GFXVR_EN 7 GFXVR_ DPRSLPVR 7
2
ISUM+
ISUM-
1 2
PC724
0.068U 16V K X7R 0402
PR729
82.5_0402_1%
1 2
Title
Size Docum ent Numb er Re v
Cus tom
Dat e: Sheet
PR723
3.01K_0402_1%
1 2
PC725
0.01U_040 2_16V7K
1 2
PR725 @100_0402_1%
1 2
PC726 @1200P 50 V K X7R 0402
1 2
Compal Electronics, Inc.
VCCGFX
LA-3942P
o f
43 44Wed nesday, De cember 0 9, 2009
1
5
4
3
2
Versio n change li st (P.I.R. List) Power sec tion Page 1 of 1
1
Item R eason for change PG# Modify List
Date
Phase
1
D D
2
3
4
5
6
7
C C
B B
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
2008/09/15 2009/09/15
Deciphered Date
2
Compal Electronics, Inc.
Title
Changed-List History
Size D ocument N umber Rev
Date: Sheet of
LA- 4902 P
44 44Wednes day, Decembe r 09, 2009
1
0.1
2/2
hexainf@hotmail.com
No1. P2 1, LED0 and LED1 nets r eversed
No2. P1 6, for H P item 8 4, R294 ,R295,C2 74 value change
No3. P2 0, due t o JEDP1 42pin t o 30 pin , redefi ning th e signals,
No4. P2 0, JEDP1 change footpri nt and val ue No5. P1 4,15, de lete PCH LVDS s ignals a nd USB_5 for LV DS_CAMERA No6. P2 1, LED0 and LED1 change back. No7. P2 3, HDD/O DD footp rint mo dified. No8. P2 0, add 2 pins on JEDP1 by mysel f, diffe rent fr om database part No9. P2 0, use r eal JEDP 1 from database
No10. P 12, for HP item 69, del ete SMB_ DATA_S3, SMB_CL K_S3 and add 2 te st points No11. P 14, for HP item 78, ins tall R227 No12. P 29, for HP item 82, KB_ RST# pul l high to +3VS No13. P 4, for H P item 8 5, unis tall R99 7 and del R 40 No14. P 4, for H P item 9 7, dele te R34,R 36,R37,R 46,R49 and change n ame
of XD P_TDI & XDP_TDO , and sh ort XDP_ TDI_M t o XDP_TDO_M
D D
No15. P 4, for H P item 9 8, add a series R betwe en pin3 and 5 on U54 No16. P 21, for HP item 99, del ete C484 -C487, C 945, R4 27, R428 , R963, Q18 No17. P 22, for HP item 100, de lete Q80A
No18. P 22, for HP item 101, So urce and Drain o f Q80B are swap ped and change to a single 2N7 002
No20. P 12&P29, for HP i tem 103 , change R948, R 949, R9 52, R953, R939, R176, R 180, R9 40 to 0o hm and R 950 to 33ohm No21. P 28, for HP item 104, Co nnect +5 VS to JP 32 pins 11, 178, 179 .
No22. P 11, for HP item 105, R1 41 is co nnected to +1.05VS
No23. P 24, for HP item 106, De l R1006 and and Q70A. R eplace Q 70B wit h a single 7002
No24. P 28, for HP item 107, De lete R63 5-R638 a nd shor t the signals No25. P 12, for HP item 108, De lete C20 1, C203- C205 an d short the signals No26. P 21, for HP item 110, LE D0 and L ED1 nets reverse d again No27. P 22, for HP item 111, Co ntrol si gnal for Q80B.G ATE shou ld be LAN_DIS# No28. P 7, for H P item 1 12, NO INSTALL R967 for ES1 silicon No29. P 12, for HP item 113, IN STALL R8 47 and c hange t o 1Kohm.
Connect R847.1 t o Q66.1 and rem ove the GND con nection at R847.1. No30. P 12, for HP item 80, ins tall R18 4 and R190
No31. P 15 & P28 , for HP item 7 9, GPIO3 8 and GP IO39 on U4 conn ect DOCK_ID0 and D OCK_ID1 to the docking connecto r pins 77 and 78 No32. P 15, for HP item 60, del ete R283
No33. P 29, for HP item 66, che nge KSO4 to KSO3 , chang e 10K to 0 Ohm, change the Tabl e, add a NOR gate
No34. f or No 18 , change Q80 So urce and Drain p in back.
No35. P 32, for HP item 115, ch ange PM_ SLP_LAN# to PM_ SLP_M# at R3 86-1 No36. P 24, for HP item 116, ci rcuits r ecuperat ion bec ause of canceling item 106 No37. P 19, for HP item 117, sw ap DPD_C TRLDATA and DPD _CTRLCLK,
A UX conne cts to C LK and AUX# con nects to DATA, a dd isola tion nFE T in se ries wit h Q74A a nd Q74B.
No38. P 15, add 7 47P_04 02 but “@” at e very cloc k of PCI No39. P 12, chan ge RTCVC C sourc e from + VREG3_51 125 ins tead of +3VL
C C
No40. E SD chang e: (1) @ : D63~ D67, D14 , D57, D32, D68 , D33, D34, D36, D62, No41. E SD chang e: (2) c hange P /N: D14, D57, D3 2, D68, D33, D3 4, D36, D62, D37 No42. E SD chang e: (3) a ffact l ayout: D 14, D33, D34, D 36, D62, D37 No43. m odify C9 62 GND d isconne ction an d R70 to GN D No44. m odify HF part nu mber, p lease se arch"cha nge HF P/N" to know wh ich parts ch anged. No45. f or Load BOM prob lems, c hange so me parts as below:
(1) add CONN@: JCPU1, J P5 (2) add P/N for dual 2N 7002: Q 2,Q3,Q7,Q 8,Q81 (3) cha nge P/N: R570, C 6, C829 , R43, R 44, R47
No46. f or DRC c heck, (1) P23 , delete dummy n et of J ODD1 pin1 6, 17 (2) P28 , add in tersheet symbol at SMB_ CLK_S3 a nd SMB_DAT A_S3 (3) P21 , add a TP at U1 8.7: LA N_CTRL_18 (4) P14 , delete a dummy net N1 9910781 (5) P28 , change JP32 pi n DCAD net name to DCAD1
No47. f or parts forbidd en: (1) C82 9 change to SE02 6104KN0 (2) R80 0 change to SD0 28100380 (3) D68 change to SCA00 000E00 (4) C81 8 change to 040 2 SE070104Z80
No48. E MI conce rn: (1) ins tall C83 3, C836, C956 (2) P25 , JP25 p in difin ition c hanges. (3) R93 1 to 47 ohm (4) P18 , modify CRT cir cuits: add L an d C, cha nge R p laces, insta ll C
No49. P 29, for HP item 123, Ch ange R68 0 to 100 ohms, and unin stall R699
No50. P 29, dele te R886, R887 a nd relat ive circuit s No51. P 28, dele te R892 for BATCON
B B
No52. P 23, chan ge JODD1 pin16, 17 type to avoi d from useless ne t names No53. H F parts link dat abase: D1
No54. H F parts link dat abase: (1) Q78 link SB 00000H500 (2) D16 , D63~D6 7 link S C2AN217020 (3) D1 link SC2 N202U000 (4) D23 ~D29 did not lin k SC2P2 02U000, just rev ise manually (5) Q57 & Q58 l ink SB00 0007H10 (6) C26 3 & C269 link SG A202211D0 (7) lot s of 2N7 002(Q4, Q23, Q3 2,Q41,Q4 2,Q43,Q4 5,Q46,4 8,49,50,51, 52,53,5 4,55,56, 60,65,66 ,68,71, 76,79,80 ) link S B000009080 (8) T63 link SP 050002I10 (7) U42 A, U42B, U44A, U 57A lin k SA00393 0080
No55. c ombine p ower sch ematics 0212
No56. P 29, for HP item 122, Co nnect D4 2-2 to V CORE_GP (not PM_PWR OK)
TEST. c hange U4 2,U44,U5 7 value and foo tprint L M393DG_SO8
before netin
No57. c hange U4 2,U44,U5 7 link another SA003930080
2/16
No58. P 5, for H P item 1 26, R60 and R61 should be NO INST ALL. No59. P 12, for HP item 127, Co nnect R8 57.1 to HDD_HAL TLED_R i nstead of HDD_HALTLED No60. P 9,10, fo r HP ite m 128, Connect JDIMA1.1 99 and JDIMB1.1 99 to 3 VS as In tel reference board No61. P 16, for HP item 131, Ba sed on s pec, Vcc TX_LVDS and VCC A_LVD to GND. No62. P 19, for HP item 136, In stall Q7 6 and no instal l R1055 as ther e must be i solation
A A
No63. P 13, for HP item 138, Ch ange Gat e of Q77 to +3VALW
No64. c hange Pb -free (1)R105 8 to SD0 28100180 , (2)R105 9,1060,1 062,1063 ,1064 t o SD02810 0280 (3)R615 , 1061 t o SD0284 70180 (4)RP31 , RP33 t o SD3091 00280 (5)RP29 , 30, 32 ,34,35 t o SD309 470180 --> foot print s hould ke ep original (5)C953 to SE05 3475Z80 (6)C950 , 951, 9 52 to SE 070104Z80 c hange HF (1) SW1 to SN10 0000W10
please remember to chan ge foot print, s ymbol, p art number.
5
5
4
No65. s eparate GND sign als (1) P28 and P25 , add GN DA and resistors,
No66. P 20, chan ge JEDP1 to 24 pin conn ector, d elete L ANE[1:3] and ED ID, as w ell as U 4 relative sig nals. No67. P 31, chan ge SPI R OM back to DB1 design, but mou nt 8pin, unmount 16pin No68. P 19, chan ge misun derstan d name:D PD_C_AUX /DPD_C_ AUX# to DPD_C_A UX_L/DPD_C_AUX _L#
2/19
No69. P 5, delet e MB_DP_ DATA[1: 3]_N/P f or JEDP pin cutting No70. C 6 and C6 85 chang e to SE 071100J8 0 becaus e of Ja son's re quest( vendor d oesn't h ave the original 25V par t) No71. P 25, inst all C888 ,C889
2/20
No72. f or HP it em 66, P 29, U66 .5 shoul d be con nected to 3VL s o that KBC can read boa rd befo re boot and appl y necessary fixes. No73. f or HP it em 103, P31, R1 035 shou ld be 0ohm
No74. P 27, chan ge SC_PW R circu its for unsurely current
2/23
No74. P 26, unin stall U3 1 and a dd J1 fo r cost down No75. c hange so me test point f ootprint to TPC1 2: T61 ,T62,T1, T55,T97 ,T22, an d P14 lots of points
2/24
No76. P 22, JP6 symbol e rror, m odified! No77. P 12, add a net na me XDP_FN4
2/25
No78. P 32, chan ge U44.8 to +5V ALW for HP request No79. P 29, chan ge R680= 220 ohms
No80. P 25, (1 ) JP24: redefine the si ngals of the pins, (2 ) JP25: reverse pin def inition
No81. ( 1)U4 cha nge PN t o SA000 02KV30 fo r ES2 ( 2)P31, & U1, &U2 change to SA0000 37A00
3
2
1
combine power s chematic s
3/6
No82. ( 1)P29, F irmwave said un mount R1 021 and mount R1022 ( 2)P4, de lete R99 8 <BOM structur e>, othe rwise B OM will be e rror
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/03/13 2009/05/11
Compal Secret Data
Deciphered Date
2
Compal Electronics, Inc.
Title
Hardware revision -DB2
Size Do cument Numbe r R ev
C
LA-4902P
Dat e: Sheet of
1
45 47Wed nesday , Dec ember 09, 2009
0.3
3/9
No1. fo r HP ite m 5, P32 , chang e U44A t o U57B a nd delete U4 4 No2. fo r HP ite m 6, P12 &24, co nnect JP 12.17 to U4A.F3 4 and ad d 10K p ull-up t o +3VS f or Braidw ood detection. No3. fo r HP ite m 7, P4, change d PCH de bug port s to CF G4 - pin 28, CF G5 - pin 30, CFG 10 - pi n 22, and CFG1 1 pin 24 No4. fo r HP ite m 11, P2 0, reve rse Q9A No5. fo r HP ite m 12, P1 3, Chan ge all e xpress c lock se ries ter minatio ns from 33ohm to 0ohm, R208, R209, R211,
R212, R 41 and R 59 shoul d be 0ohm
No6. fo r HP ite m 13, P1 4, no i nstall R 337, R82 0, R821 to disa ble LVD S (DG1.0 did not say th is)
No7. fo r HP ite m 14, P1 2, unmo unt R186 and R19 2 becau se lates t PCH E DS shows that PC H XDP J TAG_RST# is now N O CONNECT on PCH No8. fo r HP ite m 16, P2 0, Chan ge D12 t o 2Kohm resisto r and remo ve R322 No9. fo r HP ite m 17, P2 0, Chan ge Q79.2 to LID_SW# No10. f or HP it em 18, P 24, cha nge WWAN power c ircuits to pFET circuits. No11. f or HP it em 22, P 27, add ESD Dio des and pullups for the SCCLK, SCIO, S CRST lin es on the SC s ocket
3/16
No12. P 14, add RGB name :DAC_RE D_R,DAC_ GRN_R,DA C_BLU_R
3/19
No13. P 29, R593 part nu mber: " space" de lete
D D
3/27
No14. P 31, reve rse JP30 pin de finition No15. P 4, chang e R1082 from 0 ohm to 10K No16. P 14, P18, change R307,R3 08,R309, R301,R30 2,R303 from 75o hm to 150ohm
No17. f or HP it em 4, P2 2, Sour ce and D rain on Q80B sh ould be swap ped
No18. P 28, add a revers ing cir cuit for STB_LED # to fi x the LED bug No19. P 21,P28, delete r edundan t net LA N_ACT#_D OCK and change it to LAN_ACT#
4/2
No20. P 31, revi se BIOS connect or to CO NN@ and unmount &U1 No21. P 9, reivs e " M1@" to "M1@" No22. P 12, revi se 0ohm( R868,R8 69,R870, R871,R87 2,R1071 ) from S D034000 080 to SD028 000080
4/3
No23. P 25, modi fy Power button curcuits
4/10
No24. f or HP it em, P15 and 24, GPIO -- >WWAN_DE T# and pull high 100 K No25. f or HP it em, P4, Stuff R 51 for S YS_SHDN# for SI -1 final. No26. f or HP it em, P22, VCT pi n U18.6 hould be NO CON NECT. R9 29 uninstall No27. f or HP it em, P9&1 0, Remo ve M1@ f or UMA a nd make it alwa ys inst alled. U MA will only use M1 No28. f or HP it em, P31, reserv e 100Koh m pull u p to 3V L on U63.1 No29. f or HP it em, P15, LAN_DI S# shoul d pull u p to +3 VM_LAN i nstead of 3VAL W No30. f or HP it em, P4, Change R14/R15 to 1.1K1 %/3K1% per DG1.52 No31. f or HP it em, P15, Add NO INSTALL 0ohm to GND on GPIO8 o n PCH a nd remov e PULL U P to 3V LAW beca use PCH has an int egrated pull up. No32. f or HP it em, P13, For UMA:
N O INSTAL L: R210, Y4, C222 I NSTALL 0 ohm resi stor in C223
4/14
No33. P 14, revi se for H P item 13 not m entioned , delet e LVD_VR EFH and LVD_VREFL to GND
No34. f or HP it em, P19, Reserv e 0.1uF on DDC_E N and D P_EN for concer n about noise.
4/21
No35. P 29,
C C
R1021 R emoved R1022 I nstall ( main bat tery se lection) R1023 I nstall ( OCP func tion) R1024 I nstall ( travel b attery selection) R694 I nstall ( SMSC CBB will r equired it)
4/22
power s chematic s update d: CART IER_UMA_ PWR_2009 0421.DSN
No36. P 7, power team de lete PC 713~PC71 5, and a dd thes e 3 to m y schem atics as C972~ 974
No37. f or HP it em, P16, Add 2x 22uF for VCCME ( on PCH)
4/22
No38. r evise th e footpr ints of T113, 1 22, 123, 124 fr om TPC to TP C12
No6. f or HP it em 13, P 14, del ete R337 , R820 a nd R821 , and ad d 3 test po ints. No39. f or HP it em, P4, install R997 an d uninst all R44 to chan ge FAN power
4/27
No18. r evised f or HP it em, P28 , change name ST B_LED#_R
No40. P 31, dele te U64 a nd &U1
No10. f or HP it em 18 an d 57, P 24, modi fy WWAN circuits No41. f or HP it em 50, P 12, del ete CLRP2 No42. f or HP it em 51, P 29, cha nge syst em ID by instal ling R66 0 and u ninstall ing the others No43. f or HP it em 55, P 30, add uninsta lled 0oh m and 1 0K pull down at SER_SH D No44. f or HP it em 46, P 9,10, I nstall a new vol tage di vider fo r VREF_ CA that is diffe rent fr om VREF_DQ divider No45. f or HP it em 61, P 15,20, delete R 969, R33 0 R328, C297 R3 27 R329 Q14 C30 4 and Q9 A, R268 , delete WEBCAM_ OFF cir cuits an d add WEBCAM_ON circuits.
No46. P 33, add +VCCP an d +GFX_ CORE dis charge c ircuits
4/28
No47. P 27, chan ge Smart Card c ircuits
No48. f or HP it em 48, P 9,10, (1) add 1 unins talled 3 00uF on DIMMB +1 .5V, (2) add 2 10uF on +0.75 VS, (3) del ete 4 un installe d 10uF on +1.5V
B B
(4) uni stall 8 0.1uF on +1.5V
No49. f or HP it em 49, P 16, del ete R289 No50. f or HP it em 52, P 22, TRM _CRT: ad d 4 0.1uF No51. f or HP it em 56, P 24, cha nge caps to 150u F and 2 2uF, del ete the others . No52. f or HP it em 60, P 25, sim plify WL AN/WWAN/ BT LED circuits . unins tall Q62 and Q64 No45. f or HP it em 61, P 20, mod ify WEBC AM again
4/30
power s chematic s update d: CART IER_UMA_ PWR_2009 0429.DSN
5/4
No53. f or HP it em 62, P 25 & 29, Change A_SD to A_SD# on U40.91 U (GPIO1 4 of KBC). Change A_SD to A_SD# on JP5.35 (Audio board co nnector). Change EAPD to MUTE_LED _CNTL o n U40.10 0U (GPIO 31 of KBC). Change EAPD to MUTE_LED _CNTL o n JP5.36 (Audio board c onnector).
No54. f or HP it em 64, P 23, uni nstall R 474. The concer n is lea kage wh en system is off. No55. f or HP it em 65, P 29, Uni nstall p ull-up o n KBRST # (R893) as it is not needed. No56. f or HP it em 66, P 29, Cha nge R700 on PM_R SMRST# from 10K to 100 K to reduce current. No57. f or HP it em 67, P 29, for ADC sma ll input filter s. add R 1113~R1 116 and C982~C 984 No58. f or HP it em 69, P 14, uni nstall R 234 for wrong p ower rail No59. f or HP it em 70, P 15, add 10K pul l-up to USB_OC# 2 as we are not usi ng it. No60. f or HP it em 71, P 12&24, change n et name from BR AID_DET to NAND_DET# No61. f or HP it em 72, P 13&21, add CLK_ PCIE_LAN _REQ1# connecte d U18.48 to U4B.U4 No62. P 23, chan ge JODD1 , link database
5/5
No62. P 23, JODD 1 pin 16 ,17 cha nge passive
5/6
No63. P 22, swap T63 MDI +/- si gnals
No64. f or HP it em 15, P 33, add 330uF t o each o f +1.05 VS and +1.05V M
No63. P 22, swap again
A A
No64. f or HP it em 15, P 33, cha nge 330u F to sma ller pa ckage be cause o f lack o f space, and dele te C782, C894
5/7
power s chematic s update d: CART IER_UMA_ PWR_2009 0507.DSN
No65. P 8, power team re quests 10uF*22 and 22uF*18 No66. P 29, acco rding to SMSC A N 18 1 r ev 0 12:
(1) add capacit ors on P S2 signals (2) res erve ESD diodes on cap_ clk and cap_data
No67. P 15, EMI concern: change R1026 t o 47 ohm
5/7
No68. f or HP it em 68, P 29, cha nge net name :AC _AND CH G --> AC_A DP_PRES
5/8
No69. f or HP it em 74, P 33, uni nstall R 775 and Q56 No70. f or HP it em 73, P 29, uni nstall D42
5
5
4
3
power s chematic s update d: CART IER_UMA_ PWR_2009 0508.DSN
No71. P 20, JEDP .20 chan ge to +5VS
5/12
No72. P 26, add eSATA co nnector and red river cur cuits No73. P 19, corr ect Q75B 's dire ction
5/13
No74. P 29, cost down, c hange N OR to du al 2N7002 No75. P 26, cost down, d elete R 605, and short t he circuits No76. P 23, from Johnson , we sh ould kee p the pu ll high resistor
because EC will not pro gram th e intern al pull- high af terwards.
power s chematic s update d: CART IER_UMA_ PWR_2009 0513.DSN
5/14
No72. P 26, chan ge USB a nd E-SA TA conne ctor and revise this circuit
power s chematic s update d: CART IER_UMA_ PWR_2009 0514.DSN
No77. f or HP it em 75, P 24, ins tall C54 5~C547 39pF
No78. P 21, c495 , c497 C HANGE T O X5R SE 095104K80
5/15
No79. P 7, delet e uninst alled V CCP 47pF * 4 and 10uF * 1(C41~C44, C46)
power s chematic s update d: CART IER_UMA_ PWR_2009 0515.DSN
No80. P 33, Q61 change p art
5/18
No81. f or HP it em 22, P 27, ins tall D70~72 No82. f or HP it em 76, P 14, 29, 4 1
(1) add R=1k be tween PG D_IN an d VGATE, and uni nstall R237. (2) rem ove D42. (3) rem ove PR21 7 and PR 230
No83. f or HP it em 77, P 19, uni nstall R10 76 No84. f or HP it em 78, P 19,
Remove R1051 an d R1048 and mak e the fo llowing changes: Install R1046 ( 100K) bu t chang e R1046. 2 to GND Install R1047 ( 100K) bu t chang e R1047. 1 to 3VS
power s chematic s update d: CART IER_UMA_ PWR_2009 0518.DSN
No85. P 21, chan ge 10uF to 22uF to stab lize voltag e
5/19
No86. c hange HF part: (1) SA4 11250130 S IC 74 AHCT1G1 25GW SOT 353 5P BUS BUFFER
-> SA0 0000RY00 : U7, U8 , (PN c hange only) (2) SB0 00008E00 S TR MM BT3904W NPN SOT323-3
->SB00 0008E10: Q1, (3) SB0 0000AR00 S TR 2N 7002DW T/R7 2N SOT-363-6
-> SB0 0000AR10 : Q2, Q3 , Q5, Q 7, Q8, Q 10, Q63, Q77, Q86, Q87 (4) SB5 70025280 S TR 2N 7002DW- 7-F 2N SOT-363
-> SB0 0000EO10 : Q11, Q 72, Q73 , Q74, Q 75, Q81 (5) SC2 N202U000 S DIO R OW DAN2 02UGT106 3P C/C SC-70
-> SC6 00000B00 : D1 (6) SCA 00000A00 S ZEN R OW PJDL C05 3P C/A SOT23
-> SCA 00000A10 : D58 (7) SJ1 00001V00 S CRYST AL 32.7 68KHZ 1T JS125DJ4A420P
-> SJ1 00004N00 : Y6, Y7 (8) SP0 4301P120 S FUSE SMD1812 P110TF 1 .1A 6V UL/CSA/TUV
-> SP0 4301P140 : F1 (9) SC1 N4148180 S DIO 1 N4148WS -7-F SOD-323
-> SC1 00004P00 : D60, D 70, D71 , D72 (P N change only)
No87. a fter Ger ber out: BOM (1) cha nge Q70 to SB923 050020 (2) lin k databa se: JP31(en ter myse lf), C88 8, R782 , R202, R200, R791, R785, R800, R7 96, R797 , C184, C885, C 887, C231, C232, C236, C2 41, C243 , C244, C247, C 248, C251, C252, C253, C2 61, C264 , C270, C271, C 272, C274, C275, C515, RP 16, RP18 , RP26, RP27, R787
2
1
No88. a ccording to Monj i, P13, check R 215 to 22 o hm
5/20
No89. U 67: Chan ge SA000 02ZR0L to SA0000 2ZR00 for DEL L prohib ition pa rt
No90. P 08, change MLCC par t refere nces fo r power team re quest
(1) 10u F: C103 C993 C994 C988 C94 C97 C 116 C113
、 、 、 、
C89 C98 C 99 C 100 C
、 、 、
C102 C91 C84 C9 6
、 、 、 、
C111 C88
(2) 22u F: the o thers (3) cha nge C105 ~ C108 to SGA0 0001Q80
SI1 to S I2
5/20
No1. ch ange sch ematics parts o f Q24 an d Q70, t he same P/N SB92305 0020
5/25
No2. P2 7, chang e R1086 to 100K , R1085 to 10K, delete R1110 like DI S No3. PC H PN: SA 00002KV6 0; LAN PN: SA00 002MO40
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/03/13 2009/05/11
、 、
C90 101
C83
Compal Secret Data
Deciphered Date
2
C92
Compal Electronics, Inc.
Title
Hardware revision -SI
Size Do cument Numbe r R ev
C
LA-4902P
Dat e: Sheet of
1
46 47Wed nesday , Dec ember 09, 2009
0.3
5/20
hexainf@hotmail.com
No1. ch ange sch ematics parts o f Q24 an d Q70, t he same P/N SB92305 0020
5/25
No2. P2 7, chang e R1086 to 100K , R1085 to 10K, delete R1110 like DI S No3. PC H PN: SA 00002KV6 0; LAN PN: SA00 002MO40
6/2
No4. P1 2, chang e refere nce nam e: JBATT 1 --> JBAT1 No5. P2 5 & P31, JP25 an d JP30 are reve rsed(H a nd V) b ecause o f footp rint sil kscreen problem ,
remembe r not to change routing , just c hange ME pi n1 No6. P1 2, P29, P31, add net na mes of S PI signals
No7. P1 2,29,31, change 24.9ohm for SMS C reques t:R939, R940,R95 0,R948,R952 ,R1035
6/18
No8. P1 9, add 1 fuse on DP power
D D
6/22
No9. P1 9, as pe r Johnso n's req uest, fo r cost down (1) uni nstall C 123, C699 (2) cha nge C552 from 15 0uF to 100uF +0 .1uF*2 ( not ok) (3) cha nge C263 and C26 9 to 10 0uF (not o k)
C C
5
4
3
2
1
B B
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/03/13 2009/05/11
Compal Secret Data
Deciphered Date
2
Compal Electronics, Inc.
Title
Hardware revision -SI2
Size Do cument Numbe r R ev
C
LA-4902P
Dat e: Sheet of
1
47 47Wed nesday , Dec ember 09, 2009
0.3
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