Page 1
HEWLETT -PACKARD
HP
7957 A
AND
HARDWARE
HP
7958A
DISC
SUPPORT
DRIVES
MANUAL
Page 2
CERTIFICATION
Products,
have
Packard
taining
Hewlett-Packard's
the
National
Bureau's
The
ments
materials,
been
provided
specifications.
to
this
order
Bureau
calibration
Hewlett-Packard
of
FAR 52.246-15.
parts,
in
is
calibration
facilities.
and
accordance
Actual
on
file
of
Standards
Quality
services
inspection
and
available
measurements
Program
with
to
the
furnished
all
extent
satisfies
on
applicable
and
test
for
examination.
are
traceable
allowed
the
this
order
Hewlett-
data
by
require-
per-
to
the
Page 3
HP 7957 A AND 7958A DISC DRIVES
HARDWARE SUPPORT MANUAL
Manual
Microfiche
Printed: SEPTEMBER 1987
Printed in
This manual covers the following models:
HP
7958A.
In addition
following options: 015, 550.
U.S.A.
to
part
number: 07957-90903
part
no. 07957-90803
MODELS COVERED
OPTIONS COVERED
the standard model, this manual covers
HP
Edition 2
E0987
7957A
and
the
r11;-
a!~
HEWLETT -PACKARD
P.O. Box 39, Boise, Idaho 83707-0039
HEWLETT
PACKARD
Page 4
Notice
The
information contained in this document
is
subject
to
change without notice.
HEWLETT-PACKARD
MATERIAL, INCLUDING, BUT NOT
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. HEWLETT-PACKARD shall
not
be liable
furnishing, performance
HEWLETT-PACKARD assumes no responsibility
that
is
This document contains proprietary information, which
No
part
prior written consent
for
errors contained herein
not furnished
of
this document may be photocopied, reproduced
The Federal Communications Commission has specified
be brought
MAKES NO WARRANTY
LIMITED
or
for
incidental
or
use
of
this material.
by
HEWLETT-PACKARD.
of
HEWLETT-PACKARD Company.
Copyright © 1986,1987
FOR
U.S.A.
to
the attention
FEDERAL
RADIO
of
the users
COMMUNICATIONS COMMISSION
FREQUENCY INTERFERENCE
STATEMENT
OF
ANY KIND
TO,
THE
or
consequential damages in connection with
for
the use
by
HEWLETT-PACKARD
or
reliability
is
protected by copyright. All rights are reserved.
or
translated
ONLY
that
of
this product.
WITH
IMPLIED
of
to
another language without the
the following notice
REGARD
WARRANTIES
its software
TO
on
equipment
THIS
OF
the
Warning: This equipment generates and
that
is,
properly,
to
radio and television reception.
Class B computing device in accordance with the specifications in
Rules, which are designed
installation. However, there
If
tion.
mined
ference by one
computer with respect
puter into a different branch circuit.
field service representative
prepared by the Federal Communications Commission helpful:
Radio-TV Interference Problems". This booklet
Office, Washington, DC 20402. Stock No. 004-000-00345-4.
2
this equipment does cause interference
by
turning the equipment
in strict accordance with the manufacturer's instructions, may cause interference
to
provide reasonable protection against such interference in a residential
is
no guarantee
or
more
of
the following measures: re-orient the receiving antenna; relocate
to
the receiver; move the computer away
for
uses
radio frequency energy and
It
has been type tested and found
that
interference will
to
radio
or
television reception, which can be deter-
off
and on, the user
If
necessary, the user should consult the dealer
additional suggestions. The user may find the following booklet
is
is
encouraged
available
not
from
"How
from
if
not
installed and used
to
comply with the limits
Subpart J
occur in a particular installa-
to
the receiver; plug
the
U.S.
of
Part
15
of
try
to
correct
to
Identify and Resolve
Government Printing
the inter-
the
or
authorized
for
FCC
the
com-
a
Page 5
Safety Considerations
GENERAL
tion
must
safety
SAFETY
markings
SYMBOLS
-'-
WARNING
I CAUTION I
- This
be reviewed
Instruction
will be
is
instruction
the
Indicates hazardous voltages.
Indicates
The
It
tice that,
adhered
jury.
WARNING
conditions
product
and
instructions
marked
necessary
product
earth
WARNING
calls
attention
if
to,
Do
and
related
for
familiarization
before
manual symbol:
with this symbol
for
the
user
manual in
against damage.
(ground) terminal.
not
correctly
could
not
sign until
are
fully
order
sign denotes a hazard.
to a procedure
result in personal in-
proceed
understood
to
performed
the
documenta-
with
operation.
the
product
when
refer
to
the
to
protect
or
prac-
beyond
indicated
and
met.
it
or
source
power
it
the
secured against
BEFORE
product
power
figuration
If
former
connected
source.
SERVICING
a
to
the
is
likely
product
this
cord,
or
that
must be
APPLYING
is
configured
source
instructions
product
make
to
the
product
supplied
the
any
unintended
according
is
to
sure
earth
input
power
protection
made
POWER -Verify
to
match
to
provided
be
operated
that
the
terminal
wlnng
cord
has been impaired,
inoperative
operation.
the
the
input
in this manual.
with
common
of
terminals,
set.
Whenever
available
power
an
autotrans-
terminal
the
main
that
WARNING
Any servlcmg, adjustment, maintenance,
repair
by service-trained personnel.
Adjustments described in this manual
performed with power supplied
while protective covers
available
result in personal injury.
Capacitors inside this product
charged
ted from
of
this product must be performed only
may
to
the
product
are
removed. Energy
at
many points may,
after
the
product
the
main power source.
has
if
contacted,
may
still be
been disconnec-
and
main
con-
power
or
be
be
the
is
The
CAUTION
It:
calls
attention
dure
or
practice
performed
damage
of
a
conditions
SAFETY
class I
earthing
ground
EARTH
product
terminal. An
must be
to
the
product.
CAUTION
GROUND
and
is
provided
sign denotes a hazard.
to
or
adhered
or
destruction
Do
sign until
are
fully
provided
uninterruptible
from
an
operating
that,
if
not
to,
could
of
part
not
proceed
the
understood
- This
is a safety
with a protective
safety
the
main
proce-
correctly
result in
or
all
beyond
indicated
and
met.
earth
power
the
type
the
end
Next,
fusehold-
then
proper
(nor-
for
first
device.
of
insert
tUfiting
a
To avoid a fire hazard, fuses with
current
mal blow, time delay, etc.) must be used
replacement.
disconnect
Then, using a small flat-bladed screw driver,
turn
the
properly
the
er by pressing
it
rating
and
To
install
the
power cord from
the
fuseholder
cap
releases. Install
rated
fuse into
fuse and fuseholder
the
cap
clockwise until
it
of
the
specified
or
remove a fuse,
cap
counterclockwise until
either
the
cap.
cap
into
the
inward
locks in place.
and
3
Page 6
Printing History
New editions are complete revisions
contain additional and replacement pages
title page change only when a new edition
into a reprinting unless it appears
of
the manual. Update packages, which are issued between editions,
to
be merged into the manual by the customer. The dates
or
a new update
as
a prior update; the edition does not change when an update
is
published.
No
information
is
incorporated
on
incorpora ted.
A software code
may be printed before the date; this indicates the version level
the time the manual
or
update was issued. Many product updates and fixes
of
the software
do
not require manual changes
product
and, conversely, manual corrections may be done without accompanying product changes. Therefore,
not
expect a one-to-one correspondence between product updates and manual updates.
Edition 1
Edition 2
Hiermit wird bescheinigt, daB das Gerat/System HP 7957
Obereinstimmung mit den Bestimmungen von
funkentstort
..................................................
.................................................
Herstellerbescheinigung
ist.
DECEMBER
SEPTEMBER
A/HP
1986
1987
7958A in
Postverfligung 1046/84
the
is
at
do
Der Deutschen Bundespost wurde das Inverkehrbringen dieses
Gerates/Systems angezeigt und die Berechtigung zur
auf
Einhaltung der Bestimmungen eingeraumt.
Manufacturer's
This
is
to
certify
that
the product(s) HP 7957
with the Radio Interference Requirements
German
tion; the right
Bundespost
to
check the series
was
notified
for
Declaration
A/HP
of
Directive
that
this
equipment
compliance with the requirements was
Oberpriifung der Serie
7958A
is
in accordance
FTZ
1046/1984. The
was
put
into
circula-
granted.
for
Additional Information
If
Test and Measurement Equipment
and/or
used
for
measurements on open setups, the user has
under operating conditions the Radio Interference Limits are still met
of
his
border
premises.
Test and Measurement Equipment
is
operated with unscreened cables
to
assure
at
that
the
4
Page 7
Contents
Chapter 1
General Information
Introduction
Scope
Options
Related Manuals
Characteristics
Chapter 2
Interface Information
Introductioll
Supported
Interface Signals
of
Drive Interface Characteristics
Drive Operating Features
Drive/Head Selection Sequence
Media Fc)rmat
Sector
Sector
CS/80 Command Set Implementation
...........................
Manual.
......................................................................................................
I~SDI
............................................................................................
.............................................................................................
...............................................................................................
.................................................................................................
Features
.............................................................................................
...........................................................................................
Format
Offset
....................................................................................
..............................................................................
....................................................................................
..........................................................................
........................................................................................
.........................................................................................
'
.......... : ...........................................................
......................................................................
Page
1-1
1-1
1-1
1-2
1-2
1-2
Page
2-1
2-1
2-1
2-1
2-1
2-8
2-8
2-12
2-12
2-12
2-12
Chapter 3
Of
Theory
Introdllction
CS80/ESDI Controller [CEC] PCA-A2
Transfers
Disc
Sparing
Sequencc;~
Sector SI)aring
Track
Errors
Error
Error
Error
Disc Drive :PCA-Al
Drive
Preamplifier Board
Operation
.................................................................................................
..................................................................................................
Format
........................................................................................................
.................................................................................................
.......................................................................................................
..................................................................................................
............................................................................................
Sparing
Definition
Logs
Detection and Correction
Mechanics
.............................................................................................
..........................................................................................
................................................................................................
..........................................................................................
..........................................................................................
.......................................................................................
....................................................................
..........................................................................
Page
3-1
3-1
3-1
3-2
3-2
3-5
3-5
3-5
3-5
3-6
3-6
3-6
3-6
3-7
3-7
3-9
5
Page 8
Contents (continued)
Motor Control Board
Device Electronics Board
Read/Write Functional Description
W rite Channel
Read Channel.
............................................................................................
...........................................................................................
Read/Reference Clock Multiplexer
Read/W rite Head Select
Power Supply Assembly PCA-A3
AC Input Circuits
Switch-Mode Supply
Power-On Reset
Summary
Summary
of
Write Data Operation
Of
Read Data Operation
CEC Functional Theory
Bus Structure
............................................................................................
Microprocessor Data
.....................................................................................
.................................................................................
.........................................................................
.....................................................................
..............................................................................
...........................................................................
........................................................................................
.....................................................................................
.........................................................................................
........................................................................
.........................................................................
..................................................................................
Bus
................................................................................
Control, Clock Generator And Stretcher Circuit
Disc Data Controller (DDC)
Remote DMA Transfer
ESDI PAL
...............................................................................................
IC
.........................................................................
..................................................................................
Write Gate And Address Mark Enable Delay Circuit
Error Correction
Format
...................................................................................................
HP-IB Interface
Buffers
...................................................................................................
DMA Bus Arbiter
Local DMA Transfers
Microprocessor Transfers
Remote DMA Transfers
EEPROM (When Used)
LED Control.
.........................................................................................
IC
......................................................................................
........................................................................................
................................................................................
............................................................................
..............................................................................
..................................................................................
............................................................................................
.......................................................
................................................
3-10
3-10
3-10
3-11
3-11
3-11
3-12
.3-12
3-12
~
..
3-12
3-12
3-13
.3-14
3-14
3-15
3-16
3-16
3-16
3-17
3-17
3-1
3-18
3-18
3-18
3-18
3-18
3-19
3-9
3-9
3-9
3-9
7
Chapter 4 Page
Service Information
Introduction
Service Tools
PCA Locations
Cable Connectors
Signal Distribution
Power Distribution
Signal Notation
Block Diagram
Test Points
CS/80 Implementation Information
Initialize
.................................................................................................
........................................
...............................................................................................
............................................................................................
...........................................................................................
..........................................................................................
..............................................................................................
...............................................................................................
...................................................................................................
.........................................................................
Me~dia
Command
................................................................................
6
~
.........................................................
4-1
4-1
4-2
4-2
4-2
4-2
4-2
4-8
4-8
4-8
4-8
4-8
Page 9
Contents (continued)
Initiate Diagnostics Command (DIAG)
CS/80 Describe Command Response
Self-Test Controls
Fault/On Line Indicator
Internal Diagnostics
Self
Test
....................................................................................................
Self-Test
Micro:processor
RAM
ROM 'Checksum Test
HP-IB Interface
Buffer Test
...........................................................................................
.................................................................................
.........................................................................................
Subtests
Self Test
........................................................................................
Self Test
.............................................................................
.......................................................................................
.................................................................................
IC
Loopback Test
...........................................................................................
Hardware/Software Initialization
Select A Drive
Command Complete
ESDI Status Check
Reset Attention
Check
for
Request Configuration
........................................................................................
..................................................................................
....................................................................................
.......................................................................................
Drive Ready
...............................................................................
...............................................................................
Disc Drive Assembly PCA-Al Self Test
Seek
Test Without Position Verify
Read Write ECC Test
Build Spare Tables
Copy
EEPROM Logs
Finish HP-IB Interface
Request
Request
Utilities
Status
Status Example
.....................................................................................................
...........................................................................................
................................................................................
....................................................................................
to
Self Test Cylinder (for drives with EEPROM only)
IC
Initialization
.................................................................................
Run Time and Fault Logs (Media Based)
Run Time and Fault Logs (EEPROM Based)
EEPROl\l[
Fault
Physical
Run Time
Error Rate Test
Error Byte Description
................................................................................................
Status Bytes
Jt\ddress Reporting
........................................................................................
..............................................................................
Sectors Read Count (Media and EEPROM Based)
(.ERT)
Log
..............................................................................
..................................................................................
CS/80 No Execution Message Utilities
Clear
:Logs
............................................................................................
Preset
.................................................................................................
Faults/Errors During Error Rate Testing
CS/80 Send
Read Fault Log
Message Utilities
.......................................................................................
Read Run Time Error Log
Read Error (ERT) Log
Measure
Read
Locatc~
Servo Test
Seek Time
Spare Table
.....................................................................................
And Read Full Sector
............................................................................................
...........................................................................
...........................................................................
...............................................................................
...................................................................................
........................................................................
...................................................................
.....................................................................
..................................................................
...................................................................
.............................................................
..................................................................
........................
.............................................................
...............................................................
...........................................................
...........................................
.................................................................
............................................................
4-9
4-9
4-10
4-10
4-10
4-12
4-14
4-14
4-14
4-15
.4-15
4-16
.4-16
4-16
4-17
4-18
4-19
4-19
4-20
.4-20
.4-21
4-21
4-22
.4-2
.4-22
4-22
4-23
4-23
.4-24
.4-24
4-25
4-26
4-27
4-27
4-28
4-29
.4-30
4-30
4-30
.4-30
.4-31
4-31
4-31
4-32
4-33
4-33
4-34
4-34
7
Page 10
Contents (continued)
Pattern
Random
Read
Random
Read Revision Numbers
Troubleshooting
Chapter
Only
5
Error
Rate
Test (ERT) (Log Option)
Pattern
Read Only
Error
Error
Rate
Rate
Test (Log Option)
Error
Rate
..............................................................................
............................................................................................
Remo,'al and Replacement
Introduction
Preparation
Removal and Replacement
Top
Front
LED
ROM
.................................................................................................
For
Service
.....................................................................................
..................................................................................
Shroud
Cable Removal.
...............................................................................................
Panel
...............................................................................................
.....................................................................................
RemovaL
...........................................................................................
CS80/ESDI Controller (CEC) PCA-A2
Fan
.......................................................................................................
Power
Disc Drive Assembly (HDA)
Tray
Supply Assembly PCA-A3
Removal
and
Replacement
PCA-A I
........................................................
Test (Log Option)
.....................................................
............................................................
Test (Log Option)
..................................................
...................................................................
.........................................................................
....................................................................
.........................................................................
.4-35
.4-36
.4-37
.4-38
4-38
4-39
Page
5-1
5-1
5-3
5-3
5-3
5-3
5-4
5-4
5-4
5-5
5-5
5-6
5-6
Chapter
6
Replaceable
Introduction
Ordering
Information
Parts
.................................................................................................
........................................................................................
Page
6-1
6-1
6-1
8
Page 11
Figures and Tables
Figure or Table
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
2-1.
Drive Selection/Deselection Timing
2-2.
Write
2-3.
Write
2-4.
Read
2-5.
TRANSFER REQ/TRANSFER ACK Handshake Timing
2-6.
Index/Sector Timing
2-7.
Track-To-Track Sector Offset
2-8.
Recommended Drive/Head Selection Sequence
2-9.
Sector Offset
3-1.
Disc Recording Format
3-2.
Sector Format
3-3.
Disc Drive Assembly PCA-Al Block Diagram
3-4.
Disc Drive Assembly PCA-Al Functional Elements
3-5.
Disc Drive Functional Block Diagram
3-6.
CS80/ESDI Controller (CEC) PCA-A2 Functional Block Diagram
4-1.
Field Replaceable Assembly (FRA) Location
4-2.
CS80/ESDI Controller (CEC) PCA-A2 Layout and Cable Connections
4-3.
Disc Drive Assembly PCA-Al, Layout and Cable Connections
4-4.
Power Supply (PCA-A3) Test Points and Voltages
4-5.
Cabling Diagram
4-6.
Self-Test Displa y
4-7.
Signal Distribution
5-1.
Order
6-1.
Disc Drive, Exploded View
Gate
Timing During Format
Gate
Timing During Normal Write
Gate
Timing
..............................................................................
...........................................................................
...................................................................................
.........................................................................
...................................................................................
...............................................................................
..............................................................................
............................................................................
of
Disassembly
...........................................................................
.....................................................................
.............................................................
.............................................................
......................................................
.....................................
.................................................................
................................................
..................................................
............................................
.........................................................
............................
...................................................
........................
................................
..............................................
Page
2-6
2-7
2-7
2-8
2-10
2-11
2-11
2-12
2-13
3-3
3-4
3-7
3-8
3-25
3-27
4-3
.4-4
.4-5
4-6
.4-7
.4-11
.4-47
5-2
6-3
Table
Table
2-1.
Table
2-2.
2-3.
Table
Table
2-4.
Table
2-5.
2-6.
Table
Table
Table
2-7.
3-1.
3-2.
3-3.
3-4.
Table
Table
Table
Table 4-l.
4-2.
Table
Disc Drive Characteristics
General Configuration Response Bits
Specific Configuration Response Bits
Standard Status Response Bits
~(alid
I-lead
Select
Values
CS/80 Command Implementation
Request Status Summary
Utility Command Summary
I)isc Drive Capacity
llead
Selection
Mnemonic Table
I:<'lag
Status Values
Supported ·Utilities
Error Codes
..................................................................................
................................................................................
...............................................................................
..............................................................................
.....................................................................................
.......................................................................
........................................................................
........................................................................
.....................................................................
..............................................................................
1-1.
Table 6-l. Disc Drive Replaceable Parts
6-2.
Table
Table
j:\bbreviations
6-3.
Code List
....................................................................................
of
Manufacturers
............................................................
............................................................
...................................................................
................................................................
....................................................................
.....................................................................
1-3
2-2
2-3
2-4
2-6
2-9
2-14
2-15
3-3
3-10
3-20
3-23
4-13
4-40
6-2
6-4
6-5
9
Page 12
Page 13
General Information
1
1-1. INTRODUCTION
The Hewlett-Packard 7957A and HP 7958A Disc
Drives are random access, data
for
designed
computer systems. The formatted storage
capacities
megabytes and
manual, unless otherwise specified,
to
refers
The
disc drive employs three (HP
(HP 7958A) nonremovable 130-millimetre
(5.12-inch) discs
face employs one movable head
tracks. The bottom surface
the stack contains continuous prerecorded servo
data which
of
the read/write heads.
Head positioning
and a closed-loop servo positioning system.
Mechanical and contamination protection
discs, heads, and the rotary actuator
a sealed head-disc module. The head-disc module
includes a self-contained air filtration system
which supplies clean air and temperature equalization throughout the module.
Also included in the disc drive are a
Hewlett-Packard Interface
and
a power supply.
The disc drive contains internal self-test diagnostics
and a fault-finding system which exercise key
functions
automatically
itiated by the host. Go/no-go test results are indicated by a green/red indicator
If
a failure occurs, information
failure
the green/red indicators.
can
use with small and medium sized
of
the HP
the
HP
is
used
of
the disc drive. Self test
at
be determined
7957
A and HP 7958A are
130
megabytes, respectively. In this
7957A and HP 7958A.
for
storage media. Each disc sur-
to
ensure the precise positioning
is
performed by a rotary actuator
Bus
power
on
by
storase devices
"disc drive"
7957
A)
or
five
to
service its data
of
the lowest disc in
for
is
provided by
(HP-IB) controller
is
performed
and can also be in-
on
the
front
panel.
on
the cause
viewing the status
of
81
the
the
of
mounting the disc drive in a standard EIA
is
equipment rack
This manual provides all the service information
needed
control functions provided by the host
are described in the installation documentation
provided with the computer.
to
maintain the disc drive. Details
1-2. SCOPE
The manual
a.
Chapter 1 contains a general description
disc drive.
b.
Chapter 2 provides information
Interface between the controller
head disc assembly (HDA).
formation
tion, Request
Command summary.
c.
Chapter 3 describes the operating principles
the disc drive.
d.
Chapter 4 contains servicing information
disc drive, including instructions
the diagnostics tools.
e.
Chapter 5 supplies step-by-step removal
replacement procedures
assemblies and parts in
f.
Chapter 6 lists and illustrates all
replaceable assemblies and parts in
drive.
Appendix A provides a listing and copy
service notes applicable
7958A Disc Drives.
also available.
OF
MANUAL
is
divided into
on
CS/80 Command Set implementa-
Status Summary
six
chapters as follows:
about
It
also contains in-
on
for
all field-replaceable
the
disc drive.
to
the
HP
7957 A and
PCA and
and
how
of
of
the
computer
of
the
the
ESDI
the
Utility
of
for
the
to
use
and
the field-
the
disc
of
all
the
HP
The
disc drive
cabinet.
stand-alone cabinet designed
other
and
is
packaged in a stand-alone desktop
AClcessories
desktop stack modules. A kit
available include a desk-height
to
hold the disc drive
for
rack
1-1
Page 14
General
7957
A/7958A
Inf
orma
tion
1-3. OPTIONS
Option
requirement
to
the
from
015
is
is
be placed in
deletion
the
of
order.
for
the
the
power
the
switch
proper
the
Model 10833B HP-IB Cable
option.
in
the
position.
The
power
Option
1-4. RELATED MANUALS
For
operating
the
H P 7957 A and H P 7958A Disc Drive Owners
Manual,
Environmental Requirements
Manual,
formation.
and
part
no. 07957-90901.
part
no. 5955-3456.
refer
installation instructions.
and
lor
Disc/Tape
For
instruction set in-
to
the
CS/80
Instruction Set
only
module
550
refer
the
Drives
is
to
Site
Programming Manual,
additional service
part
no. 5955-3442.
information,
refer
to
External Exerciser Reference Manual,
5955-3462.
and
HP
The
CE
7958A Disc
Handbook
Drive
is
for
the
part
no. 07957-90905.
1-5. CHARACTERISTICS
Characteristics
dimensions
Table
specifications
vironmental requirements.
1-1,
Environmental Requirements for
Manual,
supplied
of
the
disc drive. including physical
and
power
Disc
Drive
for
the
part
no. 5955-3456. This
with
the
disc drive.
requirements,
Characteristics.
disc drive, including en-
are
are
listed in
Disc/Tape
publication
the
CS/80
part
HP
listed in
Detailed
the
For
no.
7957A
Site
Drives
is
1-2
Page 15
SAFETY
Table
1-1.
Disc Drive Characteristics
General Information
7957
A/7958A
Meets
UL
CSA
POWER
all
Listed
certified
REQUIREMENTS
Specified
Voltage
(true
F reqw3ncy:
Typical
Typical
Current
Power:
applicable
UL
114 and
to
CSA
Source
RMS):
(true
safety
UL
478.
C22.2
(selected
switch)
115V
230V
RMS):
standards
No.
by
range;
range;
47.5
115V
230V
115V
230V
of
IEC
380 and
143 and
rear
No.
panel
154.
VOLTAGE
100V, 115V, 120V,
(inclusive
220V, 240V,
tolerance
to
66
range;
range;
range;
range;
tolerance
single
range
Hz
0.87A
0.48A
65W
65W
IEC
SELECTOR
single
range
phase,
is
180V
435.
phase,
is
(inclusive
to
264V)
90V
to
132V)
SIZE/\~EIGHT
Height:
Width:
Depth:
Net
W~:dght:
Shipping
Weight:
132
325
285
9.9
14.0
mm
(5.2
mm
(12.8
mm
(11. 2 in.
kg
(21.8
kg
(31.0
in.
in.
lb)
lb)
)
)
)
1-3
Page 16
Page 17
Interface Information
2
2-1.
This chapter describes the implementation
Enhanced
disc drive mechanisms. Also included at the end
of
Command Set implementation, request status sum-
mary and utility command summary. Included
the ESDI information specific to these products,
well as a discussion
to
in this chapter
sight into how the product operates within the
ESDI environment.
The disc drives conform fully to the specifications
defined in the following industry-standard document:
Specification
reader
operation
When used in conjunction with the
specification,
information necessary
with the drive
INTRODUCTION
of
the
Small Device Interface (ESDI) on the
this section
improve system performance. The information
Enhanced
is
thoroughly familiar with the general
of
is
information
of
operating features designed
is
intended to give the user an in-
Small
(REV
ESDI as defined in the specification.
this chapter provides the additional
'Over
F). It
to
successfully communicate
ESDI.
on
the CS/80
Device Interface
is
assumed that the
ESDI
is
as
NOTE
• Daisy Chain Configuration (up
• Power-On Sequencing
• Track Offsets
•
Internal Self-Test Diagnostics
• Media Defect List
to
7 drives)
2-3. DRIVE INTERFACE
CHARACTERISTICS
The drive complies with the physical interface
characteristics defined in the
Refer
to
the specification
and connector pin assignments. The physicallocation
of
the
two
interface, one power and
ground connectors are shown in figure
clarity, the power connector pin assignments
also shown.)
The drive electrical interface circuits
the specified electrical requirements. The drive uses
220/330-ohm termination option
the
all control signals originating
ESDI specification.
for
cabling requirements
6-1.
conform
to
terminate
at
the controller.
one
(For
are
to
To
maintain consistency with standard
ESDI terminology, the term "drive"
used
to
refer
to
the disc mechanism in
this chapter.
is
2-2. SUPPORTED ESDI FEATURES
The
disc drives support the following standard
ESDI features:
• Serial Mode Operation
10
Megabit Per Second Transfer Rate
•
• Configuration Reporting
• Drive Hard Sectoring
2-4. INTERFACE SIGNALS
The serial-mode use
lines
is
defined in the ESDI specification. The following paragraphs include additional productspecific considerations regarding the use
signal line. Tables
bit information.
• DRIVE SELECT LINES.
to
selection by asserting its DRIVE SELECTED
line within
When selecting a drive, the controller must en-
sure that all drive select lines change within less
100
than
desired drive selection during transition
drive select lines.
nanoseconds. This precludes any un-
of
all data and control signal
of
2-1,
2-2
and
2-3
provide response
The
drive responds
250 nanoseconds (see figure
of
each
2-1).
the
2-1
Page 18
Interface Information
7957
A/7958A
Table
2-1.
General Configuration Response Bits
BIT
POSITION
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
o
Tape
Drive
Format Speed
Track
Data
Rotational
Transfer
Transfer
Transfer
Removable
Fixed
Spindle
Head
RLL
Controller
Drive
Offset
Strobe
Speed
Rate>
Rate>
Rate
Cartridge
Media
Motor
Switch
Encoded
Soft
Hard
Controller
DRIVE
Tolerance
Option
Offset
Tolerance>
10
5
<=
5
Drive
Control
Time>
(not
Sectored
Sectored
Hard
Sectored
FEATURE
Gap
Implemented
Option
MHz
MHz
<=
MHz
Drive
Option
15
usec
MFM)
(Sector
Required
Implemented
0.5%
10
MHz
Implemented
(Address
Mark)
Pulses)
(Byte
Clock)
BIT
VALUE*
o
o
1
1
o
o
1
o
o
1
1
o
1
o
1
o
* 1
indicates
If
the controller attempts a write with an in-
valid head selected, the drive responds by set-
ting A
Unimplemented Command status bit.
controller attempts
head, the read will be executed with the last
valid head selected.
•
HEAD
head, the controller must ensure that all head
select lines change within
nanoseconds. This avoids an inadvertent head
selection during transition
lines. Valid head select values
are shown in table
TTENTION and Invalid Or
to
read with an invalid
SELECT
LINES.
2-4.
that
When
of
selecting
less
than
the head select
for
each drive
drive
If
implements
the
a
100
specified
• WRITE GATE. The WRITE GATE timing
used during formatting and normal writing
shown in figures
The following timing restrictions apply
WRITE GATE signal:
- When the drive performs a head switch opera-
tion,
the
controller
GATE until COMMAND COMPLETE
tivated, indicating completion
switch.
- When performing a write following a read,
WRITE GATE must
imum
is
of
500 nanoseconds
deactivated.
feature.
2-2
and
must
not
2-3,
respectively.
not
activate
be
activated
after
of
the head
for
READ
to
the
WRITE
is
ac-
a min-
GATE
is
2-2
Page 19
Table
2-2.
Specific Configuration Response Bits
Interface
Information
7957 A/7958A
CMD
MODIFIER
11
10
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
0 1
0 1 1
BITS
9
1
8
1
Number
Number
0
Number
1
Bits
Bits
Minimum
0
track
Unformatted
1
Sectors
0
Minimum
1
including
tolerance)
CONFIGURATION
REQUESTED
cy 1
of
of
of
15-8:
2-0:
inders,
cy 1
inders,
heads
Removable
Fixed
unformatted
bytes
per
track
bytes
in
ISG
intersector
:
DATA
fixed
removable
drive
heads
bytes
per
sector
field
per
speed
heads
(not
DRIVE
RESPONSE
HEX
05DD
DEC
1501
0000 0
00 0
* *
5780
22400
015E 350
0040
64
Bits
15-8:
Bits
2-0:
1
0 0
1 0 0
0
1
Minimum
Number
of
status
*HP
7957A -
(includes
- When formatting the disc media, the controller
must activate WRITE GATE a minimum
2.5
microseconds before the beginning
Address
activated, WRITE
the entire track.
must remain inactive
nanoseconds.
- After writing the address field
PLO Sync field (see figure
GATE
If
06/6;
servo
may remain active
deactivated. WRITE GATE
for
HP
7958A -09/9
head)
2-2).
at
least 200
or
data field,
ISG
Bytes
bytes
words
available
of
of
the
Once
for
bytes
per
per
PLO
of
vendor-unique
two
written. This
cause an 8-bit delay between the time the data
is
ly written
written in the Address Pad
appropriate.
- The drive must not be deselected while
WRITE GATE
after
INDEX
ISG
Sync
field
additional bytes
is
transmitted
to
on
OC
2E
OOOE
12
46
13
0001 1
of
dummy data must be
due
to
encoding delays, which
the drive and when it
the media. This dummy data
or
Data Pad field as
is
activated.
is
actual-
is
2-3
Page 20
Interface
Information
7957A/7958A
Table
2-3.
Standard
Status Response Bits
(l
of
2)
BIT
POSITION
15
14
13
12
11
10
9
8
DESCRIPTION
Reserved. This bit
Removable Media
therefore
Write
therefore
Write
ture,
this bit
Protected, Removable Media.
this bit
Protected, Fixed Media.
therefore
Reserved. This bit
Reserved. This bit
Spindle
If
Start
Motor
this bit
Spindle
is
cessful execution
does
not
cause
is
always zero.
Not
Present.
is
always zero.
The
The
is
always zero.
The
drive does
this bit
is
always zero.
is
always zero.
is
always zero.
Stopped. This bit indicates
set,
the
controller
Motor
operation. A
of a Start
ATTENTION
should send a
change
Spindle
to
go active.
drive
drive
the
Motor
does
of
or
not
does
not
include a
spindle
Control
state
on
Stop
Power-On Reset Conditions Exist. This bit notifies
drive
operating
following a
curs
that
tary
loss
of
ing conditions.
status bit (bit 9)
parameters have been set
power-on
causes
dc
power).
sequence
an
internal power-on reset
The
The
controller
and
perform a motor-on
or
when
controller
should also
to
their
an
internal
operation
may
have
check
sequence
default
to
the
if
use
removable
not
use
removable
write
motor
is
not
command
this bit
Spindle
the
Motor
controller
values. This bit
drive
fault
to
occur
reconfigure
Spindle
necessary.
media,
media,
protect
up
to
fea-
speed.
specifying a
due
to
the
suc-
operation
that
the
is
condition
oc-
(e.g., a momen-
drive
operat-
Motor
Stopped
set
2-4
7
Command
parity
drive
6
Interface
protocol
respond
protocol
5
Invalid
received an invalid
parameter.
mand
the
spindle
4
Seek Fault. This bit indicates
bit will be set
complete
however
Data
Parity
error
on
the
will
not
attempt
Fault. This bit indicates
timeout.
to
an
edge
within
Or
that
13
Unimplemented Command. This bit indicates
The
drive will also set this bit
the
drive
motor
Fault. This bit indicates
serial
execution
An
Interface
of
command
the
TRANSFER
of
Fault
data
the
command
that
the
occurs
REQ/TRANSFER
milliseconds (see figure 2-5).
or
reserved
command,
if
is
currently
is
stopped).
unable
to
execute
received
command
that a catastrophic
only
after
the
drive
has
made
the
seek.
The
controller
may
elect
such retries will most likely be unsuccessful.
that
if a parity
drive has
when
the
controller
(e.g.,
seek
every
to
the
from
detected
the
modifier,
a Seek
failure
attempt
retry
drive
detected
the
controller.
error
is
detected.
an
controller
ACK
handshake
that
the
drive
or
command
sends a valid
command
occurred.
to
successfully
the
seek
operation,
The
interface
fails
to
has
com-
while
This
a
Page 21
Interface Information
7957A/7958A
Table
2-3.
Standard Status Response Bits
Write
Gate
3
With Track Offset. This bit indicates
WRITE GATE while the drive was configured
controller should restore the track offset
(2
of
2)
that
the controller activated
for
a nonzero track offset.
to
zero, and then retry the write
The
operation.
2
Vendor-Unique
valid and available
service-trained personnel. The controller should
on
the content
Write Fault. This bit indicates
be caused
troller should retry the write operation a minimum
simplification, the controller may elect
recommended
A Write Fault can be caused by one
• The controller activated WRITE
off
track center.
• The controller activated WRITE GATE while the spindle
by
a variety
for
Status
of
Available. This bit indicates
to
the controller. This information
the vendor-unique status.
that
of
conditions; however, regardless
the preceding Write
that
vendor-unique status
is
intended
not
initiate any action based
for
use by
a write fault has occurred. This fault can
of
the cause, the con-
of
five times.
to
use the same recovery routine
Gate
With Track Offset fault.
of
the following conditions:
GATE
while the head was physically
motor
was
speed.
• The controller activated WRITE GATE while COMMAND COMPLETE
was inactive. The controller must wait
for
the drive
to
activate
COMMAND COMPLETE before retrying the write operation.
• The controller attempted a write with an illegal head selected.
is
For
off
• The controller attempted a write while the spindle was
out
of
tolerance.
• The controller attempted a write while the spindle was
not
spinning.
• The controller attempted a write while ATTENTION was set.
• The drive's
R/W
preamp chip indicated a Write Unsafe condition.
write speed
2-5
Page 22
Interface Information
7957 A/7958A
DRIVE
DRIVE
I£SDIAI5
SELECT
~~~~~~~~
SELECTED
_______
~I:=-
Tl ~ 2Sca
...
__
T
______
t
NSEC
Figure
3
2
0 0 0
0 0 0
0 0
0
0 1 0
0
0
0 1 1
1 0 0
1
1 0 1
1
1 1 X
2-1.
Table
HEAD
22
0
1 0
1 1
0 0
0
Drive Selection/Deselect ion Timing
2-4.
SELECT
~
__
ID
____
Valid Head Select Values
~)
)~
...
''''""J
_______
IJ
LINES
21
1
1
1
2°
0
1
0
1
0
1
0
1
0
1
0
1
X
HP
__________
HEAD
SELECTED
7957A
0 0
1 1
2
3 3
4 4
HP
5
Inv
Inv 7
Inv
Inv
Inv
Inv
Inv Inv
J
___
7958A
2
5
6
Inv
Inv
Inv
Inv
~~~~~~~~~~~
Tl
F
• READ GATE. The READ GATE timing
shown in figure
The following timing restrictions apply to the
READ GATE signal:
- When the drive performs a head switch opera-
tion, the controller should not activate READ
GATE until
tivated, indicating completion
switch.
- When performing a read following a write,
READ GATE should not be activated
least
500 nanoseconds
deactivated.
2-6
2-4.
COMMAND COMPLETE
after
WRITE GATE
of
is
is
ac-
the head
for
at
is
- READ GATE must be deactivated when
passing over a Write
be deactivated a minimum
(one bit time) before the Write
remain deactivated
nanoseconds following the Write Splice (see
figure
2-2).
- READ GATE must be activated
bytes before the Sync Pattern byte.
• DRIVE SELECTED. The drive activates this
signal within
selection address
signal
is
deactivated within 250 nanoseconds
being deselected by the controller.
Splice. READ GATE must
of
100
Splice, and must
for
a minimum
250 nanoseconds
is
valid (see figure
after
nanoseconds
of
100
at
least
14
its drive
2-1).
This
of
Page 23
INDEX
or
SECTOR
WRI
TE
GATE
FORMAT
------:
12
BYTES
I
--,
ISG
Interface Information
7957
A/7958A
U...j
: I
..........
:
j...-
o. 8 USEe
(WRITE
II
I N
SPLICE) I I
-+l
I--
J\
200
NSEC
MIN.
1 : n &
~.~,---------------------------~
~
ADR
PLO
SYNC
ADR
SYNC
PATTERN
ADDRESS
FIELD
ADR
CHECK
BYTES
ADR
PAD
..
WRITE
SPLICE
IESOIA10
INDEX
~fCTOR
FORMAT
READ
GATE
WRITE
GATE
LJ
------------~I~--------------------------
IESOIA12
&
ISG
WRITE
Figure
ADDRESS
FIELD
Figure
GATE
MAY
REMAIN
2-2.
Write
WRITE
SPLICE
DATA
SYNC
Jl=100
2-3.
Write
Gate
ACTIVE
Gate
Timing During
DATA
PLO
SYNC
PATTERN
NSEC
MIN
Timing During Normal Write
DURING
Format
DATA
FIELD
THIS
DATA
CHECK
BYTES
TIME.
DATA
PAD
u
ISG
L
• READY. This signal
ESDI specification.
• COMMAND DATA. The following commands
are supported by the drive (refer
Seek
Recalibrate
Request
Request Configuration
Select Head
Control (Reset Interface, Stop Spindle
Track
Initiate Diagnostics
Status
Motor, Start Spindle Motor)
Offset
Group
is
used
as
defined in the
to
table
2-5):
All other commands and reserved
codes are treated
• TRANSFER REQUEST. The TRANSFER
REQUEST
2-5.
• ADDRESS MARK ENABLE. This signal
used. The drive will ignore any activity
line.
• TRANSFER
TRANSFER
is
timing
shown in figure
as
illegal commands.
handshake timing
ACKNOWLEDGE.
ACKNOWLEDGE handshake
is
2-5.
command
shown in figure
is
not
on
this
The
2-7
Page 24
Interface Information
7957
A/7958A
INDEX
or
SECTOR
Lr
FORMAT
READ
GATE
ISG
*1.
IE50IA11
• ATTENTION. There are no product-specific
for
details
• INDEX. The INDEX timing (relative
SECTOR)
• SECTOR. The SECTOR timing (relative
INDEX)
• COMMAND COMPLETE.
product-specific details
• OAT A TRANSFER SIGNALS. All
transfer signals (NRZ WRITE DATA, WRITE
CLOCK,
conform
the specification. There are no product-specific
timing requirements associated with any
these signals.
this signal.
is
shown in figure
is
shown in figure
NRZ
READ DATA, READ CLOCK)
to
the timing requirements defined in
ADR
PLO
SYNC
_1*_1
READ
SYNC
for
ADR
SYNC
PATTERN
AP?~[~S
100
NSEC
_______________
GATE
SHOULD
PATTERN.
Figure
2-6.
2-6.
There are no
this signal.
four
BE
2-4.
to
to
data
of
ADR
ADR
WRITE
SPLICE
MINj
PAD
L 1
~~~f~
1
ACTIVATED
Read
Gate
2-6.
Before performing a data transfer with a drive,
controller may have
operations: drive selection, a seek
track, and head selection.
formance, these operations should be performed in
the following order:
AT
Timing
DATA DATA
PLO
SYNC
~
~I
LEAST
DRIVE/HEAD
SEQUENCE
SYNC
PATTERN
100
__________
13
BYTES
to
fteI't
NSEC
MIN
PRIOR
SELECTION
initiate up
To
optimize drive per-
DATA
PAD
TO
to
three separate
to
NOTE
Figure
quence. The timing references
in the discussion refer
The drives used in the example have arbitrarily been assigned addresses
and
2.
2-8
illustrates the following se-
to
this figure.
(TO)
ISG
~r_
the desired
used
of
1
the
• TRACK OFFSET. This command causes the
to
disc drive
as
inches)
bits. See figure
specified by the command modifier
perform
2-7
a track
for
track offset definition.
offset
2-5. DRIVE OPERATING FEATURES
The
following paragraphs explain specific operat-
of
ing features
ploit the full performance
these features.
2-8
the drive. The controller can ex-
of
the drive by utilizing
(±80 micro-
1)
Deselect drive 1
selected head value in
tion occurs. This step
multi-drive environments.
2)
Set the head select lines
head currently selected
regards
Drive 1 selected all the time because there
Drive 2 option.
3)
Initiate a seek
drive will deactivate COMMAND COMPLETE
and begin the seek operation.
to
1,
2,
(TO).
or
to
The drive retains
effect
3.
the desired track (T3).
when
is
necessary only in
to
the value
on
drive 2 (T
The disc drive leaves
the
the
deselec-
of
the
1)
with
is
no
The
Page 25
Table
2-5.
CS/80 Command Implementation
Interface Information
7957
A/7958A
COMMAND
Transparent
Universal Device Clear
Amigo Clear
Channel Independent Clear
Selected Device Clear
Cancel
Loopback
HP-IB Parity Checking
Identify
Real
Time
Loca te and Read
Cold Load Read
Locate and Write
Write File Mark (tapes only)
Complementary
Set Unit (unit 0 and
Set Volume (volume zero only)
Set Address
Set Block Displacement
Set Length
Set Burst
Set RPS (Rotational Position Sensing)
Set Retry Time
Set Status Mask
NoOp
Set Release
Set Options
Return Addressing Mode
Set
(l
and 3 vector)
General Purpose
Spare Block
Describe
Locate and Verify
Release
Release Denied
Copy Data
Initialize Media
Diagnostic
Request Status
(refer
to
Table
2-7.
Request Status Summary)
Initiate Utility (refer
No execution message
Device
Device will send execution message
will receive execution message
Commands
15)
to
table
Commands
Commands
Commands
Commands
2-7)
IMPLEMENTED
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
no
yes
yes
yes
no
yes
yes
no
op
no
op
yes
yes
no
op
no
yes
yes
yes
yes
no
op
no
op
no
yes
yes
yes
no
yes
yes
no =
no op =
= Implemented
Will
Command
are
return
ignored
incorrect,
as
illegal
defined
opcode
but
parameters
then
illegal
by
CS/80
if
received
are
checked.
parameter/bounds
If
is
the
parameters
returned.
2-9
Page 26
Interface
7957A/7958A
Information
TRANSFER
COMMAND
TRANSFER
Fol
lowing
imposed on
REO. 0 ----..,
1
50
NS
MIN
I:
ACK. 0 --------
transfer
the
next
of
last
transition
ONE
l.---
145
NS
MIN
245
NS
MAX
bit,
BIT
VALID
50
NS
MIN
10
MS
MAX
....
no
maximum
of
TRANSFER
TRANSFER
J
:
I
I I
1145
I
MIN
245
MAX
time I imit
REO.
TO
DRIVE
0
r·
NSt
NS
is
NS
I
150
10
1
I
MIN
NS
MS
MIN
MAX
&
TRANSFER
TRANSFER
CONFIG/STATUS
Following
IESDIAOt
REO.
ACK.
DATA
imposed on
0
1
ld
250
NS
MAX
0
1
100
NS
MIN
:d?d
transfer
the
of
next
ONE
L
-I
last
bit,
transition
BIT
50
10
VALID
no maximum
of
TRANSFER
TRANSFER
NS
MIN
MS
MAX
time
REO.
FROM
150
MS
250
MS
limit
DRIVE
is
2-10
Page 27
Interface
Information
7957 A/7958A
INDEX
SECTOR
IESOIA06
---------------------------------.
----------~~
LAST LAST
SECTOR-1
-I·
SECTOR
Figure
H
~
I
.I-
2-6.
Index/Sector Timing
INDEX
~
I I
I I
~TX~
1.6
us
..f
0.1
us
H1.6
US
..f
0.1
US
~
SECTOR
0
I
-I·
LAST
DATA
(TRACK
SECTOR
SURFACE
N)
T x -
1-TRACK
IESOIA16
4)
Before the seek completes (COMMAND
COMPLETE
By
(T4).
seek, the head switch operation
part
of
the seek.
before the controller changes the head select
lines, the head select will be performed
separate operation, resulting in an additional
as
delay
5)
When the newly selected head has arrived
target track, the drive asserts
COMPLETE
activated), select the new head
changing the head select lines during the
If
the seek operation completes
the new head seeks
(T5). This sequence assumes
SEEK
DELAY
Figure
to
2-7.
is
performed
the target track.
COMMAND
~
SECTOR
Track-To-Track Sector Offset
as
at
that
as
a
the
0
all three operations are necessary; however, it
also applies
the controller wants
and data surface on the currently selected drive,
only steps 3 and 4 would be required.
important element
is
that
required, the controller should always initiate
the seek and then follow it immediately with
head switch. This avoids the additional delay incurred
after
the seek.
to
when both a head switch and seek
if
the head switch
DATA
SURFACE
(TRACK
simpler situations.
to
N+1)
to
access a
recognize in this sequence
is
performed before
0
For
example,
different
if
track
The
are
the
or
2-11
Page 28
Interface Information
7957A/7958A
COMPLETE
IESOIA'.
DRIVE
SELECT
HEAD
SELECT
COMMAND
DATA
o
COMMAND
DRIVE 1 I
DRIVE
HEAD
Figure
1
VALUE
2-8.
Recommended Drive/Head Selection Sequence
o (DESELECT) I
I
I
> 1
uSEC
~
CURRENT
FOR
DR I VE
HEAD
DRIVE
2
VALUE
2
SEEK
CMD
--..J
T4
I
I
.
I
I
I
L.-
I
NEW
FOR
< 100
HEAD
DRIVE
uSEC
VALUE
2
2-7. MEDIA
The following paragraphs address the physical
format
of
the disc media.
FORMAT
2-8. SECTOR FORMAT. The drive employs
"hard
sectoring"
defined by the occurrence
The
beginning
by the INDEX pulse. Each sector
315 bytes long.
bytes are used
ing 299 bytes
the controller. Although sector format
dependent, it
conform
tained
to
in
the ESDI specification.
with
the
beginning
of
of
each track (sector
Of
315 bytes, a minimum
for
the intersector gap. The remain-
of
the sector are available
is
recommended that the format used
the fixed-sector format example con-
of
each
sector
the SECTOR signal.
0)
is
defined
is
a minimum
for
is
of
use
of
16
by
user-
SECTOR OFFSET. The sector
2-9.
of
improves the performance
include successive cylinders. When the end
cylinder
I-track seek to the next cylinder to continue the
transfer
last
the next cylinder, the track-to-track sector
provides the delay necessary
latency
2-10.
head
is
reached, the drive must perform a
(see
of
(see
CS/80
figure
figure
2-9).
When switching
one cylinder
2-7).
COMMAND SET
data transfers
to
the first head
to
avoid a rotational
offset
from
also
that
of
the
(0)
of
offset
IMPLEMENTATION
Table
mands and their implementation on these disc
drives. Table
REQUEST STATUS Command and table
provides a summary
2-5
provides a listing
2-6
of
the CS/80 com-
provides a summary
of
the Utility Commands.
of
the
2-7
a
2-12
Page 29
INDEX
Interface Information
7957
A/7958A
, ,
SECTOR
0
104
OFFSE T (T
I I
1 )
------U
SECTOR
T 1 -
HEAD
SWITCH
10
~
I
0
i.-OFFSET
I
DELAY
INDEX
(T
SECTOR
).1
1
20
10
I
I
u
0
INDEX
DATA
DATA
DATA
SURFACE
SURFACE
SURFACE
0
1
2
IESOIA04
Figure
2-9.
Sector Offset
2-13
Page 30
Interface
7957
A/7958A
Information
Table
2-6.
Request Status Summary
COMMAND
Reject
Channel Parity
Illegal Opcode
Module addressing
(only volume
or
15
are supported)
Address Bounds
Parameter Bounds
Illegal
Message Sequence
Message Length
Parameter
Error
0 and unit 1
Fault
Cross-Unit (copy data
Controller Fault
Unit
Fault
(set whenever a problem
disc mechanism)
Diagnostic Result
(set when a failure occurs during a disc
diagnostic)
Operator Request (release never required)
Diagnostic Request (release never required)
Internal Maintenance (release never required)
Power Fail
Retransmit
Access
Illegal Parallel Operation (only support 1 unit)
Uninitialized Media (formatted
No
Spares Available
Not
Ready
Protect
Write
No
Data
Found
Unrecoverable Data Overflow
Unrecoverable Data
of
End
End
File (only
of
Volume
for
Information
Operator Request (release never requested)
Diagnostic Request (release never requested)
Internal Maintenance (release never requested)
Media Wear
La tency Ind uced
Auto
Sparing Invoked
Recoverable Data
Marginal
Recovera ble
Maintenance
------------------------------------------------------------------------------------------------------------
yes
no
=
Data
bit
under
Overflow
Track
will
error
no
Errors
Errors
not
supported)
is
Errors
tapes)
Overflow
be
set
as
described
condition
detected in
at
factory)
Errors
by
the
by
will
controller
the
eS80 manual
this
bit
in
be
response
set
IMPLEMENTED
yes
yes
yes
yes
yes
yes
yes
yes
no
yes
yes
yes
no
no
no
yes
no
no
no
yes
no
no
no
yes
yes
no
yes
no
no
no
yes
yes
yes
no
yes
no
no
to
an
~---
2-14
Page 31
Table
2-7.
Utility Command Summary
No
Clear Logs (run time/fault, error rate test)
Pattern Error Rate Test
Random Error Rate Test
Only Error Rate Test
Read
Only Random Error Rate Test
Read
Preset
Send Execution Message
Read Fault Log
Read Run Time Log
Read Error Rate Test Log
Measure
Read
Loca
Servo
Pattern Error Rate Test
Random Error Rate Test
Read
Read Only Random Error Rate Test
Read
Read Defect List
Seek Time
Spare Table
tie
and Read Full Sector
Test
Only Error Rate Test
ROM Revision number
Execution Message
Interface
Information
7957A/7958A
No
commands are implemented
Receive Execution Message
for
this option.
2-15
Page 32
Page 33
Theory Of Operation
3
3-1. INTRODUCTION
The
HP
7957 and
access, mass storage devices intended
small and medium size computers. The formatted
capacities
megabytes and
chapter
and
drive has three functional areas divided into three
assemblies (see figure
CS80/ESDI Controller [CEC] PCA-A2, the Disc
the
Drive Assembly [HDA]
Supply PCA··A3.
The CEC (PCA-A2) provides CS/80 interface
the host and Enhanced Small Device Interface
(ESDI)
commands
also provides
track. The
rection. It manages data transfers between the host
and HDA and passes and executes host commands.
of
"disc drives" refers
HP
7958, unless otherwise specified. The disc
to
CEC also initiates retries and error cor-
HP
7958
Disc Drives are random
for
use with
the
HP
7957 and HP
130
megabytes, respectively. In this
to
3-5).
The three assemblies are:
PCA-Al, and the Power
the HDA. The CEC converts CS/80
to
ESDI commands and vice versa. It
for
error logging
to
7958
are
81
both the HP 7957
to
the maintenance
NOTE
The CEC also provides
via an Electrical Erasable
(EEPROM).
the maintenance track these disc drives
log errors (run time and faults)
EEPROM.
The
HDA (PCA-AI) contains a sealed disc drive
assembly which contains a sealed head-media
module, a preamp
a device electronics
of
means
Run
detection, motor control and braking.
The
uses three
130-millimetre (5.12-inch) diameter nonremovable
discs.
surface.
the stack contains continuous prerecorded servo
data which
of
the read/write heads.
storing data, converting
Length Limited
head-disc module in the HDA
One read/write head
The
Instead
PCA, a motor control PCA and
PCA. The HDA provides the
(HP 7957A) and five (HP 7958A)
bottom surface
is
used
to
ensure the precise positioning
for
error logging
PROM
of
logging errors
to
NRZ
(2,7
RLL) code, write fault
is
sealed and
is
used
for
of
the lowest disc in
on
the
code
to
each disc
The power supply (PCA-A3) provides regulated
+5V
and +
12V
to
the CEC and HDA.
Two
LED's (red and green)
provide information on the disc drive status (see
figure
3-2.
The three major functional areas
figure 3-5) are the
Data Controller (DDC) IC and the microprocessor
(lJP)
the Direct Memory Access (DMA) bus
Bus.
The DMA bus
DMA bus and the lower DMA bus. This
4-6).
CS80/ESDI
PCA-A2
IC.
There are
both 8-bit and 16-bit transfers.
Interface IC
16-bit device.
The
EOI detect block looks
EOI and sends a signal
The DMA Bus Arbiter, which controls all access
the DMA bus, inhibits any
formation from the HP-IB Interface IC
buffers.
Buffer
Information
IC and the buffers 8-bits
All odd bytes are transfer
bytes are transferred
between the DMA bus and Buffer
by the DMA Bus Arbiter, and
even byte transfers. Information passed between
the buffers and DDC
buffers
The DDC provides the ESDI Interface
HDA. It has
rection code (ECC) circuit.
serialization/deserialization
forms all internal control and timing.
is
0 and Buffer 1 are 8k by 8 RAM's.
is
are
active
an
CONTROLLER [CEC]
HP-IB Interface IC,
two
is
divided into
an 8-bit device and the DDC
passed between the HP-IB Interface
to
is
at
this time.
internal programmable
on
the
front
of
the CEC (see
major buses in the CEC;
two
buses; upper
for
the byte tagged
to
the DMA Bus Arbiter.
further
at
a time.
to
Buffer
Buffer
16-bits
of
transfer
1 and all even
O.
Transceiver I,
I,
is
turned
at
a time
It
also provides
all data
is
panel
the
and
the lJP
is
to
allow
The
HP-IB
of
and
controlled
off
for
and
to
error
and
Disc
is
in-
the
both
the
cor-
per-
to
all
a
3-1
Page 34
Theory
Of
Operation
7957/7958
ESDI PAL circuit
The
that
ray
to
provides the proper delay
prevent the read gate
is
a programmable logic ar-
to
the read gate
from
being asserted over a
write splice when writing headers (sparing opera-
or
tion)
The
when formatting.
microprocessor
(}JP)
controls the disc drive
operations by using the firmware contained in the
32k by 8
ROM. The
holding variables and stacks. Access
and RAM
is
on
the
}JP
}JP
uses
the 2k x 8 RAM
Bus.
to
the ROM
for
The Control Bit Register and Status Bit Register
are accessed by the
of
these
two
registers process the signals across the
via the
}JP
Bus.
The
output
}JP
ESDI interface between the CEC and HDA. The
output
of
the Control Bit Register logs fault and
run time information in four contiguous sectors on
O.
physical cylinder
The fault log has capacity
logging 46 errors. The run log has capacity
50
ging
errors.
for
for
log-
is
for
transfer
DMA
bus.
information
buffers.
sequence
of
information between the
The remote transfer
from
the HP-IB Interface IC and the
Paragraphs
of
events
3-43,
for
each transfer. See figure
}JP
and
is
for
transfer
of
3-44 and 3-45 provide the
3-6
when using the transfer sequence paragraphs.
3-4. DISC FORMAT
The plated metal discs in the HDA PCA-A 1
provides five data surfaces
(HP 7957
A)
or
eight
data surfaces (HP 7958A) each with one read/write
One surface contains prerecorded servo data
head.
is
accessed by the servo head.
and
Each surface
called tracks (see figure
is
divided into 1024 concentric circles
3-1).
From
the outside
diameter these are: one self -test track, one guard
track,
data tracks,
six
spare tracks, one guard
1013
track, one self -test track, and a landing zone.
NOTE
The
output
of
the Control Bit Register
logs fault and run time information into
the X2024
used in place
The
EEPROM holds the last
EEPROM. The EEPROM
of
a maintenance track.
50
detected
is
fault and run time errors.
The
index pulse
which
LED
is
a divide-by-4 counter. The
counter
is
fed
drives the
to
the green LED counter
output
front
panel green and red
of
the
LED's.
3-3.
There are three types
Two
bus and the third transfer,
}JP
led
TRANSFERS
of
transfers
transfers, local and remote are
}JP
transfer,
accesses the DMA
on
a priority basis with the local transfer
bus.
The transfers are hand-
on
on
is
the CEC.
the DMA
when the
having the first priority and the remote transfer
having the last priority.
The
local transfer
between the DDC and the buffers. The
is
for
transfer
of
information
}JP
transfer
The
two
self -test tracks are used
1013
and writing. The
data tracks are used
reading and writing data. This provides
to
test reading
the
for
user
with 1013 cylinder addresses. The six spare tracks
are used
sparing
out
tracks containing hard
for
errors.
Each data track
numbered blocks
63
has
Figure
sectors plus one spare sector (see table
3-2
data sectors, each having 256 bytes
mation. The beginning
is
organized into smaller sequential
of
data called sectors. Each track
shows the sector format, based
of
data infor-
of
each sector
is
identified
on
3-1).
63
by an address area which contains the physical sector address plus cylinder and head information.
to
the
ensure
proper
Each address area contains sync bytes
read and write operations happen in
is
time sequence. Each section
separated by a min-
imum 16-byte intersector gap.
The 5th byte
byte. This byte
and track sparing information. Table
the values
of
the address field
is
used by the controller
of
the Flag Status byte
is
the Flag Status
for
sector
3-4
shows
for
various
conditions.
3-2
Page 35
Theory
Of
Operation
7957/7958
571'7803
Figure
•
3-1.
Disc Recording Format
FOR
SELF-TEST
GUARD
TRACK
1013
DATA
6
SPARE
GUARD
SELF-TEST
LANDING
DISC
DRIVES
TRACK
TRACK
0 -
MAINTENANCE
TRACKS
TRACKS
TRACK
TRACK
ZONE
WITHOUT
LOG.
AN
EEPROM.
Sector
Track
Head
HP
7957A
HP
7958A
There
is
Data
16,337,664
81,688,320
130,701,312
one
spare
Table
3-1.
Disc Drive Capacity
Bytes
Sectors
Per Per
256
16,
128 63
63,819
319,095
510,552
sector
per
track
and
Tracks
Per
1013
5,065
8,104
six
spare
Heads
Per
5
8
tracks
per
head.
3-3
Page 36
Theory
Of
7957/7958
Operation
__
------------------------------)l~------------------------------------_
( ,
-INDETlJ
SECTOR
BYTES:
BYTES;
~Intersector
~PLO
~Byte
GAddress
I}]CY
[I]CY
.... 1 ...
I i
I i
,2
....
*I
..
~~Y-T-E-S-
Gap
Sync
Sync
Pattern
Fie
I d
nder
MSB
nder
LSB
ADDRESS
FIXED
AREA
-
-
- 1
- 6
- 1
- 1
SECTOR N IDENTICAL
----
bytes
11
bytes
with
byte
fie I din
bytes
byte
byte
used
data
indicates
for
cyl
cylinder
....
for
bits
ma
inder
.-------
for
sector
phase-and
recorded
t ion
SECTORS
11
beginning
most
significant
least
DA
T A
AREA
-----
BYTE
SYNC
PATT
DATA
FIELD
DATA
CHECK
BYTES
256 6
, 4
BYTES
separation
frequency-synchronization
on
media
of
address
bit
significant
bit
....
~~
D..ATA
PAD
00
2
MINIMUM
Lr
ISG
00
~Head
~sector
~Flag
~Pad
~Address
Status
Byte
~Address
~Write
BPLO
~Byte
~Data
~Data
~Data
S7i57A02
Splice
Sync
Sync
Field
Check
Pad
Check
Pad
Bytes
Pattern
Bytes
Bytes
Bytes
- 1
byte
for
- 1
byte
for
- 1
byte
for
- Loaded With
- 2
bytes
field
- 2
bytes
file
- 1
byte
time
Controller
-
11
became
bits
- 1
byte
beginning
- 256
- 6
bytes
- 2
bytes
of
Controller
Figure
is
integrity
to
bytes
on
bytes
lost
for
read
for
allows
ensure
required
phose
media.
to
for
to
bits
-.
head
address
sector
status
FF
verifying
field
sends
establ
of
of
error
ensure
sends
address
byte
address
internal
dato
00
when
and
frequency
Controller
ish
dolo
field
dota
correction
proper
of
doto
00
ector Format
address
check
circuits
recovery.
at
this
reading
sends
byte
synchronization
recording
check
at
this
field
time
synchronized
code
bytes.
time.
when
codes
sufticent
to
allow
00
at
(ECC)
and
address
for
circuits
with
this
time.
and
information
recovery
to
data
indicates
3-4
Page 37
3-5. SPARING
Theory
Of
Operation
7957/7958
• Unrecoverable errors on any other sector will
cause the sparing operation
terminate
and
an
to
unrecovera ble error will be reported.
There are
sector sparing and the other
track contains
tor. The second sector spare operation
two
sparing sequences available. One
is
track sparing. Each
63
data sectors plus one spare sec-
on
a track
generates a track spare operation. Each data head
has
six a va
ill
a ble spare tracks. There
is
no cross
head sparing allowed.
If 1 or
tion, the
status word will be set.
is
Spare
3-6.
The
0 spares are available
"media wear" bit (bit
after
a sparing opera-
51)
in the CS/80
If
a track sparing operation
attempted with no available spares, the "No
Available" bit (bit 34)
is
set.
SEQUENCE
sparing sequence
is
as
follows:
• The host issues a Spare Block command.
• The
•
•
•
drivt:~
seeks
The
drivt~
reads a sector header and looks
Status Byte (refer
Flag
if
mine
If
is
If
ing
sector sparing has occurred.
sector sparing
attempted.
sector sparing
is
attempted.
to
track with defective sector.
to
table 3-4)
is
a vaila ble, then sector sparing
is
unavailable, then track spar-
to
at
the
deter-
is
• The disc drive then writes the bad sector header
with the defective sector number 255 (FF)
and
subsequent sectors are numbered sequentially
Data
starting with the sector being spared.
written
to
the track.
• The defective sector's data field
is
filled with
is
zeros.
3-8. TRACK SPARING
• The disc drive looks up the next available spare
track in RAM.
•
It
seeks
to
the spare track.
•
If
the seek fails, the spare track
in the spare track table. The sparing operation
terminated and a Unit Fault
is
flagged as bad
is
reported in
is
the
CS/80 status.
•
If
the disc drive seeks
WTR ER T
through
•
If
WTR
62
ERT
is
initiated seven times
using the pattern table.
fails, a sector sparing operation
to
the
correct
on
track, a
sectors 0
is
initiated.
• The WTR ERT
is
initiated again (seven times).
3-7.
A sector sparing operation
•
SECTOR SPARING
is
The
disc drive performs write then read error
rate
test (WTR ERT) seven times on the spare
sector using the random pattern table.
•
If
the
WTR
ERT fails the track
•
If
the
WTR
Buffc;~r
(to
ERT, passes the track data
0 and Buffer
sector.
as
follows:
1)
except
is
spared.
for
is
read
the bad
•
If
WTR ERT fails again, the disc drive looks
the next spare track in the spare table and
repeats the previous five steps.
•
If
the second spare track fails,
is
operation
terminated and a
Unit
the
Fault
sparing
sued in the CS/80 status.
•
If
the
WTR
o and Buffer
•
If
any errors,
ERT passes, data
1)
from
the defective track.
other
than
is
read (to
Buffer
the defective sector,
are detected the sparing operation fails and
unrecovera ble
error
is
reported.
is
up
is-
an
3-5
Page 38
Theory
Of
7957/7958
Operation
• A new header and the data
is
written
spare track.
• Sector headers contain the logical address
defective track and the sector spare bits will
that
show
• The defective track
cal track number.
most significant bit (msb)
dress set
logical addresses (refer
• The spare track table
3-9.
3-10.
Recoverable errors are errors
the first retry. Marginal errors are errors
corrected
rection code (ECC).
bits
and/or
no sparing has been done.
is
formatted with its physi-
(Physical addresses have the
to 1 to
differentiate them from the
to
table
is
updated.
ERRORS
ERROR DEFINITION
that
after
the first retry
If
an error
there are
two
bad locations in a
of
the cylinder ad-
3-4).
are corrected
that
or
by the error cor-
is
greater than
ECC cannot correct this and the sector
sidered unrecoverable.
3-11.
ERROR
LOGS
to
the
of
the
on
are
12
sector~
is
con-
implemented only when errors are detected during
is
not
run time and the error
retries. The run time
is
tion sequence
• An error
described
is
detected on read by the
error
correctable during
detection and correc-
as
follows:
Eee
cir-
cuits inside the DOC.
• Retries are initiated.
• On each retry, data
EeC
circuits.
• The first retry
• The retry
is
then done one time with a +80 mic-
roinch offset; then one time with a
is
is
read and checked by
done
on
track center.
the
-80 microin-
ch offset.
•
If
the data
disc drive loops back with one retry
one retry with
with
is
unreadable during each retry the
+80
-80
microinch offset
on
track,
microinch offset, one retry
for
a total
of
36
retries.
•
If
a correct read cannot be accomplished with
(a
total
of
36
the retries
Eee
is
•
If
the error
two
are
invoked
bad locations in a sector,
to
correct up
is
greater than
correct this and the sector
retries
12
to
12
bits
is
for
800
bits.
and/or
ECe
cannot
considered
ms),
there
unrecovera ble.
The information in the logs
ERT
LOG-
is
defined
as
follows:
Correctable (recoverable and
marginal) errors
U ncorrecta ble errors
RUN
TIME LOG Correctable (marginal) errors
U ncorrecta ble errors
3-12. ERROR DETECTION AND
CORRECTION
Error
detection
is
implemented during run time
and during diagnostics. Error correction
3-6
During
WRT
ERT testing a pattern
the track and then read back.
ted the retries are initiated
• The disc drive makes
•
If
the data
retries
is
12
more retries are made with a
roinch offset.
•
If
sets
with a
If
the data
retries
the data
of
for
is
retries then
-80 microinch offset.
is
not
800
ms)
is
is
written
If
an
error
is
detec-
as
follows:
12
retries
on
track center.
not read correct with the first
+80
mic-
not read correct with the first
12
more retries are initiated
two
read correctly with the retries (36
an error
is
recorded in the log.
to
12
Page 39
Theory
Of
Operation
7957/7958
3-13.
The
assembly and three printed circuit boards (see
figures
3-14. D:RIVE MECHANICS
The
of
[HDA]. The HDA
shock isolators/absorbers. This method
tion protects the HDA from mechanical shock and
stresses associated with mounting the drive in a
system enclosure.
DISC DRIVE PCA-A1
Disc Drive PCA-AI consists
3-3
and
3-4).
mechanical portion
a die-cast frame and a Head/Disc Assembly
is
of
suspended within the frame
of
a mechanical
the disc drive consists
on
of
construc-
The HDA consists
form a clean area
drive's mechanical components. Air
through the clean area by disc-rotation induced
flow. The circulating air
For
pressure equalization, the clean area "breathes"
to
the outside via another filter.
Inside the clean area are three
discs (depending on the model); the servo head
from five
ing
positioner. The surface
the die-cast base
tion. The discs are driven by a direct-coupled
brushless DC motor which mounts
or
eight recording heads (again, depend-
on
the model); and the rotary voice-coil
is
of
a die-cast base, sealed
that
contains virtually all
is
passed through a filter.
or
five magnetic
of
used
the disc
for
servo track informa-
that
on
is
circulated
is
nearest
the outside
r---------------------------------------------,
DISC
PCA-A1
DRIVE
PREAMP
PCA
DRIVE
ELECTRONICS
PCA
L I
I
ASSEMBLY
---------------------------,
r
I
MECHANICS
•
•
POSITIONER
(HDA)
ASSEMBLY
(
-7
_6
(
-5
_4
(
-3
_2
(
-,
_0
(
-S
rt
L.
_____
------
~
BRAKE/LATCH
1---------
-
I
SPINDLE
-
J6
I I
J
J7
T
I I
-
MOTOR
CONTROL
PCA
*
SPINDLE
------
MOTOR
I I
J5
)
)
)
J
)
J4
GROUND
B
.J
HDA
LUG
-
I
I
J3
POWER
-----
______ J
•
HP7958A
22
--------~-----~-~---------
HP7957A
- 5 DISCS.
- 3 DISCS, 5
Figure
3-3.
DISC
8
R/W
HEADS.
R/W
HEADS.
Dnve
Assembly PCA-AI Block Diagram
to
the
and
3-7
Page 40
Theory
Of
7957/7958
Operation
HEADS
--------1~~--~r.===~~
-
~
1%
t%
~
7
6
5------1
4
POSITIONER
DATA
....
SERVO
READ/WRITE
..
HEAD
v
READ/WRITE
2.7
WOA
r-------,
I
ENCODER
+-
I I
I
~
2 7
RDA:
. - L --OECODERI-.L..-I
_-u.fT---I
SELECT
and
AMP
P I
I 0 I
I
I-.
I I
I
I
jrr--
CLOCK
I I
I • I
I
I!
R/W
CONTROL~'II---R-E-A';;"D--t
F
AUL T DE
I
L
_______
CHANNEL
~T------~
l I
MUX
I-;I------t.t
I I
T I
'J
J
NRZ
WRITE
DATA
WRITE
I
CLOCK
I
NRZ
READ
DATA
__
~
https://manualmachine.com/
I
REF'ERE:NCE
CLOCK
I
WRITE
CATE
CA
TE
-
...
BRAKE
,l""~
nL~'IZI~~Jl~I~~f~I1~=~;~riJ
BRAKE
DRIVE
SPINDLE
MOTOR
CONTROL
TI
SPI~DLE
MOTOR
MOTOR
A
FEEDBACK
MOTOR
CONTROL
POWER
FAUL T DETECT
I
DRIVE
SENSEI
ION
LOGIC
POSITIONER
II
DRIVE
1----1-
SERVO
;,
POSITIONER
CHANNEL
CONTROL
...
PLO
SERVO
'---
CONTROL
I
GUARD
LOG
INDEX
LOGIC
SECTOR
LOGIC
LOGIC
I C
BAND
..
"
INDEX
SEC
TOR/
ADDRESS
MARK
FOUND
CONTROL
STATUS
..
v
S70§7,,'2
FIgure
-.
DIsc
3-8
Dnve
Assem y P A-A FunctIonal Elements
Page 41
of
the base, along with the brake mechanism.
for
Switching information
mutator
is
supplied by three Hall-effect sensors
the electronic com-
positioned within the motor assembly.
3-15.
PREAMPLIFIER
Electrical connection
is
positioner
through a
made via flexible circuits which pass
port
in the HDA casting. The port
sealed with a gasket
BOARD
to
the heads and the
to
maintain the integrity
of
the clean area. The flexible circuits then connect
to
the Preamplifier board mounted
on
the HDA
casting. The Preamplifier board contains the The
servo signal preamplifier IC and the read/write
IC.
preamplifier
The read/write preamplifer IC
contains the read signal preamplifier circuits, head
select circuits and write current drivers.
Theory
3-17. DEVICE ELECTRONICS BOARD
The remaining electronic components are mounted
on the Device Electronics board, which provides
for
the overall control functions
the
board contains microprocessor-based control logic
and interface drivers and receivers. The board
provides the following functions:
• Power-up and power-down sequencing.
is
• Spindle speed control
to
±O.5
percent accuracy.
• Servo signal amplification, AGC,
demodulation.
• Closed loop positioner servo.
• Velocity profile generation.
Of
Operation
7957/7958
drive.
The
and
• Head selection (for up
to
eight data heads).
• Read signal preamplification.
• Servo signal preamplification.
• Write fault detection.
3-16.
The
Motor
for
MOTOR CONTROL BOARD
electronic components associated with the DC
and with the servo power amplifier circuit
the
positioner are mounted
on
the Motor
Control board. The board provides the following
functions:
• Spindle motor commutation, current limiting,
and control.
• Positioner signal power amplification.
• Brake solenoid control.
• DC power filtering and reference voltage
generator.
• Read channel signal processing.
• Fa ult detection.
• Index, Guardband, and Track 0 decoding.
• Write data encoding.
• Data separation and read data decoding.
• Index and sector pulse generation.
3-18.
READ/WRITE FUNCTIONAL
DESCRIPTION
3-19.
When the drive
data
face via balanced, differential data lines
WRITE DATA± with timing provided by
Write Clock
the controller
stream with a clock signal. Data
NRZ
the Read/Write Head Select circuit. A flip-flop, internal
pulses. Each time the flip-flop changes state,
write drivers in the control circuit switch
WRITE
to
be written
data
to
the
CHANNEL
is
selected and in the write mode,
is
received over
signa1.
to
control circuit,
Write data
to
the drive as a serial binary data
2,7
RLL
data),
is
the
is
transmitted
is
encoded
and
then
clocked by
drive inter-
NRZ
the
from
(from
applied
the
data
the
the
head
to
3-9
Page 42
Theory
7957/7958
Of
Operation
current
disc.
The
asserted when the positioner
range
511). This signal selects the lower
write current.
selected because the recorded linear bit density
the
The
resolution.
3-20.
When the drive
Gate
selected data head are amplified.
represented by the time position
nal's peak and since the peak
directly, the read signal
produce
a result, each peak corresponds
Next, the differentiated signal
high-frequency noise and minimize distortion. Then
the
circuit, which generates the Read Data signal.
read data
data)
differential data lines
thereby recording magnetic dipoles
microprocessor-generated inner zone signal
is
within the inner
of
tracks
inner tracks
lower value
READ
signal
a signal
signal
is
is
and
(i.e.,
track numbers greater
The
lower value
is
higher
of
write
CHANNEL
is
selected and the interface Read
is
true, low-level read signals
that
changes state
digitized and applied
decoded (from
passed
to
the controller via balanced,
NRZ
of
than
on
current
is
is
differentiated
to
is
filtered
2,7
RLL data
Read Data± with its
of
two
write
the
Since read data
of
difficult
at
a "zero crossing."
to
a pulse-former
on
values
current
outer
tracks.
improves
from
the read
to
the peak.
to
remove
to
the
than
of
on
the
sig-
sense
to
As
The
NRZ
associated read clocks transmitted via
Read/Reference
is
3-21.
is
is
When Read
Clock signal
is
When Read
separator PLO
data, and the
switched
3-22.
Read/Write
eight data heads. Functions included in
are:
• Head selection matrix
•
• Read preamplifier
• Write drivers
• Write Unsafe detection logic
The
head Select lines (HS23 is
drive). The address
Head Select circuit (refer
READ/REFERENCE
MULTIPLEXER
Servo PLO divided by
to
READ/WRITE
Read/write
head address
Clock±.
Gate
is
not
asserted,
is
switched
Gate
is
Read/Reference
the Read Clock.
Head Select circuit controls
switching logic
to
Reference Clock, which
2.
is
asserted, the read
synchronized
HEAD
is
determined by
not
is
decoded by the
to
table
CLOCK
Read/Reference
data
to
the
preamble
Clock signal
SELECT.
up
the
circuit
three
interface
used in this disc
Read/Write
3-2).
the
is
The
to
HS2
0
3
HS2
0
2
0 0
0
0
0 0
0 1
0 1
0 1 1
0 1
3-10
Table
3-2.
Head Selection
1
HS2
0
0 1 1
1 0
1
HS2
0
1
0
0 0
0 1
0
1 1
HP7957A
0
2 2
3 3
4 4
-
-
-
HP
7958A
0
1
5
6
7
Page 43
Theory
Of
Operation
7957/7958
The
write enable signal
head select circuit. When Write Enable
the
circuit operates in the write mode. When
Write
Enable
is
inactive, the circuit operates in the
is
tied
to
the read/write
is
asserted,
read mode.
• In the write mode, the write current source in
is
the read/write head select circuit
is
Encoded write data
a stream
under control
current
of
digital pulses. The write drivers,
of
between the
passed into the circuit
the write data input, switch
two
head windings.
enabled.
as
• In the read mode, encoded read data from the
is
selected head
amplified and
the read channel
on
the device electronics
is
then passed
to
board.
If
a circuit malfunction causes the loss
or
if
transitions
a head shorts
or
opens, the Write
of
write
Unsafe Detector in the read/write head selection
is
circuit asserts the Unsafe signal, which
to
the
read/write control logic
on
applied
the device
electronics board. The drive alerts the controller
by asserting the interface Attention signal and
sending status information via the appropriate
Standard
Response bits. All writing
3-23.
Status bits and Vendor Unique Status
is
inhibited.
POWER SUPPLY ASSEMBLY
PCA-A3
Power Supply Assembly PCA-A3 develops dc
operating voltages
from
distributes these voltages throughout the disc drive.
The power supply assembly
on
reset signal.
Power Supply Assembly PCA-A3
contained switch-mode power supply mounted
a printed-circuit assembly (see figure
in the assembly are all
ponents including the line cord connector, line
fuse, line voltage selector switch, line
switch, and line filter. Output voltages are
+12
Vdc, and
used in the
-12
Vdc. (The
HP
7957 A and HP 7958A Disc Drives.)
The power supply
reset signal
front
can be measured
of
PCA-A3 (see figure
voltages are not adjustable. The power supply
the ac line voltage and
a1so
generates a power-
4-4).
of
the ac line voltage com-
-12
Vdc
output
voltages and power-on
at
test points
3-6).
is
a self-
Located
+5
output
The
on
on/off
V dc,
is
not
at
the
output
voltages are connected
Drive Assembly
PCA-Al via cable assembly WI.
to
CEC PCA-A2 and Disc
The following paragraphs provide a more detailed
description
PCA-A3 circuitry, as shown in figure
table
3-3
in figure
of
for
a description
3-6,
and
the Power Supply Assembly
3-6.
Refer
to
of
the mnemonics used
to
figure
4-4
for
detailed voltage
and signal distribution information.
AC
3-24.
INPUT
The ac line voltage
CIRCUITS
is
connected
to
Power Supply
Assembly PCA-A3 through a printed-circuit assembly
(PCA) mounted
PCA-mounted ac line
sides
of
the ac line into the power supply.
switch
is
operated by a
ing through an opening
disc drive. There
is
input following the power switch.
is
the same (3A, 250V)
-AC
LINE connector. A
on/off
LINE-
switch controls
pushbutton project-
on
the
front
panel
a fuse in the line side
The
for
both
lI5-Vac
both
The
of
the
of
the
ac
fuse value
and
230-Vac inputs. A line filter following the fuse
of
reduces the level
power supply and the
line transients entering the
amount
of
switching noise
leaving the power supply.
Also associated with the input circuitry
is
VOLT AGE SELECTOR switch which selects line
of
115
Vac
or
voltages
is
in the
115
Vac position, a surge voltage protection device protects the power supply
damage
3-25.
if
it
is
inadvertently connected
SWITCH-MODE
The switch-mode supply consists basically
dc
converter and a flyback-mode dc-dc converter.
230 Vac. When the switch
from
to
230 Vac.
SUPPLY
of
an ac-
The ac-dc converter rectifies and filters the ac line
dc
voltage. This filtered
to
plied
converter are
the dc-dc converter. Included in the ac-dc
two
thermistors
power-on surge current
at
115
peres peak
converter chops the
Vac and 230 Vac.
dc
voltages, transforms them
to
ters the outputs
of
+5,
+12,
and
supply the desired
-12
Vdc.
operating voltage
that
limit the initial
to
approximately 25 am-
input into time-varying
to
lower levels and fil-
The
dc
voltages
is
sup-
dc-dc
a
3-11
Page 44
Theory
7957/7958
3-26.
The power-on reset circuit
output
produces
PV AL remains low
after
Signal PV AL then goes
PV
seconds prior
Signal PV AL can be monitored
the
4-4).
3-27.
Of
Opera tion
POWER-ON
from
Power Supply Assembly PCA-A3 and
Power Valid signal PV
the
+5V
AL
will also go low
front
of
PV AL
is
output
to
power supply PCA-A3 (see figure
connected
for
the
RESET
is
a t least
reaches
to
for
+5V
to
CEC PCA-A2.
SUMMARY OF WRITE DATA
OPERATION
Data
is
transferred
Interface IC over the HP-IB
The
data
is
transferred
Interface IC
remote DMA transfer.
to
from
the host
bus.
by
DMA from the HP-IB
the buffers. This
activated
a high level. Signal
at
going below
by
AL.
At power on,
100
milliseconds
4.75V
at
is
or
least
500
a test point
to
the HP-IB
referred
the
higher.
micro-
4.75V.
to
+5V
as
on
is
The data
to
the host over the HP-IB
IC
transferred
from
the HP-IB Interface
bus.
3-29. CEC FUNCTIONAL THEORY
The CS80/ESDI Controller (CEC) PCA-A2 controls
the data transfer between the
puter implementing the CS/80 instruction set and
the Disc Drive Assembly [HDA]
plementing the
is
which
and the host passes through the CEC where it
buffered and changed
required by its destination. The
which
CEC
host and CEC
CEC performs the following tasks.
• Receives high level disc control commands (such
as
a
the host computer, and performs the low level
tasks necessary
transferred between the HDA PCA-AI
is
transferred between the HDA and the
is
serial NRZ. Data transferred between the
locate and read and locate and write)
ESDI interface standard. Data
to
is
over the HP-IB interface.
to
execute these commands.
HP-IB host com-
PCA-Al im-
the
correct
format
of
format
the
data
The
from
is
The
data
is
transferred by DMA from the
to
the DDC. This
transfer.
The
data
is
serialized in the DDC and transferred
to
the Disc Drive Assembly [HDA] PCA-AI. The
DDC generates the ECC (or Cycle Redundancy
Check [CRC]) bytes
Disc Drive Assembly [HDA]
is
referred
as
it transfers the data
to
PCA-A
as
a local DMA
1.
buffer
to
the
3-28. SUMMARY OF READ DATA
OPERATION
Data
is
transferred
[HDA]
DDC.
at
the
The
the
transfer.
The
to
remote DMA transfer.
PCA-Al
The
DOC generates the ECC (or CRC) bytes
the same time
DDC.
data
is
transferred by DMA
buffers. This
data
is
transferred by DMA from the buffers
the HP-IB Interface
from
the Disc Drive Assembly
to
the DDC and deserialized in the
that
is
referred
the data
IC.
This
is
transferred into
from
the DDC
to
as
a local DMA
is
referred
to
to
as
• Ensures
to
correction.
• Provides high level status reports
• Logs
• Performs self test
3-30.
The CEC
processor bus and the DMA bus (see figure
The DMA bus
host and the HDA. These transfers are controlled
by DMA circuitry in the DDC.
consist
two
The DDC controls data transfers between
HDA and the CEC. The HP-IB Interface IC con-
trols data transfers between the host and CEC.
a
that
only
error
free data
the host by performing retries
error
and fault information.
at
power on.
BUS
STRUCTURE
is
made up
is
used
of
16
kbytes
buffers (Buffer 0 and
of
two
buses,
to
transfer data between
The
of
static RAM divided
Buffer
1).
is
to
passed back
and
error
the host.
the
micro-
3-6).
the
data buffers
into
the
3-12
Page 45
Theory
Of
Operation
7957/7958
The
microprocessor bus
microprocessor,
ROM, RAM, Control Bit Register
is
made up
of
the
and Status Bit Register. The microprocessor bus
lines are isolated from the DMA bus lines
Transceiver
processor
when required.
data transfer can be taking place
the microprocessor
2.
Transceiver 2 allows the micro-
to
access the devices
It
also isolates the two buses so a
is
performing other tasks
on
the DMA bus
at
the same time
by
on
the microprocessor bus.
The DMA bus handles the transfer
of
data
be-
tween the host computer and the HDA. Data
is
to
which
be written
the HP-IB Interface IC,
from
the buffers to the DDC. The DDC then
transfers data serially
from
data
the HDA, the data follows the same
to
the HDA
to
to
the HDA. When reading
is
transferred
the buffers, and then
to
path but in the opposite direction.
The
DMA line consists
of
two halves; an upper
(most significant) bus and a lower (least significant
bus. The buffers connected
two
8k bytes by 8 static RAMs. Buffer 0
to
ted directly
by
lated
the lower DMA
Transceiver and
is
on
the bus consist
is
bus.
Buffer 1
of
the upper DMA
of
connec-
is
iso-
to
bus.
Data transfers between the DDC and buffers are
16
bits wide. Both buffers are accessed
time. This
referred
to
as
a local DMA transfer.
is
Transceiver 2 (on the microprocessor bus)
at
the same
is
dis-
abled during local DMA transfers.
Data transfers between the buffers and the
Interface
one
Transceiver 1
cessed Transceiver 1
The
DMA
Ie
are 8 bits wide. During transfers, only
buffer
is
accessed. When Buffer 1
is
enabled and when Buffer 0
is
disabled.
microprocessor can also access devices
bus.
Transceiver 2
is
enabled during these
HP-IB
is
accessed,
on
is
ac-
the
transfers. When the microprocessor accesses the
HP-IB Interface IC, DDC
1
is
disabled. When the microprocessor accesses
Buffer
and
1,
Transceiver I
from
the microprocessor are I-byte long.
or
Buffer
is
enabled. Transfers
0,
Transceiver
3-31. MICROPROCESSOR DATA BUS
The following devices reside
sor data
bus:
• Microprocessor
• 32k by 8 ROM
•
2k
by 8 static RAM
for
program memory
for
microprocessor
• Control Bit Register
• Status Bit Register
• Transceiver 2
The microprocessor
Two
quadrature clocks (E and Q) are generated ex-
ternally and input
for
DMA bus interface
is
an 8-bit microprocessor.
to
the microprocessor.
roprocessor clock generator and stretcher generates
these two clocks. Normally, the frequency
is
and Q
Outputs
8-control bits
select,
3 MHz.
from
the microprocessor provides
to
the Control Bit Register
EEPROM control, and READ
The microprocessor controls these bits by simply
writing the appropriate byte
Register. The Control Bit Register passes ESDI
to
commands
The transmission
reception
the HDA.
of
ESDI commands and
of
ESDI status are controlled by
microprocessor. The COMMAND DA T A
TRANSFER REQUEST lines are control bits
which are toggled by the firmware.
and TRANSFER
ACKNOWLEDGE lines are
status input bits which are read by the firmware.
Other ESDI control lines which are
the CEC
(e.g.,
select drive, head select, etc.) are also
control bits which are controlled directly by
firmware. Other ESDI control lines which are input
to
to
the CEC
ATTENTION,
(e.g.,
COMMAND COMPLETE,
etc.) are also status input bits which
are read by the firmware.
on
the microproces-
GATE
to
the Control Bit
The
output
The
mic-
of
for
head
delay.
the
the
and
STATUS
from
the
E
The Status Bit Register provides status information
(Le.,
configuration/status, attention, transfer ac-
knowledge, ready, sector and index) received
from
the HDA.
3-13
Page 46
Theory
Of
Operation
7957/7958
Transceiver 2 provides an interface between the
microprocessor bus and the
microprocessor accesses a device
and
the
DMA
Transceiver 2
Bus Arbiter grants access,
is
enabled. Otherwise, it
This permits the microprocessor
on
the microprocessor bus
DMA
The
cuitry
transfer
3-32.
Control, Clock
performs the following functions:
is
taking place
CONTROL, CLOCK GENERATOR
AND
STRETCHER
Generator
• Microprocessor E and Q clock generation.
DMA
at
bus. When the
on
the DMA bus,
to
access devices
the same time
on
the DMA
CIRCUIT
and
is
disabled.
that
bus.
Stretcher cir-
a
to
chip selects
be asserted
they are guaranteed
asserted, then the state machine goes
where E
asserted low.
is
held high, Q
The
state machine remains in this
state until an internal
serted high. This signifies
transfer has completed.
this state (E goes low,
to
be valid.
at a point
If
in time
one
of
to
is
held low,
and
NUREQ
STPSTR (stop stretch)
that
the
microprocessor
The
state machine exits
NUREQ
goes high)
when
them
a state
is
as-
and
the
clock stretching stops.
When the
DMA
microprocessor
Bus Arbiter grants access
UEN
(Microprocessor Enable) goes
to
the
high. ACSEN (Address Chip Select Enable) goes
high
on
the first clock cycle
after
UEN
goes high.
ACSEN performs the following functions when it
goes high:
is
is
• Microprocessor clock stretching.
stretching suspends operation
processor until the Bus Arbiter grants access
the lower
DMA
bus.
The
of
the micro-
clock
to
• Performs microprocessor transfer
request/acknowledge handshaking with DMA
Bus Arbiter.
• Generates DMA bus read and write strobes
(NDMARD
[Not
DMA
to
cess
• Generates enable signals
[Not DMA Read] and
NDMA
Write]) during a microprocessor ac-
the
DMA
bus
for
Transceiver 2 and
WR
microprocessor address buffers. These devices
allow the microprocessor address and data buses
to
be either isolated
DMA
address and data buses.
A state machine in this circuit
the
microprocessor clock generation and stretch-
as
ing, as well
to
transfer request
Arbiter.
When
the microprocessor
a device which needs
the
state machine simply divides the input clock by
4
to
generate the
for
the microprocessor.
12
MHz, resulting in a 3-MHz E and Q clock.
ly
Clock stretching
on
the DMA bus
The
state machine looks
is
is
from
or
connected
is
used
to
to
control
generate the microprocessor
(NUREQ)
to
two
quadrature
performed
to
the DMA Bus
is
not accessing
have the clock stretched,
clocks E and Q
The
input clock
is
normal-
whenever a device
accessed by the microprocessor.
for
any
of
the DMA bus
the
• Causes NBUF2E
• Causes the appropriate
select
to
be asserted (except DOC). This
trolled by the DMA
Enables
•
NDMARD
Control, Clock Genera
RWEN
periods
(Read/Write Enable)
after
appropriate strobe line
to
be asserted low. STPSTR
periods
after
minates the clock stretch
complete. When the arbiter resets
ACSEN, RWEN,
ready
for
the next microprocessor access
(Not
Transceiver 2 Enable).
DMA
bus device's
PAL.
and
NDMA
tor
and
Stretcher circuit.
is
asserted 2 clock
ACSEN
RWEN
is
asserted. This causes
(NDMARD
is
asserted. This
and
or
is
asserted 4 clock
allows
the
UEN
an
STPSTR are all reset back low,
is
WR
in
NDMAWR)
is
what
transfer
back low,
DMA bus.
3-33. DISC DATA
The
DOC's function
tween the HDA and
performs ECC generation/checking
rection.
The
DOC
controlling both local and remote
The
DOC receives high level commands
microprocessor and
these commands. When a
an
error
occurs,
the
CONTROLLER
is
to
control
HP-IB Interface
has on-board
then
controls
command
DOC
notifies the microproces-
data
and
DMA
DMA
the
is
(DOC) IC
transfers be-
IC.
It
error
circuitry
transfers.
from
execution
complete
sor by updating the internal status register
to
chip
con-
the
the
ter-
to
the
also
cor-
for
the
of
or
and
3-14
Page 47
Theory
Of
Operation
7957/7958
generates
an
interrupt,
if
enabled by the
microprocessor.
The
DDC does
HDA
or
receive ESDI status
only controls the transfer
not
send ESDI commands
from
of
read/write data. All
to
the HDA.
the
ESDI commands are sent by the microprocessor.
The
following
that
the
DDC executes:
• Read Data (reads data
it
to
the buffers via local DMA).
is
a list
of
the primary commands
from
HDA and transfers
• Write Data (reads data from the buffers via loto
cal DMA and transfers it
HDA).
• Remote DMA transfer (between the buffers and
HP-IB Interface
IC).
• Error Correction.
•
Format
For
a read data operation, the microprocessor sets
up
the DDC
the starting sector number, the starting
for
the number
of
sectors
to
be read,
buffer
ad-
dress where the data will be stored, and the size (in
of
bytes)
each local DMA burst transfer. Once the
microprocessor initiates the operation, the DDC
searches
the beginning sector. Once it
is
found,
for
the DDC begins reading in the serial data from the
as
HDA. The DDC computes the ECC bytes
is
data
read in, and compares it
stored on the disc.
is
the operation
is
ized, it
transferred
aborted. After the data
buffer. When the
size,
DMA burst
the DDC requests a local DMA
If
the DDC detects an error,
to
the DOC's internal 32-byte
buffer
is
to
the ECC bytes
filled
to
is
the
deserial-
the local
transfer by asserting LREQ (Local Transfer
Request).
The DDC begins the local DMA burst transfer af-
ter
the DMA
Bus
Arbiter acknowledges the local
transfer by asserting LACK (Local Transfer
The
Acknowledge).
the
data
out
is
buffers
(333
for
each
• Outputs
16
ns).
The DDC performs the following steps
16
bit word transferred.
buffer
DDC then proceeds
to
the buffers. Each transfer
bits wide and takes 4 DCLK cycles
address
onto
DMA data
to
bus.
write
to
the
It
• Outputs data
NDMAWR
• Increments
onto
DMA data bus and generates
to
strobe data into buffers.
buffer
address
counter
by 2
for
next
transfer.
This process
repeated until the entire transfer
a write data operation, the microprocessor sets
the DDC
the starting sector number, the starting
dress where the data will be transferred from,
the size (in bytes)
Once the microprocessor initiates the opera-
fer.
tion, the DDC performs local burst transfers
the internal 32-byte buffer.
operation, the DDC must wait
from
the DMA
local burst transfer. Each transfer
is
16
bits wide and takes 4 DCLK cycles (333
The DDC performs the following steps
of
filling and emptying the
for
the number
of
Bus
of
each local DMA burst trans-
Arbiter before it can begin a
is
complete.
sectors
to
As
in a read data
for
an acknowledge
from
buffer
For
up
be written,
buffer
ad-
and
to
fill
the
buffer
ns).
for
each
16-bit word transferred:
• Outputs
• Generates
The DDC strobes the data in
trailing edge
• Increments
buffer
address
NDMARD
of
NDMARD.
buffer
onto
to
address
DMA data bus.
read data
from
on
counter
buffers.
the rising
by 2
for
or
next
transfer.
The DDC then searches
Once it
is
found, the DDC begins serializing
data in the buffer, and transferring it
for
the beginning sector.
to
the
the HDA.
The DDC generates the ECC bytes as it transfers
to
the data
of
each sector. When the
the HDA and appends them
by the local burst
buffer
size,
the DDC initiates
has been depleted
to
the
another
end
local burst transfer by asserting LREQ. This
of
process
filling and emptying the
repeated until the entire transfer
is
buffer
complete.
3-34. REMOTE DMA TRANSFER
For
a remote DMA transfer operation, the micro-
for
processor sets up the DDC
to
be transferred, the starting
the data will be written
direction
of
the transfer. Once the microprocessor
the number
buffer
to
or
read from, and
of
bytes
address where
the
initiates the operation, the DDC asserts the remote
is
is
3-15
Page 48
Theory
7957/7958
Of
Operation
transfer request line RREQ. When the DMA
Arbiter acknowledges the transfer by asserting
RACK, the DDC performs the following steps to
complete each I-byte transfer:
• Outputs
• Generates NOMA WR strobe
transferred from the
buffers.
• Increments
transfer.
The
DDC will continue this process until all
bytes specified have been transferred. The micro-
processor may set up the DDC
remote and local transfer operation active
same time. In this situation, the local and remote
DMA transfers are interleaved.
3-35.
The purpose
the leading edges
and ADDRESS
HDA. Explanations
In each case, an enable signal
gated with the appropriate DDC signal.
machines are implemented in the ESDI
of
the state machines
GATE
other
for
READ GATE, WRITE GATE, and ADDRESS
MARK
respectively).
buffer
ESDI PAL
during the post-index ISG control, and the
is
used
ENABLE (RGEN, WGEN, and AMEN
address
buffer
of
the ESDI PAL Circuit
of
MARK
to
generate the three enable signals
onto
DMA data
if
data
HP-IB Interface IC to the
address counter by 1
to
have both a
is
READ GATE, WRITE GATE,
ENABLE going
for
each case are given below.
is
generated which
is
used
to
delay READ
Bus
bus.
is
being
for
next
of
the
at
the
to
delay
to
the
Two
state
PAL. One
PLO sync field in order
When the ESDI PAL detects an INDEX
SECTOR pulse, counting
(CNT) high. The ESDI PAL asserts
The microprocessor must set up this
delay
strobes it into the counter by reading address
is
at
power-on initialization.
writing a 7-bit value into the the counter.
7-bit word has been set up, the microprocessor
3000H. The value
count
where
This insures
to
The READ
leading edge
during a data field read. This
the delay
write. This insures
serted over the write splice.
3-36.
ENABLE DELA
specification requires
tive
GA TE, and
asserted a minimum
of
these requirements by itself, additional hardware
was added
ADDRESS MARK ENABLE by the required
amounts.
= 125 -
the
3.5
bits into the address PLO sync field.
of
WRITE
for
2.5
WRITE GATE. Since the DDC does
of
(post-index
post-index
that
READ
GATE
cycles prior
that
delay circuitry also delays the
of
READ
WRITE
that
GATE AND ADDRESS MARK
Y CIRCUIT.
ADDRESS
to
delay WRITE CLOCK
to
a void this problem.
is
enabled by setting
RGEN
READ
It
the 7-bit word should
ISG)
ISG
is
in
GATE
GATE
that
to
of
100
will be asserted
GATE
READ
WRITE CLOCK be ac-
the assertion
by 3-bit times
is
to
compensate
during a data field
GATE
MARK
ns
after
or
high.
GATE
does this by
Once
the
be:
bits
0.5
for
is
not
as-
The
ENABLE be
the assertion
of
WRITE
not
ESDI
meet
and
The
ESDI PAL powers up in an asserted low state.
The
firmware does
READ/REFERENCE
running. This
the
ESDI PAL
header operation, the
within a couple
or
INDEX
or
ten,
WRITE
SECTOR. Thus, READ
over a write splice.
The
ESDI PAL
READ
3-16
SECTOR pulse. When a header
at
the beginning
GATE
GATE
not
change this state until the
CLOCK
is
required
to
reset. During a read
of
has a similar delay
counter
until the head
for
the state machines in
DOC asserts READ GATE
READ CLOCK cycles
of
GATE
delays the leading edge
from
a format operation,
from
could be asserted
is
over the header
the HDA
or
compare
after
is
writ-
INDEX
is
the
or
of
3-37. ERROR CORRECTION
The DDC has the capability
or
CRC,
the address and data fields. The DDC allows
the microprocessor
polynomial, polynomial preset,
span. An error correction cycle
ternal
the microprocessor. When
complete, the DDC contains information
microprocessor
the first byte in the data field
error. The microprocessor
48-bit ECC generation and checking
to
program the desired ECC
to
the DDC, however it must be initiated by
to
compute the
to
perform
and
is
performed in-
the
correction cycle
buffer
that
contains
then
completes
16-bit
correction
for
address
on
for
is
the
of
the
the
Page 49
Theory
Of
Operation
7957/7958
correction process by XOR'ing the syndrome bytes
(in the DDC) with the bytes in the data field
that
contain the error.
3-38.
There are three different ways
format
FORMAT
a track:
that
the DDC can
• Internal sequential - the DDC increments the
for
sector number
each physically adjacent
sector.
•
Buffer
is
DDC
table - The information
for
each header
stored in the buffers and transferred into the
at
the appropriate time by local DMA.
• Interlock - The microprocessor updates the
format
sector
The
parameter bytes in the DDC
is
formatted.
firmware causes the DOC
to
format
after
each
an entire
track or, during a sparing operation, any number
of
sectors
3-39.
The
face
on
a track.
HP-IB
INTERFACE IC
HP-IB Interface IC
chip.
It
implements all
is
used
as
the HP-IB inter-
of
the IEEE STO 488
interface functions. The controller functions are
not
used
in
this application. The HP-IB Interface
IC has eight internal
the
microprocessor
10-bit registers which allow
to
initiate and monitor the
HP-IB transfers. In addition, it has an 8-byte in-
bound
buffer
and
an
8-byte out-bound
buffer
for
data buffering.
The HP-IB Interface IC
mode since the microprocessor
is
operated in the 8-bit
is
an 8-bit device.
Remote DMA transfers are also 8 bits wide,
if
however
the transfer
Interface IC to Buffers 0 and
(DO
and
tenth bits
01
are latched
01)
by
DQCLK which
NIOGO when the transfer direction
HP-IB Interface IC
to
is
from
1,
then the ninth and
are latched. Both
the
is
equivalent
is
from
HP-IB
DO
and
to
the
the buffers. When transfer-
ring in the other direction, DQCLK remains high.
is
When an incoming byte
secondary address, then
tagged with EOI
Dl
is
high. NREMGO
(Not Remote Transfer Go) will be set high
end
of
that
byte transfer and cause the
to
Arbiter
The microprocessor can reset
inhibit any more remote DMA transfers.
NREMGO back low
or
at
DMA
is
the
Bus
by toggling the remote DMA direction bit
(NREMRD) low. This reenables the remote
transfer. NREMGO
is
a status bit which can be
DMA
read by the microprocessor.
The state
selects the
a remote transfer
address
HP-IB Interface
bound). When a remote transfer
NREN
selected. When
read/write line (NR/W)
is
low, the control bit
microprocessor sets NREMRD low when
remote DMA transfer
HP-IB Interface
transfer
3-40.
of
NREN (Not Remote Transfer Enable)
HP-IB Interface IC address lines. When
is
active,
is
fixed
at
2,
Ie
is
high and the DMA bus address lines are
NREN
Ie,
is
in the opposite direction.
NREN
which
buffer
is
selected. When
NREMRD
is
from
is
is
the address
(inbound
is
is
high,
is
selected.
Buffers 0
low
and
not
the
and
of
active,
NREN
and 1 to
and sets it high when
BUFFERS
the
the
out-
DDe
The
the
the
a
Data transfers
on
the microprocessor side are synchronous, even
though the
to
and
from the HP-IB Interface IC
HP-IB Interface IC was designed
asynchronous transfers. This
the microprocessor has a synchronous bus. DMA
transfers are also synchronous. Synchronous
f ers are accomplished by asserting NIOGO
correct
transfer
Interface
valid
In this case,
period
from
on
the DMA bus before NIOGO
of
time. During a remote DMA
the buffers 0 and 1
Ie,
NIOGO
NDDRD
is
delayed so
(Not Delay Read)
generate the NIOGO (Not I/O Go) signal in
DMA
PAL.
is
necessary beca use
for
to
the HP-IB
that
the data
is
asserted.
is
used
for
trans-
the
to
the
One
8k by 8 RAM (Buffer
(or most significant) half
another 8k
by
8 RAM (Buffer 0) resides
lower (or least significant) half.
and chip selects are arranged so
DMA and microprocessor transfers,
cessed
cessed
if
the address
if
the address
is
is
1)
of
is
even, and
odd.
resides
on
the
the DMA bus,
The
addressing
that
during remote
Buffer 0 is
Buffer 1 is
upper
and
on
3-17
the
acac-
Page 50
Theory
Of
Operation
7957/7958
BUS ARBITER
3-41.
The
that
cess
priority basis.
DMA
DMA Bus Arbiter
receives requests
to
the DMA bus and grants access
The
is
a sequential state machine
from
various sources
three
different
types
of
for
on
trans-
ac-
fers which can take place on the DMA bus are
listed below in the
order
of
highest
to
lowest
priority:
• Local
DMA
(between the HDA and the buffer)
• Microprocessor (between the microprocessor
and any device
on
the DMA bus)
• Remote DMA (between the HP-IB Interface IC
and the buffers)
When no transfers are taking place, the DMA
Arbiter
is
in the idle state and
is
continuously
Bus
monitoring the input requests. A detailed descrip-
of
tion
type
3-42. LOCAL DMA
transfer request
this by asserting the LREQ signal high.
DMA
how the DMA Bus Arbiter handles each
of
transfer
is
given below.
TRANSFERS. A local
is
Bus Arbiter
generated by
is
in
the
the
DOC.
idle state, then it grants
It
If
does
the
access by asserting LACK (local acknowledge)
Once the DOC receives LACK, it takes con-
high.
of
trol
transfer.
LACK and grant access
as LREQ
the DMA bus and completes the local burst
The
DMA Bus Arbiter continues
for
local transfers as long
is
asserted. When LREQ
to
is
deasserted,
assert
the DMA Bus Arbiter deasserts LACK and returns
to
the idle state. The DMA Bus Arbiter asserts
to
NLEN low during the local transfer period
nify
that
a local transfer
input
to
the DMA PAL and
chip selects
for
Buffers 0 and
is
taking place. NLEN
is
used
to
generate the
1.
sig-
3-44.
REMOTE
transfer requests come
and the HP-IB Interface
RREQ high and the
NHPIBR (Not HP-IB Read) low
a
Both requests and
order
for
a remote request
DMA TRANSFERS.
from
two
sources,
IC.
The
HP-IB Interface IC asserts
to
make a request.
NREMGO must be asserted in
to
be recognized by
DMA Bus Arbiter. Before the transfer
the
acknowledged,
DMA Bus Arbiter must also be
in the idle state and both the local and microprocessor requests deasserted.
The
Arbiter will then grant access by asserting
(remote acknowledge) high. Once
receives RACK, it takes control
of
the
and completes the remote transfer, which
to
1 byte. The DMA Bus Arbiter inserts wait states
in the remote transfer. This
the slow speed
fers can be made.
nected
to
causes wait states
at
which HP-IB Interface IC trans-
The
the EXT-STAT input
to
be inserted. Three wait states
is
required because
RACK signal
of
the DOC, which
(or 3 DCLK cycles) are inserted into each remote
byte transfer. Each remote byte transfer takes
microsecond. Once the byte transfer
to
the DMA Bus Arbiter returns
NREN
remote transfer
in process.
is
used
is
asserted low by the arbiter during
to
signify
NREN
to
generate various control signals used in
is
input
that
to
the idle state.
a remote transfer
the DMA PAL
the transfer.
3-45.
The
EEPROM
EEPROM has a capacity
(When Used)
of
512 bytes. All information (address, operation command, data, etc.)
is
transmitted over the serial data line EEDATA.
is
a bidirectional data line. All data
or
out
of
the EEPROM by
the
EECLK signal.
is
This
into
EEDA T A and EECLK are controlled in microprocessor firm ware. The microprocessor performs
the serialization and deserialization
of
Remote
the
DOC
asserts
can
DMA
RACK
the
DMA
is
limited
is
also con-
is
complete,
is
clocked
the data.
DOC
the
be
Bus
DOC
bus
of
one
the
is
and
3-43. MICROPROCESSOR
TRANSFERS.
Microprocessor transfer requests are generated by
asserting
NUREQ
low.
If
the DMA Bus Arbiter
in the idle state and the local transfer request
is
(LREQ)
grants access
serting
completed its transfer, which
NUREQ
deasserts
not asserted, then the DMA Bus Arbiter
for
the microprocessor transfer
UEN
high. Once the microprocessor has
is
limited
is
set high. The DMA
UEN
low and returns
Bus
to
the idle state.
3-18
is
by
as-
to
1 byte,
Arbiter then
Acknowledge cycles are included in all transfers
or
from the EEPROM. The transmitting device.
either the
EEPROM
the EEDAT A line
or
microprocessor, will release
after
transmitting 8 bits. During
the ninth clock cycle, the receiver will pull
EEDAT A line low
the 8 bits
repeated
of
for
to
acknowledge
that
it received
data. This acknowledge cycle
each 8-bit block
of
data transferred.
to
the
is
Page 51
Due
to
the
EEPROM, it
the serial nature and acknowledge cycles
is
extremely unlikely
of
that
inadvertent writes could take place during power
for
cycling. However,
is
connected
to
used
to
the microprocessor circuits
generate EEDATA. This insures
added protection, NRESET
that
are
that
EEDA T A will be held high. Since the device ad-
is
0,
the
dress
during power up
turned
off
then the address which
to
may end
EEPROM can never be addressed
or
power down.
during the middle
up
with bad data, however no other
of
is
currently being written
If
a write operation,
power
is
address locations should be corrupted.
Theory
Of
Operation
7957/7958
LED.
3-46.
The LED CONTROL circuit sets the condition
the
two
in an active state the green LED blinks once every
68
ms.
If
is
LED
turned
turned on.
the green LED
turned on.
idle state the red LED
turned
on
CONTROL
front
panel LEOs. When
the
disc drive
the disc drive fails self test
off
and the red LED (FA
If
the disc drive goes into a fault state
is
turned
If
the disc drive
off
and the red
is
operational but in
is
off
and the green LED
continuously.
the
UL
green
T)
LED
of
is
is
is
an
3-19
Page 52
Theory
7957/7958
Of
Operation
Table
3-3.
Mnemonic Table
Mnemonic
ACSEN
Address Chip Select
Definition
Enable
DCLK
o CLOCK
DQCLK DQ Clock
EECLK*
EEDATA*
EEPROM Clock Control Bit Register
EEPROM Data
LREQ Local Request
Source
Microprocessor Control,
Clock Generation and
Stretcher
Microprocessor Control,
Clock Generation and
Stretcher
DMA PAL
Status Bit
Register /Control Bit
Register
DDC
Description
Used
to
enable appropria te address and
chip select functions
during a microprocessor
transaction
Used
to
drive DMA
Bus
Arbiter
Clock signal
PAL
for
Used
to
tion into and
from
DMA
remote
clock informa-
from
EEPROM
Line use
formation in and
to
transfer in-
out
of
EEPROM
Activated by DOC
to
in-
itiate a local transfer
NBUF2E
NDDRD
NDMARD
NDMAWR
*For disc drives with an
Not
Buffer 2 Enable
Not
Delay Read
Not
DMA Read DDC/Control, Clock
DMA PAL
DMA
Bus
Genera tion and Stretcher
circuit
Not
DMA Write
DOC/Control, Clock
Genera tion and Stretcher
circuit
EEPROM
only.
Arbiter Circuit
Activated by DMA PAL
to
turn
on
Transceiver 2
for
microprocessor
transactions
Used
to
generate delayed
NIOGO signal
This signal
provide a Read
is
activated
from
to
the
DMA Buffers
This signal
provide a Write
is
activated
to
to
the
DMA buffers
3-20
Page 53
Table
3-3.
Mnemonic Table (continued)
Theory
Of
Operation
7957/7958
Mnemonic
NHPIBR HP-IB
Definition
Source
Remote Transfer HP-IB Interface IC
Request
NIOGO
Not I/O GO
DMA PAL
NLEN Not Local Enable DMA Bus Arbiter
NREMGO
NREMRD
Not
REMOTE GO EOI Detect Circuit
Not
Remote Direction
Control Bit Register
Description
Signal
to
DMA
Bus
Arbiter requesting a
remote transfer
Signal used
formation into and
the HP-IB Interface
Read/W
This signal signifies
local transfer
place. Enables
to
strobe in-
rite strobe.
is
taking
buffer
out
IC.
that
chip-select signals.
This signal
is
activated
a Remote transfer.
Terminates with a byte
tagged with
Input
circuits
EOI.
to
HP-IB Interface
to
set direction
remote transfer
of
a
for
of
NREN
NR/W
NUREQ
PVAL
RACK
Not
Remote Enable DMA Bus Arbiter
Not
Read/Write Microprocessor
Not
Microprocessor
Request
Power
Valid
Remote Acknowledge
Control, Clock Generator
Stretcher circuit
Power Supply
DMA Bus Arbiter
This signal drives
DMA PAL
for
the
remote
transfers
Read/Write
from
microprocessor. Enabled by
NREN
Signal line
Arbiter
sor access
Indicates
ply outputs are
signal.
to
DMA
for
microproces-
to
DMA
that
power sup-
up
Bus
Bus
to
their proper value
Control signal enabling
DDC
for
a remote
transfer
3-21
Page 54
Theory
Of
7957/7958
Operation
Table
3-3.
Mnemonic Table (continued)
Mnemonic
RREQ
RWEN
STPSTR
UEN
Definition
Remote Request
Read/Write Enable
Stop Stretch
Microprocessor Enable
Source
DDC
Control, Clock
Generation and Stretcher
circuit
Control, Clock
Generation and Stretcher
DMA
Bus
Arbiter
Description
Control signal
to
DMA
Bus Arbiter requesting a
remote transfer
Signal
Signal used
to
processor
Stretch
Clock
enable micro-
to
DMA bus
to
Terminal
Ena ble microprocessor
for
access
to
DMA bus
3-22
Page 55
Service Information
4-1. Introduction
The disc drive does not contain operator serviceable parts. To prevent electrical
shock, refer all service activities to service-trained personnel.
• The field-replaceable assemblies (FRA's) in the disc drive are
electrostatic-sensitive devices. Take appropriate precautions when removing
the FRA's from the disc drive.
required. (These components are contained in anti-static work station,
9300-0749.) Immediately
conductive plastic
bags.
WARNING
CAUTION
Use
of
an anti-static pad and wrist strap
after
removal, store the FRA's in anti-static,
is
part
4
no.
• The disc drive
is
heavier (l0.9 kilograms/24.0 pounds) than its size would indicate.
•
Do
not turn the
Hewlett-Packard Interface
front
green
•
Do
not cycle the
•
Do
not
connect
system
is
is
delicate and should be handled with care. Also, the disc drive
LINE-
panel LED.
LINE-
or
transferring data
switch
disconnect the HP-IB cable(s) from the disc drive when
off
when the system
Bus
(HP-IB). This can be identified by a flashing
switch on and
on
the HP-IB.
off
unnecessarily.
is
transferring data
NOTE
•
For
HP 7957 A and HP 7958A Disc Drives with a CEC Controller PCA-A2
date coded B-2633 and version
EEPROM installed, all error and fault logging
•
For
HP 7957 A and HP 7958A Disc Drives with a CEC Controller PCA-A2
date coded B-2633 and version MR1.2 firmware (07957-10161) installed, all
error and fault logging
•
For
HP 7957 A and HP 7958A Disc Drives with a CEC Controller PCA-A2
date coded B-2707
the disc drive.
is
or
later, all error and fault logging
placed
MR1.1
on
firmware (07957-10151) with
is
done
to
the EEPROM.
track 0
of
the disc drive.
is
placed
on
track 0
an
on
the
the
of
4-1
Page 56
Service Information
7957 A/7958A
4-2.
4-3.
Service Tools
The following tools and materials are required
• Torx* TIO Driver
• Torx*
• Torx* T25 Driver
•
•
• Anti-Static Workstation, part no. 9300-0794
TI5
Nut
Driver, 9/32"
Pozi Driver, No. I
PCA Locations
The locations
self-test diagnostics are shown in Figure
Locations. Refer
chapter
VI
to
service the disc drive:
Driver
of
the three field replaceable assemblies (FRA's) identified by
4-1,
Field Replaceable Assembly (FRA)
to
chapter V
for
identification and ordering information.
for
removal and replacement instructions and
the
to
4-4.
4-5.
4-6.
Cable Connectors
Figures
FRA's in the disc drive and the cables coupled
Disc Drive, Exploded View, shows how the cables are connected between the
FRA's. An overall cabling diagram
Cabling Diagram.
4-2
through
Signal Distribution
Cable connections between the FRA's
The distribution
Distribution. The mnemonics appearing in figure
Mnemonics Table.
Power Distribution
Details
Disc Drive, Functional Block Diagram, and in Figure
of
ac input wiring and dc power distribution are shown in Figure
4-5
show the locations
of
signals via these cables
of
the cable connectors
to
these connectors. Figure 6-1,
of
the disc drive
in
the disc drive are shown in figure
is
shown
is
provided in Figure 4-5,
in
Figure
4-5
are defined in Table
4-5,
Cabling Diagram.
4-7,
on
Signal
the three
4-5.
3-2,
3-5,
*TORX
4-2
is
a registered trademark
of
the Camcar Division
of
Textron, Inc.
Page 57
Service
Inf-ormation
7957
A/7958A
57957806
U (un
it)
O-oISC
DRIVE
2-CONTROLLER
Figure
4-1.
Field Replaceable Assem
POWER
SUPPLY
PCA-A3
A
(field
l-DISC
DRIVE
2-CS80/ESol
PCA-A2
2-CEC
PCA-A2
COMPONENT
SIDE
replaceable
PCA-Al
CONTROLLER
ly
FRA) Location
assembly)
(CEC)
4-3
Page 58
Service
7957
A/7958A
Information
HP-IB
SWI TCH
57957825
4-4
Ftgure -
~
MAY
EEPROM.
OR
MAY
U
112
NOT
BE
ON
A3
peA
Page 59
1.
J1
PINS
EVEN-NUMBERED
SIDE
OF
BETWEEN
2.
J2 PINS
EVEN-NUMBERED
SIDE
OF
BETWEEN
3.
J3
I S
NUMBERED
ARE
NUMBERED 1 THRU
peA.
PINS 4
ARE
peA.
PINS 4
PINS
THERE
AND
NUMBERED 1 THRU
PINS
THERE
AND
AS
SHOWN
20.
ARE
ON
ON
cr
SOLDER
34.
SOLDER
2 3
IS A KEYSEAT
6.
ARE
IS A KEYSEAT
6.
~
~
Service Inforination
7957
A/7958A
S7tS7A21
Figure -
W2
~~
~
POWER
ASSEMBLY
SUPPLY
peA-A3
4-5
Page 60
Service Information
7957
A/7958A
TEST
POINT
-12V
+12V
PVAL-H
+5V
+12VP
VOLTAGE
-11.4
+11.64
~
+2.4V
+4
. 85
1 1
.0
TO
-12.6V
TO
+12.36V
(TYPICALLY
TO
5.
15V
TO
13.
OV
RANGE
_~.,p:;.-.--
4.0V)
GND
+
+5V
12VP
NOTE:
S79S7A07
4-6
1. -12V
HP
2.
USE
FOR
3.
THE
NOT
4.
MAXIMUM
5V
12V
IS
NOT
USED
7957
AND
HP
7958.
RET
(GND)
VOLTMETER
OUTPUT
TEST
RETURN.
VOLTAGES
ADJUSTABLE.
RIPPLE:
SUPPLY:
<50
mV
SUPPLIES: <100
IN
P-P
mV
THE
POINT
ARE
P-P
Page 61
CE
CONTROLLER
PCA-A2
~*".:~
J4
(FRA2)
• J 1
CONTROL
J~
DATA
W3Pl
r--~
I
I
I
I
......
~
W2Pl
~
I
I
I
I
....
~
W3P2
,-'--
'--
W2P2
,..
'-,....
DISC
DRIVE
ASSEMBLY
(FRA
Jl
I
CONTROL
I
I
I
~2
I
I
I
I
1 )
DATA
Service Information
7957
A/7958A
A1
~
-r----
POWER
ASSEMBLY
A3
J
11
SUPPLY
(FRA3)
-
I
J3
J
W1P2
J~~Pl
I
I Wl
I
I
~
I
B1Pl
I
I
__
l J
l
J5
W4Pl
W4
Wl
W4P2(
J3
W1P3
1
l
----
) 1 ( FRONT PANEL
,
FAULT/ON-LINE
m
FANB1
LEOs
I
J
J4
W1P4l
HDA
GND
LUG
I L
--r
$79571.05
Y--
Figure
-5.
a mg
Diagram
4-7
Page 62
Service Information
7957Aj7958A
4-7.
4-8.
4-9.
Signal
Notation
In
the disc drive logic circuits, a digital signal
of
two
states: active
or
low) makes the action occur
usually identified
mnemonic with an
level. Signal mnemonics without
control bus signals
Block Diagram
A functional block diagram
manual (see figure
CEC and the power supply.
Test Points
A number
troubleshooting and test purposes.
The location
Points and Voltages. Also provided are specifications
Test
monitored
noted that access
assembly from the disc drive. Refer
is
applied
or
inactive. The signal
for
which the signal was designed. This action
by
a signal mnemonic. Refer
"N"
prefix indicates a logic signal with
a{l
"N"
or
an active high signal.
of
the disc drive
3-5).
Figure
of
test points are provided in power supply PCA-A3
of
these test points
at
the test points. The
to
the test points requires the removal
3-6
is
is
shown in Figure
output
to
is
active when its voltage level (high
to
Table
prefix usually indicate analog, data bus,
is
provided in chapter 3
a detailed functional block diagram
4-4,
voltages are
chapter V
not
for
removal details.
to
its destination in
3-2,
Mnemonics Table. A
an
active low voltage
for
Power Supply (PCA-A3)
for
the voltages
adjustable. It should be
of
the
front
of
this
of
panel
one
is
the
4-10.
4-11.
CSj80 Implementation Information
The following information provides details
implemented in these disc drives. Table
commands are implemented.
Initialize Media
Command
The following
Command:
Format Option A - This option will write zeros over the logical tracks. Spare
tracks and the spare table are not affected. This option does
headers. This option
Format Option P - This option will deallocate the field (secondary) spares
writes zeros over the logical tracks. This option takes approximately 5 minutes to
complete.
format
is
options are available when using the Initialize Media
completed in a short period
on
how various CSj80 commands are
2-5
provides information
of
time.
on
what
not
write over the
CSj80
and
4-8
Page 63
Service
Information
7957
A/7958A
Format
sparing.
are
sparing
Option R - This option
The
used
headers
to
reformat
are
maintained. This
from
the
the
tracks.
4-12. Initiate Diagnostics Command (DIAG)
The
following options
are
available when using this command:
o = initiates self test
= initiates
1
2
= initiates outside diameter
= initiates incremental seek test
3
= initiates butterfly seek test
4
5
= initiates EEPROM test
4-13. CS/80 Describe Command Response
In response
following information:
CONTROLLER
INSTALLED
****1000 0000 0000 0001****
MAXIMUM
CONTROLLER
<INTEGRATED
random
to
DESCRIPTION
UNIT
TRANSFER
TYPE:
SINGLE-UNIT
seek test
a CS/80 DESCRIBE
<1
bit
RATE:
0
(for
FIELD
for
1000
CONTROLLER>
reformats
disc
are
All
option
to
inside diameter seek test
read
tracks
all tracks
into
are
on
the
CEC buffers. These headers
reformatted. Sector
takes approximately
disc drives with EEPROM only)
command
each
unit>:
K-BYTES/SEC
the
disc
CEC
the
disc,
10
minutes
will respond
but
maintains
and
to
track
complete.
with
the
UNIT 0 DESCRIPTION
GENERIC
<FIXED
HP
NUMBER
NUMBER
RECOMMENDED
BLOCK
CONTINUOUS
OPTIMAL
ACCESS
MAXIMUM
FIXED
****0000 0001****
REMOVABLE
****0000 0000****
DEVICE
DISC>
PRODUCT
OF
OF
BE
BUF
TIME
<KBYTES/SEC>
RETRY
(tens
T I
INTERLEAVE
VOLUME
TYPE:
NUMBER
BYTES
BLOCKS
FERED
BURST
(microseconds)
AVE
TIME
of
mi
II
ME
PARAMETER
BYTE
VOLUME
PER
THAT
................................•........•
TRANS
...........•..•.••...••...............••...
isec>
FIELD
0
........................•.....•..•.......
BLOCK
SIZE
FACTOR
<one
BYTE
.........•...........•...........
CAN
..............•.........
................................
RATE
..•......•.....•.•........•...•.•......
..•....•..............•..•.....•.••..
........•..•.•....•..............
bit
per
vol>:
<one
bit
per
vol>:
__
........
7957A
079570 079580
256 256
64
.
.
0
265
900
80
500 500
7958A
64
0
265
900
80
4-9
Page 64
Service
Inf
orma tion
7957A/7958A
4-14.
4-15.
VOLUME 0 DESCRIBE
MAXIMUM
MAX I MUM
MAXIMUM
MAXIMUM
CURRENT I NTERLEAVE
CYLINDER
HEAD
SECTOR
SINGLE-VEC
Self-Test Controls
The disc drive self-test controls include a red/green
on
the
front
use
of
these controls and indicators
Fault/On Line Indicator
The
FAULT/ON
operating status
FAULT
the
for
5 seconds while the CEC PCA-A2 runs Self Test and the Disc Drive
Assembly PCA-A 1 spins
that
the disc drive
between
display will change
will change
has occurred. but that the self-test routines are still accomplishing some
"housekeeping" tasks. When these tasks are complete, the green indicator will
extinguish, indicating that the disc drive
as
to
CEC PCA-A2 has failed self test.
six
diagnostics. The green indicator will flash again when the disc drive attempts
respond
FIELD
ADDRESS
ADDRESS
ADDRESS
ADDRESS
FACTOR
....••••.••..•...........•.......•
.................................•....
....................................
................................
.•.........•.....................
319094
FAULT/ON
panel (see Figure
LINE indicator
of
the disc drive. When line voltage
(red) and ON LINE (green) portions
is
executing its internal self-test routines. Self Test takes
and twelve seconds
to
a solid green.
to
a solid red with a flashing green indicating
to
these commands. A solid red and green display indicates
4-6,
Self-Test Display). Information regarding
is
provided in the following paragraphs.
is
a red/green display which signals the
is
applied
of
the display will illuminate
up.
Next, the green portion will flash during the time
to
complete.
If
If
the disc drive passes self test,
the disc drive fails self test,
is
ready
to
accept host commands such
to
that
the self-test failure
1012 1012
4 7
62 62
510551
LINE indicator
the
the disc drive.
the
the
display
that
the
After a successful self test, a solid green display indicates
idle and a flashing green display indicates
4-16.
Internal Diagnostics
The disc drive internal diagnostics includes self-test routines and run time
and fault reporting circuits. The self-test routines, activated
of
a series
When the disc drive
about 5 seconds while the CEC PCA-A2 tests its memory.
test fails, both LED's will remain on and the disc drive will
on line.
If
green LED flashes,
Disc Drive Assembly PCA-A I
4-10
that
the disc drive
of
subtests which check the overall operation
is
powered on, the red and green LED's will both be
the memory self test passes then the red LED
as
the self-test sequence establishes communications with the
to
attempt seeks and read/write tests.
that
the disc drive
is
active.
at
power on, consist
of
the disc drives.
If
the memory self
not
attempt
is
turned
off
to
and the
If
the
is
error
on
for
come
Page 65
Service
Information
7957A/7958A
I
0_1
h I
FAULT/ON
I
NO
,I
CATOR
LINE
I
I,D
qc::
/ \
/ \
/
RED
INDICATOR
FAULT/
ON
LINE
\
GR
EEN
W79S7A04
RED
ON
OFF
ON
OFF
OFF
GREEN
ON
FLASHING
OFF
ON
FLASHING
Figure
ON
FOR 5 SECONDS
RUNS
SELF
TEST
IF
EITHER
SPIN
EXECUTING
DISC
THE
DISC
HOST
DISC
DISC
4-6.
CONTROLLER
UP
FAILS
SELF
DRIVE
DRIVE
CPU
TO
DRIVE
DRIVE
AT
AND
THEN
TEST
HAS
FAILED
MAY
RUN
DIAGNOSTICS.
IS
IN A READY
IS
ACTIVE
POWER
DISC
BOTH
OR
STILL
ON
MECHANISM
SELF
TEST
LED's
DISC
MECHANISM
BE
STATE
(i
.e.,
WHILE
DRIVE
ACCESSED
PROCESSING A COMMAND)
CONTROLLER
SPINS
OR
MECHANISM
REMAIN
ACTIVE.
SELF
UP.
ON.
TEST
BY
THE
4-11
Page 66
Service Inf
7957
A/7958A
orma
tion
4-17.
Disc Drive PCA-AI
green LED. A misleading
minute until
This
10
and
ready state.
If
green
bit will be set. It
data
test has failed.
Note: Faults which
After
disc drive
of
table
Self Test
is
unable
the
self test times
portion
to
15
the
the
LED
on
these
4-1
of
the
self test, tests
seconds
red
Disc Drive Assembly PCA-AI fails self test
the
power-on
and
two
for
to
complete.
LED
will be
will be
disc drive
off.
is
strongly recommended
or
occur
and
completion
log run time errors
diagnostics tools
a summary
to
front
panel indication will
out
If
off
and
The
disc drive will
issue
commands
during
are
of
supported
spin
up
there
and
fails.
the
Disc Drive PCA-AI
this
portion
the
green
run
time
of
self test, circuits
and
faults
provided in
utilities.
LED
come
that
to
the
do
will be
passes
not
on
the
no
index pulse
occur
for
and
the
disc drive comes
will be
on
the
disc drive
the
on
indicating a drive
the
red
LED
line
and
host
not
if
affect
following paragraphs.
the
monitor
maintenance
to
flash
approximately
normally requires
on
will light
the
diagnostic result
attempt
the
power-on
red
or
the
operation
track. Details
and
to
access
green LED.
Refer
the
line
the
self
of
1
the
to
Self test consists
• Microprocessor Self Test
•
RAM
Self Test
• ROM Checksum Test
• HP-IB
•
Buffer
•
Hardware/Firmware
• Select A Drive
•
Command
• ESDI Status Check
• Reset
•
Check
Interface
Self Test
Attention
for
of
the
IC
Complete
Drive
Ready
following subtests:
Loopback
Initialization
Test
• Request
• Mechanism Self Test
4-12
Configuration
Page 67
Table
4-1.
Supported Utilities
Service
7957A/7958A
Information
CS/80
CS/80
NO
EXECUTION
MESSAGE
(no information
Clear Logs
Preset
SEND
EXECUTION
MESSAGE
Read Fault Log
Read Run Time Error Log
Read Error (ERT) Log
Measure
Read
Locate and Read Full
Servo
Seek Time
Spare Table
Sector
Test
Pattern Error Rate Test (ERT)*
Random
Read
Random Read
Read
Pattern Error Rate Test (ERT)*
Only Error Rate Test (ERT)*
Only Error Rate Test (ERT)*
ROM Revision Number
*These utilities provide both a
EXECUTION MESSAGE
command. Refer
to
paragraph
is
returned
(drive returns information
to
host)
to
host)
NO EXECUTION MESSAGE and a SEND
depending upon the bits set in the "Initiate Utility"
4-30.
4-13
Page 68
Service
Information
7957 A/7958A
• Read Write ECC Test
• Build Spare Ta bles
• Seek With Verify Position
• Copy EEPROM Logs
only)
• Finish HP-IB Interface IC Initialization
These self-test routines are stored in the
can
determine the details
by
using the CS/80 Request Status Command.
4-18. Self-Test Subtests
4·19. Microprocessor Self Test
Note: Hardware forces the LED's
Limitations: This self test
operation
microprocessor's operation.
Process:
registers are loaded with 3CAAH.
values and a mismatch in any register causes the firmware
point where the
that
the CEC PCA-A2 will not
to
Self Test Cylinder (for disc drives with EEPROM
ROM
on
of
self-test failures
at
the Select A Drive Subtest
ON when a power-on reset condition occurs.
is
by no means intended
of
the microprocessor
The
X and D registers are loaded with C355hex (H).
error
was detected.
or
even a sufficient subset
The
The
attempt
registers
to
are
purpose
come
of
on
the CEC PCA-A2.
to
be a
thorough
of
the
The Y and
compared against
to
loop
the
infinite loop
line.
The
test
of
U
the
forever
is
to
host
point
the
loaded
at
the
assure
4·20.
4-14
RAM
Self Test
Fault Reporting:
through the
two
only means
LED's. Both the red and green LED's will remain
of
communicating a failure
The
indefinitely.
Note: Without monitoring the address
from
indistinguishable
Buffer
Self Test failure.
Limitations: This
for
variables. Each byte
Process: A 3-byte pattern
read
to
make certain each byte contains the
with
another
3-byte pattern (FFH, 5AH, 3CH) such
the complement
and
each byte
is
RAM Self Test failure, ROM Checksum Failure,
is
a 2k RAM which the microprocessor uses
is
tested
for
(OOH,
A5H, C3H)
of
the value it received
compared against the value it should contain.
of
the firmware loop this
stuck
at
one
and
is
written
correct
value.
that
on
the first write pass.
stuck
to
the RAM.
The
each byte
to
for
at
the user
on
fault
its stack
zero.
The
RAM
is
The
is
will be
or
a
and
RAM
is
is
rewritten
written with
RAM
is
read
Page 69
Service
If
a failure occurs, the firmware enters an infinite loop. The disc drive
allowed
to
come on line.
Information
7957
A/7958A
is
not
4-21.
ROM
Checksum Test
Fault Reporting: The only means
of
communicating a failure
to
the user
through the two LED's. Both the red and green LED's will remain
indefinitely.
of
Note: Without monitoring the address
indistinguishable from a Microprocessor
or
Failure,
A checksum
Process:
allowed
Fault Reporting: The only means
through the
a Buffer Self Test failure.
is
calculated and compared to the ROM's checksum.
If
a failure occurs, the firmware enters
to
come
on
line.
of
two
LED's. Both the red and green LED's will remain
the firmware loop this fault will be
Self Test Failure, ROM Checksum
an
infinite loop.
communicating a failure
to
the user
indefinitely.
of
Note: Without monitoring the address
indistinguishable from a Microprocessor
or
a Buffer Self Test Failure.
the firmware loop this fault will be
Self Test Failure, RAM Self Test Failure,
on
The
on
is
drive
is
is
not
4-22. HP-IB Interface
IC
Loopback Test
Limitations: Data patterns are written
read back through the Inbound
tagged with EOI
functionality
to
control lines over the HP-IB interface.
of
as
it should
most
of
the interrupts. It cannot verify the ability
FIFO. A check
be.
to
the internal Outbound FIFO and are
is
made
to
This test does not attempt
see
to
that
the last byte
check
of
the
Process: If this test fails the firmware wi11loop indefinitely. The disc drive will
not
come on line.
Fault Reporting: The only means
through the
on
indefinitely.
two
front
panel LED's. Both the read and green LED's will remain
Note: Without monitoring the address
indistinguishable from a Microprocessor
or
Failure,
This test
occurs
a Buffer RAM Self Test Failure.
is
not available through the diagnostics command option
as
part
of
the power-on sequence.
of
communicating a failure
of
the firmware loop this fault will be
Self Test Failure, a RAM Self Test
to
the user
O.
It only
is
circuit
is
4-15
Page 70
Service Information
7957
A/7958A
4·23. Buffer Test
Limitations: These are the
two
buffers
(0
and
1)
which the DMA uses
data transfers between the host and the Disc Drive Assembly PCA-AI.
to
used
messages
Each byte
Process: A 3-byte pattern
is
receive commands from the host and
to
the host.
is
read
tested
to
make certain each byte contains the correct value. The
for
stuck
(OOH,
at
one and stuck
A5H, C3H)
rewritten with another three byte pattern (FFH, 5AH, 3CH) such
is
written with the complement
The
buffer
is
read and each byte
of
the value it received
is
compared against the value it should contain.
If a failure occurs, the firmware enters an infinite loop. The drive
to
come on line.
The self test which
is
done
as
a result
of
does a walking one and a walking zero test on each byte
Fault Reporting: The only means
of
communicating a failure
through the two LED's. Both the red and green LED's will remain
to
return reports and execution
at
zero.
is
written
to
the buffers. The
buffer
that
on
the first write pass.
is
not
an initiate Diagnostic command also
of
the buffer.
to
the user
on
indefinitely.
Note: Without monitoring the address
indistinguishable from a Microprocessor
or
Failure,
a RAM Self Test Failure.
of
the firmware loop this fault will be
Self Test Failure, ROM Checksum
to
buffer
It
is
also
buffer
is
each byte
allowed
is
4·24. Hardware/Software Initialization
Process:
The
HP-IB interface IC
complete
at
power-on values. The spare table
initialized. The seek variables are initialized.
Fault Reporting:
so no faults are detected.
The preceding portion
4·25. Select A Drive
Limitations: This CEC PCA-A2 was designed
Assembly
PCA-AI. Therefore, the Disc Drive Assembly PCA-AI will always be
selected by the firmware.
Process: The ESDI drive select line
Up
to
60 seconds
Disc CEC PCA-A2 IC
is
initialized
is
initialized and placed in a benign state.
to
a harmless state, but its initialization
this point. Certain status and global variables are initialized
is
No
is
allowed
cleared and the
self test
is
associated with this step in the power-on process
of
self test normally takes about
for
Disc Drive Assembly PCA-AI
for
the Disc Drive Assembly PCA-AI
error
rate test table
2-3
seconds
to
support only a single Disc Drive
to
to
assert
is
not
to
their
is
execute.
is
asserted.
The
the
4-16
Page 71
Service
Information
7957 A/7958A
drive selected line in response.
timeout period the mechanism self test will terminate and
attempt
the
Cable (W2).
make DMA transfers
to
come
on
line. The disc drive
"drive not selected" condition may be the result
If
this
is
the case the READ CLOCK
to
Fault Reporting: In this case both LED's are
drive comes on line and reports self-test fault #69 in P7
result bit will be set.
PI
(Disc Drive Assembly PCA-AI).
two
(2)
FRA. a
indicates the CEC PCA-A2. The ribbon cables between
If
the drive selected line
is
the host impossible.
contains the code
P2
contains the code
is
not
the
not
allowed
on
solid. In
to
come
of
a disconnected ESDI
to
the
DDC
the
and
for
the first suspect FRA.
for
the
asserted within
disc drive will
on
IC which would
second case,
P3.
The
second suspect
PCA-A2 and the Disc Drive Assembly PCA-AI are also suspect but
number exists
Note: Disc Drive Assembly PCA-AI must be de-selected
the initialization.
"Can't Select Drive" diagnostic fault
and initialization
Once the power-on sequence completes Select A Drive
come on line and report the nature
CS/80 status bytes
self-test failures are
contrary, it
Drive Assembly PCA-AI
set during the power
for
this component.
If
the disc drive fails
is
skipped and the disc drive comes
PI,
P2, P3, P7, P8, and
less
critical
is
strongly advisable
after
on
self test, any operation initiated by
to
respond with "drive selected"
is
generated.
of
subsequent self-test failures using
P9.
This does
or
that
the
disc drive
for
the host
not
to
any self-test failure.
and
re-selected as
The
remainder
on
line
to
report
the
disc drive will always
not
mean
is
operable. On
issue commands
If
the diagnostic result bit
the
host
unpredictable results.
line because
the
diagnostic
It
will be 1
the
no
FRA
then
of
the
self test
the fault.
the
that
subsequent
the
to
the
can
have
the
not
Data
disc
CEC
part
the
Disc
of
is
4-26. Command Complete
The only reason
nature
At
of
the self-test failure
this point in the power-on process the red LED will be turned
LED will blink
that
the disc drive
if
an index pulse
is
allowed
to
the operator.
is
available
to
come
on
line
from
the Disc Drive Assembly
is
to
off.
report
PC A-A I.
Process: The CEC PCA-A2 will wait up
to
Assembly PCA-AI
complete line
The
remainder
comes
Fault
and
suspect
code
on
Reporting: The disc drive comes
P3.
for
is
of
line
to
The diagnostic result bit will be set.
FRA. A one
the second suspect FRA. A
assert the ESDI command complete line.
not asserted within the timeout period a fault will be generated.
the self test and initialization
report
the
fault.
(1) indicates Disc
to
60 seconds
on
line and reports self-test
PI
contains
Drive
Assembly PCA-A
two
(2) indicates CEC PCA-A2.
for
is
skipped and the disc drive
the
the
Disc Drive
If
code
1.
the
fault
for
P2
contains
command
the
The
cables between the CEC PCA-A2 and the Disc Drive Assembly PCA-AI
no
FRA
suspect but
number exists
for
this component.
the
The
green
#70 in P7
first
the
ribbon
are
also
4-17
Page 72
Service
7957
4-27. ESDI Status Check
Information
A/7958A
Note:
At
this
operations
unpredictable
pass
configuration
Process:
over
An
ESDI
The
word.
PCA-AI
set,
the
a
fault
of
the
l6-bit
without
This
the
ESDI serial
request
Disc
Drive
If
the
the
vendor
is
generated,
vendor
word
with
point
it
the
disc drive.
results will
having
is
status
vendor
is
done
was
not
the
first
status
Assembly
is
unique
and
unique
compressed
is
strongly
occur.
executed.
time
communication
command
successfully received
unique
status
the
status
advisable
If
For
anything.
that
PCA-AI
status
is
requested
fault
are
returned
into
the
the
host
example, diagnostics
This
the
CEC
line.
is
sent
should
bit
is
number,
ESDI
for
the
attempts
result
comes
PCA-A2
More
to
the
respond
from
checked.
from
the
ESDI
to
the
status
host
than
Disc
with
the
If
the
Disc
status
host.
word.
not
to
to
run
utilities
may
from
the
attempts
one
type
Drive
Assembly
a 16-bit
Disc
Drive
vendor
Drive
and
least
Information
attempt
return a status
to
of
unique
Assembly
any
or
diagnostics,
fact
that
send a
general
Assembly
significant
command
fault
PCA-A
status
from
can
status
PCA-A),
the
further
of
arise.
l.
bit
byte
is
If
the
vendor
bits
are
checked.
ESDI
status
will be
Compressed
Note: Bit 6
Note:
communication
the
bits listed a
Fault
P3.
The
(P2)
is
confidence
is
expected
Retry
commands
Reporting:
first
suspect
set
to
zero
that
unique
If
any
returned
ESDI
fails
bove
If
which
no
status
of
these bits
status
6
to
be
are
transparent
but a retry
should
the
vendor
(PI)
is
implies
second
suspect
available bit
to
the
are
host.
is
set, a
bits:
=
SMS-spindle
7
= PON-power-on
start
be
5
4 =
3 =
2
=
1
o =
set
be set.
the
Disc
spindle
requ
ired
CDP-
command
IF-interface
IC-invalid
SF-seek
WG-write
1-write
during a fault
to
the
is
successful,
unique
that
status
Drive
the
guilty
is
necessary.
not
set
then
fault
motor
conditions
motor
data
fault
or
fault
gate
fault
condition.
self-test
the
self
bit
is
Assembly
party
several
is
generated.
of
The
stopped
exist/
command
parity
unimplemented
with
set,
track
procedure.
test will pass
fault
#76
PCA-AI.
is
known
The
with
will be
the
other
fault
may
fault
command
offset
If
the
and
second
sufficient
status
and
fault
ESDI
none
placed
suspect
of
in
4-18
Page 73
Service
Information
7957 A/7958A
4·28. Reset Attention
P7
fault
compressed
P8
pg =
If
PCA-A I
P1
least
one
of
Disc
=
zero
P2
fault
P3
=
fault
P7
=
compressed
P8
=
pg
Process:
PCA-AI. This command deasserts the attention line and clears
occurs if an ESDI communication timeout occurs and the retries are exhausted
or
Fault Reporting: The disc drive comes on line and reports self-test
P3.
FRA. A
the second suspect FRA. A
between the CEC
but no FRA number exists
least
=
if the attention line
The diagnostic result bit will be set.
76
ESDI
significant
the ESDI status bits
is
in an unexpected state then:
Drive
Assembly
statues
byte
is
set indicating
PCA-A1
of
vendor
that
unique
the Disc Drive Assembly
71
71
status
ESDI
of
significant
The
ESDI reset attention command
is
one
(1) indicates Disc Drive Assembly PCA-AI. P2 contains
PCA-A2 and the Disc Drive Assembly PCA-AI are also suspect
byte
still asserted
two
(2)
for
this component.
vendor
after
PI
contains the code
indicates CEC PCA-A2.
unique
is
sent
to
the Disc Drive Assembly
the reset attention command
status
status
the
status. A
fault
for
the first suspect
The
ribbon cables
the
fault
is
sent.
#75 in
code
for
P7 will contain either fault #75
number describing the ESDI communication problem
P8
Note: At this point it
operations with the disc drive.
unpredictable results will occur. For example, diagnostics may return a status
pass without having done anything. This result comes
configuration was not executed.
4·29. Check for Drive Ready
Process: The firmware will read the ESDI drive ready line.
asserted a fault
Fault Reporting: The disc drive comes on line and reports self-test
and
suspect FRA. A one
code
cables between the CEC
suspect but no FRA number exists
if
the attention line was not reset
if
that
and P9 will contain the status associated with the fault number stored in
is
strongly advisable
If
the host attempts
is
generated.
P7.
The diagnostic result bit will be set. PI contains the
(1) indicates Disc Drive Assembly PCA-AI.
for
the second suspect FRA. A
PCA-A2 and the Disc Drive Assembly PCA-AI are also
for
for
the host not
two
(2)
indicates CEC PCA-A2.
this component.
to
run utilities
from
to
or a fault
condition occurred.
attempt
the
fact
If
drive ready
code
or
diagnostics,
that
fault
for
the
P2
contains
The
any
further
#72 in P3
first
ribbon
is
P7.
of
not
the
4-19
Page 74
Service
Information
7957 A/7958A
P8
respectively.
Note:
operations with the disc drive.
unpredictable results will occur.
pass
configuration was not executed.
4-30. Request Configuration
and
P9 will contain the compressed ESDI status
At
this point it
without
having done anything. This result comes
is
strongly advisable
If
the
For
host attempts
example, diagnostics may
for
and
the host
to
vendor unique status
not
to
attempt
run utilities
return
from
the
or
fact
any
diagnostics,
a status
that
further
of
Process:
and
information which
checked, but
step in
Note:
sector command. This
internal jumpers.
The
ESDI request configuration
feature
characteristics
the
is
assumed
the
initialization process
The
configuration process issues a set number
The
of
the Disc Drive Assembly PCA-AI.
Disc Drive Assembly PCA-A I returns
to
be correct.
are
ESDI
command
overrides the 63 sector
Disc Drive Assembly PCA-AI
command
The
only faults which can result
communication
bytes per sector which results in 64 sectors per track.
Fault
Reporting:
P3.
The
diagnostic result bit will be set. P I contains the
FRA. A
one
the second suspect FRA. A
P7
will contain
P8
and
P9 will contain the status associated with the
Note: At this point it
operations with the disc drive.
unpredictable results will occur.
pass
without
configuration was
The
disc drive comes
(I)
indicates Disc Drive Assembly PC A-A
two
the
fault
number describing the ESDI
is
strongly advisable
If
on
line
and
reports self-test
(2) indicates CEC PCA-A2.
for
the
host
the
host
attempts
For
example, diagnostics may
having done anything. This result comes
not
executed.
is
used
to
determine
is
faults.
of
unformatted
configuration
is
now
configured
code
for
1.
P2 contains
communication
fault
number
not
to
attempt
to
run
utilities
return
from
the
The
not
bounds
bytes
set by
fault
the
first suspect
the
problem.
stored in P7.
any
or
diagnostics,
a status
fact
that
capacity
from
this
per
for
325
#73 in
code
further
for
of
4-31. Disc Drive Assembly PCA-A 1 Self Test
Limitations:
exhaustive
minimal read, write
PCA-AI self test
1)
seeks
2)
Read, Write
3)
Build Spare Tables
4)
seeks
4-20
The
Disc Drive Assembly PCA-AI self test
or
to
verify
without
on
all heads with position verify
the
product
and
seek capabilities exist. Process:
is
broken
down
position verify
and
ECC tests
specifications.
into
four
major
after
is
It
does
The
subtests.
each seek
not
intended
attempt
to
to
determine
be
Disc Drive Assembly
if
Page 75
4·32. Seek Test Without Position Verify
Service
Information
7957
A/7958A
Process: Logical seeks
0,
logical
reports
to
Fault
P1
P2
P3
P7
P8
P9
4·33. Read Write ECC Test
Limitations: A
without
some inconsistency in
Process:
finding a sector
This
for
1,
2,
4, 8
...
max
-4,
max logical
a seek
read a header
Reporting:
1
2
77
=
fault
fault
(Disc
(CEC
Disc
#
status
status
an
error
There
sector
the
is
second
then
are
logical,
-8 . ..
or
ESDI
to
verify
Drive
PCA-A2)
Drive
associated
associated
sector
are
yet still
two
which
assumed
phase
may
the
phases
can
which
performed
0,
max logical,
O.
Faults
communication
that
a seek
Assembly
Assembly
with
with
be
found
contain
ECC
a slight media defect..
test results.
to
the
be
written
to
be
free
is
the
ECC
with
head
max
occur
if
problems
actually
PCA-A1)
PCA-A1
fault
fault
which
Read/Write
and
read
of
major
portion
#
#
can
0 selected.
logical -
the
Disc
occurred.
in
P7
in
P7
be
read
ECC
10
times
media
of
the
test
self
The
target
1,
max
logical -2,
Drive
Assembly
arise.
No
attempt
fai
led
and
written
The
defect
test..
The
first
without a data
defects
test.
and
tracks
PCA-A
is
10 times
could
consists
error.
so
it
is
are
max
1
made
cause
of
used
The
test begins
cylinder
tried
an
indicated
detected
testing stops.
When a sector
test
sector.
correctable
corrected
corrected.
failure
The
the
self-test cylinder.
Each
against
ECC
data
the
which
in
an
attempt
error.
If
five sectors
that
during
is
performed.
The
sector
error
data
The
results in
tests
outlined
00
self-test
time a sector
that
which
is
flagged as a
is
read
into
integrity
of
the
is
is
final
with
a physical seek
is
at
physical
to
find
Read/Write
the
read/write
found
This consists
is
read
is
written
checked
step
fault
#68.
in
the
cylinder
is
read
was written.
fault
various locations in
the
buffer
cylinder
one
are
tried
that
can
of
and
an
and
to
make
is
to
rewrite
preceding
and
again
as
part
#66.
Fault
RAM
retry
test
Any
to
the
outside-diameter
O.
Starting
which
it
can
unsuccessfully self-test
count
it
will be reported. As
be
read
and
writing
uncorrectable
must
certain
of
addressing
an
be
the
sector
two
paragraphs
for
each
the
read/write
mismatch
#66
is
the
buffer
that
on
be
read
and
was exhausted.
written
uncorrectable
error
read
back
the
errors
with
are
head
on
which
a self-test
space
and
the
head
written
fault
without
must
as a
no
error.
repeated
the
inside
test
the
was
data
in
an
DMA.
(00)
self-test
0,
up
to 5 sectors
10 times
#67
is
If
any
other
soon
as a
an
error
data
error
be
detected.
correctable
were
accurately
An
ECC
for
diameter
data
is
compared
not
detected
compare
attempt
without
generated
fault
fault
occurs
the
on
the
A
error.
test
each
head
(ID)
by
error.
The
to
guarantee
are
to
is
ECC
The
at
the
4-21
Page 76
Service
7957 A/7958A
4-34. Build Spare Tables
Information
Fault
Reporting:
66
self-test
67
self-test
68
ECC
test
The
errors would be reported in P3
For
Faults
For
Fault
Since
the
spare table
power
byte indicates
entered in
built (due
However,
reported.
on. A seek
The
data
read/write
failed
66 and
67:
that
the
table
to
data errors
if
an
attempt
three
is
is
done
there
for
compare
68:
not
the
or
is
most likely faults
error
retry
P1
P2
P1
P2
stored
on
each head
is
a spare
head being accessed.
faults)
made
to
count
and
P7.
2
(CEC
= a
(no
= 1
(Disc
= 2
(CEC
on
a maintenance track, it must be built
and
track
in use,
then
no
access a spared
to
be generated are:
exhausted
PCA-A2)
second
Drive
suspect)
Assembly PCA-A1)
PCA-A2)
the
sector
then
spares will be in
If
the
the
out
header
header
spare table
track, a
is
read.
cylinder value
cannot
the
spare table.
Unit
Fault
If
at
the
flag
be
will be
is
4-35. Copy EEPROM Logs to Self Test Cylinder (for drives with EEPROM only)
Process: This
debug aid
maximum logical sector
self-test cylinder.
when
Faults
self-test cylinder
4-36. Finish HP-IB Interface
Process:
initialization
The
4-37.
Request Status
If
execution message returns a QSTAT
occurred. A Request
reason
executed, a 20-byte field
I nstrllctiol1 Sct
executed
Error
the
can
IC
Initialization
interrupts are enabled.
an
Initiate Diagnostic
Field (sometimes
procedure
for
manufacturing.
It
Disc Drive Assembly PCA-AI
be generated during
but
No
self-test faults can be generated by this step.
is
completed.
for
the
previous QST
Programming
and
it fails,
will
not
generate a self-test fault.
The
entire 512 byte EEPROM
-1
and
maximum logical sector
is
hoped
the
Status
the
that
one
of
these
is
returned
the
process
diagnostic result bit should
The
green light
command
command
AT
is
returned. This field
(DIAG)
of
1.
M anllal,
Diagnostic Result Bit (bit 24) will be set in
referred
to
as
of
is
is
of
1,
this means
(REQSTAT)
When
part
no. 5955-3442.
the
Error
redundant
to
the
copying
not
turned
issued
the
on
to
that
should
Request Status
is
defined
Fault
Field)
It
is
intended
is
copied
of
each
head
copies will be readable
factory.
the
EEPROM
be set.
The
HP-IB
solid (blink
the
disc drive
a self-test
be
issued
command
in
the
CS
When
of
self test
the
as a
to
on
the
to
the
Interface
is
set
to
and
an
error
to
obtain
/80
is
the
Fault
20 bytes
00
IC
off).
has
the
is
4-22
Page 77
Service
Information
7957A/795SA
returned
and
•
• P2
•
• P7 - Failed disc drive
•
from
PS
contain specific self-test results, as detailed below:
PI
- Identifies the most suspect FRA:
I
= PCAI (Disc Drive Assembly
2 = PCA2 (CEC PCA-A2)
- Identifies
Same code
P3
- Failed disc drive (unit
Refer
Refer
PS
- Details
Refer
4-38. Request Status Example
The following example shows how
for
a Request Status command following a self-test failure.
the Request Status command. When bit
AI)
the
next most suspect FRA:
as
PI
0)
self-test subtest.
to
table
4-2
error
condition.
to
table
4-2
of
failed disc drive
to
table
4-2
error
to
interpret
condition.
PI,
P2, P3, P7
24
is
set,
and
PI,
P2, P3, P7,
P8 returned
4-39.
Utilities
PI
= I
P2 = 2
P3 = 4E (hex)
P7 = 4E
PS
= 0000 0100
PI
indicates
P2
indicates
[CEC)).
in table
code 4E and
Note:
on
the cause
that
the most suspect FRA
that
the next most suspect
P3
indicates
4-2
as "One
PS
P7 may contain a fault code other than 4E
of
that
the failed self-test subtest
of
the 4 seek diagnostic tests failed". P7 contains
contains the ESDI status with bit 2 set indicating a seek fault.
the failure
is
available.
is
PCA-AI (Disc Drive Assembly
FRA
is
PCA-A2 (CSSO/ESDI Controller
is
4E (hex) which
if
more detailed
[HDA).
is
defined
the
fault
information
NOTE
The OFFSET and REPORT bytes are don't care bytes
Utilities are firmware routines which perform
access fault logs and access the spare table. The utilities may be initiated through
CS/SO
the
through which they are invoked. Table
This product does not support utilities which receive execution messages.
command "Initiate Utility".
The
4-1
error
utilities are classified by
includes all the supported utilities.
for
these products.
rate tests, access
error
the
logs,
method
4-23
Page 78
Service
7957 A/7958A
Information
The
format
for
the "Initiate Utility"
command
is:
4-40.
<INITIATES Utility> <Micro Code> <up
Initiate utility
Where XX: 00 = no execution message
Run
Time and Fault Logs (Media Based)
The
Run Time (RT) Error Log and Fault Log contain data
fault information, respectively.
stored in
capacity
Time
Error
FIFO fashion.
errors which
During a run time operation, marginal and nonrecoverable data errors are
immediately logged
able
to
respond
is
being stored in the Run Time
release
extracts the run time
it
to
the host.
to
= 001100XX
01
10
four
contiguous sectors
for
recording
Log has a capacity
The
ERT
occur
to
commands
store the
to
8 parameter bytes>
= not supported on 7957 A/7958A
= device will send execution message text
The
Run
Time
Error
Log
and
on
46
faults and are written over in a FIFO fashion.
log
is
during
error
error
to
the Run Time
information.
error
information
physical cylinder
for
recording
RAM based
rate testing.
Error
for
a period
Error
Log.
The
from
50
and
contains
Log.
of
100
The
Read
the maintenance track
O.
The
faults and
The
ms
disc drive does
Run
are
information
CEC PCA-A2 will
while the
Time
error
information
Fault Log
Fault Log has a
written over in a
on
data
not
error
information
not
request
Error
Log utility
and
are
The
Run
be
returns
and
4-41.
Faults which
few exceptions (see fault ranges), stored in
CEC PCA-A2 will not respond
logged. Release
entry. (An occurrence
extracts the fault information
Error codes are listed in table
ease
of
by the fault.
Run
Time and Fault Logs (EEPROM Based)
The
Run
fault information, respectively.
stored in an EEPROM
total number
contains information
occur
use.
Each group
Time (RT)
of
during utilities/diagnostics and
is
not requested
count
Error
entries
on
run
time activities are, with a
the
maintenance track Fault Log.
to
commands
to
log a fault. Each
of
faults
is
from
the Fault Log
4-2.
Codes are divided in functional groups
of
faults identifies which parameter byte(s)
Log and Fault Log contain data
The
Run
on
the CEC PCA-A2.
for
both logs
data errors which
to
not
Time
50.
for
stored.)
Error
The
The
occur
100
ms
fault
The
and
size
ERT
during
while a
Read Fault Log utility
returns it
Log
of
the EEPROM limits
log
error
fault
is
being
creates a unique log
to
the
host.
for
is
affected
error
information
and
Fault Log
is
RAM
rate testing.
based
are
and
The
and
the
4-24
Page 79
NOTE
Service
Information
7957 A/7958A
4-42. EEPROM
Maintenance tracks are
During a run time operation, marginal
immediately logged
able
to
respond
is
being stored in the
to
release
extracts the run time
host.
Faults which
few exceptions (see fault ranges), stored in the
PCA-A2 will
Release
(An occurrence
extracts the fault information
Error
ease
by the fault.
The
overwritten once the
fault/error
There will be a total
are interspersed in
value.
store the
occur
not
is
not
codes are listed in table
of
use.
Each group
EEPROM
information
to
the
to
commands
Run
error
error
during utilities/diagnostics
respond
requested
count
of
is
used as a circular
buffer
of
the
EEPROM. They are distinguishable by
not
used
to
store fault
and
nonrecoverable data errors
Run
Time
Error
Log.
for
a period
Time
Error
information.
information
to
commands
to
log a fault. Each
faults
is
not
from
4-2.
Codes are divided in functional groups
of
faults identifies which parameter byte(s)
buffer
is
full. Since the process
is
anticipated, a
50 entries in the EEPROM. Faults and
Log.
The
from
for
stored.)
the
Fault Log
fault
of
The
Read
100
where
or
error
information.
The
CEC PCA-A2 will
100
ms
while the
disc drive does
Run
Time
the
EEPROM and returns it
and
run time activities are,
EEPROM Fault Log.
ms
while a
fault
creates a unique log entry.
The
Read Fault Log utility
and
returns it
the
oldest
of
overwriting old
is
not
generated
error
not
Error
fault
information
when
run
the
are
not
information
request
Log utility
with
The
CEC
is
being logged.
to
the
host.
is
affected
is
it occurs.
time
errors
fault
code
to
for
be
the
a
ERROR 20H
FAULT 1 ...
Note: A fault may be generated when reading
log. A location in the EEPROM
If
this pointer does
fault
is
generated. This fault
automatically be cleared in an
are three causes
(1)
The
CEC PCA-A2 was shipped
initializing the pointer.
The
(2)
(3)
The
CEC PCA-A2 lost power while updating the pointer.
A hardware problem exists which renders
EEPROM structure
0-2 = Pointer
Bytes
Bytes 2-7 = Number
Bytes 8-507
...
3FH
lFH, 40H
not
for
this fault condition:
...
contain a legal EEPROM address a
is
attempt
is
as follows:
of
sectors read
= Log entries
FFH
is
reserved as a pointer
reported
from
to
the host and the
to
restore the logs
the
from
or
writing
for
to
factory
the
without
EEPROM unusable.
to
the
EEPROM
the
circular buffer.
'corrupted
EEPROM
a usable state.
first
EEPROM'
logs will
There
4-25
Page 80
Service
7957
A/7958A
Inf
orma tion
Run
time
data
errors
take
the
following
format
in
the
EEPROM:
Current
Current
Current
Current
Logical
Fault
Error
physical
physical
logical
logical
sector
Code
Byte
Occurrence
Faults
Note:
execution message
Refer
Faults are distinguished
the range
except 0 which
take
Current
Current
Target
Target
Status
Status
Run
to
the
following
logical
logical
logical
logical
Logical
Fault
sector
Code
byte
byte
time errors and faults take
of
a read fault log
paragraphs 4-53 and 4-54.
20H through 3FH. Fault
is
reserved.
cylinder
head
cylinder
head
(most
recent
Count
format
cylinder
head
cylinder
head
from
data errors by the
bytes
2
1
byte
bytes
2
byte
1
byte
1
error)
in
the
on
a slightly
or
read run time log utility command.
code
numbers may have
different
fault
byte
1
1
byte
1
byte
EEPROM:
2
bytes
1
byte
2
bytes
1
byte
1
byte
1
byte
1
byte
1
byte
code
number. Errors
any
format
other
in
the
number
are
in
4-43. Fault Status Bytes
The
depends
(OOH
appropriate contents
codes).
1-1FH
20-3FH
40-4FH
50-5FH
60-6FH
70-8FH
90-AFH
BO-DFH
EO-FFH
contents
...
of
the
two
status bytes which are associated with a
on
Fault code
FFH) has been divided into subranges
Faults
Faults
Data
Status1
Status1
of
for
not
not
errors
=
Status
=
that
entry.
the status bytes (refer
logged
logged
NO
on
in
fault
compressed
2 =
0,
Status2
Status1 = compressed
Status1
Status1
Status2
=
Disc
Status2
=
compressed
=
vendor
Controller
=
Disc
Status2 = vendor
Status1
Status1
=
0,
Status2
=
compressed
Status2 = vendor
The
range
maintenance
EEPROM
log
entry
ESDI
status,
vendor
unique
= 0
ESDI
status,
unique
IC
Controller
ESDI
status,
unique
= 0
ESDI
status,
unique
of
all possible
for
the purpose
to
table
Status
4-2
track
status
status
IC
status
status
for
reg,
error
Fault
Fault
codes
of
defining
a listing
reg
entry
of
error
4-26
Page 81
Compressed ESDI status:
bit
0
write
bit
1
write
bit
2 =
seek
bit
3 =
invalid
bit
4 =
interface
bit
5 =
command
bit
6 = power on
bit
7
spindle
Disc Controller IC Status Register:
fault
gate
fault
or
data
motor
with
unimplemented
fault
conditions
track
parity
stopped
offset
fault
exist
command
Service
Information
7957
A/7958A
bit
bit
bit
bit
bit
bit
bit
bit
Disc Controller IC
bit
bit
bit
bit
bit
bit
bit
bit
Vendor Unique status:
Only
the
sa
ved. This
header
0
next
1
header
=
2
=
local
3
=
remote
4
=
local
5
correction
=
6
=
error
7
Error
header
0
data
1
sector
=
2
=
sector
3
= no
4
= FIFO
5
correction
6
late
7
least significant byte
inf
orma
fault
disc
match
request
command
command
detected
Register:
failed
field
not
overrun
data
data
interlock
tion
command
cycle
error
found
sync
lost
fai
is
not
completed
busy
busy
active
although
led
of
the
first
a vaila ble
word
to
sector
of
the
field.
matched
vendor
unique status
is
4-44. Physical Address Reporting
Faults will normally be
4-53.
the
current
systems
cylinder address.
4-45.
Run
Time Sectors Read Count (Media and EEPROM Based)
The
run
sectors read per head
log execution message.
reported
If
the seek preceding the
current
CEC PCA-A2 maintains
time
logical cylinder and target logical cylinder will be replaced by a
physical cylinder
are
informed
(Le.,
not
utility
and
of
the switch by setting
or
is
returned
with
a logical address as
occurrence
a target physical cylinder.
an
estimate
diagnostic) commands.
to
the
of
of
the
host in
the
the
number
the
is
shown
fault
was a physical seek
The
most significant bit
of
sectors
An
estimate
header
of
in
exercisers
read
of
the
the
read
paragraph
then
and
test
of
the
during
number
run
time
4-27
of
Page 82
Service
7957
A/7958A
Information
The
'estimate'
an individual head basis as
time sectors read
number
individual head.
The
count
count
is
EEPROM) when a run time marginal/unrecoverable
utility
command
based
count
RAM based
is
given
to
the
is
count
is
a total
of
heads,
is
only moved
to
give an estimate
also compromised by the
to
a more permanent location (maintenance
is
added
count
PRESET
occurs.
is
to
the EEPROM based count, an inaccuracy equal
count
for
several reasons.
the case
issued. Therefore,
for
the
for
all heads, which
of
the number
fact
that
ERT
it
if
power
The
count
is
sectors read count.
is
divided by
of
sectors read by
is
initially kept in RAM.
data
error
is
lost
the
track
occurs
before
not
The
total
or
the
an
or
to
kept
run
The
the
RAM
the
on
Note: Reading the run time
total
of
the
RAM
4-46. Error Rate Test (ERT) Log
The
RAM
based
50
locations.
The
log
is
allocated in the following way:
sectors
sectors
sectors
=
4
7
for
for
*N
*N
entry:physical
physical
physical
logical
logical
logical
error
occurrence
based
ERT
HP
7957A
HP
7958A
cylinder
head
sector
byte
error
log also updates
count
and
the EEPROM count.
table will store data
read
head
read
read
(total
(total
head
head
0
1
N*
bytes
bytes = 40
cylinder
head
sector
count
error
5
5
5
-----------
80
=
2
bytes
1
byte
1
byte
2
bytes
1
byte
1
byte
1
byte
1
byte
the
information
bytes
bytes
bytes
bytes
bytes)
25
bytes)
(equal
EEPROM
on
logical
count
a maximum
with
sector)
the
of
4-28
50
entries
10
===> 500
bytes
bytes
Page 83
Service Information
7957
A/7958A
If the error rate tests are initiated via CS/80 using the 'send execution message'
option, errors are reported immediately
log.
ERT
to
the host and are not logged
to
the
Both 'send execution' and 'no execution' ERT utilities keep a
successfully read
through the read ER T log command.
4-47. Error Byte Description
The error byte
the location
error
bits
5-7
bits
1-4
by
individual heads. The sectors read
is
used
by
error
of
a data error and its severity
byte
bit
bit
bit
bit
bit
bit
format:
7
byte
6
error
5
error
4 =
unrecoverable
(all
ECC
3
=
retry
2
=
sync
retries
marginal
(more
bit
bit
describe
describe
recoverable
1
FIFO
0
=
the
the
data
location
severity
count
of
count
is
read by the host
rate test utilities and by the run time log
to
the host.
(no
in
in
header
data
data
field
data
field
sync
error
or
sector
overrun)
exhausted)
data
error
marginal
than 1 retry
on
lost
data
the
or
error
required)
first
track
retry
offset
invoked
the sectors
to
report
Bit 0
of
the error byte serves two functions.
(1)
If
bit 0 and bit 1 are set simultaneously, a FIFO data loss has occurred during
is
a write operation. This
recover.
drive performance. None
(2)
The second function
bit
successfully read data. The error location and severity are accurate.
Note: The recoverable bit (bit
used
track center. The
that
ERT's are run in send execution message mode.
(Confusion can occur when error bytes are
entry.)
If
a data error occurs more than once
cylinder, physical head, and logical sector)
give a cumulative report, and the occurrence
It
is
reported because a high frequency
4.
This implies that the head had
for
data recovery. This
two
there
should
be
a condition
of
the location bits will be set.
is
reported when bit 0
1)
will not be set when bit 0 signifies track
is
definitions
no
confusion
from
which the write firmware
of
occurrence can
is
set along with bit
to
be moved
because the first retry
for
bit 0 are reported in a unique way so
as
to
which
"ORed" together in
at
the same location
on
the disc, the
count
off
track center
is
meaning
is
incremented.
always
to
assign
(i.e.,
error
can
affect
2,
bit
3,
to
offset
performed
to
bit 0 if
an
ERT
log
same physical
byte
is
'OR'ed
or
on
to
4-29
Page 84
Service
7957
A/7958A
Information
4-48.
4-49. Clear Logs
4-50. Preset
CS/80 No Execution Message Utilities
MICRO
OPCODE
PARAMETERS
Clearing the
entries.
MICRO
ERT
OPCODE
PARAMETERS
This
command
based sectors read
EEPROM.
The
adds
RAM
OCDH
o =
(205)
clear
log and
1 =
clear
2
clear
data
log clears all
OCEH
(206)
none
the
RAM
count
and
based
count
all
logs
(run
time/Fault
ERT
log)
ERT
log
only
EEPROM
logs
(fault,
error)
ERT
entries. Clearing
based run time sectors read
stores the total
is
cleared.
on
the
maintenance
the
run
time
fault
logs clears all log
count
to
the
track
EEPROM
or
in
the
4-51. Faults/Errors
If
this utility
read
count
During
Error Rate Testing
Faults:
is
saved. QSTAT
continue
to
zero.
fault
A
is
allowed
continue
loop
count
Errors:
continue
If
no
errors have
(containing a zero) tagged with
of
the
is
used before scheduled system shutdowns, a
will be maintained.
If a fault
the test by sending the
is
generated during
to
the
If
a data
at
test.
is
is
read
the
error
set
to
zero.
error
the next block. QST AT will be
occurred
encountered, the
set
and
the status will indicate
error
ERT
log, send the clear
rate test by sending
occurs, it will be logged in the
since
ERT
ERT
command
rate testing
the
the
last restart
EOI will be
is
ERT
returned
halted
"pass"
and
the
sequence with
if
the
ERT
ERT
log
command
if
only
of
the
more
the
state
fault.
ERT
to
The
log overflows.
command
sequence with
log
data
test,
then
the
host
accurate
of
the
machine
host may
the
loop
count
The
and
then
the
and
the
test will
errors occur.
one
byte
upon
completion
sectors
set
host
4-30
Page 85
Service
Information
7957 A/7958A
4-52.
4·53. Read Fault
CS/80 Send Message Utilities
Log
MICRO
OPCODE
PARAMETERS
The utility searches through the maintenance track
faults which have occurred. These faults are returned
chronological order.
Note: Performing an error rate test does
is
specifically cleared before beginning a test, the faults which are returned may
have occurred during previolls tests
OC7H
none
(199)
not
clear the fault log. so unless the log
or
run time activities.
or
the EEPROM
to
the host in
for
any
Format:
header:
byte
50)
(Max.
#
of
number
entries
of
entries:
entry:
Current
Current
Logical
logical
logical
sector
cylinder
head
2
1
1
bytes
byte
byte
4·54. Read
Run
Time
Target
Target
Logical
Fault
logical
logical
sector
code
Status
Status
Refer
to
paragraph 4-43
to
Refer
faults.
Error
MICRO
PARAMETERS
The utility searches through the maintenance track
any data errors. The number
report on the location
Note: Since an entry contains an occurrence count, the total number
paragraph 4-44
Log
OPCODE
OC5H
head
of
may exceed the number
cy 1 inder
head
for
a description
for
a description
2
1
1
of
the contents
of
physical address reporting
(197)
#
(1
byte)
of
data error entries
these errors are returned
of
entries.
bytes
byte
byte
byte
byte
byte
or
on
to
of
the status bytes.
the EEPROM looking
the selected head and a
the host.
for
of
for
errors
4-31
Page 86
Service
7957
A/7958A
Information
header:
#
of
entries
estimate
not
used
#
of
entries
on
sectors
= 0
on
the
read
the
selected
by
this
selected
head
head
head
1
5
2
1
byte
bytes
bytes
byte
entry:
The
error
occurred
error
bit
bit
bit
bit
bit
bit
bit
bit
(selected
Current
Current
not
Current
Current
Logical
'Error
occurrence
byte gives
and
the
byte
format:
7
6 =
5 =
4
=
3
2
1
=
0
=
head
only)
physical
physical
used
= 0
logical
logical
sector
byte'
count
information
severity
byte
error
error
of
sync
in
in
the
(no
header
data
unrecoverable
11
marginal
(more
retries
marginal
than 1 retry
(a
ECC
retry
recoverable
FIFO
data
lost
cylinder
head
cylinder
head
about
the
error
(i.e.,
data
sync
field
field
data
error
exhausted)
data
error
data
requ
on
the
first
or
track
bytes
2
byte
1
byte
1
bytes
2
byte
1
byte
1
byte
1
byte
1
location
recoverable, nonrecoverable).
or
in
the
sector
sector
where
overrun)
error
ired)
retry
offset
invoked
the
error
4-55. Read Error (ERT)
4-32
Log
MICRO
OPCODE
PARAMETERS
This utility returns
to
the
host. Only those
to
the
host.
format:
header:
#
of
#
of
not
#
of
OC6H
(198)
head # (1
the
data
error
data
entries
sectors
used
= 0
entries
information
errors
on
the
read
on
the
byte)
which
selected
by
this
selected
stored
occurred
head
in
on
head
head
the
the
RAM
based
specified
1
byte
5
bytes
2
bytes
1
byte
head
ERT
are
log
sent
Page 87
Service Information
7957 A/7958A
entry:
(selected
current
current
current
current
current
current
'Error
occurrence
The error byte gives information about the location in the sector where the
occurred and the severity
error
bit
bit
bit
bit
bit
bit
bit
bit
byte
7 =
6 =
5 =
4 =
3
2
1
0
format:
=
=
=
=
head
only)
phys
phys
phys
cyl
head
sector
(logical
log
cyl
log
head
log
sector
,
byte
count
of
the error
Byte
sync
error
error
in
in
(no
header
data
unrecoverable
(all
retries
ECC
marginal
retry
(more
marginal
than 1 retry
recoverable
FIFO
data
lost
sector)
(i.e.,
data
sync
field
field
data
error
exhausted)
data
error
data
on
the
first
or
track
bytes
2
byte
1
byte
1
bytes
2
byte
1
byte
1
byte
1
byte
1
recoverable, nonrecoverable).
or
sector
overrun)
error
required)
retry
offset
invoked
error
4-56. Measure Seek
4-57. Read Spare Table
Time
If
a data error occurs more than once
cylinder, physical head, and logical sector)
give a cumulative report, and the occurrence
MICRO
PARAMETERS
OPCODE
OF7H
physical
(247)
physical
This utility measures the time required
by
physical track specified
is
which
status,
MICRO
the seek time in milliseconds. If the seek fails, the fault will be logged in
QSTAT will equal
OPCODE
OC4H
PARAMETERS
The spare table
is
table
done by going
Reading the spare table only reports spared tracks. Sector spares are
reported.
not
is
the only accessible table in this controller. Since the spare
stored
on
to
the spare track area and seeing which have been allocated.
the input parameters. The
1,
and the time returned will be zero.
(196)
Table
maintenance tracks, it must be built
= 1
cyl
head
(spare
at
the same location
on
the disc, the
count
is
(2
bytes)
(1
byte)
to
seek
from
table)
(i.e.,
same physical
error
byte
incremented.
the present location
output
consists
on
power up. This
is
'OR'ed
of
not
to
the
2 bytes
is
to
4-33
Page 88
Service
7957 A/7958A
Information
HEADER
Head
#
#
#
of
of
of
#
field
spare
logical
track
tracks
spared
spares
used
tracks
1
2
1
1
byte
bytes
byte
byte
(MSB
ENTRY
Cylinder
Cy 1 inder
Scalar
The
'head
drive.
The
'#
have been allocated during field sparing operations.
The
'#
have been al10cated by factory and field sparing operations.
The
'#
been determined
tracks will be equal
High
low
#
#'
is
the head address. There will be
of
field track spares'
of
spare tracks used'
of
logical spared tracks'
to
be defective and were spared.
to
the number
is
the
number
is
the total number
is
the number
of
entries.
of
byte
byte
byte
one
header
spare tracks
of
spare tracks on this head
of
tracks
The
on
on
number
first)
for
each head in
this head which
this head which have
of
logical spared
the
that
4-58. Locate
4-59. Servo Test
And
Read
The
'scalar
the defective track was spared.
tracks per surface, and the second spare track was used by this entry, then
scalar # would be
Full
Sector
MICRO
PARAMETERS
The
utility will read a physical sector and return the 256 data bytes
sector and the 6 ECC bytes. The total execution message will be 262 bytes long.
Faults
reported.
Headers are
MICRO
PARAMETERS
#'
OPCODE
will
show
not
OPCODE
indicates which
1.
OCOH
(192)
physical
physical
physical
(logical
up
in
the
status,
read
by
the read full sector command.
OBFH
Loop
count
of
the spare tracks on a surface were used when
For
example,
cylinder
head
sector
if
there are 6 (0 through
(2
bytes)
(1
byte)
(1
byte)
sector)
but
data
errors
are
neither
detected
(191)
5)
from
nor
spare
the
that
This utility will perform seeks
n,
n-1. n-2,
repeated once
4-34
n-4,
n-8, n-16, n-32,
for
each head.
to
the following tracks:
... 0 (n
= max log track). This sequence
0,
I,
2,
4,
8,
16,
32,
of
...
seeks
n,
0,
is
Page 89
Service
Information
7957
A/7958A
A seek failure
of
the execution message. A seek error will only be reflected in the first byte
the execution message. A seek error results
the head
Servo test can be canceled
The test will halt and return the execution message as soon
occurs.
execution
byte
or
a timeout will be reflected in the status
is
not on target track.
message:
1: 0 =
1 =
pass
seek
(timeout,
2 =
seek
(target
byte
4-60. Pattern Error Rate Test (ERT) (Log Option)
MICRO
PARAMETERS
2,
3:
OPCODE
Number
OC8H
LOOP
OFFSET
REPORT
TEST
PATTERN
or
cleared
failure
header
error
versus
of
seeks
(200)
(0-255)
(XXXXXXXX)
(XXXXXXXX)
AREA
SELECT
if
the header
for
early termination.
QSTAT
QSTAT
read
QSTAT
actual
completed
implies
255
SECTOR
0 =
TRACK
1 =
CYLINDER
2 =
SURFACE
3 =
VOLUME
4
change
0 =
each
=
1
39CE7H
=
C30H
2
=
30E61CC3987H
3
4
B8F32E3CCH
=
5
CCH
DB6H
6
=
=
33F94CFE5H
7
=
random
8
as
is
0
1
failed)
0
different)
in
the
infinite
(the
pattern
loop
data
well
as
the first byte
of
readable, and it shows
as
the first failure
last
loop.
loop
whole
disc)
with
No l\1essage Option: This utility stores the addresses
Log.
Send Message Option: This utility will report data errors
after
The sector
The first loop
by the complementary command 'Set Address'.
middle
address
they occur. The errors are not stored
count
is
updated
of
the test begins
of
the test area, the first pass will consist
to
the end
of
the test area. The first read operation will also be
for
each head.
at
the target address which should be determined
in
the ERT log.
If
the target address
of
writing from the target
of
data errors in the
to
the host immediately
is
in the
ERT
from
the
4-35
Page 90
Service
7957 A/7958A
Information
target
address
thereafter
Each
loop
to
255,
the
is
sent
from
to
will be
consists
test will
the
host.
the
end
from
of
continue
of
the
start
writing
the
test area.
of
and
reading
indefinitely until a
the
The
test area
the
second
to
the
test area.
CANCEL
loop
end
If
and
of
the
the
loop
or
CLEAR
each
test area.
count
loop
is
command
set
If a fault
If a
data
(no
entry:
error
bit
bit
bit
bit
bit
bit
bit
bit
occurs,
error
header
current
current
current
current
current
current
error
byte
7
6
5
4 =
3
2
1
0
the
test will halt;
occurs,
the
execution message has
is
sent)
phys
phys
logical
logical
logical
logical
byte
loop
count
format:
byte
sync
error
error
in
in
header
data
unrecoverable
(all
retries
ECC
marginal
retry
(more
marginal
than 1 retry
recoverable
FIFO
data
QSTAT
cyl
head
when
(no
data
field
data
exhausted)
data
on
lost
sector
cyl
head
sector
error
sync
field
error
error
data
required)
the
first
or
track
is
set; status will indicate
the
following
bytes
2
byte
1
byte
1
bytes
2
byte
1
byte
1
byte
1
occurred
or
1
sector
byte
error
retry
offset
invoked
the
format:
overrun)
fault.
The
state
of
the
test
is
saved
error/fault,
with
the
At
the
with
EOI will be sent
4-61. Random Pattern Error Rate Test (Log Option)
MICRO
PARAMETERS
the
loop
count
end
of
OPCODE
test
the
test (loop
may
be
set
to
to
the
OCBH
LOOP
OFFSET
REPORT
PATTERN
4-36
when
an
continued
zero.
count
exhausted),
host.
(203)
(0-255)
(XXXXXXXX)
(XXXXXXXX)
SELECT
error
or
fault
occurs.
by re-sending
255
0 =
1 =
2 =
the
one
byte
implies
change
each
39CE7H
C30H
loop
3 = 30E61CC3987H
After
reporting
ERT
command
(containing a zero) tagged
infinite
pattern
loop
with
the
sequence
Page 91
The
Random
with the exception
generating a random starting address
length between I sector and 64 sectors.
is
allowed
the randomly generated transfer length would go beyond the disc boundaries
length
The
Refer
4·62. Read Only Error Rate Test (Log Option)
is
sector
to
Pattern ERT functions exactly like the
that
to
read and write anywhere in the logical data space
truncated
count
paragraph 4-59
to
is
updated
B8F32E3CCH
4
5 = CCH
6 = DB6H
=
33F94CFE5H
7
8 = random
the test area
fit within the disc volume.
for
for
details
is
randomly generated. This
and
It
each head.
on
execution message.
then generating a
is
assumed
Service
data
nonrandom
random
that
random
Information
7957 A/7958A
Pattern
is
done
transfer
error
rate
of
the
disc.
ERT
by
test
If
the
MICRO
OPCODE
PARAMETERS
OC9H
LOOP
OFFSET
REPORT
TEST
No message option: This utility will store
Log and
Send message option: This utility will report data errors
they occur.
The
log.
data written previous
The
by the complementary
middle
address
the test area.
fault
descriptions.
sector
first loop
count
is
updated
As
the name implies, this test does
of
the test begins
of
the test area, the first pass will consist
to
the end
of
(201)
(0-255)
(XXXXXXXX)
(XXXXXXXX)
AREA
for
each head
not
to
calling this utility will
at
the target address which should be determined
command
the
test area. Each loop
'Set Address'.
implies
255
SECTOR
0
TRACK
1 =
CYLINDER
2 =
SURFACE
3 =
4 =
VOLUME
the
addresses
and
write data
is
available by reading
not
be destroyed.
If
the target address
of
reading
thereafter
infinite
(the
whole
of
data errors in
to
the host as soon as
on
the
disc.
from
the
will begin
loop
disc)
the
ERT
the
ERT
Therefore,
is
in
the
target
at
the
start
of
If
If
a fault occurs, the test will halt; QSTAT
a data
error
occurs, the execution message has
is
set; status will indicate
the
following format:
the
fault.
4-37
Page 92
Service
7957
A/7958A
Information
error
(no
entry:
byte
bit
bit
bit
bit
bit
bit
bit
bit
header
current
current
current
(current
current
current
c~rrent
error
loop
format:
7 =
byte
6 =
error
5
error
=
unrecoverable
4
(a
11
ECC
3
=
retry
2
(more
recoverable
1
FIFO
0
is
sent)
phys
phys
phys
logical
logical
logical
logical
byte
count
sync
in
in
when
(no
header
data
retries
marginal
marginal
than 1 retry
on
data
lost
cyl
head
sector
sector)
cyl
head
sector
error
data
sync
field
field
data
error
exhausted)
data
error
data
error
requ
the
first
or
track
occurred
or
sector
ired)
retry
offset
2
bytes
byte
byte
(equals
2
bytes
byte
byte
byte
byte
overrun)
invoked
0)
The state
error/fault,
with the loop
At
with
4-63. Random Read Only Error Rate Test (Log Option)
MICRO
PARAMETERS
This routine functions like the Read Only
that
random starting address and then generating a
and 64 sectors.
address and the end
the volume boundary.
Refer
4-64. Read Revision Numbers
of
the test
the test may be continued by re-sending the
count
the end
of
the test (loop
EOI will be sent
OPCODE
the TEST AREA
If
to
paragraph 4-62
is
saved when an
set
to
zero.
count
to
the host.
OCCH
(204)
LOOP
is
generated randomly. This
the random length exceeds the length between the starting
of
the disc volume, the length will be
for
details
exhausted),
(0-255)
on
error
or
fault occurs.
ERT
one
byte (containing a zero) tagged
255
implies
Error
Rate test.
random
the execution message.
infinite
is
done by generating a
length between I sector
truncated
After
command
The
one
reporting
sequence
loop
exception
to
stop
the
is
at
MICRO
OPCODE : OC3H
PARAMETERS
4-38
(195)
: none
Page 93
Service
Information
7957
A/7958A
4-65.
This utility will read the firmware ROM revision numbers
execution message.
that
will follow.
byte
#
o
number
(equals 1 since
revision
The
format
contain the main revision number, and
contain a secondary revision number.
Troubleshooting
When troubleshooting the disc drive, the first thing
fault
is
repeatable
self-test fail result
intermittent fault,
always cause a self-test failure.
In the case
percent certainty. In the event
cause
self-test display.
of
of
the failure, replace the FRA's
and
return
The
first byte specifies the number
of
bytes
#
for
for
the
or
intermittent. A repeatable
to
be presented each time self test
on
the
a repeatable fault, self test will identify the failing
to
follow
there
ROM
revision byte
other
hand, occurs
that
more
is
is
for
than
one
only
the
for
fault
at
random intervals,
one
at
a time, in the
of
revision
one
ROM)
most significant nibble
the
least significant nibble
to
do
is
to
determine
usually causes
is
performed. An
FRA
is
lsi
ted as
order
them
number
the
and
may
FRA
with
the
possible
given in
bytes
to
if
same
not
the
in
to
the
a 95
an
NOTE
Cable faults (an open cable conductor, loose cable connector, etc.)
FRA
may present a multiple
at
be the FRA's
therefore
Cables W I and W3 are sufficiently long
drive assembly
disc drive cabinet. This allows a substitute PCA-A I
into the circuit without removing PCA-AI
Attempt
following the replacement
to
either end
be checked before replacing any FRA's.
AI)
to
be connected into the circuit
isolate the fault
failure message.
of
the defective cable. All cabling should
to
a specific
of
each FRA.
The
FRA's listed will
to
allow PCA-AI (disc
adjacent
to
be
from
the cabinet.
FRA
by running self test
to
the
connected
4-39
Page 94
Service Information
7957 A/7958A
Table
4-2.
Error Codes
(1
of
6)
Miscellaneous errors. These errors are caused by externally initiated operations. These errors
cause a fault log entry
Oct
010
020
050
070
100
110
120
130
140
200
210
Dec
01
02
05
07
08
09
10
I 1
12
16
17
to
Hex
01
02
05
07
08
09
OA
OB
OC
10
11
be
generated. Only error
Description
End Of Volume
Channel Parity Error
Illegal Opcode
Add
ress
Bounds
Parameter Bounds
Illegal Parameter
Message Sequence
EEPROM diagnostic failed. (EEPROM only)
Message Length
No spares available on this head.
Media wear - one
lC-IFH
or
will
affect
P7.
fewer spare tracks left on this head
after
sparing operation.
220
270
300
18
23
24
12
17
18
Power on initialization.
FIFO Data Loss on Read successful retries.
FIFO Data Loss on Write successful retries.
NOTE
THE FOLLO\VING ERRORS WILL AFFECT
P7:
do
not
this
360
370
Data
30
31
errors (media related data bit errors). A run log entry will be generated. In the Request Status
parameter bytes,
400
410
32
33
IE
IF
P7
will contain the
20
21
Corrupted EEPROM
No
acknowledge
error
code.
or
log.
R/W
Data field - marginal data
Data field - marginal data
(EEPROM only)
retries exhausted. (EEPROM only)
error
- on a read operation.
error
- correction operation was used
recover the data.
420
430
34
35
22
23
Data field - uncorrectable data
error
on
read.
Marginal Header Failed Although Sector Matched
error
operation.
440
36
24
Unrecoverable Header Failed Although Sector l'vlatched
read operation.
450
460
470
500
510
520
570
630
37
38
39
40
41
42
47
51
25
26
27
28
29
2A
2F
33
Marginal Sector Not Found error on a read operation.
Unrecoverable Sector
Marginal No Data Sync
Unrecoverable
No
Marginal Sector Overrun
Unrecoverable Sector Overrun
Unrecoverable data
Marginal Header Failed Although Sector Matched
Not
Found
error
error
on a read operation.
on
a read operation.
Data Sync error on a read operation.
error
on a read operation.
error
on
a read operation.
error
on write operation (header
error
operation.
640
52
34
Unrecoverable Header Failed Although Sector Matched
write operation.
on
error
not
readable).
on
error
to
a read
on
a
a write
on
a
4-40
Page 95
Service
Information
7957 A/7958A
the
Dec
53
54
55
57
58
fault
69
70
71
72
73
75
76
77
78
code,
Oct
650
660
670
700 56
710
720
Self test errors. A
contain
of
Vendor Unique Status.
1010 65
1020 66
1030 67
1040 68
1050
1060
1070
1100
1110
1130
1140
1150
1160
Table 4-2.
Hex
35
36
37
38
39
3A
fault
log entry will be generated. In the Request Status
P8
41
42
43 Self test
44
45
46
47 Illegal ESDI status during
48
49
4B
4C Vendor unique status available.
4D
4E One
Description
Marginal Sector
Unrecoverable Sector
Marginal
Unrecoverable
Marginal Sector
Unrecoverable Sector
will contain
the
Buffer
Self test data
ECC test failed.
Drive selected line
Timeout
on.
Drive Ready
on.
Auto
configuration failed; probably ESDI
(no configuration parameters checked).
Reset
attention
Mechanism self test has failed.
of
verify failed twice).
Error
Codes
Not
Found
Not
No
Data Sync
No
Overrun
ESDI status, P9 will
RAM
test failed.
compare
R/W
retry
30
seconds waiting
not
failed during
the
four
error
Data Sync
error
Overrun
failed.
count
not
asserted during
asserted
seek diagnostic tests failed (ATN, ESDI comm,
(2
Found
exhausted.
power
after
of
6)
error
on
a write operation.
error
on
on
a write operation.
error
on
a write operation.
on
a write operation.
error
on
contain
for
power
the
Command
on.
Command
on.
a write operation.
a write operation.
parameter
least significent byte (LSByte)
power
Complete during
Complete during
communication
bytes, P7 will
on.
power
power
problem
Controller Faults. A
contain
1220
1230
1240
1250
the!
fault
code.
82
83
84
85
COMPRESSED
o =
WI~
i
te
fau
write
1 =
seek
2 =
invalid/unimplemented
3
interface
4
command
5 =
PON
6 =
spindle
7 =
gate
fault
conditions
fault
log
entry
52
53
54
55
ESDI STATUS
1 t
with
track
fault
data
parity
exist/start
motor
stopped
will be generated. In
FIFO data loss retry
FIFO Data Loss Retry
Offset recovery position unknown.
Seek recovery position unknown.
offset
command
fault
fault
on
the
Request Status
a read
on
operation
a write
fault
spindle
motor
command
failed.
operation
may
parameter
failed.
be
required
bytes, P7 will
4-41
Page 96
Service
Information
7957 A/7958A
Table
4-2.
Error
Codes
(3
of
6)
Controller faults with Disc
fault
log entry will include the Disc Data Controller (DOC) IC status. In the Request Status
bytes, P7 will contain the fault code,
and
P9 will contain the Disc Data Controller (DOC) IC
Oct
Dec
1400 96 60
Hex
Data
Controller (DDC) IC status. A fault log entry will be generated
P8
will contain the Disc Data Controller (DDC) IC Status register,
Error
register.
Description
Disc Data Controller (DDC) IC timed
out
when trying
sector headers (0-63).
Error
1410
1420
97
98
61
62
detected during read full sector.
Disc Data Controller (DOC) IC indicates a fatal
operation.
1430
99
63
Disc Data Controller
(DOC) IC indicates a fatal fault
operation.
1440
1450
100
101
64
65
Retries exhausted during
Retries exhausted during verify initialize.
Format
Track.
No
on track.
1460
1470
102
103
66
67
Retries exhausted during Read Header.
This should
Wait For INT
not
directly cause a bit in status
or
ATN
(a
low level routine)
to
to
and get the right information stored away.
1500
1510
1520
1530
1540
104
105
106
107
108
68
Disc Data Controller (DOC) IC timeout when trying -to-read any
header
for
sparing.
69 Disc Data Controller (DOC) IC timeout when
track
to
deallocate
it.
6A Disc Data Controller (DOC) IC timeout while
to
flag a sector defective.
68
6C Retries exhausted during
Disc Data Controller (DOC) IC timeout while
is
track before the data
written.
format
track; last problem was Disc
Controller (DOC) IC timeout.
1550
109
60
Retries exhausted during Read Header operation; last problem was
Disc Data Controller (DOC) IC timeout.
1560
110
6E Retries exhausted when verifying initialize; last problem was Disc
Data Controller (DOC) IC timeout.
and
parameter
to
read
fault
on
a read
on
a write
header was readable
be set. It
call Save drive
formatting
is
used by
info
a spare
formatting a track
formatting
the spare
Data
the
fault
\,"ith
Disc
Data
Unit
Controller (DDC) IC status. A fault log entry will be generated
log entry will include the Disc Data Controller (DOC) IC status. In the Request Status parameter bytes,
P7 will contain the fault code,
the Disc Data Controller (DOC)
1610
1620
1630
1640
2010
2020
113
114
115
116
129
130
71
72
73
74
81
82
P8
IC
4-42
and
will contain the Disc Data Controller (DOC) IC status, P9 will
error
register.
Error
Detected (ED) bit set in Disc Data Controller (DOC) IC
during read
Failed due
defect
to
formatting a track
Failed due
to
formatting the spare track
Failed due
to
formatting a spare track
FIFO data loss occurred
list.
Disc Data Controller (DOC) IC
to
flag a sector defective.
Disc Data Controller (DOC) IC
for
track sparing.
error
error
an Disc Data Controller (DDC) IC
to
deallocate
on
a read operation.
it.
while
while
error
while
FIFO data loss occurred on a write operation.
the
fault
contain
Page 97
Table
4-2.
Error Codes
(4
of
Service Information
7957A/7958A
6)
Oct
2030
Dec
131
Hex
83
Description
Header failed although sector number matched
if
head
error
bit
not
set in Disc Data Controller (DDC) IC status
register). (EEPROM only)
2040
2050
2060
2070
2080
Unit
132
133
134
135
136
fault
with Compressed
84
85
86
87
88
the compressed ESDI status.
Data field error occurred. (EEPROM only)
No data sync, Sector overrun, Sector not found. (EEPROM only)
Correction failed error erroneously set.
Late interlock error erroneously set.
Illegal DDC status detected
ESDI
status. A log entry will be generated and the fault entry will include
In
the Request Status parameter bytes,
in
contain the compressed ESDI status, P9 will contain the LSByte
2210
2220
2230
2240
2250
2260
145
146
147
148
149
150
91
92
93
94
95
96
ESDI status indicates a fatal fault on a read operation.
ESDI
status indicates a fatal fault on a write operation.
Retry
of
Write Fault (Off track on write) was unsuccessful.
Retry
of
Write with Offset (aggressive seek
Drive set attention during read headers (verify position).
Local write expected an
off
ESDI error instead.
2270
2300
2310
2320
151
152
153
154
97
98
99
9A
A TN set during read full sector.
ATN set during read defect list.
ESDI command utility failed.
Retries exhausted during
format
formatted.
2330
155
9B
Retries exhausted during verify initalize.
track.
2340
2350
156
157
9C Retries exhausted during read headers operation.
9D Used
by
directly
low level routine (wait
affect
status. Used when calling save-drive-information
save the right information.
2360
2370
2400
2410
158
159
160
161
9E Logs unreadable due
to
unrecoverables
9F Logs unreadable due to no valid copies.
AO
Al
Failed due to ATN being set
to
flag a sector defective.
Failed due
to
ATN being set by the drive while formatting the
spare track before the data
2420
2430
2470
2500
2510
2520
2530
162
163
167
168
169
170
171
A2
A3
A7
A8
A9
AA
AB
Failed due
for
sparing.
Failed due
to
deallocate a spare.
HDA did
ATN set
to A TN
to
too
to
many times during a write (write fault).
being set by the drive while reading any header
ATN being set by the drive while formatting a track
many internal recalibrations in a utility.
A fatal fault was detected (probably on a seek).
Local read saw ATN set (fatal so no retries).
A check
of
the HDA saw it was deasserted.
error
(missed seek
utilities.
P7
will contain the fault code,
of
Vendor Unique Status.
on
write) failed.
P8
track write error but received another
track. Track probably did
No
header readable
for
INT
or
ATN). Should
not
not
on
get
a
to
on
all copies.
by
the drive while formatting a track
is
written on
it.
will
4-43
Page 98
Service
Information
7957 A/7958A
Table 4-2.
Error
Codes
(5
of
6)
Unit Faults. A log
Request Status
Oct
Dec
2600 176
2610
177 Bl Physical seek timeout.
2620 178
entry
parameter
Hex
BO
B2
will be generated
bytes, P7 will
contain
Description
Logical seek timeout.
Defective
and
track
the
the
deallocation).
2630 179
2640 180
2650
2660
181
182
B3
B4
B5
B6
When
not
seeking back
logical cylinder
Headers bad when flagging a sector defective.
Defective sector header
Headers
on
spare track bad
logical headers).
2700 184
2710 185
B8
B9
Cannot
Header
read any headers
unrecoverable during write
only)
2720 186 BA
Header
failed although sector
seek retried successfully -
2730 187
BB
Header
failed although sector matched
seek retried successfully -
2740 188
2760
2770
190
191
BC
BE
BF
Reseek in local
No
Disc
Data
def
ect
list.
No
Disc
Data
sector.
3000
192
3010 193
3030
3050
195
197
3060 198
CO
CI
C3
C5
C6
ER T log
Cannot
Verify position failed
header
The
correction
Bad parity
overflow
read disc logs during
did
not
Disc
Data
cycle.
on
3070 199 C7 All headers bad
3100 200
3110
201
3120 202
C8
C9
CA
3130 203 CB Disc
3140 204
3150
205
CC
CD
Headers unreadable during verify position (servo test).
Header
Hardware
fault.
does
not
fault
(EEPROM only)
Data
Controller
Unrecoverable
Two
spare tracks in a
(includes section spares).
3200 208
DO
Transfer
acknowledged set timed
was set (took longer
3210 209
01
Transfer
acknowledged reset timed
was reset (took longer
3220 210
02
Command
timed
specified time
3230
3250
211
213
03
05
Command
exceeded
retried
the
retry count).
Request ESDI status
extra byte in
fault
code. P8
the
fault
through
entry
will be zero. In
PI0
will be zeroes.
reached when doing a logical seek (field spare
to
defective
or
head.
not
for
operation
Controller
Controller
(DDC) IC
(DOC) IC
after
match
as expected.
Controller (DOC) IC timed
EEPROM
data
on a track
match
other
logical
than
(DOC) IC
data
error
row
than
than
out
(Command
after
the
command
out
(number
command
track
to
flag it defective,
found
after
when
sector sparing.
they tested good (when writing
sparing. (EEPROM only)
of
data
for
sparing.
but
matched
retry
of
without
read
not
successful.
without
but
retry
of
write
not
failed.
power
interrupt
interrupt
up.
while reading
while reading full
initialize media - cylinder
out
during
read. (EEPROM only)
during
Disc
format
target
Data
option
address (seek diagnostic).
Controller
communication
occurred.
were bad
10
milliseconds).
10
when
out
after
out
after
milliseconds).
Complete
sparing
transfer
transfer
was
not
was sent).
of
times a
command
failed.
(EEPROM
Header
Header
Fault
Fault
successful.
and
an
2.
(DOC) IC
time
out.
attempted
request
request
asserted a
was retried
the
header
the
head
ECC
is
-
-
in
4-44
Page 99
Table
4-2.
Error Codes
(6
of
Service Information
7957A/7958A
6)
Oct
3260
3270
3300
3340
3350
3360
3370
fault
Unit
Compressed
3400
3410
3420
3430
3440
3450
3460
3560
3570
3600
3610
3630
3640
3650
3660
3670
3700
Dec
214
215
216
220
221
222
223
that
ESDI status. No bits will be set in the Request Status bytes.
224
225
226
227
228
229 E5
230
238
239
240
241
243 F3 The Reserved Interrupt Vector was taken.
244 F4 The
245 F5 The
246 F6 The
247 F7
248
Hex
D6
D7
D8
DC
DD
DE
DF
is
logged only. A log entry will be generated and the fault log entry will contain the
EO
El
E2
E3
E4
E6
EE Retries required during
EF Retries required during Read Headers. Recovery was successful.
FO
Fl
F8
3710 249 F9
3720
3730
250
251
FA
FB
Description
Reset Attention command failed.
HDA timed
while controller waited
for
out
before sending a command.
auto
Timeout on
Command Complete signal
recalibrate during a read
drop
Command Complete signal drop
Command Complete signal
drop
Command Complete signal drop
out
out
out
out
or
on
a read operation.
on read retry.
on
write.
on
a write retry.
ESDI attention line set.
ESDI command retried.
Bad parity detected
Header failed although sector matched
a Header Fault Header failed although sector matched
of
Retry
Retry
a Write Fault (Off track) successful.
of
a Write with Offset (Aggressive seek
Seek error header does
Timed
Controller
out
waiting
(DOC) IC reset.
on
read data.
on
read operation without
Seek retried OK - Read retried OK.
for
Format
not
for
operation complete INT during Disc Data
Track.
match target (servo test).
SWI3 Interrupt Vector was taken.
SWI2 Interrupt Vector was taken.
SWIl Interrupt Vector was taken.
The
NMI Interrupt Vector was taken.
Seek missed target track during a read retry.
Seek missed target track during a write retry.
Write fault during write in utilities (retried).
auto
HDA
recal detetected in utilities.
command complete
write.
write operation.
on
write) successful.
4-45
Page 100
Loading...