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1
2
3
4
5
6
7
8
T2.2
A A
AC/BATT CONNECTOR
PAGE: 26
AMD Athlon/Duron
Socket A
CPU VR
Page : 28
CLOCKS
(ICS94225)
Page : 6
FANs
Page : 25
BATT CHARGER
PAGE: 26
Page : 2, 3
Port
Replicator
DC/DC
PAGE: 27,29
B B
DDR-SODIMM 1
Page : 10
DDR-SODIMM 2
Page : 10
IDE1 - HDD
Page :18
IDE2 CD-ROM
Page : 18
C C
Audio AMP
TPA0312
Page : 17
MDC CONN
Page :14
266MHZ DDR
ATA 66/100
ATA 66/100
AC97
Page:4,5,6,7
FIR
Page : 24
S2K-2X100/133MHZ
ATI
Mobliit y U 1
596 BGA
ALI
M1535+
352 BGA
Page : 8,9
Parallel
Page : 19
LVDS
33MHZ, 3. 3 V PCI
USB 1.1
ISA BUS
TI-BQ325LF
LCD CONN
Page : 12
CRT
Page : 19
TV
Page : 12
2 USB Ports
Page : 25
RTC
Page : 17
CARDBUS
OZ6912
AD21 , INTF , REQ1
CardBus Conn
OZ6933
Page : 13
Page : 13
1.CRT
2.LPT
3.RS232
4.TV-OUT
5.AUDIOs
6.USBs
7.LAN
8.PS2
MINI-PCI
Wireless LAN
Modem/LAN
AD20 , INTC,D , REQ0
Page : 22
Page : 22
LAN
NS83816
AD29 , INTB , REQ2
Page : 21
RJ45
Page : 18
1394
TSB43AB21
AD23 , INTC , REQ3
Page : 20
1394CONN
Page : 20
Audio Con
Page : 17
AMC97
Page : 15
FDD
Page : 8
Serial Port
Page : 19
KBC(87570)
X-Bus
Page : 23
DAA
D D
1
Page : 16
RJ11
Page : 18
2
PS/2-Touchpad
Page :19 Page :23Page : 23
3
4
Flash
Keyboard
5
Size Document Number Rev
B
Schematic Block Digram
6
Date: Sheet
7
PROJECT : KT3 I
Quanta Computer Inc.
DAKT3IMB6B9
129Wednesday, March 19, 2003
of
8
3D
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5
5
AA35
W37
W35
AA33
AE37
AC33
AC37
AA37
AC35
W33
AN33
AE35
AL31
AJ21
AL23
AN23
AJ31
Y35
U35
U33
S37
S33
Y37
S35
Q37
Q35
N37
J33
G33
G37
E37
G35
Q33
N33
L33
N35
L37
J37
A37
E35
E31
E29
A27
A25
E21
C23
C27
A23
A35
C35
C33
C31
A29
C29
E23
C25
E17
E13
E11
C15
E9
A13
C9
A9
C21
A21
E19
C19
C17
A11
A17
A15
J35
E27
E15
C37
A33
C11
U37
Y33
L35
E33
E25
A31
C13
A19
W1
W3
Y1
Y3
Y5
S7
U7
U10A
SDATA0#
SDATA1#
SDATA2#
SDATA3#
SDATA4#
SDATA5#
SDATA6#
SDATA7#
SDATA8#
SDATA9#
SDATA10#
SDATA11#
SDATA12#
SDATA13#
SDATA14#
SDATA15#
SDATA16#
SDATA17#
SDATA18#
SDATA19#
SDATA20#
SDATA21#
SDATA22#
SDATA23#
SDATA24#
SDATA25#
SDATA26#
SDATA27#
SDATA28#
SDATA29#
SDATA30#
SDATA31#
SDATA32#
SDATA33#
SDATA34#
SDATA35#
SDATA36#
SDATA37#
SDATA38#
SDATA39#
SDATA40#
SDATA41#
SDATA42#
SDATA43#
SDATA44#
SDATA45#
SDATA46#
SDATA47#
SDATA48#
SDATA49#
SDATA50#
SDATA51#
SDATA52#
SDATA53#
SDATA54#
SDATA55#
SDATA56#
SDATA57#
SDATA58#
SDATA59#
SDATA60#
SDATA61#
SDATA62#
SDATA63#
SDATAINCLK0#
SDATAINCLK1#
SDATAINCLK2#
SDATAINCLK3#
SDATAINVAL#
SDATAOUTCLK0#
SDATAOUTCLK1#
SDATAOUTCLK2#
SDATAOUTCLK3#
SDATAOUTVAL#
SCHECK0#
SCHECK1#
SCHECK2#
SCHECK3#
SCHECK4#
SCHECK5#
SCHECK6#
SCHECK7#
CLKFWDRST
CONNECT
PROCRDY
SFILLVAL#
FID0
FID1
FID2
FID3
NC
THERMDA
THERMDC
FOX-PPGA-462-R
SADDIN0#
SADDIN1#
SADDIN2#
SADDIN3#
SADDIN4#
SADDIN5#
SADDIN6#
SADDIN7#
SADDIN8#
SADDIN9#
SADDIN10#
SADDIN11#
SADDIN12#
SADDIN13#
SADDIN14#
SADDINCLK#
SADDOUT0#
SADDOUT1#
SADDOUT2#
SADDOUT3#
SADDOUT4#
SADDOUT5#
SADDOUT6#
SADDOUT7#
SADDOUT8#
SADDOUT9#
SADDOUT10#
SADDOUT11#
SADDOUT12#
SADDOUT13#
SADDOUT14#
SADDOUTCLK#
IGNNE#
STPCLK#
RESET#
PWROK
COREFB+
COREFB-
CLKIN#
RSTCLK
RSTCLK#
K7CLKOUT
K7CLKOUT#
DBRDY
DBREQ#
FLUSH#
PICCLK
PICD0#
PICD1#
PLLTEST#
PLLBYPASS#
PLLMON1
PLLMON2
PLLBYPASSCLK
PLLBYPASSCLK#
SCANCLK2
SCANCLK1
SCANINTEVAL
SCANSHIFTEN
ANALOG
SYSVREFMODE
VREF_SYS
-HD0[4]
-HD1[4]
-HD2[4]
-HD3[4]
-HD4[4]
-HD5[4]
-HD6[4]
-HD7[4]
-HD8[4]
D D
C C
B B
A A
-HD9[4]
-HD10[4]
-HD11[4]
-HD12[4]
-HD13[4]
-HD14[4]
-HD15[4]
-HD16[4]
-HD17[4]
-HD18[4]
-HD19[4]
-HD20[4]
-HD21[4]
-HD22[4]
-HD23[4]
-HD24[4]
-HD25[4]
-HD26[4]
-HD27[4]
-HD28[4]
-HD29[4]
-HD30[4]
-HD31[4]
-HD32[4]
-HD33[4]
-HD34[4]
-HD35[4]
-HD36[4]
-HD37[4]
-HD38[4]
-HD39[4]
-HD40[4]
-HD41[4]
-HD42[4]
-HD43[4]
-HD44[4]
-HD45[4]
-HD46[4]
-HD47[4]
-HD48[4]
-HD49[4]
-HD50[4]
-HD51[4]
-HD52[4]
-HD53[4]
-HD54[4]
-HD55[4]
-HD56[4]
-HD57[4]
-HD58[4]
-HD59[4]
-HD60[4]
-HD61[4]
-HD62[4]
-HD63[4]
-HDICLK-0[4]
-HDICLK-1[4]
-HDICLK-2[4]
-HDICLK-3[4]
-HDINVAL[4]
-HDOCLK0[4]
-HDOCLK1[4]
-HDOCLK2[4]
-HDOCLK3[4]
CLKFWRST[4]
CONNECT[4]
PROCRDY[4]
FID0[3]
FID1[3]
FID2[3]
FID3[3]
THERMDA[25]
THERMDC[25]
-HD0
-HD1
-HD2
-HD3
-HD4
-HD5
-HD6
-HD7
-HD8
-HD9
-HD10
-HD11
-HD12
-HD13
-HD14
-HD15
-HD16
-HD17
-HD18
-HD19
-HD20
-HD21
-HD22
-HD23
-HD24
-HD25
-HD26
-HD27
-HD28
-HD29
-HD30
-HD31
-HD32
-HD33
-HD34
-HD35
-HD36
-HD37
-HD38
-HD39
-HD40
-HD41
-HD42
-HD43
-HD44
-HD45
-HD46
-HD47
-HD48
-HD49
-HD50
-HD51
-HD52
-HD53
-HD54
-HD55
-HD56
-HD57
-HD58
-HD59
-HD60
-HD61
-HD62
-HD63
-HDICLK-0
-HDICLK-1
-HDICLK-2
-HDICLK-3
-HDINVAL
-HDOCLK0
-HDOCLK1
-HDOCLK2
-HDOCLK3
-HDOVAL
-SFILVAL
FID0
FID1
FID2
FID3
THERMDA
THERMDC
A20M#
FERR
INIT#
INTR
SMI#
CLKIN
TCK
TMS
TRST#
TDO
VID0
VID1
VID2
VID3
VID4
NMI
TDI
4
AJ29
AL29
AG33
AJ37
AL35
AE33
AJ35
AG37
AL33
AN37
AL37
AG35
AN29
AN35
AN31
AJ33
J1
J3
C7
A7
E5
A5
E7
C1
C5
C3
G1
E1
A3
G5
G3
E3
AE1
AG1
AJ3
AL1
AJ1
AN3
AN5
AC1
AG3
AE3
AG11
AG13
AN17
AL17
AN19
AL19
AL21
AN21
AA1
AA3
AL3
N1
N3
N5
Q1
Q3
U3
U1
U5
AC3
AJ25
AN13
AL13
AN15
AL15
Z0302
S5
Z0301
S1
Z0303
S3
Z0304
Q5
AJ13
L1
L3
L5
L7
J7
S10W-CPU_VREFM
AA5
W5
C159
.047U
4
-HAIN0
-HAIN1
-HAIN2
-HAIN3
-HAIN4
-HAIN5
-HAIN6
-HAIN7
-HAIN8
-HAIN9
-HAIN10
-HAIN11
-HAIN12
-HAIN13
-HAIN14
-HAOUT2
-HAOUT3
-HAOUT4
-HAOUT5
-HAOUT6
-HAOUT7
-HAOUT8
-HAOUT9
-HAOUT10
-HAOUT11
-HAOUT12
-HAOUT13
-HAOUT14
-A20M
FERR
-CPUINIT
INTR
-IGNNE
NMI
-SMI
-STPCLK
-CPURST
PWRGD_CPU
+COREFB
-COREFB
RSTCLK
-RSTCLK
CLKOUT
-CLKOUT
-DBREQ
-FLUSH
PICCLK
-PICD0
-PICD1
TCK
TMS
-TRST
TDI
-PLLTEST
-PLLBYPS
PLLMOD1
PLLMOD2
BYPSCLK
-BYPSCLK
S10W-CPU_VREF
C761
.22U
-HAIN2 [4]
-HAIN3 [4]
-HAIN4 [4]
-HAIN5 [4]
-HAIN6 [4]
-HAIN7 [4]
-HAIN8 [4]
-HAIN9 [4]
-HAIN10 [4]
-HAIN11 [4]
-HAIN12 [4]
-HAIN13 [4]
-HAIN14 [4]
-HAINCLK [4]
-HAOUT2 [4]
-HAOUT3 [4]
-HAOUT4 [4]
-HAOUT5 [4]
-HAOUT6 [4]
-HAOUT7 [4]
-HAOUT8 [4]
-HAOUT9 [4]
-HAOUT10 [4]
-HAOUT11 [4]
-HAOUT12 [4]
-HAOUT13 [4]
-HAOUT14 [4]
-HAOCLK [4]
-A20M [8]
-CPUINIT [8]
INTR [8]
-IGNNE [8]
NMI [8]
-SMI [9]
-STPCLK [9]
-CPURST [4]
CLKIN
-CLKIN
Z0301
Z0303
Z0302
Z0304
CPU_VID0 [3]
CPU_VID1 [3]
CPU_VID2 [3]
CPU_VID3 [3]
CPU_VID4 [3]
R192 1.5K
R198 60.4/F
R191
60.4/F
2
4
6
8
RP34
1.5KX4
-CPUINIT
-CPURST
-IGNNE
-A20M
-TRST
TDI
TMS
TCK
-PLLTEST
-STPCLK
-DBREQ
-PLLBYPS
PLLMOD1
PLLMOD2
-SMI
-FLUSH
INTR
NMI
R195
100/F
CLKOUT
R203
100/F
R143 270
3
R196
100/F
R204
100/F
1
2
3
4
5
6
7
8
RP25 820X4
1
2
3
4
5
6
7
8
RP32 820X4
1
2
3
4
5
6
7
8
RP29 820X4
R146 56
R149 56
1
2
3
4
5
6
7
8
RP24 820X4
2 1
D18 RB500
-CLKOUT
VTT
VTT
DHWPG [3,8,11,23]
BYPSCLK
-PICD1
PICCLK
-PICD0
-HDOVAL
-SFILVAL
-HAIN0
-HAIN1
+COREFB
-COREFB
VTT VTTVTTVTT
R150
100/F
R151
100/F
2
4
6
8
R144 10K
R145 10K
R148
100/F
R147
100/F
7
5
3
1
RP31
820X4
RP35
1KX4
-BYPSCLK
8
6
4
2
1
3
5
7
2
R141
60.4/F
C128 680P
CLKIN
-CLKIN
C129 680P
VTT
VTT
VTT
+1_8V VTT
C706 .1U
C707 .1U
FERR
R140
301/F
R180
510
1
VTT
R142
60.4/F
CPUCLK [6]
-CPUCLK [6]
+3V
R345
1K
-SB_FERR [8]
Q14
2
MMBT2222A
1 3
For CPU sideband return path
SYSCLK Multiplier Combinations
FID3 FID2 FID1 FID0 Clock Mode
0000
000
00 0
00
1
3
5
7
000
00
00
0
1
1
11
1
1
VTT
1
11
1
11
1
11
11
111
000
00
00
11
0
1
00
1
0
1
1111
Size Document Number Rev
Custom
3
2
Date: Sheet of
PROJECT : KT3I
Quanta Computer Inc.
DAKT3IMB6B9
CPU SOCKET A I
1
11X
11.5X
1
12X
12.5X
5X
5.5X
6X
6.5X
7X
7.5X
1
8X
8.5X
9X
9.5X
1
10X
0
10.5X
229Wednesday, March 19, 2003
3A
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5
4
3
2
1
U10C
AA31
NC
AC31
NC
AD8
NC
AD30
NC
AE31
NC
AF6
NC
AF8
NC
AF10
NC
AF28
NC
FSB100/133#
SVID0
SVID2
SVID3
SVID4
SVID1
AF30
AF32
AG5
AG19
AG21
AG23
AG25
AG31
AH8
AH30
AJ11
AJ15
AJ17
AJ19
AJ27
AK8
AL11
AM8
AN1
AN7
AN9
AN11
G11
G13
G19
G21
G27
G29
G31
H10
H28
H30
H32
N31
Q31
U31
W31
AE7
AM36
AM32
AM28
AM24
AM20
AM16
AM12
AM6
AM4
AK32
AK28
AK24
AK20
AK16
AK12
AK6
AK4
AK2
AJ7
AJ9
AL7
AL9
F8
F30
H6
H8
J5
J31
K8
K30
L31
S31
W7
Y31
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VSS|Z
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
FOX-PPGA-462-R
D D
C C
B B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSVSS
B2
B6
B10
B14
B18
B22
B26
B30
B34
D6
D10
D14
D18
D22
D26
D30
D34
D36
F2
F4
F6
F10
F14
F18
F22
F26
H14
H18
H22
H26
H34
H36
K2
K4
K6
M30
M32
M34
M36
P2
P4
P6
P8
R30
R32
R34
R36
T2
T4
T6
T8
V30
V32
V34
V36
X2
X4
X6
X8
Z30
Z32
Z34
Z36
AB2
AB4
AB6
AB8
AD32
AD34
AD36
AF2
AF4
AF12
AF16
AF20
AF24
AH12
AH16
AH20
AH24
AH28
AH32
AH34AH36
VTT
12
+
C183
220U/2.5V
AF26
AF22
AF18
AF14
AB36
AB34
AB32
AB30
AD6
AD4
AD2
Z8
Z6
Z4
Z2
X36
X34
X32
X30
V8
V6
V4
V2
T36
T34
T32
T30
R8
R6
R4
R2
P36
P34
P32
P30
M8
M6
M4
M2
K36
K34
K32
H24
H20
H16
H12
H4
H2
F36
F34
F32
F28
F24
F20
F16
F12
D32
D28
D24
D20
D16
D12
D8
D4
D2
B36
B32
B28
B24
B20
B16
B12
B8
B4
U10B
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
FOX-PPGA-462-R
12
+
C475
*220U/2.5V
12
+
C497
*220U/2.5V
12
+
C474
*220U/2.5V
VCCA
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCC|Z
KEY
KEY
KEY
KEY
KEY
KEY
KEY
KEY
BP0
BP1
BP2
BP3
ZN
ZP
12
+
G9
G17
G25
N7
Y7
AG7
AG15
AG29
AN27
AL27
AN25
AL25
AJ23
AC5
AE5
AF34
AF36
AH2
AH4
AH10
AH14
AH18
AH22
AH26
AJ5
AK10
AK14
AK18
AK22
AK26
AK30
AK34
AK36
AL5
AM2
AM10
AM14
AM18
AM22
AM26
AM30
AM34
AC7
C496
220U/2.5V
T20W-CPU-VCCA
S10W-CPU_ZN
S10W-CPU_ZP
R292
40.2/F
VTT
12
+
C196
220U/2.5V
VTT
12
+
C182
220U/2.5V
R289
40.2/F
Need <=+2_5V tolerance ?
1 2
R436 10K
FSB100/133#
C601
.1U
12
12
C602
10UB
50mA for 1GHZ
C523
C513
CPU_VID0[2]
CPU_VID1[2]
CPU_VID2[2]
CPU_VID3[2]
CPU_VID4[2]
CPU_FID3[7]
CPU_FID2[7]
CPU_FID1[7]
CPU_FID0[7]
12
+
C195
220U/2.5V
C157
39P
.01U
1U
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
FID0[2]
FID1[2]
FID2[2]
FID3[2]
FID0
FID1
FID2
FID3
+5V
VTT
+3V
FSB100/133# [6]
R342
*10K/F
150mA
S10W-CPUVCCA
R343
C623
*10K/F
*470P
U12
1
VID0
2
VID1
3
VID2
4
VID3
5
VID4
6
FID0
7
FID1
8
FID2
9
FID3
10
EN
11
FIDO3
12
FIDO2
13
FIDO1
14 15
FIDO0 SVID4
CM_BUS_100
L43
21
BK2125HM241
U34
4
OUT
GND
5
SETINSHDN
*MAX8863
Vset=1.25V
V=2.5
V/S#
VIDO0
VIDO1
VIDO2
VIDO3
VIDO4
VDD(3.3V)
GND
VDDO2.5
SVID0
SVID1
SVID2
SVID3
+2_5V
C609
2.2UB
3
2
1
28
27
26
25
24
23
22
21
20
SVID0
19
SVID1
18
SVID2
17
SVID3
16
SVID4
VID0 [28]
VID1 [28]
VID2 [28]
VID3 [28]
VID4 [28]
+3V
C627
*.1U
+2_5VPU
+3V
C628
*1U
+3V
C223
100P
+2_5VPU +3V
C224
.1U
3
1
SVID1
SVID2
SVID3
SVID0
SVID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
CPU_VID4
R212
1K
Q37
2N7002E
C625
1U
FID3
FID2
FID1
FID0
2
RP40 3.9KX4
R213 3.9K
RP45 3.9KX4
R214 3.9K
1
2
3
4
5
6
7
8
7
8
5
6
3
4
1
2
RP33
7
8
5
6
3
4
1
2
1KX4
DHWPG [2,8,11,23]
+2_5VPU
C151
C258
39P
.22U
C478
39P
C216
.22U
C127
39P
C217
.22U
C420
39P
C218
.22U
C417
39P
C210
.22U
C265
39P
C213
.22U
C215
.22U
C229
39P
C167
C534
C205
.22U
.22U
A A
C457
C452
39P
39P
.22U
C447
39P
C173
.22U
C522
39P
C149
.22U
C545
39P
C165
.22U
C519
39P
C444
.22U
C544
39P
C542
.22U
C541
39P
C209
.22U
C208
.22U
C207
.22U
C155
.22U
C154
.22U
C150
.22U
C419
39P
C152
.22U
C416
39P
C153
.22U
C418
39P
C525
.22U
C421
39P
C148
.22U
C147
.22U
C555
39P
C206
.22U
C423
39P
C146
.22U
C169
.22U
C568
39P
Place these around the VTT planePlace these within the CPU socket One 39P per one bulk CAP
C453
1U
C454
1U
C445
1U
C170
1U
C448
.01U
C446
.01U
C455
.01U
C449
C518
C536
1U
1U
5
C543
1U
1U
C526
.01U
C535
.01U
C456
C533
.01U
.01U
4
C527
.01U
VTTVTT
3
2
VTT
C214
.22U
VTTVTTVTT
Size Document Number Rev
Custom
Date: Sheet of
PROJECT : KT3I
Quanta Computer Inc.
DAKT3IMB6B9
CPU SOCKET A II
1
329Wednesday, March 19, 2003
3A
![](/html/2a/2ae2/2ae2ad644a7f3a987327fde18239c2ec847d1005b0d88ebb1cd01e5c3c96cec5/bg4.png)
5
AD0[7,8,13,20,21,22,30]
AD1[7,8,13,20,21,22,30]
AD2[7,8,13,20,21,22,30]
AD3[7,8,13,20,21,22,30]
AD4[7,8,13,20,21,22,30]
AD5[7,8,13,20,21,22,30]
AD6[7,8,13,20,21,22,30]
AD7[7,8,13,20,21,22,30]
AD8[7,8,13,20,21,22,30]
AD9[7,8,13,20,21,22,30]
AD10[7,8,13,20,21,22,30]
AD11[7,8,13,20,21,22,30]
D D
C C
B B
AD12[7,8,13,20,21,22,30]
AD13[7,8,13,20,21,22,30]
AD14[7,8,13,20,21,22,30]
AD15[7,8,13,20,21,22,30]
AD16[7,8,13,20,21,22,30]
AD17[7,8,13,20,21,22,30]
AD18[7,8,13,20,21,22,30]
AD19[7,8,13,20,21,22,30]
AD20[7,8,13,20,21,22,30]
AD21[7,8,13,20,21,22,30]
AD22[7,8,13,20,21,22,30]
AD23[7,8,13,20,21,22,30]
AD24[7,8,13,20,21,22,30]
AD25[7,8,13,20,21,22,30]
AD26[7,8,13,20,21,22,30]
AD27[7,8,13,20,21,22,30]
AD28[7,8,13,20,21,22,30]
AD29[7,8,13,20,21,22,30]
AD30[7,8,13,20,21,22,30]
AD31[7,8,13,20,21,22,30]
-CBE0[7,8,13,20,21,22,30]
-CBE1[8,13,20,21,22,30]
-CBE2[8,13,20,21,22,30]
-CBE3[7,8,13,20,21,22,30]
-FRAME[7,8,13,20,21,22,30]
-IRDY[7,8,13,20,21,22,30]
-TRDY[7,8,13,20,21,22,30]
-INTA[7,8]
-DEVSEL[7,8,13,20,21,22,30]
-STOP[7,8,13,20,21,22,30]
-SERR[7,8,13,20,21,22,30]
-PCIREQ[7,9]
-SBREQ[7,8]
-SBGNT[7,8]
-REQ0[7,22]
-REQ1[7,13,30]
-REQ2[7,21]
-REQ3[7,20]
-GNT0[7,22]
-GNT1[7,13,30]
-GNT2[7,21]
-GNT3[7,20]
PAR
PAR[8,13,20,21,22,30]
-FRAME
-IRDY
-TRDY
-INTA
-DEVSEL
-STOP
-SERR
-PCIREQ
-SBREQ
-SBGNT
-REQ0
-REQ1
-REQ2
-REQ3
-GNT0
-GNT1
-GNT2
-GNT3 PNL_CLK
+3V
C559
.1U
Spread Spectrum
+3V
L8
T20W-SS-VDD
21
*FCM1608K221
C143
*.1U
A A
R408 *0
C537
*4.7UB
T20W-MK1707GND
U27
VDD
LEE
GND
*MK1707S
ICLK
CLK
S0
S1
SD
2
C144
*.1U
T47
5
3
5
U11B
AA7
PCI_AD0
AA8
PCI_AD1
AB7
PCI_AD2
AE5
PCI_AD3
AF4
PCI_AD4
AD5
PCI_AD5
AE4
PCI_AD6
AD4
PCI_AD7
AF3
PCI_AD8
AE1
PCI_AD9
AD2
PCI_AD10
AC3
PCI_AD11
AD1
PCI_AD12
AC6
PCI_AD13
AC5
PCI_AD14
AC2
PCI_AD15
AA2
PCI_AD16
AA1
PCI_AD17
Y2
PCI_AD18
Y6
PCI_AD19
Y5
PCI_AD20
Y4
PCI_AD21
W6
PCI_AD22
W5
PCI_AD23
W4
PCI_AD24
W3
PCI_AD25
W2
PCI_AD26
V6
PCI_AD27
V5
PCI_AD28
V4
PCI_AD29
W1
PCI_AD30
V3
PCI_AD31
AE3
PCI_CBE0#
AC1
PCI_CBE1#
AA3
PCI_CBE2#
Y1
PCI_CBE3#
AB3
PCI_PAR
AB1
PCI_FRAME#
AA4
PCI_IRDY#
AA5
PCI_TRDY#
T5
INTA#
AB4
PCI_DEVSEL#
AB6
PCI_STOP#
AB2
PCI_SERR#
R6
PCI_ACT_REQ#
R2
PCI_SBREQ#
R4
PCI_SBGNT#
V2
PCI_REQ0#
U4
PCI_REQ1#
U6
PCI_REQ2#
V1
PCI_GNT0#
U5
PCI_GNT1#
T2
PCI_GNT2#
T6
PCI_GNT3#/PCI_CLK4
T1
VDD_5V
AB17
NC
AC15
NC
ATI-U1-A31
+3V
PART 2 OF 5
TMDS_LCDCNTL2/GPIO10
EMI
R177
R176
*2.2K
*2.2K
6
7
8
R161
R160
2.2K
*2.2K
LVDS_SSOUT
1
LVDS_SSINR LVDS_SSIN
4
R300 *33
PCI/ZV/TMDS (K7 MOBILE)
TMDS_IDCK+/TESTCLK0
TMDS_LCDCNTL0/GPIO8
TMDS_LCDCNTL1/GPIO9
A31
R175
2.2K
R159
*2.2K
4
VID0/TST_IN0
VID1/TST_IN1
VID2/TST_IN2
VID3/TST_IN3
VID4/TST_IN4
VID5/TST_IN5
VID6/TST_IN6
VID7/TST_IN7
XVID0
XVID1
XVID2
XVID3/TESTCLK1
XVID4
XVID5/TST_ADDR
XVID6/TST_STB
XVID7/TST_WR
VVSYNC/TST_OUT14
VHREF/TST_OUT15
VPCLK0/TST_OUT13
TMDS_D0/TST_OUT12
TMDS_D1/TST_OUT10
TMDS_D2/TST_OUT9
TMDS_D3/TST_OUT8
TMDS_D4/TST_OUT6
TMDS_D5/TST_OUT7
TMDS_D6/TST_OUT5
TMDS_D7/TST_OUT4
TMDS_D8/TST_OUT2
TMDS_D9/TST_OUT3
TMDS_D10/TST_OUT1
TMDS_D11/TST_OUT0
TMDS_DE/TST_OUT11
TMDS_VSYNC/TCK
TMDS_HSYNC/TMS
TMDS_SCL
TMDS_SDA/TDI
TMDS_IDCK-
TMDS_VREF
TMDS_VOLT_DET
TMDS_HPD
RSV
RSVPCI_REQ3#/PCI_CLK3
RSV
RSV
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
CLK27M
LVDS_SSIN
LVDS_SSOUT
L69
*L
Default
1 2
C556
*10P
4
T56
J4
T55
F4
T54
E6
T53
M4
T52
F5
T60
G4
T69
G5
T68
K5
T63
L5
T62
J6
T61
H6
T22
K4
T21
K6
T20
J5
T19
L4
T18
G6
T26
L6
T25
M5
T24
H5
T23
J2
T28
K3
T27
K1
T46
K2
T45
L1
T44
L2
T43
L3
T48
N1
T35
N2
T82
N3
T81
P1
T80
P2
T33
J1
T32
H2
T31
J3
T92
R3
T93
R1
T29
M2
T39
M1
T38
D3
T37
E2
T36
G2
R5
R305 4.7K
E4
R306 4.7K
G1
E1
R507 8.2K
F3T4
R506 8.2K
F2
H4
PNL_DATA
P3
N4
T66
N6
T67
P4
T70
P6
R505 8.2K
M6
T71
N5
T42
P5
27M_TV_PAL 27M_TV_PALR
C1
LVDS_SSIN
C2
LVDS_SSOUTR
D6
SD
GND
GND
GND
GND
GND
GND
GND
GND
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V DNI
+3.3V
Place these on the midway between U1 and CPU
-HDICLK-0[2]
-HDICLK-1[2]
-HDICLK-2[2]
-HDICLK-3[2]
This is for SPWG
+3V
+3V
C572
*10P
+3V
R301 *10K
R295 22
L68 *L
GND
GND
GND
DNI
DNI
DNI
+3.3V
+3.3V
GND
GND
GND
DNI
DNI
DNI
+3.3V
PNL_DATA [12]
PNL_CLK [12]
+3V
12
DIRECTION
S0
DOWN
GND
DOWN
DNI
DOWN
+3.3V
DOWN
GND
DOWNDNI
+3.3V
DOWN
GND
DOWN
DNI DOWN
CENTER
GND
DNI
CENTER
+3.3V
CENTER
GND
CENTER
DNI
CENTER
CENTER
+3.3V
CENTER
DNI
R304 10K
R303 10K
C697 *10P
LVDS_SSOUT
3
-HDICLK-0
C461
5P
-HDICLK0
R477
4.7K
R478
4.7K
R302 *33
-HDICLK-1
-HDICLK1
-HDICLK-2
-HDICLK2
-HDICLK-3
-HDICLK3
C240
5P
C256
5P
C255
5P
1 2
1 2
Used for PAL only
% SPREADS1
.6
.8
CENTER
CENTER
CENTER
1.25
+.5 -1.5
2
+.5 -2.5
+.5 -3
5
+/- .35
+/- .5
+/- .7
+/- .8
+/- 1.1
+/- 1.4
+/- 2.5
3
L37 10nH
12
-LHDICLK-0
L36 10nH
12
L12 10nH
-LHDICLK-1
L13 10nH
L15 10nH
12
-LHDICLK-2
L17 10nH
12
L14 10nH
12
-LHDICLK-3
L16 10nH
12
NB_PWROK[11]
Y4
3
OUT
2 1
VSS OE
*27MHZ
2_5VSUS
+2_5V
VCC
VTT
-HAIN2[2]
-HAIN3[2]
-HAIN4[2]
-HAIN5[2]
-HAIN6[2]
-HAIN7[2]
-HAIN8[2]
-HAIN9[2]
-HAIN10[2]
-HAIN11[2]
-HAIN12[2]
-HAIN13[2]
-HAIN14[2]
-HAINCLK[2]
-HDINVAL[2]
-HAOUT2[2]
-HAOUT3[2]
-HAOUT4[2]
-HAOUT5[2]
-HAOUT6[2]
-HAOUT7[2]
-HAOUT8[2]
-HAOUT9[2]
-HAOUT10[2]
-HAOUT11[2]
-HAOUT12[2]
-HAOUT13[2]
-HAOUT14[2]
-HAOCLK[2]
PROCRDY[2]
CLKFWRST[2]
CONNECT[2]
-CPURST[2]
R267 *270
D27 RB500
R453 270
-PCIRST[8,13,20,21,22,30]
-ATI-DC_STOP[11]
4
C596
*.1U
C260 10UB
C241 .1U
C261 .1U
C262 .1U
C434 .1U
C263 .1U
C432 .1U
C443 .1U
C264 .1U
C247 .1U
C244 .1U
-HAOUT2
-HAOUT3
-HAOUT4
-HAOUT5
-HAOUT6
-HAOUT7
-HAOUT8
-HAOUT9
-HAOUT10
-HAOUT11
-HAOUT12
-HAOUT13
-HAOUT14
C709 *1U
21
S10W-NB-S2KVREF
VTT
+3V
-HAIN2
-HAIN3
-HAIN4
-HAIN5
-HAIN6
-HAIN7
-HAIN8
-HAIN9
-HAIN10
-HAIN11
-HAIN12
-HAIN13
-HAIN14
-CPURST
T75
T74
2
U11A
A21
A20
B19
A22
B20
B21
C18
C17
A19
D21
D20
B18
C21
C19
E19
N26
P24
P25
R24
N25
U25
P26
R26
V25
U26
T25
T26
U24
R25
F20
D19
E20
V26
AC25
AD6
AE6
Y26
C20
G16
G17
G18
H20
H24
J20
M20
N20
P20
D17
D18
E16
E17
E18
F16
F17
F18
F19
W23
V22
ATI-U1-A31
VTT
R219
60.4/F
S10W-NB-S2KVREF
R220
60.4/F
2
SADDIN2#
SADDIN3#
SADDIN4#
SADDIN5#
SADDIN6#
SADDIN7#
SADDIN8#
SADDIN9#
SADDIN10#
SADDIN11#
SADDIN12#
SADDIN13#
SADDIN14#
SADDINCLK#
SDATAINVAL#
SADDOUT2#
SADDOUT3#
SADDOUT4#
SADDOUT5#
SADDOUT6#
SADDOUT7#
SADDOUT8#
SADDOUT9#
SADDOUT10#
SADDOUT11#
SADDOUT12#
SADDOUT13#
SADDOUT14#
SADDOUTCLK#
PROCRDY
CLKFWDRST
CONNECT
CPURST#
POWERGOOD
NRSTIN#
DC_STOP#
S2K_VREF
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
K7_NC
K7_NC
K7_NC
K7_NC
K7_NC
K7_NC
K7_NC
K7_NC
K7_NC
THERMALDIODE_P
THERMALDIODE_N
C760
C266
.22U
.01U
1
-HD0
A25
PART 1 OF 5
S2K I/F (K7 MOBILE)
A31
Size Document Number Rev
Date: Sheet
SDATA0#
SDATA1#
SDATA2#
SDATA3#
SDATA4#
SDATA5#
SDATA6#
SDATA7#
SDATA8#
SDATA9#
SDATA10#
SDATA11#
SDATA12#
SDATA13#
SDATA14#
SDATA15#
SDATAINCLK0#
SDATAOUTCLK0#
SDATA16#
SDATA17#
SDATA18#
SDATA19#
SDATA20#
SDATA21#
SDATA22#
SDATA23#
SDATA24#
SDATA25#
SDATA26#
SDATA27#
SDATA28#
SDATA29#
SDATA30#
SDATA31#
SDATAINCLK1#
SDATAOUTCLK1#
SDATA32#
SDATA33#
SDATA34#
SDATA35#
SDATA36#
SDATA37#
SDATA38#
SDATA39#
SDATA40#
SDATA41#
SDATA42#
SDATA43#
SDATA44#
SDATA45#
SDATA46#
SDATA47#
SDATAINCLK2#
SDATAOUTCLK2#
SDATA48#
SDATA49#
SDATA50#
SDATA51#
SDATA52#
SDATA53#
SDATA54#
SDATA55#
SDATA56#
SDATA57#
SDATA58#
SDATA59#
SDATA60#
SDATA61#
SDATA62#
SDATA63#
SDATAINCLK3#
SDATAOUTCLK3#
CAL#
CAL
-HD1
D25
-HD2
D26
-HD3
C25
-HD4
E25
-HD5
E24
-HD6
F24
-HD7
E26
-HD8
A23
-HD9
B22
-HD10
C22
-HD11
B23
-HD12
C26
-HD13
B24
-HD14
C23
-HD15
F25
-HDICLK0
D24
-HDOCLK0
A24
-HD16
E23
-HD17
D22
-HD18
G22
-HD19
H23
-HD20
J23
-HD21
J22
-HD22
K23
-HD23
J21
-HD24
E21
-HD25
G23
-HD26
G21
-HD27
F23
-HD28
F22
-HD29
H22
-HD30
L23
-HD31
K22
-HDICLK1
H21
-HDOCLK1
K21
-HD32
M21
-HD33
N22
-HD34
R23
-HD35
R21
-HD36
U23
-HD37
T22
-HD38
P21
-HD39
T21
-HD40
L21
-HD41
L22
-HD42
M23
-HD43
N23
-HD44
P23
-HD45
N21
-HD46
T23
-HD47
P22
-HDICLK2
R22
-HDOCLK2
M22
-HD48
H25
-HD49
K25
-HD50
L24
-HD51
J26
-HD52
M25
-HD53
K26
-HD54
M26
-HD55
N24
-HD56
F26
-HD57
G24
-HD58
G25
-HD59
G26
-HD60
H26
-HD61
L26
-HD62
J24
-HD63
J25
-HDICLK3
K24
-HDOCLK3
L25
T10W-NB-CAL#
A16
T10W-NB-CAL
B16
PROJECT : K T 3 I
Quanta Computer Inc.
DAKT3IMB6B9
ATI-U1 S2K,PCI BUS
-HD0 [2]
-HD1 [2]
-HD2 [2]
-HD3 [2]
-HD4 [2]
-HD5 [2]
-HD6 [2]
-HD7 [2]
-HD8 [2]
-HD9 [2]
-HD10 [2]
-HD11 [2]
-HD12 [2]
-HD13 [2]
-HD14 [2]
-HD15 [2]
-HDOCLK0 [2]
-HD16 [2]
-HD17 [2]
-HD18 [2]
-HD19 [2]
-HD20 [2]
-HD21 [2]
-HD22 [2]
-HD23 [2]
-HD24 [2]
-HD25 [2]
-HD26 [2]
-HD27 [2]
-HD28 [2]
-HD29 [2]
-HD30 [2]
-HD31 [2]
-HDOCLK1 [2]
-HD32 [2]
-HD33 [2]
-HD34 [2]
-HD35 [2]
-HD36 [2]
-HD37 [2]
-HD38 [2]
-HD39 [2]
-HD40 [2]
-HD41 [2]
-HD42 [2]
-HD43 [2]
-HD44 [2]
-HD45 [2]
-HD46 [2]
-HD47 [2]
-HDOCLK2 [2]
-HD48 [2]
-HD49 [2]
-HD50 [2]
-HD51 [2]
-HD52 [2]
-HD53 [2]
-HD54 [2]
-HD55 [2]
-HD56 [2]
-HD57 [2]
-HD58 [2]
-HD59 [2]
-HD60 [2]
-HD61 [2]
-HD62 [2]
-HD63 [2]
-HDOCLK3 [2]
R215 30.1/F
R216 30.1/F
429Wednesday, March 19, 2003
1
of
VTT
3B
![](/html/2a/2ae2/2ae2ad644a7f3a987327fde18239c2ec847d1005b0d88ebb1cd01e5c3c96cec5/bg5.png)
5
MAA[0..14][10]
DCLK0[10]
-DCLK0[10]
DCLK1[10]
D D
-DCLK1[10]
DCLK2[10]
-DCLK2[10]
C C
DCLK3[10]
-DCLK3[10]
DCLK4[10]
-DCLK4[10]
DCLK5[10]
-DCLK5[10]
B B
2_5VSUS
1_25VDDR
C283 .1U
C178 .1U
C174 .1U
A A
C238 .1U
C250 .1U
C192 .1U
C267 .1U
C180 .1U
C287 .1U
R396 0
R397 0
R398 0
R399 0
R400 0
R401 0
R402 0
R403 0
R404 0
R405 0
R406 0
R407 0
R197
1K/F
S20W-ATI_DDR_VREF
C166
R200
.01U
1K/F
DCLKR0
-DCLKR0
L56
*L
C685 *C
12
L57 *L
C686 *C
12
DCLKR1
-DCLKR1
L58
*L
C687 *C
12
L59 *L
C688 *C
12
-SRASA[10]
-SCASA[10]
-SWEA[10]
CKE[10]
DCLKR2
-DCLKR2
L60
*L
C689 *C
12
L61 *L
C690 *C
12
DCLKR3
-DCLKR3
L62
*L
C691 *C
12
L63 *L
C692 *C
12
DCLKR4
-DCLKR4
L64
*L
C693 *C
12
L65 *L
C694 *C
12
-CS0[10]
-CS1[10]
-CS2[10]
C695 *C
12
C696 *C
12
-CS3[10]
DCLKR5
-DCLKR5
L66
*L
L67 *L
R190 *0
1_25VDDR 1_25VDDR
C306 .1U
C272 .1U
C311 .1U
C194 .1U
C325 .1U
C186 .1U
C257 .1U
C303 .1U
C225 .1U
5
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
-DQMR0
-DQMR1
-DQMR2
-DQMR3
-DQMR4
-DQMR5
-DQMR6
-DQMR7
-SRASA
-SCASA
-SWEA
CKE
-DQSR0
-DQSR1
-DQSR2
-DQSR3
-DQSR4
-DQSR5
-DQSR6
-DQSR7
-DCLKR0
-DCLKR1
-DCLKR2
-DCLKR3
-DCLKR4
-DCLKR5
DCLKR0
DCLKR1
DCLKR2
DCLKR3
DCLKR4
DCLKR5
-CS0
-CS1
-CS2
-CS3
R268 10K
2_5VSUS
S20W-DDR VREF [10,29]
C211 .1U
C335 .1U
C331 .1U
C322 .1U
C318 .1U
C198 .1U
C228 .1U
C175 .1U
U11C
AC21
DDR_A0
AC20
DDR_A1
AB20
DDR_A2
AA20
DDR_A3
AB19
DDR_A4
AA19
DDR_A5
AC19
DDR_A6
AC18
DDR_A7
AB18
DDR_A8
AA18
DDR_A9
AB21
DDR_A10
AA17
DDR_A11
AA16
DDR_A12
AD23
DDR_A13
AC22
DDR_A14
AF8
DDR_DM0
AA9
DDR_DM1
AD12
DDR_DM2
AA13
DDR_DM3
AD16
DDR_DM4
AE20
DDR_DM5
W21
DDR_DM6
AA25
DDR_DM7
AD18
DDR_RAS#
AF24
DDR_CAS#
AE19
DDR_WE#
AF10
DDR_CKE
AD8
DDR_DQS0
AC8
DDR_DQS1
AE12
DDR_DQS2
AB12
DDR_DQS3
AE16
DDR_DQS4
AF20
DDR_DQS5
Y23
DDR_DQS6
Y25
DDR_DQS7
AB10
DDR_CK0#
AE23
DDR_CK1#
Y22
DDR_CK2#
AB16
DDR_CK3#
AE26
DDR_CK4#
AB25
DDR_CK5#
AC10
DDR_CK0
AD22
DDR_CK1
AA23
DDR_CK2
AC16
DDR_CK3
AD25
DDR_CK4
AC26
DDR_CK5
AE24
DDR_CS0#
AD26
DDR_CS1#
AF22
DDR_CS2#
AC24
DDR_CS3#
AF23
TESTMODE
Y9
VDD_MEM
Y8
VDD_MEM
Y7
VDD_MEM
W20
VDD_MEM
V20
VDD_MEM
U20
VDD_MEM
ATI-U1-A31
1_25VDDR 1_25VDDR 1_25VDDR
C334 .1U
C221 .1U
C321 .1U
C268 .1U
C270 .1U
C320 .1U
C313 .1U
C289 .1U
C236 .1U
4
AF6
DDR_DQ0
PART 3 OF 5
A31
DDR SDRAM I/F (K7 MOBILE)
2_5VSUS 2_5VSUS2_5VSUS
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ35
DDR_DQ36
DDR_DQ37
DDR_DQ38
DDR_DQ39
DDR_DQ40
DDR_DQ41
DDR_DQ42
DDR_DQ43
DDR_DQ44
DDR_DQ45
DDR_DQ46
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
DDR_VREF
4
AF7
AD9
AD10
AE7
AE8
AE9
AF9
AC7
AB9
AB11
AC11
AB8
AA11
AA10
AC9
AF11
AE11
AD13
AE13
AE10
AF12
AF13
AD14
AA12
AC12
AB13
AB14
AC13
AA15
AA14
AC14
AE14
AF15
AF16
AE17
AF14
AE15
AD17
AF17
AE18
AF19
AE21
AF21
AF18
AD19
AD21
AE22
AB23
AA22
V21
V23
W22
Y21
U21
U22
AB24
AA26
W25
V24
AB26
AA24
W26
W24
AD20
AD7
Y24
Y18
Y17
Y14
Y13
AF5
C336 .1U
C237 .1U
C294 .1U
C245 .1U
C295 .1U
C269 .1U
C315 .1U
C276 .1U
C191 .1U
MDR0
MDR1
MDR2
MDR3
MDR4
MDR5
MDR6
MDR7
MDR8
MDR9
MDR10
MDR11
MDR12
MDR13
MDR14
MDR15
2_5VSUS
MDR16
MDR17
MDR18
MDR19
MDR20
MDR21
MDR22
MDR23
MDR24
MDR25
MDR26
MDR27
MDR28
MDR29
MDR30
MDR31
MDR32
MDR33
MDR34
MDR35
MDR36
MDR37
MDR38
2_5VSUS
MDR39
MDR40
MDR41
MDR42
MDR43
MDR44
MDR45
MDR46
MDR47
MDR48
MDR49
MDR50
MDR51
MDR52
MDR53
MDR54
MDR55
MDR56
MDR57
MDR58
MDR59
MDR60
MDR61
MDR62
MDR63
2_5VSUS
S20W-ATI_DDR_VREF
C329 .1U
C189 .1U
C277 .1U
C230 .1U
C284 .1U
C328 .1U
C232 .1U
C226 .1U
C222 .1U
-DQS[0..7][10]
-DQM[0..7][10]
MD[0..63][10]
C512 22U
C470 .1U
C514 .1U
C429 .1U
C442 .1U
C511 .1U
C441 .1U
C495 .1U
C164 .1U
C168 .1U
C487 .1U
C469 .1U
C428 .1U
C510 .1U
2_5VSUS
C156
.1U
C162
.1U
3
MDR0
MDR1
MDR4
MDR5
-DQSR0
MDR2
-DQMR0
MDR6
MDR7
MDR3
MDR8
MDR9
MDR12
MDR13
-DQMR1
-DQSR1
MDR11
MDR10
MDR15
MDR14
MDR16
MDR17
MDR18
MDR19
-DQSR2
MDR20
MDR21
-DQMR2
MDR22
MDR23
MDR24
MDR25
-DQSR3
MDR26
MDR27
MDR28 MD28
MDR29
-DQMR3
MDR30
MDR32
MDR33
MDR34
MDR35
MDR36
MDR37
-DQMR4
MDR38
MDR39
-DQSR4
MDR40
MDR41
MDR42
MDR43
MDR44
MDR45
-DQMR5
-DQSR5
MDR46
MDR47
MDR48
MDR50
MDR49
MDR51
MDR52
MDR53
-DQMR6
MDR54
MDR55
-DQSR6
MDR56
MDR57
-DQMR7
MDR58
MDR59
MDR60
MDR61
-DQSR7
MDR62
MDR63
Place DDR serial Rs close to the first DIMM
Place DDR term Rs close to the second DIMM
1_25VDDR
C339 22U
C338 22U
3
RP37 22X8
15
13
11
9
7 8
5
3
1
RP43 22X8
15
13
11
9
7 8
5
3
1
RP46 22X8
15
13
11
9
7 8
5
3
1
RP51 22X8
15
13
11
9
7 8
5
3
1
RP54 22X8
15
13
11
9
7 8
5
3
1
RP59 22X8
15
13
11
9
7 8
5
3
1
RP63 22X8
15
13
11
9
7 8
5
3
1
RP66 22X8
15
13
11
9
7 8
5
3
1
RP72 22X8
15
13
11
9
7 8
5
3
1
RP75 22X8
15
13
11
9
7 8
5
3
1
MD0
16
MD1
14
MD4
12
MD5
10
-DQS0
MD2
6
-DQM0
4
MD6
2
MD7
16
MD3
14
MD8
12
MD9
10
MD12
MD13
6
-DQM1
4
-DQS1
2
MD11
16
MD10
14
MD15
12
MD14
10
MD16
MD17
6
MD18
4
MD19
2
-DQS2
16
MD20
14
MD21
12
-DQM2
10
MD22
MD23
6
MD24
4
MD25
2
-DQS3
16
MD26
14
MD27
12
10
MD29
-DQM3
6
MD30
4
MD31MDR31
2
MD32
16
MD33
14
MD34
12
MD35
10
MD36
MD37
6
-DQM4
4
MD38
2
MD39
16
-DQS4
14
MD40
12
MD41
10
MD42
MD43
6
MD44
4
MD45
2
-DQM5
16
-DQS5
14
MD46
12
MD47
10
MD48
MD50
6
MD49
4
MD51
2
MD52
16
MD53
14
-DQM6
12
MD54
10
MD55
-DQS6
6
MD56
4
MD57
2
-DQM7
16
MD58
14
MD59
12
MD60
10
MD61
-DQS7
6
MD62
4
MD63
2
2
2
MAA12
RP38 56X4
-DQS0
-DQS2
-DQS3
-CS0
-CS1
-SWEA
-CS2
-DQS4
-DQS5
-DQS6
-DQS7
-SWEA
-CS0
-CS1
-CS2
-DQS1
MD10
MD11
MD16
MD17
MD18
MD19
MD24
MD25
MD26
MD27
MAA14
MAA9
MAA7
MAA5
MAA3
MAA1
MAA10
MD32
MD33
MD34
MD35
MD40
MD41
MD42
MD43
MD48
MD49
MD50
MD51
MD56
MD57
MD58
MD59
MAA14
MAA5
MAA7
MAA9
MAA3
MAA1
MAA10
MAA11
MD0
MD1
MD2
MD3
MD8
MD9
RP42 56X4
RP47 56X4
RP49 56X4
RP52 56X4
RP55 33X4
RP57 33X4
RP60 33X4
RP62 56X4
RP65 56X4
RP68 56X4
RP70 56X4
RP73 56X4
CA2 47PX4
1
3
5
7
CA4 47PX4
1
3
5
7
CA6 47PX4
1
3
5
7
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
2
4
6
8
2
4
6
8
2
4
6
8
CKE
MAA13
MAA8
MAA0
MAA2
MAA4
MAA6
-CS3
-SRASA
-SCASA
-CS3
-SCASA
-SRASA
Place these CAPs close to the first DIMM
Size Document Number Rev
Date: Sheet
PROJECT : K T 3 I
Quanta Computer Inc.
DAKT3IMB6B9
ATI-U1 DDR(Term,Damp)
-DQM0
-DQM1
-DQM2
-DQM3
-DQM4
-DQM5
-DQM6
-DQM7
MAA0
MAA2
MAA4
MAA6
MAA12
CKE
MAA13
MAA8
MD6
MD5
MD4
MD13
MD12
MD7
MD21
MD20
MD15
MD14
MD28
MD23
MD22
MD31
MD30
MD29
MAA11
MD38
MD37
MD36
MD45
MD39
MD44
MD53
MD52
MD47
MD46
MD60
MD55
MD54
MD63
MD62
MD61
1
RP39 56X4
RP44 56X4
RP48 56X4
RP50 56X4
RP53 56X4
RP56 33X4
RP58 33X4
RP61 33X4
RP64 56X4
RP67 56X4
RP69 56X4
RP71 56X4
RP74 56X4
CA3 47PX4
1
3
5
7
CA5 47PX4
1
3
5
7
CA1 47PX4
1
3
5
7
1
1_25VDDR1_25VDDR
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
2
4
6
8
2
4
6
8
2
4
6
8
529Wednesday, March 19, 2003
3A
of
![](/html/2a/2ae2/2ae2ad644a7f3a987327fde18239c2ec847d1005b0d88ebb1cd01e5c3c96cec5/bg6.png)
5
CRT_R[19,22]
CRT_G[19,22]
CRT_B[19,22]
D D
C C
B B
+3V
A A
CRT_R
CRT_G
CRT_B
EMI
C741
*10P
Try to save the 14.318Mhz crystal for ATI after A-TEST
C658 10P
Y714.318MHZ
C657 10P
PBY201209T-600
C607
.1U
L45
L4
T20W-CK-VCC
C644 22U
C639 .1U
C640 .1U
C641 .1U
C638 .01U
C613 .01U
C612 .01U
CLKSMDATA[9,10]
5
CLKSMCLK[9,10]
+3V
PBY201209T-600
C629
.1U
C742
*10P
C172 10P
C181 10P
S10W-CK_X1
R360
1M
S10W-CK_X2
T20W-CK-AVDD
C108
C611
10U
.1U
T20W-CK-VCC
L79 0
L80 0
L81 0
C743
*10P
CLKSMDATA
CLKSMCLK
C610
.01U
S10W-CK_X1
S10W-CK_X2
CKGND
CRT_R_L
CRT_G_L
CRT_B_L
MODIFY 1030
+2_5V
L11
BK2125HM241
+1_8V
L35
0
S10W-ATI_X1
Y214.318MHZ
R205
1M
S10W-ATI_X2
U33
34
AVDD
33
AVSS
41
GNDCPU
38
GND
45 46
VDDSD SDRAM_OUT
47
GNDSD
18 19
VDDAGP AGP0
15
VDDPCI
12
GNDPCI
6 7
GNDPCI PCICLK_F
22 23
VDD48 48MHz
48
VDDREF
4
XTALIN
5
XTALOUT
27
SDATA
26
SCLK
ICS951403CF-T
4
+1_8V
T20W-ATI-AVDD1
C219
C498
10UB
.1U
T20W-ATI-PLLVDD
C459
C480
10UB
.1U
+2_5V
CPUCLKC0
CPUCLKC1
CPUCLKC2
CPUCLKT0
CPUCLKT1
CPUCLKT2
AGP1GNDAGP
PCICLK0VDDPCI
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
24-48MHzGND48
FS0/REF0
FS1/REF1GNDREF
PWR_DWN#
SPREAD#
FS2
CPU_STOP#
PCI_STOP#
RSVD
RESET#
4
L10
BK2125HM241
37
40
43
36
39
42
2021
89
10
11
13
14
16
17
2425
1
23
30
29
28
31
32
44
35
T20W-ATI-AVDD0
C483
C202
.1U
10UB
C499
.1U
L51 0
C479
.1U
14M_ATI
R211 68
-CPUCLKR -CPUCLK
CPUCLKR
HCLKINR HCLKIN
SDCLK_OUTR SDCLK_OUT
AGPCLK_OUTR AGPCLK_OUT
T89
PCLK_NBR PCLK_NB
PCLK_PCMR
PCLK_LANR
PCLK_MPCIR
T90
PCLK_1394R PCLK_1394
T88
14M_SBR
14M_ATIR
-CK_S-SPECTRUM
FS2
-CPUSTP
-PCISTP
T20W-ATI-A2VSSQ
VSYNC[19]
HSYNC[19]
R274 499/F
R202 *0
T79
T78
T77
T76
T41
T40
T64
T49
T34
R339 10
R338 10
R340 0
R341 51/F
R353 22
R358 22
R357 22
R356 22
R355 22
R354 22
R359 22
48M_USBR 48M_USB
R346 22
R347 22
R361 *301/F
R371 *383/F
C484
.1U
CRT_R_L
CRT_G_L
CRT_B_L
VSYNC
HSYNC
T10W-ATI-RSET0
S10W-ATI_X1
S10W-ATI_X2
HCLKIN
PCLK_NB
AGPCLK_OUT
SDCLK_OUT
CPUCLK
PCLK_PCM
PCLK_LAN
PCLK_MPCI
PCLK_SBPCLK_SBR
L55 0
RP91 10KX4
3
U11D
B11
AVDD
C9
A2VDDQ
B13
AVSSQ
F11
AVSSN
C11
A2VDD
A8
A2VSSN
D10
A2VSSQ
C12
PLLVDD0
E13
PLLVDD1
D13
PLLVSS0
F13
PLLVSS1
A11
RED
A12
GREEN
A13
BLUE
D12
DACVSYNC
E12
DACHSYNC
B12
RSET
B9
XTLIN
A9
XTLOUT
A18
SYSCLK
B17
SYSCLK#
D16
SYS_FBCLKOUT
A15
SYS_FBCLKIN/HCLKIN
C16
HCLKOUT
U2
PCI_CLKF
D14
PCI_CLK1
C13
PCI_CLK2
B14
AGP_FBCLKIN/AGP_CLKIN
A14
AGP_FBCLKOUT/EXT_MEM_CLK
U1
USBCLK
E14
APICCLK
C14
OSC
ATI-U1-A31
12
C684 15P
14M_SB
14M_ATI
2 1
D40 *RB500
12
34
56
78
+3V
3
+2_5V
C234
.1U
A17
PART 4 OF 5
VDD_2.5V
A31
CRT
CLK.
-CPUCLK [2]
CPUCLK [2]
PCLK_PCM [13,30]
PCLK_LAN [21]
PCLK_MPCI [22]
PCLK_1394 [20]
PCLK_SB [8]
48M_USB [9]
14M_SB [8]
-SUSA [9,11,23]
-CPUSTP [9]
-PCISTP [9]
CLK, DISPLAY (K7 MOBILE)
GEN.
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
LVDS
LVDS_DIGON/TDO
LVDS_BLON#
LVDS_BIASON
LPVDD
LPVSS
LVDDR
LVDDR
LVSSR
LVSSR
C_R
Y_G
TV
COMP_B
R2SET
DACSCL
DACSDA
PCICLK_STP#
CPUCLK_STP#
AGP_BUSY#
AGP_STP#
CLK_RUN#
RSV
RSV
For EMI
-CPUCLK
CPUCLK
HCLKIN
SDCLK_OUT
AGPCLK_OUT
PCLK_NB
PCLK_PCM
PCLK_LAN
PCLK_MPCI
PCLK_SB
PCLK_1394
14M_SB
14M_ATI
D7
D8
B7
A7
E8
E9
C8
B8
D9
E10
B3
A3
B4
A4
B5
A5
C5
C6
B6
A6
D1
D2
E3
F9
F10
E7
F7
F8
A2
A10
B10
C10
D11
E11
F12
U3
F14
C4
D5
F1
G3
H1
R117 0
R96 0
R97 0
R115 0
C604 *10P
C603 *10P
C605 *10P
C606 *10P
C647 *10P
C651 22P
C649 22P
C650 22P
C648 22P
C652 22P
C744 22P
C752 22P
C753 22P
EMI
2
FSB100/133#[3]
Z0M
Z0M [12]
Z0P
Z0P [12]
Z1M
Z1M [12]
Z1P
Z1P [12]
Z2M
Z2M [12]
Z2P
T51
T50
T59
T58
T57
T20W-ATI-LPVDD
T20W-ATI-LVDDR
T20W-ATI-LVSSR
T10W-ATI-RSET1
DDCCLK
DDCDAT
-PCISTP
-CPUSTP
R431 *10K
R307
10K
Z2P [12]
ZCM
ZCM [12]
ZCP
ZCP [12]
Y0M
Y0M [12]
Y0P
Y0P [12]
Y1M
Y1M [12]
Y1P
Y1P [12]
Y2M
Y2M [12]
Y2P
Y2P [12]
YCM
YCM [12]
YCP
YCP [12]
ENAVDD [12]
-VDISPON [12]
L54 0
TV_CHROMA [12,22]
TV_LUMA [12,22]
TV_COMP [12,22]
R275 715/F
DDCCLK [19,22]
DDCDAT [19,22]
This can be no connect ?
-AGP_BUSY [9]
-STP_AGP [9]
-PCLKRUN [7,9,13,20,22,30]
FS0
FS1
FS2
Spread
CKGND
Default
2
Spectrum
FS3 FS2 FS1 FS0 CPU SDRAM PCICLK AGP
0000 100.00 100.00 33.33 66.67
0001 100.00 133.33 33.33 66.67
0010 100.00 150.00 30.00 60.00
0011 100.00 66.67 33.33 66.67
0100 133.33 133.33 33.33 66.67
0101 125.00 100.00 31.25 62.50
0110 124.00 124.00 31.00 62.00
0111 133.00 100.00 33.33 66.67
Size Document Number Rev
Date: Sheet
1
R99
*10K
2
2
C490
.1U
C158
10UB
FSB133/100#
3
Q43
2N7002E
1
3
Q53
2N7002E
1
C473
10UB
L9
BK2125HM241
R98
*10K
R455 10K
R456 10K
L38
15
+3V
R335
*10K
+3V
C517
.1U
14M_SBR
14M_ATIR
FS2
-CK_S-SPECTRUM
R454 10K
C489
.1U
C516
.1U
ICS951403 FREQUENCY SELECTION
PROJECT : K T 3 I
Quanta Computer Inc.
DAKT3IMB6B9
ATI-U1 VID,CRT,TV&CKGEN
1
FSB133/100# [7]
FS2
+1_8V
C481
.1U
+1_8V
C197
.1U
R334
*10K
R85 10K
R84 10K
R337 *10K
R336 10K
Enable
629Wednesday, March 19, 2003
of
+3V
SEL=0
3A
![](/html/2a/2ae2/2ae2ad644a7f3a987327fde18239c2ec847d1005b0d88ebb1cd01e5c3c96cec5/bg7.png)
5
ISA PU
RP14 4.7K-10P8R
+5V
IOCHRDY[8,23]
AD0
AD2
AD5
AD7
AD4
AD6
AD8
AD11
AD14
AD15
+5V
+5V
+5V
AD12
R284 2.2K
R278 *10K
R281 2.2K
R280 2.2K
D D
C C
B B
10
SD0
SD1
SD2
SD3
RP9 4.7K-10P8R
10
SA0
SA1
SA2
SA3
RP10 4.7K-10P8R
10
SA8
SA9
SA10
SA11
RP11 4.7K-10P8R
10
SA16
SA17
SA18
RP28 2.2KX4
12
34
56
78
R297 2.2K
R288 *2.2K
R291 10K
R293 2.2K
R287 2.2K
R283 *10K
R61 2.2K
9
8
7 4
9
8
7 4
9
8
7 4
9
8
7 4
+3V
+3V
123456
SD4
1
SD5
2
SD6
3
SD7
56
SA4
1
SA5
2
SA6
3
SA7
56
SA12
1
SA13
2
SA14
3
SA15
56
-MEMW
1
-MEMR
2
-IOR
3
-IOW
56
SA[0..18] [8,23]
SD[0..7] [8,23]
Use Internal AGP
Disable Cal Defaults for CPU
PCI 33MHZ
78
RP27
10KX4
LCDID1 [12]
LCDID0 [12]
LCDID2 [12]
Disnable K7 outclk delay
Enable K7 outclk delay
+3V
Disable internal clock generator
1.2V Interface(Mobile)
1.7V Interface(Desktop)
+3V
S2K Interface
+5V
+5V
+5V
-MEMW [8,23]
-MEMR [8,23]
-IOR [8,23]
-IOW [8,23]
+5V
Panel IDs
(A11 ASIC)
(Auto-Calibration Default Value)
4
PCI PU
RP18 8.2K-10P8R
+3V
-INTA[4,8]
-INTB[8,21]
-INTC[8,20,22]
-INTD[8,22]
+3V
-REQ0[4,22]
-REQ1[4,13,30]
-REQ2[4,21]
-REQ3[4,20]
+3V
-FRAME[4,8,13,20,21,22,30]
-TRDY[4,8,13,20,21,22,30]
-IRDY[4,8,13,20,21,22,30]
-DEVSEL[4,8,13,20,21,22,30]
AD20
AD21AD3
AD24
AD26
AD27
AD28
AD29
AD30
AD31
10
-INTA
-INTB
-INTC
-INTD
Place this close to South Bridge
RP16 8.2K-10P8R
10
-REQ0
-REQ1
-REQ2
-REQ3
Place this close to North Bridge
RP4 8.2K-10P8R
10
-FRAME
-TRDY
-IRDY
-DEVSEL
Place this close to Mini PCI
R46 2.2K
R58 2.2K
R45 *2.2K
R55 10K
R44 2.2K
R54 *10K
R43 2.2K
R53 *10K
R42 2.2K
R52 *10K
R51 2.2K
R41 *10K
R40 *2.2K
R50 10K
R49 *2.2K
R39 *10K
R418 2.2K
1
9
2
8
3
7 4
56
1
9
2
8
3
7 4
56
-STOP
1
9
8
7 4
-SERR
2
-PERR-PERR
3
-PCLKRUN
56
AD[0..31] [4,8,13,20,21,22,30]
REQ3/GNT3 used as REQ3/GNT3
Disable PLL Bypass mode
Disable INCLK_Delay
+3V
Enable INCLK_Delay
00:Default(Best Performance)
+3V
01:Slow CPU by one cycle for read data
10:Slow NB by one cycle for write data
11:Slow Both by one cycle for write data
+3V
Disable Spread Spectrum
Enable Spread Spectrum
+3V
Use full Straps set
Use reduce Straps set
+3V
+3V
+3V
FSB133/100#
-INTE
-INTF
-SBREQ
-SBGNT
-GNT0
-GNT1
-GNT2
-GNT3
00:66MHZ
01:100MHZ
10:166MHZ
11:133MHZ
3
-INTE [8]
-INTF [8,13,30]
-SBREQ [4,8]
-SBGNT [4,8]
+3V
-GNT0 [4,22]
-GNT1 [4,13,30]
-GNT2 [4,21]
-GNT3 [4,20]
+3V
-STOP [4,8,13,20,21,22,30]
-SERR [4,8,13,20,21,22,30]
-PERR [13,20,21,22,30]
-PCLKRUN [6,9,13,20,22,30]
+3V
CLK
Speed
FSB133/100# [6]
2
+1_8V +1_8V +3V
C280 10UB
C468 .1U
C438 .1U
C492 .1U
C494 .1U
C437 .1U
C467 .1U
C465 .1U
C463 .1U
S2K
Timming
AD1
AD9
AD10
AD13
AD22
AD23
AD25
C274 10UB
C440 .1U
C435 .1U
C493 .1U
C436 .1U
C439 .1U
C491 .1U
C466 .1U
C464 .1U
C486 .1U
RP26 2.2KX4
12
34
56
78
RP1 2.2KX4
12
34
56
78
C562 10UB
C500 .1U
C502 .1U
C557 .1U
C508 .1U
C501 .1U
C558 .1UC485 .1U
C507 .1U
C503 .1U
C509 .1U
C506 .1U
C505
.1U
+1_8V
1
U11E
PART 5 OF 5
K10
VDD_CORE
K11
VDD_CORE
K12
VDD_CORE
K15
VDD_CORE
K16
VDD_CORE
K17
VDD_CORE
L10
VDD_CORE
L11
VDD_CORE
L12
VDD_CORE
L15
VDD_CORE
L16
VDD_CORE
L17
VDD_CORE
M10
VDD_CORE
M11
VDD_CORE
M12
VDD_CORE
M15
VDD_CORE
M16
VDD_CORE
M17
VDD_CORE
R10
VDD_CORE
R11
VDD_CORE
R12
VDD_CORE
R15
VDD_CORE
R16
VDD_CORE
R17
VDD_CORE
T10
VDD_CORE
T11
VDD_CORE
T12
VDD_CORE
T15
VDD_CORE
T16
VDD_CORE
T17
VDD_CORE
U10
VDD_CORE
U11
VDD_CORE
U12
VDD_CORE
U15
VDD_CORE
U16
VDD_CORE
U17
VDD_CORE
+3V
+3V
C504
.1U
G10
G11
B15
C15
D15
E15
F15
G15
T13
T14
T20
T24
U13
U14
Y10
Y11
Y12
Y15
Y16
Y19
Y20
C7
T3
U7
V7
W7
Y3
G7
K7
L7
H3
P7
VDD_3.3V
VDD_3.3V
VDD_3.3V
VDD_3.3V
VDD_3.3V
VDD_3.3V
VDD_3.3V
VDD_3.3V
VDD_VID
VDD_VID
VDD_VID
VDD_TMDS
VDD_TMDS
NC
NC
NC
NC
NC
NC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
ATI-U1-A31
POWER (K7 MOBILE)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A1
A26
AA6
AA21
AB5
AB15
AB22
AC23
AC4
AC17
AD3
AD11
AD15
AD24
AE2
AE25
AF1
AF2
AF25
AF26
B1
B2
B25
B26
C3
C24
D4
D23
E5
E22
F6
F21
G8
G9
G12
G13
G14
G19
G20
H7
J7
K13
K14
K20
L13
L14
L20
M3
M7
M13
M14
M24
N7
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R7
R13
R14
R20
T7
+3V
A A
RP3
AD16
AD17
AD18
AD19
2.2KX4
78
56
34
12
5
CPU_FID3 [3]
123456
78
RP2
10KX4
CPU_FID0 [3]
CPU_FID1 [3]
CPU_FID2 [3]
CPU_FID3 [3]
CPU Frequency
4
-PCIREQ[4,9]
-CBE3[4,8,13,20,21,22,30]
-CBE0[4,8,13,20,21,22,30]
R309 *10K
R308 2.2K
R32 10K
R290 2.2K
+3V
Disable internal clock generator
Normal operation
+3V
Disable external SIP ROM
3
(A12 ASIC)
Size Document Number Rev
2
Date: Sheet
PROJECT : K T 3 I
Quanta Computer Inc.
DAKT3IMB6B9
ATI-U1 PWR,GND
729Wednesday, March 19, 2003
1
of
2A
![](/html/2a/2ae2/2ae2ad644a7f3a987327fde18239c2ec847d1005b0d88ebb1cd01e5c3c96cec5/bg8.png)
5
C112 *10P
SERIRQ
-SCI
D D
-RC[23]
-SB_CPUINIT
Check TC7W08FU spec for
backdrive issue
KGA20[23]
-SB_A20M
C C
-BPCIRST
12
R311
10K
B B
CD_SDIN0
R134 *22
R112 10K
R102 4.7K
C135 150P
C134 150P
+3V
C553 *.1U
84
U28A
1
2
*TC7W08FU
R170 0
+3V
U28B
KGA20
6
5
*TC7W08FU
R162 0
+3V
5
U8A
1 6
7WZ14
R73
MAINON[11,23,27,29]
NMI
-SB_A20M
12
2.2K
7
3
12
PCLK_SB
+3V
+5V
D22
*RB500
D20
*RB500
C141
.1U
5
U8B
3 4
7WZ14
3
2
2N7002E
1
Y6
2 3
32.768KHZ-S
R80 10M
C72
10P
21
2
-CPUINIT [2]
21
-A20M [2]
22R178
5VPCU
13
Q9
DTA124EU
Q8
MDC_RING [23,24]
R74
100K
RTC
C632
12P
2 3
32.768KHZ-S
R348 10M
A A
C631
10P
Y5
41
S10W-RTC_X1
S10W-RTC_X2
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
5
R86
*1K
+5V
U35
1
MOT
2
3
4
5
6
7
8
9
10
11
12 13
VCC
X1
X2
EXTRAM
AD0
RCL#
AD1
AD2
INT#
AD3
RST#
AD4
AD5
VSS
AD6
R/-W
AD7
VSS CS#
BQ3285LF
32K
BC
DS
AS
24
23
22
21
20
19
18
17
16
15
14
Check BQ3285LF pin 23 function
R69 *10K R76 *1K
-IRQ8
R71 10K
R68 10K
RTC_DS
R66 10K
RTC_RW
R364 10K
RTC_AS
R372
1K
4
S10W-SB_X1
S10W-SB_X2
41
C76
10P
PWROK[11,12]
+5V
14M_SB[6]
SB_CLK32KO[9,30]
-SB_FERR[2]
R169 *10K
+3V
-IGNNE[2]
INTR[2]
NMI[2]
+3V
R315 *10K
SB_GPO29[9]
IOCHRDY[7,23]
AEN[9,23]
R314 *10K
+3V
R72 10K
+3V
PCLK_SB[6]
-FRAME[4,7,13,20,21,22,30]
-IRDY[4,7,13,20,21,22,30]
-TRDY[4,7,13,20,21,22,30]
-STOP[4,7,13,20,21,22,30]
-DEVSEL[4,7,13,20,21,22,30]
-SERR[4,7,13,20,21,22,30]
PAR[4,13,20,21,22,30]
-SBREQ[4,7]
-SBGNT[4,7]
-CBE[0..3][4,7,13,20,21,22,30]
AD[0..31][4,7,13,20,21,22,30]
-PCIRST [4,13,20,21,22,30]
IDERST [18]
12
1 2
1 2
12
R368 *10K
Q39
2
*DTC144EU
1 3
4
R88 10K
-BPCIRST
S10W-SB_X1
S10W-SB_X2
SB_CLK32KO
-SB_CPUINIT
NMI
-SB_A20M
SB_GPO29
IOCHRDY
AEN
12
PCLK_SB
-FRAME
-IRDY
-TRDY
-STOP
-DEVSEL
-SERR
PAR
-SBREQ
-SBGNT
-INTA[4,7]
-INTB[7,21]
-INTC[7,20,22]
-INTD[7,22]
-INTE[7]
-INTF[7,13,30]
RTC_EXRAM [9]
VCCRTC
5VSUS
VCCRTC
+5V
+5V
DHWPG [2,3,11,23]
-CBE0
-CBE1
-CBE2
-CBE3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
-INTA
-INTB
-INTC
-INTD
-INTE
-INTF
3
T20W-SBVCCF
GND
L12
F15
VCCG
GND
L13M8M9
+5V3VSUS 5VSUS
E10G6N6
N15
VCC5A1
VCC5A2
VCC5A3
ACMIDITXD_IRQ0O
ACMIDIRXD_IRQ3O
GND
GND
GND
GND
M10
M11
M12
R15
ACRESET#
ACSYNC
ACBITCLK
VCC5A4
VCC5A5
ACSDATAIN0
ACSDATAIN1
ACSDATAOUT
ACGPUP
ACGPDOWN
ACGPMUTE
ACGAME0
ACGAME1
ACGAME2
ACGAME3
ACGAME4
ACGAME5
ACGAME6
ACGAME7
ROMKBCS#
RUNENT0
RUNENT1
RUNENT2
RUNENT3
SA0_LAD0
SA1_LAD1
SA2_LAD2
SA3_LAD3
SA8_SD8
SA9_SD9
SA10_SD10
SA11_SD11
SA12_SD12
SA13_SD13
SA14_SD14
SA15_SD15
BIOSA16
BIOSA17
BIOSA18
GND
GND
GND
GND
M13N8N9
IRQSER
SIRQI
SIRQII
IRQ8#
PCS0#
PCS1#
SPLED
RTCAS
RTCRW
RTCDS
IOR#
IOW#
MEMR#
MEMW#
SA4
SA5
SA6
SA7
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
GND
GND
N10
N11
N12
+3V +3V
T10R6R8
R14R7R13
P15F6F7
F14P6G15
VCC3C1
VCC3C2
VCC3C3
VCC3C4
PART 1 OF 2
GND
GND
GND
GND
K11
K12
K13L8L9
GND
VCCF1
GND
L10
K16
VCCF2
GND
L11
U31A
U10
PWG
U4
SPDIFIN
C5
PCIRST#
D10
OSC14M
UPSPWR
GND
GND
VCCRTC
VCCR3E1
CPU INTERFACE
PCI BUS INTERFACE
GND
GND
GND
GND
GND
H11
H12
H13J8J9
C630
10UB
W6
OSC32KI
Y6
OSC32KII
V13
CLK32KO
A12
FERR#
T12
B13
CPURST
C14
INIT
C13
IGNNE#
B12
INTR
C12
NMI
A14
A20M#
N17
APICCS#_PCS2#
M17
APICREQ#
N18
M1535+
D4
C4
D5
C11
A10
D2
C9
C8
D8
C7
D7
C6
D6
C3
C2
C1
D3
D1
G2
G3
G4
G5
H4
APICGNT#
E5
LRCLK_PDMAGNT#
E4
SCLK_PDMAREQ#
T3
PCMDATA
E8
PCICLK
A3
FRAME#
IRDY#
TRDY#
A4
STOP#
B4
DEVSEL#
SERR#
B5
PAR
PHOLD#
PHLDA#
B7
CBE0#
A5
CBE1#
B3
CBE2#
CBE3#
A9
AD0
B9
AD1
AD2
A8
AD3
B8
AD4
AD5
AD6
A7
AD7
AD8
AD9
E7
AD10
A6
AD11
B6
AD12
AD13
AD14
E6
AD15
AD16
A2
AD17
B2
AD18
AD19
A1
AD20
B1
AD21
AD22
AD23
AD24
E3
AD25
E2
AD26
E1
AD27
F3
AD28
F2
AD29
F1
AD30
AD31
F4
INTA#_MI
F5
INTB#_S0
INTC#_S1
INTD#_S2
INTE#
INTF#_MOTORON#
H8H9H10
C637
.1U
T4
VCCR3E2
VCCR3E3
GND
GND
GND
J10
J11
3
VCCR5D1
VCCR5D2
GND
GND
J12
J13K8K9
GND
VCC3B
GND
GND
K10
GND
C614
10UB
GND
N13
2
Y9
CD_SYNCR
P4
CD_BITCLK
P5
CD_SDIN0
W9
CD_SDIN1
Y8
CD_SDOUTR
U1
U3
R5
U2
R4
R125 10K
T4
V1
V2
V3
W1
W2
W3
Y1
Y2
N19
N16
P16
Y12
P20
R16
Y13
T20
R20
R19
R18
Y3
V4
W4
Y4
T13
U13
R89 22
T14
R87 22
U14
SA0
V19
SA1
Y18
SA2
W18
SA3
V18
SA4
Y17
SA5
W17
SA6
V17
SA7
U17
SA8
T17
SA9
R17
SA10
Y16
SA11
W16
SA12
V16
SA13
U16
SA14
T16
SA15
W15
SA16
V15
SA17
U15
SA18
T15
U20
U19
U18
Y20
W20
V20
Y19
W19
2
-BIOSCS
C110
.1U
7
5
3
1
T7
1
3
5
7
1
3
5
7
RTC_AS
RTC_RW
RTC_DS
-SCI
TV_PRESENT
FIR_PRESENT
COM_PRESENT
SA[0..18]
SD[0..7]
L44 0B
RP17
8
6
4
2
10KX4
2
4
6
8
2
4
6
8
C118
.1U
RP15 10KX4
RP13 10KX4
SERIRQ
-IRQ8
-SB_PCS0
-SB_PCS1
SB_SPLED
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
1
-CD_RESET [14,15,22]
CD_SYNC [14,15,22]
CD_BITCLK_M [14,22]
CD_SDIN0 [14,15]
CD_SDIN1 [22]
CD_SDOUT [14,15,22]
3VSUS
C624
10UB
+5V
C566
10U
C99
C563
.1U
10UB
CD_BITCLK
C104
.1U
C122
.1U
C98
.1U
5VSUS
R412 10K
C101
.1U
C125
.1U
C120
.1U
C636
10U
C105
.1U
C111
.1U
C100
.1U
C119
.1U
C102
.1U
C121
C97
.1U
.1U
C124
.1U
C103
.1U
+3V
R128 33
R110 33
+5V
SERIRQ [13,30]
IRQ14 [18]
IRQ15 [18]
-SB_PCS0 [9]
-SB_PCS1 [9]
SB_SPLED [9]
-BIOSCS [9,23]
-SCI [23]
-IOR [7,23]
-IOW [7,23]
-MEMR [7,23]
-MEMW [7,23]
SA[0..18] [7,23]
+3V
Check this hareware detect
HARDWARE FEATURE DETECT
SD[0..7] [7,23]
Size Document Number Rev
Date: Sheet
TV_PRESENT
FIR_PRESENT
COM_PRESENT
PROJECT : K T 3 I
Quanta Computer Inc.
DAKT3IMB6B9
M1535+(PCI/ISA)
1
RP8 10KX4
1
3
5
7
R79 1K
R83 *1K
829Wednesday, March 19, 2003
of
2
4
6
8
C123
.1U
+5V
3C
![](/html/2a/2ae2/2ae2ad644a7f3a987327fde18239c2ec847d1005b0d88ebb1cd01e5c3c96cec5/bg9.png)
5
+3V 3VSUS
R78
R75
4.7K
4.7K
CLKSMCLK[6,10]
CLKSMDATA[6,10]
D D
C126 *10P
3VSUS
C C
B B
A A
RP7
10KX4
CLKSMCLK
CLKSMDATA
R81 0
IRQ12
IRQ12[23]
IRQ1[23]
-KBSMI[23]
48M_USB[6]
12
-OC2
34
-OC3
56
-OC1
78
PDD[0..15][18]
SDD[0..15][18]
1 2
IRQ1
1 2
R77 0
R138 *22
IR_SEL[24]
IR_RX[24]
IR_TX[24]
R167 10K
-AGP_BUSY[6]
-STP_AGP[6]
PDDREQ[18]
-PDDACK[18]
PIORDY[18]
-PDIOR[18]
-PDIOW[18]
-PDCS1[18]
-PDCS3[18]
PDA0[18]
PDA1[18]
PDA2[18]
PDD[0..15]
SDDREQ[18]
-SDDACK[18]
SIORDY[18]
-SDIOR[18]
-SDIOW[18]
-SDCS1[18]
-SDCS3[18]
SDA0[18]
SDA1[18]
SDA2[18]
SDD[0..15]
5
-OC0[25]
+5V
U31B
R95
R101
10K
4.7K
T2
SMBALERT#
T7
SMBCLK
U7
T2
T8
T10
USBPR0+
USBPR0USBPR1+
USBPR1USBPR2+
USBPR2USBPR3+
USBPR3-
-OC0
-OC1
-OC2 -RATIO
-OC3
PDA0
PDA1
PDA2
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SMBDATA
T11
MSCLK
T12
MSDATA
U11
U12
D11
G19
H18
H17
H16
G20
H20
H19
G17
D20
D18
C20
D19
G16
G18
C17
D17
C19
C18
D16
C15
D14
D13
D15
C16
V12
V9
H5
W8
V8
U9
Y7
W7
V7
U8
T8
T5
T6
U5
U6
L4
L3
M1
E9
E11
J17
J18
J16
F20
F18
F16
E19
B20
E18
E20
F17
F19
B18
A18
E17
A20
A19
B19
A17
B16
E15
A15
E13
E14
B15
A16
E16
B17
KEY I/F
KBINH_IRQ1I
KBCLK
KBDATA
USBPWREN#
USBCLK
USBP0P
USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
OVCR0#/SEL_MODE0/H0_OVCR#
OVCR1#/SEL_MODE1/H1_OVCR#
OVCR2#/INC_CCFT/USB5N
OVCR3#/DEC_CCFT/USB6N
IRRXH
IRRX
IRTX
IrDA
CLK66
AGPBUSY_CBLIDP
AGPSTP#_CBLIDS
PIDEDRQ
PIDEDAK#
PIDERDY
PIDEIOR#
PIDEIOW#
PIDECS1#
PIDECS3#
PIDEA0
PIDEA1
PIDEA2
PIDED0
PIDED1
PIDED2
PIDED3
PIDED4
PIDED5
PIDED6
PIDED7
PIDED8
PIDED9
PIDED10
PIDED11
PIDED12
PIDED13
PIDED14
PIDED15
SIDEDRQ
SIDEDAK#
SIDERDY
SIDEIOR#
SIDEIOW#
SIDECS1#
SIDECS3#
SIDEA0
SIDEA1
SIDEA2
SIDED0
SIDED1
SIDED2
SIDED3
SIDED4
SIDED5
SIDED6
SIDED7
SIDED8
SIDED9
SIDED10
SIDED11
SIDED12
SIDED13
SIDED14
SIDED15
M1535+
4
PART 2 OF 2
CLKRUN#_IRQ12O
OFFCDPWR_RSMENT3
IDE INTERFACE
IC M1535 ALI SB + SUPER IO
4
FANIN2/USBP6P
FANOUT1/USB5P
FANOUT2/USB5P
NC1/SPDIF_OU
LFRAME#
LDRQ#
LLB#_CPUPWG
GPO34
GPO35
PWRBTN#
ACPWR
THRM#
RSMRST#
STPCLK#
SLEEP#
ZZ_RATIO#
CPUSTP#
PCISTP#
USB INTERFACE
PCIREQ#
OFFPWR0
OFFPWR1
OFFPWR2
SQWO
SLPBTN#
SUSPEND#
DRV0#
DRV1#
MOT0#
MOT1#
FDDIR#
STEP#
HDSEL#
WDATA#
DENSEL
WGATE#
RDATA#
TRK0#
INDEX#
WPROT#
FLOPPY DISK INTERFACESERIAL PORT INTERFACE
DSKCHG#
RTS1#
CTS1#
DTR1#
DSR1#
DCD1#
SOUT1
RTS2#
CTS2#
DTR2#
DSR2#
DCD2#
SOUT2
PRINIT#
SLCTIN#
STROB#
AUTOFD#
PRNACK#
ERROR#
PRINTER PORT INTERFACE
SPKR
PME#
SMI#
RI1#
SIN1
RI2#
SIN2
SLCT
BUSY
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
3
5VSUS
T1
Y5
T3
W5
T6
V5
D9
N20
P17
W11
LB#
Y11
P18
P19
T19
Y15
Y10
T18
W12
V11
RI#
W10
A13
B14
D12
E12
C10
B10
B11
V14
W14
Y14
V6
V10
W13
A11
T9
K19
K20
K17
K18
L16
L17
M19
L18
J19
L19
M18
L20
J20
M16
M20
H1
J4
J3
H3
G1
J2
H2
J5
K3
K1
L2
K5
J1
L1
K4
K2
R2
R3
P1
R1
L5
M4
M3
T1
M5
PE
P2
P3
N1
N2
N3
N4
N5
M2
R168 *10K
-SB_LFRAME
-SB_LDRQ
-SB_LB
-BATLOW
SB_GPO34
SB_GPO35
-DNBSWON
-SWI
-SYS_THROT
-PCI_PME
-SB_RI
-RSMRST
T13
R163 *0
T5
SB_SQWO
-SB_LID
-SUSA
-PCLKRUN
R133 10K
-DRV0
-MTR0
-DIR
-STEP
-HEAD
-WDATA
-3MODE
-WGATE
-RDATA
-TRK0
-INDEX
-WP
-DSKCHG
-RTS1
-CTS1
-DTR1
-DSR1
-DCD1
-RI1
RXD1
TXD1
-RTS2
-CRT_SENSE
-TEMP_ALARM
-OCCB
FDD_PRESENT
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
R166 10K
T9
D11 RB500
T11
-BATLOW [23]
PCSPK [17]
-DNBSWON [23]
-SWI [23]
-SYS_THROT [23]
-PCI_PME [13,20,21,22,30]
-RSMRST [11]
-SMI [2]
-STPCLK [2]
-CPUSTP [6]
-PCISTP [6]
-PCIREQ [4,7]
-SUSA [6,11,23]
-PCLKRUN [6,7,13,20,22,30]
3VSUS
2 1
-RTS1 [19]
-CTS1 [19]
-DTR1 [19]
-DSR1 [19]
-DCD1 [19]
-RI1 [19]
RXD1 [19]
TXD1 [19]
-CRT_SENSE [19,22]
-TEMP_ALARM [25]
RTC_EXRAM [8]
PDMA66 [18]
-OCCB [13]
-COM1PD [19]
-PINIT [19,22]
-SLCTIN [19,22]
-STROBE [19,22]
-AUTOFD [19,22]
SLCT [19,22]
BUSY [19,22]
-ACK [19,22]
-ERROR [19,22]
PE [19,22]
PD[0..7] [19,22]
+3V
+3V
3
5VSUS
+5V
-SUSB [23]
-SUSC [23]
-LID-SW [12,24]
-SYS_THROT
3VSUS
C711 *.1U
C712 *.1U
C747 *.1U
RP5 10KX4
RP6 10KX4
RP19 10KX4
R100 4.7K
Q7
1 3
*DTC144EU
C759 *.1U
2 1
2
D12
RB500
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
12
34
56
78
-SUSA
12
-SB_RI
34
-BATLOW
56
-DNBSWON
78
-CRT_SENSE
12
-OCCB
34
-SB_LFRAME
56
-SB_LDRQ
78
BRI1
IRQ1
IRQ12
-SWI
-SB_LID
-PCI_PME
-SB_RI [13]
-MODEM_RI [23]
BRI1 [19,22]
R135 2.2K
R137 10K
R139 10K
R93 1K
R90 1K
R82 1K
R114 10K
R109 10K
R344 *10K
R106 10K
R94 1K
R113 10K
R111 10K
R105 10K
R108 10K
FDD_PRESENT FDD_PRESENT
SB_SPLED
9/3
USBPR0+
USBPR0USBPR1+
USBPR1-
USBPR2+
USBPR2USBPR3+
USBPR3-
-TEMP_ALARM
-RTS2
-RTS1
SB_CLK32KO
SB_SQWO
-SB_PCS0
-SB_PCS1
SB_GPO34
-SB_LB
SB_GPO29
AEN
-BIOSCS
SB_GPO35
2
+5V
-DRV0[18]
R91
10K
R369
15K
R365
15K
L70
2 1
HI0805Q310R-00
R373
15K
R362
15K
T40W-FDDVCC
-INDEX
-DRV0 -DRV0
R487 220
-DSKCHG
-MTR0
-DIR
-3MODE
-STEP -RDATA
-WDATA
-WGATE
-TRK0
-WP
-RDATA
-HEAD
R380 27
R377 27
R374 27
R370 27
R379
R376
15K
15K
R350 27
R352 27
R363 27
R366 27
R351
R349
15K
15K
FDD
JPFDD1
27
1
28
2
29
3
30
4
31
5
32
6
33
7
34
8
35
9
36
10
37
11
38
12
39
13
40
14
41
15
42
16
43
17
44
18
45
19
46
20
47
21
48
22
49
23
50
24
51
25
52
26
FDD_26P(88203-2660)
C646
47P
C645
47P
-INDEX
-DSKCHG
C655
47P
C642
47P
High
Internal KEY PS2 MODE
Enable internal KEY
SIO Base ADDR 0x3F0
SB_CLK32KO [8,30]
SB_SPLED [8]
-SB_PCS0 [8]
-SB_PCS1 [8]
SB_GPO29 [8]
AEN [8,23]
-BIOSCS [8,23]
Size Document Number Rev
2
Date: Sheet
32K CLK Test Mode Enable
AT power Mode
Pentium II mode
Disable 4Mb Flash ROM mode
GPI24,GPO30 functions
Disable Chip test mode
Active high topower
H , H Normal operation
Flash ROM
modeselection
Quanta Computer Inc.
M1535+(IDE,FDD)
1
C161
.1U
.1U
2 1
2 1
C659
47P
C633
47P
-INDEX
-TRK0
-WP
-DSKCHG
-HEAD
USBP0+ [22,25]
USBP0- [22,25]
USBP1+ [22,25]
USBP1- [22,25]
USBP2+ [22]
USBP2- [22]
USBP3+ [22]
USBP3- [22]
-MTR0
-DIR
-3MODE
-STEP
-WDATA
-WGATE
-TRK0
-WP
-RDATA
-HEAD
C656
47P
C634
47P
Low
Internal KEY AT MODE
Disable internal KEY
SIO Base ADDR 0x370
32K CLK Test Mode Disable
ATX power Mode
Pentium/K7 mode
Enable 4Mb Flash ROM mode
IOCHRDY,AEN functions
Enable Chip test mode
Active low topower
L,L Reserve
L,H Enable 8Mb Flash ROMsize
H,L Disableall FUNC in this CONFIG
L,L Enable LPC Flash ROM
PROJECT : KT3I
DAKT3IMB6B9
929Wednesday, March 19, 2003
1
C160
RP30 1KX4
of
12
C521
4.7UB
R199 1K
1
3
5
7
R475 *1K
+5V
12
2
4
6
8
12
3C