HP 14-BW053AU Schematics
5
4
3
2
1
01
PCB 6L STACK UP
NFL-C 14" AMD SR FT4 DIS/UMA Block Diagram
D D
C C
PAGE 24
SATA to eMMC
OZ788WR2
On DB
eMMC 32G/64G
On DB
B B
A A
25MHz
DDR4 SODIMM0
Maxima 8GBs
STD
PAGE 10
DDR4 SODIMM1
Maxima 8GBs
RVS
PAGE 11
Port1 Port2
LAN CHIP
RTL8166EH-CG
RTL8111HSH-CG
PAGE 24
TRANSFORMER
NS681684RJ45 Conn
GST5009B
PAGE 24
SATA - HDD
SATA - SSD - NGFF
PAGE 30
SATA - ODD
2nd SSD - NGFF
PAGE 29 & DB
SPI INTERFACE (1.8V)
TPM SLB9665TT2.0
PAGE 28
Keyboard
Touch Pad
FAN
PAGE 27
PAGE 27
PAGE 27
DDR4 1867 MT/s
DDR4 1867 MT/s
PCIE INTERFACE
M2230
WLAN/BT
PAGE 26
SATA0 6GB/s
SATA1 6GB/s
LPC INTERFACE
ENE KB9027B
Embedded Controller
TOP
Power :
Package : LQFP 128P
Size : 14 x 14 (mm)
SPI ROM
PAGE 30
PAGE 31
AMD APU
Processor : Stoney Ridge
Power : 15 or 6 (Watt)
Package : FT4 BGA
Size : 24.5 x 24.5 (mm)
PAGE 02-09
Azalia
ALC3227-CG
Audio Codec
Power :
Package : MQFN
Size : 6 x 6 (mm)
PAGE 22
Speaker
Digital MIC
PAGE 22
48MHz
Gen3 x4 Lane
HP
MIC
PAGE 21
DP Port0
DP Port1
DP Port2
USB3 INTERFACE
USB2 INTERFACE
USB2.0 CONN
On DB
USB3.0 to SATA IC
VL711
Combo Jack
PAGE 22
AMD R17M-M1-70 64 bit
AMD R17M-M1-30 64 bit
Power : 25 (Watt)
Package : S3
Size : 23 x 23 (mm)
PAGE 13-17
DP to CRT IC
PAGE 20RDT2166-CG
USB3.0 CONN
PAGE 24
Touch screen
PAGE 21
Port4
USB3.0 CONN
PAGE 26
PAGE 24
VRAM DDR3 x 4 (1000 MHz)
256M x 16 x 8
256M x 16 x 4
Max 4GBs
27MHz
PAGE 14
eDP CONN
HDMI CONN
CRT CONN
Port2Port1
USB3.0 CONN
PAGE 24
Port2
Camera
PAGE 21 PAGE 30
Port5
USB3.0 CONN
PAGE 21
PAGE 23
PAGE 20
USB3.0 to SATA IC
VL711
Port3Port1Port0
M2230
WLAN/BT
Port6
PAGE 24
PAGE 18.19
Port0
PAGE 26
Port7
Card Reader
AK6485
On DB
SATA ODD
PAGE 29
LAYER 1 : TOP
LAYER 2 : SGND
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : SVCC
LAYER 6 : BOT
Power Source
BQ24738HRGRR
System Charge Power
(+BATCHG)
PAGE 33
SY8286BRAC/SY8286CRAC
System Power
(+3VPCU/+5VPCU/+3VS5/+5VS5)
PAGE 34
RT8231BGQW/G9661MF11U
System Memory Power
(+1.2VSUS/+0.6V_DDR_VTT/+2.5VSUS)
PAGE 35
G9661MF11U/G9661MF11U
Processor Power
(+0.95VS5/1.5VS5)
PAGE 36
AOZ2260QI-18/RT8068AZQW
Processor Power
(+0.95V/+1.8VS5)
PAGE 37
RT3662ACGQW
Processor Power
(+VCC_CORE/+VDDNB_CORE)
PAGE 38.39
RT3662EBGQW
Processor Power
(+APU_VDDGFX)
BR only
PAGE 40.41
G2042RD1U/G9336ADJTP1U
Processor Power
(+VDDCR_FCH_S5/+0.775VS5)
PAGE 42
APL3523A *3
System Power
(+3/+3VLANVCC/+5V/+3VSUS/
+1.5V/+1.8V_ROM/+1.8V)
RT3662EBGQW/AOZ2260QI-18
DGPU Power
(+VGA_CORE/+1.5V_VGA)
PAGE 43
PAGE 44~46
RT8068AZQW/APL3523AQBI-TRG
DGPU Power
(+1.0V_VGA/+3V_VGA/+1.8V_VGA)
PAGE 47
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Block Diagram
Block Diagram
NB5
NB5
5
4
3
2
NB5
Block Diagram
Date: Sheet
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
of
148Wednesday, March 08, 2017
148Wednesday, March 08, 2017
148Wednesday, March 08, 2017
5
4
3
2
1
02
D D
U1B
U4
P_GPP_RXP0
U5
P_GPP_RXN0
R8
PCIE_RXP1_LAN24
PCIE_RXN1_LAN24
PCIE_RXP2_WLAN30
PCIE_RXN2_WLAN30
C C
PEG_RXP013
PEG_RXN013
+0.95V +0.95V
C14
0.1u/16V_4
B B
R2
196_1%_4
PEG_RXP113
PEG_RXN113
PEG_RXP213
PEG_RXN213
PEG_RXP313
PEG_RXN313
P_ZVDDP_P_TX_ZVDD_095
R10
R5
R4
N4
N5
L5
L4
J5
J4
G5
G4
D7
E7
U8
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3
P_GFX_R XP0
P_GFX_R XN0
P_GFX_R XP1
P_GFX_R XN1
P_GFX_R XP2
P_GFX_R XN2
P_GFX_R XP3
P_GFX_R XN3
P_ZVDDP
PCIE
For GPU
FT4 REV 0.93
*FT4
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_ZVSS
PCIE_TXP0
D2
D1
PCIE_TXP1_LAN_C
C2
PCIE_TXN1_LAN_C
C1
PCIE_TXP2_WLAN_C
B2
PCIE_TXN2_WLAN_C
B1
PCIE_TXP3
A3
B3
GFX_TX0P_C
A4
GFX_TX0N_C
B4
GFX_TX1P_C
A5
GFX_TX1N_C
B5
GFX_TX2P_C
A6
GFX_TX2N_C
B6
GFX_TX3P_C
A7
GFX_TX3N_C
B7
P_ZVSS_P_RX_ZVDD_095
W8
TP48
C4 0.1u/16V_4
C5 0.1u/16V_4
C6 0.1u/16V_4
C7 0.1u/16V_4
TP1
C8 0.22u/10V_4
C9 0.22u/10V_4
C10 0.22u/10V_4
C11 0.22u/10V_4
C12 0.22u/10V_4
C13 0.22u/10V_4
C15 0.22u/10V_4
C16 0.22u/10V_4
PCIE_TXP1_LAN 24
PCIE_TXN1_LAN 24
PCIE_TXP2_WLAN 30
PCIE_TXN2_WLAN 30
PEG_TXP0 13
PEG_TXN0 13
PEG_TXP1 13
PEG_TXN1 13
PEG_TXP2 13
PEG_TXN2 13
PEG_TXP3 13
PEG_TXN3 13
R3
196_1%_4
LAN
WLAN
GPU
TOP BSQQBCON PN
A9-9420
AJ094208T02
AJ094208T01
AJ09220RT00A6-9220 AJ09220RT01
AJ09120UT00A4-9120 AJ09120UT01
AJ00920UT00A6-9200e AJ00920UT01
E2-9000e
AJ900EAVT01
AJ900EAVT00
A A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB5
NB5
5
4
3
2
NB5
Date: Sheet
Date: Sheet
Date: Sheet
ST 1/7(PCIE)
ST 1/7(PCIE)
ST 1/7(PCIE)
Wednesday, March 08, 2017 2 48
Wednesday, March 08, 2017 2 48
Wednesday, March 08, 2017 2 48
1
1A
1A
1A
of
of
of
5
4
3
2
1
M_A_DQ[0..63] 10,11
+1.2VSUS
2
NB5
NB5
NB5
03
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ST 2/7(MEM)
ST 2/7(MEM)
ST 2/7(MEM)
Wednesday, March 08, 2017 3 48
Wednesday, March 08, 2017 3 48
Wednesday, March 08, 2017 3 48
1
of
of
of
1A
1A
1A
M_A_A[13:0]10,11
D D
M_A_BG#110,11
M_A_ACT#10,11
M_A_BS#010,11
M_A_BS#110,11
M_A_BG#010,11
M_A_DM[7..0]10,11
C C
M_A_DQSP010,11
M_A_DQSN010,11
M_A_DQSP110,11
M_A_DQSN110,11
M_A_DQSP210,11
M_A_DQSN210,11
M_A_DQSP310,11
M_A_DQSN310,11
M_A_DQSP410,11
M_A_DQSN410,11
M_A_DQSP510,11
M_A_DQSN510,11
M_A_DQSP610,11
M_A_DQSN610,11
M_A_DQSP710,11
M_A_DQSN710,11
M_A0_CLKP010
M_A0_CLKN010
B B
A A
M_A0_CLKP110
M_A0_CLKN110
M_A1_CLKP011
M_A1_CLKN011
M_A1_CLKP111
M_A1_CLKN111
M_A_RST#10,11
M_A_EVENT#10,11
M_A0_CKE010
M_A0_CKE110
M_A1_CKE011
M_A1_CKE111
M_A0_ODT010
M_A0_ODT110
M_A1_ODT011
M_A1_ODT111
M_A0_CS#010
M_A0_CS#110
M_A1_CS#011
M_A1_CS#111
M_A_RAS#10,11
M_A_CAS#10,11
M_A_WE#10,11
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BG#1
M_A_ACT#
M_A_BS#0
M_A_BS#1
M_A_BG#0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_VREF
TP2
5
4
AG38
W35
W38
W34
U38
U37
U34
R35
R38
N38
AG34
R34
N37
AN35
AJ38
AG35
N34
B35
D40
K40
T41
AE41
AL40
AU40
BA37
B36
A36
E40
D41
K41
U41
U40
AF41
AE40
AM40
AM41
AV40
AV41
BA36
AY36
AC35
AC34
AA34
AA32
AE38
AE37
AA37
AA38
G38
AA41
AN37
AU38
AL34
AN34
AL35
AR37
AJ34
AR38
AJ37
AN38
AL38
AA40
Y41
L38
L35
L40
J38
J34
L34
J37
U1A
M_ADD0
M_ADD1
M_ADD2
M_ADD3
M_ADD4
M_ADD5
M_ADD6
M_ADD7
M_ADD8
M_ADD9
M_ADD10
M_ADD11
M_ADD12
M_ADD13
M_ADD14/M_BG1
M_ADD15/M_ACT_L
M_BANK0
M_BANK1
M_BANK2/M_BG0
M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7
M_DQS_H0
M_DQS_L0
M_DQS_H1
M_DQS_L1
M_DQS_H2
M_DQS_L2
M_DQS_H3
M_DQS_L3
M_DQS_H4
M_DQS_L4
M_DQS_H5
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7
M_CLK_H0
M_CLK_L0
M_CLK_H1
M_CLK_L1
M_CLK_H2
M_CLK_L2
M_CLK_H3
M_CLK_L3
M_RESET_L
M_EVENT_L
M0_CKE0
M0_CKE1
M1_CKE0
M1_CKE1
M0_ODT0
M0_ODT1
M1_ODT0
M1_ODT1
M0_CS_L0
M0_CS_L1
M1_CS_L0
M1_CS_L1
M_RAS_L/M_RAS_L_ADD16
M_CAS_L/M_CAS_L_ADD15
M_WE_L/M_WE_L_ADD14
M_VREF
M_VREFDQ
MEMORY
FT4 REV 0.93
*FT4
3
M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7
M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15
M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23
M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31
M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39
M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47
M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55
M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63
M_ZVDDIO_MEM_S3
A34
B34
A38
B38
A33
B33
A37
B37
B41
C40
F41
G40
A40
B40
E41
F40
J40
J41
N40
N41
H40
H41
M40
M41
R40
T40
W40
Y40
P40
P41
V40
V41
AD41
AD40
AH41
AH40
AB40
AC40
AF40
AG40
AK41
AK40
AP41
AP40
AJ41
AJ40
AN41
AN40
AT40
AU41
AY40
BA40
AR40
AT41
AW40
AY41
BA38
AY37
BA34
BA33
AY39
AY38
AY35
AY34
AB41
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_ZVDDIOM_A_VREFDQ
R4 39.2_1%_4TP46
5
4
3
2
1
+1.8V +1.8V
APU_PROCHOT#_R
APU_ALERT#APU_PWRGD
APU_SIC
APU_SID
Thermal Sensor
CPU_PWRGD_SVID_REG38
12/21 change to shortpad
R18
*1K_1%_4
SVT
SVC
SVD
APU_SIC
APU_SID
APU_PROCHOT#_R
APU_DPST_PWM_R
4
U1C
DISPLAY/SVI2/JTAG/TEST
AE34
AM15
AM17
AM19
AP13
AP15
AP17
AR13
AR15
AR17
AU13
AU15
AU17
AV11
AV13
AV15
AV17
H27
SVT
E27
SVC
D27
SVD
B30
SIC
B29
SID
A30
ALERT_L
A31
PROCHOT_L
G25
PWROK
D29
RESET_L
B25
TDI
A27
TDO
B27
TCK
B26
TMS
A29
TRST_L
A26
DBRDY
A25
DBREQ_L
D9
RSVD_1
D11
RSVD_2
D13
RSVD_3
E4
RSVD_4
E31
RSVD_5
H11
RSVD_6
H13
RSVD_7
L11
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
AN8
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_17
RSVD_18
RSVD_19
AU4
RSVD_20
RSVD_21
RSVD_22
RSVD_23
AV7
RSVD_24
AV9
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
AY3
RSVD_30
AY7
RSVD_31
FT4 REV 0.93
DP_STEREOSYNC/TEST36
*FT4
DP_VARY_BL
DP_AUX_ZVSS
VDDCR_CPU_SENSE
VDDCR_NB_SENSE
VDDIO_MEM_S3_SENSE
VDDP_SENSE
VSS_SENSE_A
VSS_SENSE_B
R15 *0_4/S
TP3
SVT
SVC
SVD
APU_SIC
APU_SID
APU_ALERT#
APU_PROCHOT#_R
APU_PWRGD
APU_RST#
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
HDT+ Connector for Debug only
Can remove on MP
CPU_LDT_RST_HTPA#
U3
74LVC2G07GW
APU_RST#
APU_PWRGD
1
2
GND
3
A24Y2
A1
Y1
VCC
+3V
C21
0.1u/16V_4
APU_RST#
3 5
+3V
APU_RST_L_BUF
APU_PWROK_BUF
1
2
U2
TC7SH08FU(F)
C25
0.1u/16V_4
R43
1K_1%_4
3
+1.8V
4
6
5
APU_LVDS_BLON_R
B23
DP_BLON
APU_DISP_ON_R
B24
DP_DIGON
APU_DPST_PWM_R
A24
DP_AUX_ZVSS
D21
DP_ZVSS
B18
DP_ZVSS
G15
DP0_AUXP
H15
DP0_AUXN
D15
DP0_HPD
G17
DP1_AUXP
H17
DP1_AUXN
D17
DP1_HPD
G19
DP2_AUXP
H19
DP2_AUXN
D19
DP2_HPD
A9
DP0_TXP0
B9
DP0_TXN0
A10
DP0_TXP1
B10
DP0_TXN1
A11
DP0_TXP2
B11
DP0_TXN2
A12
DP0_TXP3
B12
DP0_TXN3
A14
DP1_TXP0
B14
DP1_TXN0
A15
DP1_TXP1
B15
DP1_TXN1
A16
DP1_TXP2
B16
DP1_TXN2
A17
DP1_TXP3
B17
DP1_TXN3
A19
DP2_TXP0
B19
DP2_TXN0
A20
DP2_TXP1
B20
DP2_TXN1
A21
DP2_TXP2
B21
DP2_TXN2
A22
DP2_TXP3
B22
DP2_TXN3
DP_STEREOSYNC: HDMI enable pin.
APU_THERMDA
H29
TEST4
APU_THERMDC
G29
TEST5
APU_TEST6
H25
TEST6
APU_TEST9
R32
TEST9
APU_TEST10
N32
TEST10
APU_TEST14
G21
TEST14
APU_TEST15
H21
TEST15
APU_TEST16
D23
TEST16
APU_TEST17
E23
TEST17
APU_TEST18
A28
TEST18
APU_TEST19
B28
TEST19
APU_TEST28_H
N8
TEST28_H
APU_TEST28_L
N10
TEST28_L
APU_TEST31
H31
TEST31
DP_STEREOSYNC
D25
APU_TEST41
B31
TEST41
CPU_VDD0_RUN_FB_H
D31
CPU_VDDNB_RUN_FB_H
E33
MEM_SENSE
D35
VDDP_SENSE
AM21
VSS_SENSE
D33
VDDP_VSS_SENSE
AM23
CPU_VDD0_RUN_FB_H
CPU_VDDNB_RUN_FB_H
+1.8V
TP19
Close to HDT & No remove.
R44
1K_1%_4
APU_TDI
APU_TCK
APU_TMS
APU_TRST#
APU_DBREQ#
R13 150_1%_4
R14 2K_1%_4
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
R34 *0_4/S
TP16
TP17
TP18
APU_TEST18
APU_TEST19
APU_RST_L_BUF
CPU_LDT_RST_HTPA#
APU_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_TDO
APU_PWROK_BUF
R45 1K_1%_4
R46 1K_1%_4
R47 1K_1%_4
R48 1K_1%_4
R49 1K_1%_4
INT_eDP_AUXP 21
INT_eDP_AUXN 21
EDP_HPD 21
INT_HDMI_AUXP 23
INT_HDMI_AUXN 23
HDMI_HPD_Q 23
INT_CRT_AUXP 20
INT_CRT_AUXN 20
CRT_HPD 20
INT_eDP_TXP0 21
INT_eDP_TXN0 21
INT_eDP_TXP1 21
INT_eDP_TXN1 21
IN_D2 23
IN_D2# 23
IN_D1 23
IN_D1# 23
IN_D0 23
IN_D0# 23
IN_CLK 23
IN_CLK# 23
CRT_TXP0 20
CRT_TXN0 20
CRT_TXP1 20
CRT_TXN1 20
R26 *1K_1%_4
R27 *1K_1%_4
R28 *1K_1%_4
R29 1K_1%_4
R31 1K_1%_4
R32 1K_1%_4
R33 *1K_1%_4
CPU_VDD0_RUN_FB_H 38
CPU_VDDNB_RUN_FB_H 38
CPU_VDD0_RUN_FB_L 38
DIFFERENTIAL ROUTING
HDT1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
21
1
22
*HDT CONN
88511-2001-20p-l
+1.8V
eDP
HDMI
CRT
+1.8V
APU_LVDS_BLON_R
Q2A
DMN5L06DWK-7
Q2B
DMN5L06DWK-7
APU_DISP_ON_R
01/04 change location name
01/04 change location name
2
C18
*150p/50V_4
APU_RST#
APU_RST#
APU_PWRGD
C17
*150p/50V_4
R19 *0_4/S
R20 *0_4/S
R22 *0_4/S
R16
*1K_1%_4
R6 1K_1%_4
R8 1K_1%_4
R9 1K_1%_4
R12 1K_1%_4
+1.8V
R17
*1K_1%_4
R5 301_1%_4
R7 301_1%_4
D D
APU Serial VID
CPU_SVT38
CPU_SVC38
CPU_SVD38
Place near APU within 500mil
C C
CRB: SVC & SVD 22 ohm follow check list 0 ohm.
+3V
R25
R24
2.2K_5%_4
2.2K_5%_4
MBCLK211,20,31
MBDATA211,20,31
+1.8V
5
3 4
6 1
Q3A
DMN5L06DWK-7
Q3B
DMN5L06DWK-7
2
+3V
R35
R36
2.2K_5%_4
2.2K_5%_4
APU_PROCHOT#5
B B
APU_DPST_PWM21
+1.8V
+1.8V
5
3 4
6 1
Q4A
DMN5L06DWK-7
Q4B
DMN5L06DWK-7
2
+1.8V
11/22 short pad
EC H_PROCHOT#
VRHOT38
H_PROCHOT#31
A A
5
R40 *0_4/S
R41 *0_4/S
C24
220p/50V_4
APU_PROCHOT#
+3V
+1.8V
5
R10
R11
2.2K_5%_4
2.2K_5%_4
34
61
2
D2 RB500V-40
2
D3 RB500V-40
2
+1.8V
CPU Thermal Protect
+3VPCU
R21
16.5K_1%_4
R23
3.3K_1%_4
THERMISTOR
12
TM1
100K_NTC_4_3%
Pipe Thermal Protect
+3VPCU
R38
16.5K_1%_4
R39
3.3K_1%_4
THERMISTOR_SHDN
12
TM0
100K_NTC_4_3%
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB5
NB5
NB5
Date: Sheet
Date: Sheet
Date: Sheet
1
1
C19
0.1u/16V_4
THERMISTOR 31
C20
0.1u/16V_4
1/7 Swap net name
C22
0.1u/16V_4
1/7 Swap net name
THERMISTOR_SHDN 31
C23
0.1u/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
BR & SR 3/7(DIS/MISC)
BR & SR 3/7(DIS/MISC)
BR & SR 3/7(DIS/MISC)
Wednesday, March 08, 2017 4 48
Wednesday, March 08, 2017 4 48
Wednesday, March 08, 2017 4 48
1
04
APU_LVDS_BLON 21
PCIE_RST# 5,13,24,30
APU_DISP_ON 21
1A
1A
1A
of
of
of
5
D D
RSMRST#31
+3V
R68 2.2K_5%_4
R70 2.2K_5%_4
R71 10K_1%_4
C C
B B
R73 10K_1%_4
G1 *0_5%_4
+3VS5
R78 2.2K_5%_4
R81 2.2K_5%_4
R84 10K_1%_4
R85 10K_1%_4
R87 *10K_1%_4
R90 10K_1%_4
+1.8V
+1.8V
R91 10K_1%_4
R184 10K_1%_4
SMB_RUN_CLK
SMB_RUN_DAT
PCIE_CLKREQ_CARD#
CLKREQG#
SYS_RST#
SMB_ALW_CLK
SMB_ALW_DAT
DNBSWON#
PCIE_WAKE#
DGPU_PWROK
SSD_DET#
EGPIO148
ODD_DET#
+1.8VS5
PCIE_RST#4,13,24,30
R67
47K_1%_4
2
1
D4
RB500V-40
C28
1u/6.3V_4
12/21 change to shortpad
to DDR3 SMBUS
AZ_BITCLK PD 10K(DNI) follow check list
to TP SMBUS
11/25 change net name to EMMC_DET
HDA INTERFACE
ACZ_SDOUT_AUDIO22
ACZ_SYNC_AUDIO22
BIT_CLK_AUDIO22
ACZ_RST#_AUDIO22
ACZ_SDIN022
R99 33_5%_4
R100 33_5%_4
R101 33_5%_4
EC2 15p/50V_4
R102 33_5%_4
ACZ_SDOUT_R
ACZ_SYNC_R
ACZ_BCLK_R
ACZ_RST#_R
ACZ_SDIN0
GPU CLK REQ
A A
DGPU_PR_EN31,44,47
5
DIS: Stuff
UMA: No Stuff
R105 30K_1%_4
C33
0.47u/6.3V_4
Q5
2
METR5213-G
1 3
APU_S5_MUX_CTRL42
PCIE_CLKREQ_LAN#24
PCIE_CLKREQ_WLAN#30
CLKREQG#
4
DNBSWON#31
SYS_RST#6
PCIE_WAKE#24,30
SUSB#31
SUSC#31
DGPU_PWROK31,44,46,47
PCI_SERR#31
TP22
ODD_PWR26,29
TP23
R75 *10K_1%_4
R76 *10K_1%_4
R77 10K_1%_4
R79 10K_1%_4
R80 1K_1%_4
R82 1K_1%_4
R83 1K_1%_4
ODD_DET#29
EGPIO14830
C30
18p/50V_4
C31
18p/50V_4
4
R66 33_5%_4
C26 150p/50V_4
C27 *0.1u/16V_4
R69 *0_4/S
12
Y1
32.768KHZ/20ppm
SYS PWRGD
PCIE_RST#_C
RSMRST#_R
DNBSWON#
SYS_PWRGD
SYS_RST#
PCIE_WAKE#
C29 *100p/50V_4
DGPU_PWROK
APU_TEST0
APU_TEST1
APU_TEST2
PCI_SERR#_R
LLB#
PCIE_CLKREQ_CARD#
CLKREQG#
JTAG_TRST#
ACZ_BCLK_R
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDOUT_R
BOARD_ID8
EMMC_DET
ODD_DET#
EGPIO148
R92
20M_5%_4
CPU_VRM8380_PG38
ECPWROK31
32K_X1
32K_X2
AE4
PCIE_RST_L/EGPIO26
AG1
RSMRST_L
AD2
PWR_BTN_L/AGPIO0
AE2
PWR_GOOD
AF1
SYS_RESET_L/AGPIO1
AE7
WAKE_L/AGPIO2
AC2
SLP_S3_L
AG4
SLP_S5_L
AB1
S0A3_GPIO/AGPIO10
AA7
S5_MUX_CTRL/EGPIO42
AF2
TEST0
AE1
TEST1/TMS
AC8
TEST2
AH2
AC_PRES/USB_OC4_L/IR_RX0/AGPIO23
AA4
IR_TX0/USB_OC5_L/AGPIO13
AG8
IR_TX1/USB_OC6_L/AGPIO14
AL5
IR_RX1/AGPIO15
AE8
IR_LED_L/LLB_L/AGPIO12
AY32
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
AY31
CLK_REQ1_L/AGPIO115
AV29
CLK_REQ2_L/AGPIO116
AP31
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
AV35
CLK_REQG_L/OSCIN/EGPIO132
AB2
USB_OC0 _L/TR ST_L/A GPIO1 6
AG2
USB_OC1 _L/TD I/AGPI O17
AJ1
USB_OC2 _L/TC K/AGPI O18
AH1
USB_OC3 _L/TD O/AGPI O24
AY6
AZ_BITCLK/I2S_BCLK_MIC
BA6
AZ_SDIN0/I2S_DATA_MIC0
AY5
AZ_SDIN1/I2S_LR_PLAYBACK
BA5
AZ_SDIN2/I2S_DATA_PLAYBACK
AY4
AZ_RST_L/I2S_LR_MIC
BA3
AZ_SYNC/I2S_BCLK_PLAYBACK
BA4
AZ_SDOUT/I2S_DATA_MIC1
AY22
I2C0_SCL/EGPIO145
BA22
I2C0_SDA/EGPIO146
AU19
I2C1_SCL/EGPIO147
AV19
I2C1_SDA/EGPIO148
BA2
X32K_X1
AY2
X32K_X2
D1
1
3
2
BAT54AW-L
3
ACPI/SD/AZ/GPIO/RTC/MISC
3
+3V
FT4 REV 0.93
R103
10K_1%_4
U1D
*FT4
R104 *0_4/S
C32
*2.2u/10V_4
+3V
R50 10K_1%_4
R52 *10K_1%_4
R54 *10K_1%_4
R56 *10K_1%_4
R58 *10K_1%_4
R60 10K_1%_4
R62 10K_1%_4
R64 10K_1%_4
+1.8V
R182 10K_1%_4
R183 10K_1%_4
BOARD_ID5
BA28
SD_WP/EGPIO101
SD_CD/AGPIO25
SD_CLK/EGPIO95
SD_CMD/EGPIO96
SD_LED/EGPIO93
SD_DATA0/EGPIO97
SD_DATA1/EGPIO98
SD_DATA2/EGPIO99
SD_DATA3/EGPIO100
AGPIO3
AGPIO4
AGPIO5
AGPIO6/LDT_RST_L
AGPIO7/LDT_PWROK
AGPIO8
AGPIO9
AGPIO40
GENINT2_L/AGPIO90
SPKR/AGPIO91
GA20IN/AGPIO126
FANIN0/AGPIO84
FANOUT0/AGPIO85
UART0_R XD/EGP IO136
UART0_T XD/EGP IO13 8
UART0_I NTR/AG PIO13 9
HVBEN_L
RTCCLK
SYS_PWRGD
AY29
AY13
BOARD_ID6
BA14
BOARD_ID0
AY15
BOARD_ID7
BA29
BOARD_ID1
AY14
BOARD_ID2
BA13
BOARD_ID3
BA16
BOARD_ID4
AY16
SMB_RUN_CLK
AY33
SMB_RUN_DAT
BA32
SMB_ALW_CLK
AC5
SMB_ALW_DAT
AC4
AJ7
SSD_DET#
AK2
AK1
TP_INTH#
AL4
AJ2
PROCHOT#_CTRL
AJ4
AG5
APU_VRM_GFX_PWRGD
AD1
AJ8
ACCEL_INTH#
AR29
AP29
AU35
AV33
AU33
UART0_CTS
AP23
UART0_RXD
AP25
UART0_RTS
AR25
UART0_TXD
AV25
AU23
AP21
AV21
AP19
GENINT1: Hardware Validated Boot function
AV23
Vss: Enabke
AR21
NC: Disable
AP27
GENINT1
AN4
SD_PWR_CTRL/AGPIO102
SCL0/I2C2_SCL/EGPIO113
SDA0/I2C2_SDA/EGPIO114
SCL1/I2C3_SCL/AGPIO19
SDA1/I2C3_SDA/AGPIO20
BLINK/USB_OC7_L/AGPIO11
UART0_C TS_L/ EGPIO 135
UART0_R TS_L/ EGPIO 137
UART1_C TS_L/ BT_I2 S_BCL K/EGPI O140
UART1_R XD/BT_ I2S_ SDI/EG PIO14 1
UART1_R TS_L/ EGPIO 142
UART1_T XD/BT _I2S_ SDO/EG PIO14 3
UART1_I NTR/BT _I2S_ LRCLK /AGPIO 144
12/21 change to shortpad
2
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
EMMC_DET
R51 *10K_1%_4
R53 10K_1%_4
R55 10K_1%_4
R57 10K_1%_4
R59 10K_1%_4
R61 *10K_1%_4
R63 *10K_1%_4
R65 *10K_1%_4
R185 *10K_1%_4
EMMC_DET 30
BOARD ID SETTING
Board ID [0] Definition
0
1
Board ID [2:1]
00
01
10
VGA_RSTB 13
11
Board ID [4:3]
00
01
10
11
Board ID [5] Definition
0
1
Board ID [6] Definition
0
1
Board ID [7] Definition
0
R72 *0_4/S
11/22 short pad
TP8515
TP8516
TP8517
TP8518
SMB_RUN_CLK 10,11,20
SMB_RUN_DAT 10,11,20
SMB_ALW_CLK 27
SMB_ALW_DAT 27
AGPIO3 6
SSD_DET# 29
ODD_DA#_FCH 29
TP8512
APU_PROCHOT# 4
TP45
AGPIO11 6
TP52
ACZ_SPKR 22
EC_A20GATE 31
RF_OFF 30
VGA_ON_SB 31
1
R1 *0_5%_4
RTC_CLK 6
Board ID [8] Definition
0
1
12/21 add CPU Watt.
Follow AMD checklist 55347 suggestion.
+3VS5
R93 *2.2K_5%_4
R95 *1K_1%_4
R97 *2.2K_5%_4
TEST2 TEST1 TEST0 Description
0
00
0
0
1
0
1
X
1
TMS
0
1TMS
2
1
APU_TEST0
APU_TEST1
APU_TEST2
FCH TAP accessible from APU when TAPEN is asserted
FCH JTAG pins are overloaded for multiple
functions, in this configuration the FCH JTAG are
used as non-JTAG pins
R94 15K_1%_4
R96 15K_1%_4
R98 15K_1%_4
Reserved
Reserved
FCH JTAG multi-function pins are configured as
JTAG pins, in this configuration the FCH TAP
can be accessed from FCH JTAG pins
Use on ATE only
Yuba JTAG enabled
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB5
NB5
NB5
Date: Sheet
Date: Sheet
Date: Sheet
1
05
UMA
DIS
Definition
14"
Reserve
Reserve
Reserve
Definition
Reserve
Reserve
Reserve
Reserve
BR
SR
VRAM x8
VRAM x4
R17M-M1-70
R17M-M1-30
6W CPU
15W CPU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
BR & SR 4/7(GPIO/AZ/UART)
BR & SR 4/7(GPIO/AZ/UART)
BR & SR 4/7(GPIO/AZ/UART)
Wednesday, March 08, 2017 5 48
Wednesday, March 08, 2017 5 48
Wednesday, March 08, 2017 5 48
1
of
of
of
1A
1A
1A
5
4
3
2
1
U1E
BA10
SATA_TXP030
HDD
Follow Checklist
D D
C C
+3V
R110 10K_1%_4
C34 5.6p/50V_4
Y2
48MHZ/15ppm
C35 5.6p/50V_4
SPK_ID
EGPIO119
1
2
R114
1M_5%_4
4
3
12/21 change to shortpad
48M_X1
48M_X2
CLK_33M_KBC31
CLK_PCI_TPM28
CLK_33M_DEBUG30
KBC_RST#28,31
ODD or SSD
SATA_LED#25
BT_OFF30
CLK_GFX_P13
CLK_GFX_N13
CLK_PCIE_LANP24
CLK_PCIE_LANN24
CLK_PCIE_WLANP30
CLK_PCIE_WLANN30
C36 *10p/50V_4
C37 *10p/50V_4
C38 *10p/50V_4
C39 150p/50V_4
+0.95V
R119
10K_1%_4
SATA_TXN030
SATA_RXN030
SATA_RXP030
SATA_TXP129
SATA_TXN129
SATA_RXN129
SATA_RXP129
R108 1K_1%_4R107 10K_1%_4
R109 1K_1%_4
R111 *0_4/S
R176 *0_4/S
R177 *0_4/S
TP50
TP51
R178 *0_4/S
R179 *0_4/S
R180 *0_4/S
R181 *0_4/S
TP28
TP29
R115 22_5%_4
R116 *22_5%_4
R117 22_5%_4
R118 33_5%_4
SIO_EXT_SCI#31
SIO_EXT_SMI#31 EC_RCIN# 31
SATA_CALRN
SATA_CALRP
SB_SATA_LED#
SPK_ID
BT_OFF
CLK_GFX_P_R
CLK_GFX_N_R
CLK_PCIE_CARDP_R
CLK_PCIE_CARDN_R
CLK_PCIE_LANP_R
CLK_PCIE_LANN_R
CLK_PCIE_WLANP_R
CLK_PCIE_WLANN_R
GPP_CLK3P
GPP_CLK3N
48M_X1
TP30
48M_X2
TP31
LPC_CLK0
LPC_CLK1
LFRAME#28,30,31
LAD028,30,31
LAD128,30,31
LAD228,30,31
LAD328,30,31
CLKRUN#31
SERIRQ28,31
LFRAME#
LPC_RST#_R
LPC_PD#
AY10
AY12
BA12
AU11
AP11
AY30
AV31
AU31
AU27
BA25
BA24
AY24
BA26
AY28
AY25
AY23
AY27
AY26
BA27
AV27
AY9
BA9
BA8
AY8
H2
H1
M2
M1
L2
L1
K2
K1
J2
J1
F2
F1
AC1
AA8
SATA_TX0P
SATA_TX0N
SATA_RX0N
SATA_RX0P
SATA_TX1P
SATA_TX1N
SATA_RX1N
SATA_RX1P
SATA_ZVSS
SATA_ZVDDP
SATA_ACT_L/AGPIO130
DEVSLP0/EGPIO67
DEVSLP1/EGPIO70
GFX_CLKP
GFX_CLKN
GPP_CLK0P
GPP_CLK0N
GPP_CLK1P
GPP_CLK1N
GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
X48M_X1
X48M_X2
X25M_48M_OSC
LPCCLK0/EGPIO74
LPCCLK1/EGPIO75
LFRAME_L
LAD0
LAD1
LAD2
LAD3
LPC_RST_L
LPC_CLKRUN_L/AGPIO88
LPC_PD_L/AGPIO21
LPC_PME_L/AGPIO22
LPC_SMI_L/AGPIO86
SERIRQ/AGPIO87
CLK/SATA/USB/SPI/LPC
FT4 REV 0.93
*FT4
USBCLK/ 25M_48 M_OSC
USB_ZVS S
USB_HSD0 P
USB_HSD0 N
USB_HSD1 P
USB_HSD1 N
USB_HSD2 P
USB_HSD2 N
USB_HSD3 P
USB_HSD3 N
USB_HSD4 P
USB_HSD4 N
USB_HSD5 P
USB_HSD5 N
USB_HSD6 P
USB_HSD6 N
USB_HSD7 P
USB_HSD7 N
USB_SS_ ZVSS
USB_SS_ ZVDDP
USB_SS_ 0TXP
USB_SS_ 0TXN
USB_SS_ 0RXP
USB_SS_ 0RXN
USB_SS_ 1TXP
USB_SS_ 1TXN
USB_SS_ 1RXP
USB_SS_ 1RXN
USB_SS_ 2TXP
USB_SS_ 2TXN
USB_SS_ 2RXP
USB_SS_ 2RXN
SPI_CLK/ESPI_CLK/EGPIO117
SPI_DO/ESPI_DAT0/EGPIO121
SPI_DI/ESPI_DAT1/EGPIO120
SPI_HOLD_L/ESPI_DAT3/EGPIO133
SPI_WP_L/ESPI_DAT2/EGPIO122
SPI_CS1_L/EGPIO118
SPI_TPM_CS_L/AGPIO76
ESPI_ALERT_L/LDRQ0_L
ESPI_RESET_L/KBRST_L/AGPIO129
SPI_CS2_L/ESPI_CS_L/EGPIO119
AL8
AN7
AW1
AW2
AV1
AV2
AU1
AU2
AT1
AT2
AR1
AR2
AP1
AP2
AN1
AN2
AM1
AM2
W4
W5
T1
T2
V2
V1
R1
R2
W2
W1
P1
P2
Y2
Y1
AY17
AY20
BA17
BA18
BA20
AY21
BA21
AY18
BA30
AY19
USB_ZVSS
USBSS_CALRN
USBSS_CALRP
APU_SPI_CLK
APU_SPI_SO
APU_SPI_SI
APU_SPI_HOLD#
APU_SPI_WP
APU_SPI_CS0#
ACC_LED#
LDRQ#0
EGPIO119
R106 11.8K_1%_4
USBP0+ 25
USBP0- 25
USBP1+ 21
USBP1- 21
USBP2+ 21
USBP2- 21
USBP3+ 30
USBP3- 30
USBP4+ 26
USBP4- 26
USBP5+ 25
USBP5- 25
USBP6+ 25
USBP6- 25
USBP7+ 25
USBP7- 25
R112 1K_1%_4
R113 1K_1%_4
USB30_TX0+ 26
USB30_TX0- 26
USB30_RX0+ 26
USB30_RX0- 26
USB30_TX1+ 25
USB30_TX1- 25
USB30_RX1+ 25
USB30_RX1- 25
USB30_TX2+ 25
USB30_TX2- 25
USB30_RX2+ 25
USB30_RX2- 25
TP49
TP33
+0.95VS5
USB2.0 CONN ON DB
TOUCH SCREEN
CAMERA
BT
For USB to SATA
USB3.0 CONN ON MB
USB3.0 CONN ON MB
Card Reader
Support S3~S5 wake up
For USB to SATA
USB3.0 CONN ON MB
USB3.0 CONN ON MB
For EMI
APU_SPI_CLK
EC3
*10p/50V_4
USB2 & USB3 MAPPING (Use form Port4)
USB2 PORT4 => USB3 PORT0
USB2 PORT5 => USB3 PORT1
USB2 PORT6 => USB3 PORT2
USB2 PORT7 => USB2 only
06
+3VS5 +3VS5 +3VS5+3VS5+3V +3V +3V
STRAPS PINS
OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.
AGPIO35
RTC_CLK5
AGPIO115
SYS_RST#5
REQUIRED STRAPS
LPC_CLK0 AGPIO11=BLINK
PULL
HIGH
PULL
LOW
BOOT FAIL TIMER
ENABLED
BOOT FAIL TIMER
DISABLED
DEFAULT
Use 48Mhz crystal clock
and generate both internal
and external clocks
Use 100Mhz PCIE clock as
reference clock and generate
internal clocks only
LPC_CLK0
LPC_CLK1
LFRAME#
LPC_CLK1
DEFAULT
LFRAME#
SPI ROM
DEFAULT
LPC ROM
2
R121
R120
10K_1%_4
*10K_1%_4
R135
R134
*2K_1%_4
2K_1%_4
CZ-L BR & SR
1.8V SPI ROM
3.3V SPI ROM
DEFAULT
R122
10K_1%_4
R136
*2K_1%_4
AGPIO3
Int Pull-Up
Enhanced reset logic
(for quicker S5 resume)
DEFAULT DEFAULT DEFAULT
Default to
traditional reset logic
R124
R123
10K_1%_4
10K_1%_4
R139
R140
*2K_1%_4
*2K_1%_4
RTC_CLK
Int Pull-Up Int Pull-Up Int Pull-Up
Coin battery is
on board.
Coin battery is
not on board.
NB5
NB5
NB5
R126
R125
10K_1%_4
*10K_1%_4
R137
R141
*2K_1%_4
*2K_1%_4
SYS_RST#
LDT_RST#/LDT_PWRGD
output to APU
output to Pads
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BR & SR 5/7(SATA/USB/SPI)
BR & SR 5/7(SATA/USB/SPI)
BR & SR 5/7(SATA/USB/SPI)
Wednesday, March 08, 2017 6 48
Date: Sheet
Wednesday, March 08, 2017 6 48
Date: Sheet
Wednesday, March 08, 2017 6 48
Date: Sheet
normal reset mode
DEFAULT
short reset modeLDT_RST#/LDT_PWRGD
of
of
1
of
1A
1A
1A
R133
*10K_1%_4
+1.8V_ROM
R131
*1K_1%_4
R132
10K_1%_4
POP for KB9027 Quad IO
R148 *0_5%_4
R147 *0_5%_4
R146 33_5%_4
R145 33_5%_4
R144 33_5%_4
R143 33_5%_4
APU_SPI_HOLD#
APU_SPI_WP
APU_SPI_SI
APU_SPI_SO
APU_SPI_CLK
APU_SPI_CS0#
B B
H_SPI_HOLD#31
H_SPI_WP31
H_MISO31
H_MOSI31
H_SPICLK31
H_SPICS#31
Close CPU
A A
5
4
3
5
4
3
2
1
Power Decoupling follow Check list by AMD suggestion
07
VDD_18_1
VDD_18_2
VDD_33_1
VDD_33_2
+1.5V_RTC
E9
E11
E13
E15
E17
E19
G7
J7
K11
K13
K15
K17
K19
L7
L10
L15
L17
N7
N11
N13
N15
N17
N19
R7
U7
U11
U13
U15
U17
U19
U21
W7
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AE11
AE13
AE15
AE17
AE19
AE21
AE23
AE25
AE27
AE29
AE31
AJ15
AL17
AJ13
AL15
AJ19
AL21
AJ17
AL19
+VDDNB_CORE
+APU_VDD_33
C56
22u/6.3VS_6
+1.8V_ROM
+APU_VDD_18_S5
+APU_VDD_33_S5
+BAT
12
+-
34
RTC1
RTC Battery
DFHS02FS080
bat-53011-00201-v09-2p
C43
22u/6.3VS_6
R155 470_1%_4
VDDBT_RTC
3
2
1
Q1
2N7002K
C57
22u/6.3VS_6
R157
10K_1%_4
C44
C58
22u/6.3VS_6
22u/6.3VS_6
BOTTOM SIDE DECOUPLING UNDER APU
+1.8VS5 +APU_VDD_18_S5
R149 *0_4/S
+3V +APU_VDD_33
R151 *0_4/S
+3VS5 +APU_VDD_33_S5
R153 *0_4/S
+VCCRTC_2
2
1
+3VPCU
D5
BAT54CW
EC_RTC_RST 31
3
C59
22u/6.3VS_6
+1.8V_ROM
C72
10u/6.3V_6
C84
10u/6.3V_6
C92
10u/6.3V_6
C99
10u/6.3V_6
C60
22u/6.3VS_6
20MIL
+3VRTC
C115
0.1u/16V_4
C73
1u/6.3V_4
C85
1u/6.3V_4
C93
1u/6.3V_4
C100
1u/6.3V_4
C61
22u/6.3VS_6
U5
3
YB1264ST23X150
C116
1u/6.3V_4
C74
1000p/50V_4
C86
1000p/50V_4
C94
1000p/50V_4
C101
1000p/50V_4
VIN
GND
VOUT
C62
22u/6.3VS_6
2
1
C63
22u/6.3VS_6
+1.5V_RTC
C64
22u/6.3VS_6
C109
10u/6.3V_6
C45
1u/6.3V_4
+1.2VSUS
J35
VDDIO_MEM_S3_1
L32
VDDIO_MEM_S3_2
L37
D D
C49
22U/6.3VS_6
C50
22U/6.3VS_6
C41
22U/6.3VS_6
C51
22U/6.3VS_6
C52
22U/6.3VS_6
C42
22U/6.3VS_6
C53
22U/6.3VS_6
C54
22U/6.3VS_6
C55
22U/6.3VS_6
BOTTOM SIDE DECOUPLING UNDER APU
C68
1u/6.3V_4
C79
22u/6.3VS_6
C80
22u/6.3VS_6
C81
22u/6.3VS_6
C75
22u/6.3VS_6
22u/6.3VS_6
C C
BOTTOM SIDE DECOUPLING UNDER APU
22u/6.3VS_6
22u/6.3VS_6
C78
C77
C76
+VDDCR_FCH_S5 +VDDCR_FCH_S5_R
R150 *0_4/S
C87
10u/6.3V_6
C88
1u/6.3V_4
C89
1u/6.3V_4
C90
1000p/50V_4
C91
1000p/50V_4
+0.95VS5 +VDDP_S5
R152 *0_5%_6/S
C97
C96
C95
10u/6.3V_6
+0.95V
BOTTOM SIDE DECOUPLING UNDER APU
C70
22U/6.3VS_6
C111
1u/6.3V_4
C103
22U/6.3VS_6
C112
1u/6.3V_4
C102
B B
22U/6.3VS_6
C110
10u/6.3V_6
1u/6.3V_4
1000p/50V_4
C104
22U/6.3VS_6
C113
1u/6.3V_4
C105
22U/6.3VS_6
C114
1u/6.3V_4
C106
10u/6.3V_6
C69
1u/6.3V_4
C82
1u/6.3V_4
C71
1u/6.3V_4
+VCC_CORE
C83
1u/6.3V_4
+VDDCR_FCH_S5_R
+VDDP_S5
+0.95V
+APU_VDDIO_AZ
G2
*0_5%_4
N35
R37
U32
U35
W32
W37
AA35
AC32
AC37
AE32
AE35
AG32
AG37
AJ32
AJ35
AL32
AL37
AR35
K21
K23
K25
K27
K29
K31
N21
N23
N25
N27
N29
N31
U23
U25
U27
U29
U31
AA25
AA27
AA29
AA31
AR4
AR5
AR7
AU7
AJ11
AL11
AL13
AJ21
AJ23
AJ25
AJ27
AL23
AL25
AL27
AL29
AM11
AM13
20MIL
VDDBT_RTC
C107
0.22u/10V_4
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDIO_MEM_S3_7
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9
VDDIO_MEM_S3_10
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
VDDIO_MEM_S3_13
VDDIO_MEM_S3_14
VDDIO_MEM_S3_15
VDDIO_MEM_S3_16
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDIO_MEM_S3_19
VDDIO_MEM_S3_20
VDDIO_MEM_S3_21
VDDCR_CPU_1
VDDCR_CPU_2
VDDCR_CPU_3
VDDCR_CPU_4
VDDCR_CPU_5
VDDCR_CPU_6
VDDCR_CPU_7
VDDCR_CPU_8
VDDCR_CPU_9
VDDCR_CPU_10
VDDCR_CPU_11
VDDCR_CPU_12
VDDCR_CPU_13
VDDCR_CPU_14
VDDCR_CPU_15
VDDCR_CPU_16
VDDCR_CPU_17
VDDCR_CPU_18
VDDCR_CPU_19
VDDCR_CPU_20
VDDCR_CPU_21
VDDCR_FCH_S5_1
VDDCR_FCH_S5_2
VDDCR_FCH_S5_3
VDDCR_FCH_S5_4
VDDP_S5_1
VDDP_S5_2
VDDP_S5_3
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8
VDDBT_RTC_G
VDDIO_AUDIO
U1F
POWER
FT4 REV 0.93
*FT4
R154 1K_1%_4
C108
1u/6.3V_4
VDDCR_NB_1
VDDCR_NB_2
VDDCR_NB_3
VDDCR_NB_4
VDDCR_NB_5
VDDCR_NB_6
VDDCR_NB_7
VDDCR_NB_8
VDDCR_NB_9
VDDCR_NB_10
VDDCR_NB_11
VDDCR_NB_12
VDDCR_NB_13
VDDCR_NB_14
VDDCR_NB_15
VDDCR_NB_16
VDDCR_NB_17
VDDCR_NB_18
VDDCR_NB_19
VDDCR_NB_20
VDDCR_NB_21
VDDCR_NB_22
VDDCR_NB_23
VDDCR_NB_24
VDDCR_NB_25
VDDCR_NB_26
VDDCR_NB_27
VDDCR_NB_28
VDDCR_NB_29
VDDCR_NB_30
VDDCR_NB_31
VDDCR_NB_32
VDDCR_NB_33
VDDCR_NB_34
VDDCR_NB_35
VDDCR_NB_36
VDDCR_NB_37
VDDCR_NB_38
VDDCR_NB_39
VDDCR_NB_40
VDDCR_NB_41
VDDCR_NB_42
VDDCR_NB_43
VDDCR_NB_44
VDDCR_NB_45
VDDCR_NB_46
VDDCR_NB_47
VDDCR_NB_48
VDDCR_NB_49
VDDCR_NB_50
VDD_18_S5_1
VDD_18_S5_2
VDD_33_S5_1
VDD_33_S5_2
AMD document #55245 difine S5 power domain
R158 *0_4/S
1.5V For HDA Only
1.8V For HDA or I2S
+APU_VDDIO_AZ+1.8VS5
C117
1u/6.3V_4
C118
1000p/50V_4
C98
1000p/50V_4
01/04 change to stuff
A A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BR & SR 6/7 (POWER)
BR & SR 6/7 (POWER)
NB5
NB5
5
4
3
2
NB5
BR & SR 6/7 (POWER)
Wednesday, March 08, 2017 7 48
Date: Sheet
Wednesday, March 08, 2017 7 48
Date: Sheet
Wednesday, March 08, 2017 7 48
Date: Sheet
1
1A
1A
1A
of
of
of
5
4
3
2
1
08
D D
C C
B B
AJ31
R19
H23
A13
A18
A23
A32
A35
A39
B13
B32
B39
C11
C13
C15
C17
C19
C21
C23
C25
C27
C29
C31
C33
C35
C37
C39
C41
E21
E25
E29
E35
E38
E39
G11
G13
G23
G27
G31
G35
G37
G39
G41
J39
U1G
A2
A8
B8
C3
C5
C7
C9
E1
E2
E3
G1
G2
G3
J3
J8
L3
L8
VSS_215
VSS_214
VSS_213
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
GND
FT4 REV 0.93
*FT4
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
L13
L19
L21
L23
L25
L27
L29
L31
L39
L41
N1
N2
N3
N39
R3
R11
R13
R15
R17
R21
R23
R25
R27
R29
R31
R39
R41
U1
U2
U3
U10
U39
W3
W10
W11
W13
W15
W17
W19
W21
W23
W25
W27
W29
W31
W39
W41
AA1
AA2
AA3
AA5
AA10
AA39
AC3
AC7
AC10
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AC25
AC27
AC29
AC31
AC38
AC39
AC41
AE3
AE5
AE10
AE39
AG3
AG7
AG10
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AG25
AG27
AG29
AG31
AG39
AG41
AJ3
AJ5
AJ10
AJ29
AJ39
AL1
AL2
AL3
AL7
AL10
AL31
AL39
AL41
AM25
AM27
AM29
AM31
AN3
AN5
AN39
AR3
AR11
AR19
AR23
AR27
AR31
AR39
AR41
AU3
AU9
AU21
AU25
AU29
U1H
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
GND
FT4 REV 0.93
*FT4
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
AU39
AW3
AW5
AW7
AW9
AW11
AW13
AW15
AW17
AW19
AW21
AW23
AW25
AW27
AW29
AW31
AW33
AW35
AW37
AW39
AW41
AY1
AY11
BA7
BA11
BA15
BA19
BA23
BA31
BA35
BA39
ORIENT_APU#
TP40
A A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ST 7/7 (GND)
ST 7/7 (GND)
NB5
NB5
5
4
3
2
NB5
Date: Sheet
Date: Sheet
Date: Sheet
ST 7/7 (GND)
Wednesday, March 08, 2017 8 48
Wednesday, March 08, 2017 8 48
Wednesday, March 08, 2017 8 48
1
1A
1A
1A
of
of
of
5
4
3
2
1
09
D D
C C
<Reserved>
B B
A A
NB5
NB5
NB5
5
4
3
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
2
Reserved
Reserved
Reserved
of
of
of
948Wednesday, March 08, 2017
948Wednesday, March 08, 2017
948Wednesday, March 08, 2017
1
1A
1A
1A
5
4
3
2
1
10
D D
Place these Caps near SODIMM
C119 180p/50V_4
C121 1u/6.3V_4
C123 1u/6.3V_4
C124 1u/6.3V_4
C125 1u/6.3V_4
C126 1u/6.3V_4
C128 1u/6.3V_4
C130 1u/6.3V_4
C132 1u/6.3V_4
C134 10U/6.3VS_6
C136 10U/6.3VS_6
C137 10U/6.3VS_6
C138 10U/6.3VS_6
C140 10U/6.3VS_6
C142 10U/6.3VS_6
C144 10U/6.3VS_6
C146 10U/6.3VS_6
DDR_VTTREF35
R163 *0_5%_6
+VREF_CA0
+3V
+2.5V_SUS
+0.6V_DDR_VTT
+1.2VSUS
R162
1K_1%_4
+VREF_CA0
R164
1K_1%_4
C147 0.1u/16V_4
C148 1000p/50V_4
C149 *0.047u/16V_4
C120 0.1u/16V_4
C122 *0.1u/16V_4
C127 1u/6.3V_4
C129 0.1u/16V_4
C131 0.1u/16V_4
C133 180p/50V_4
C135 *10U/6.3VS_6
C139 0.1u/16V_4
C141 0.1u/16V_4
C143 1u/6.3V_4
C145 10U/6.3VS_6
+VREF_CA0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152
162
165
114
143
116
134
108
150
145
115
113
149
157
109
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
JDIM0A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#
S2#/C0
S3#/C1
ACT#
PARITY
ALERT#
EVENT#
RESET#
BA0
BA1
BG0
BG1
S0#
S1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR4 RVS H=4
M_A_DQ0
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ4
7
M_A_DQ7
20
M_A_DQ3
21
M_A_DQ1
4
M_A_DQ5
3
M_A_DQ2
16
M_A_DQ6
17
M_A_DQ13
28
M_A_DQ9
29
M_A_DQ14
41
M_A_DQ10
42
M_A_DQ12
24
M_A_DQ8
25
M_A_DQ11
38
M_A_DQ15
37
M_A_DQ21
50
M_A_DQ17
49
M_A_DQ19
62
M_A_DQ18
63
M_A_DQ20
46
M_A_DQ16
45
M_A_DQ23
58
M_A_DQ22
59
M_A_DQ25
M_A_DQ24
M_A_DQ30
83
M_A_DQ26
84
M_A_DQ29
66
M_A_DQ28
67
M_A_DQ31
79
M_A_DQ27
80
M_A_DQ36
174
M_A_DQ37
173
M_A_DQ34
187
M_A_DQ38
186
M_A_DQ32
170
M_A_DQ33
169
M_A_DQ35
183
M_A_DQ39
182
M_A_DQ40
195
M_A_DQ41
194
M_A_DQ47
207
M_A_DQ46
208
M_A_DQ45
191
M_A_DQ44
190
M_A_DQ42
203
M_A_DQ43
204
M_A_DQ49
216
M_A_DQ48
215
M_A_DQ54
228
M_A_DQ50
229
M_A_DQ53
211
M_A_DQ52
212
M_A_DQ55
224
M_A_DQ51
225
M_A_DQ61
237
M_A_DQ60
236
M_A_DQ59
249
M_A_DQ63
250
M_A_DQ56
232
M_A_DQ57
233
M_A_DQ62
245
M_A_DQ58
246
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP2
55
M_A_DQSP3
76
M_A_DQSP4
179
M_A_DQSP5
200
M_A_DQSP6
221
M_A_DQSP7
242
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN2
53
M_A_DQSN3
74
M_A_DQSN4
177
M_A_DQSN5
198
M_A_DQSN6
219
M_A_DQSN7
240
95
M_A_DQ[63:0] 3,11
M_A_DQSP[7:0] 3,11
M_A_DQSN[7:0] 3,11
2.48A
+1.2VSUS
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
1
5
9
15
19
23
27
31
35
39
43
47
51
57
61
65
69
73
77
81
85
89
93
99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251
JDIM0B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
DDR4 RVS H=4
+1.2VSUS
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND1
262
GND2
263
GND3
264
GND4
+3V
+2.5V_SUS
+0.6V_DDR_VTT
+VREF_CA0
1uF/10uF 4pcs on each side of SODIMM
M_A_A[13:0]3,11
M_A_WE#3,11
M_A_CAS#3,11
R160
1K_1%_4
M_A_RAS#3,11
M_A_ACT#3,11
+1.2VSUS
M_A_BS#03,11
M_A_BS#13,11
M_A_BG#03,11
M_A_BG#13,11
M_A0_CS#03
M_A0_CS#13
M_A0_CKE03
M_A0_CKE13
M_A0_CLKP03
M_A0_CLKN03
M_A0_CLKP13
M_A0_CLKN13
M_A0_ODT03
M_A0_ODT13
SMB_RUN_CLK5,11,20
SMB_RUN_DAT5,11,20
M_A_DM[7..0]3,11
+1.2VSUS
M_A_EVENT#3,11
M_A_RST#3,11
C C
B B
12/21 change to shortpad
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
TP41
TP42
R159 *0_4/S
R161 *1K_1%_4
For EMI CAP
+1.2VSUS
EC4 *180p/50V_4
EC7 *180p/50V_4
A A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
CHA0 DDR4 DIMM0-RVS(4.0H)
CHA0 DDR4 DIMM0-RVS(4.0H)
NB5
NB5
5
4
3
2
NB5
CHA0 DDR4 DIMM0-RVS(4.0H)
Date: Sheet
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
of
10 48Wednesday, March 08, 2017
10 48Wednesday, March 08, 2017
10 48Wednesday, March 08, 2017
5
4
3
2
1
11
Place these Caps near SODIMM
C150 180p/50V_4
C151 1u/6.3V_4
C156 1u/6.3V_4
C152 1u/6.3V_4
C153 1u/6.3V_4
C157 1u/6.3V_4
C159 1u/6.3V_4
C160 1u/6.3V_4
C161 1u/6.3V_4
C165 10U/6.3VS_6
C167 10U/6.3VS_6
C168 10U/6.3VS_6
C169 10U/6.3VS_6
C171 10U/6.3VS_6
C173 10U/6.3VS_6
C175 10U/6.3VS_6
C177 10U/6.3VS_6
+VREF_CA0
R168 *0_5%_6/S
+VREF_CA1
C178 0.1u/16V_4
C179 1000p/50V_4
C180 *0.047u/16V_4
+3V
+2.5V_SUS
+0.6V_DDR_VTT
+VREF_CA1
C154 0.1u/16V_4
C155 *0.1u/16V_4
C158 1u/6.3V_4
C163 0.1u/16V_4
C164 0.1u/16V_4
C162 180p/50V_4
C166 *10U/6.3VS_6
C170 0.1u/16V_4
C172 0.1u/16V_4
C174 1u/6.3V_4
C176 10U/6.3VS_6
CHA1_SA0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152
162
165
114
143
116
134
108
150
145
115
113
149
157
109
110
137
139
138
140
155
161
253
254
256
260
166
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
JDIM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#
S2#/C0
S3#/C1
ACT#
PARITY
ALERT#
EVENT#
RESET#
BA0
BA1
BG0
BG1
S0#
S1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
ODT0
ODT1
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR4 STD H=4
M_A_DQ0
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ4
7
M_A_DQ7
20
M_A_DQ3
21
M_A_DQ1
4
M_A_DQ5
3
M_A_DQ2
16
M_A_DQ6
17
M_A_DQ13
28
M_A_DQ9
29
M_A_DQ14
41
M_A_DQ10
42
M_A_DQ12
24
M_A_DQ8
25
M_A_DQ11
38
M_A_DQ15
37
M_A_DQ21
50
M_A_DQ17
49
M_A_DQ19
62
M_A_DQ18
63
M_A_DQ20
46
M_A_DQ16
45
M_A_DQ23
58
M_A_DQ22
59
M_A_DQ25
70
M_A_DQ24
71
M_A_DQ30
83
M_A_DQ26
84
M_A_DQ29
66
M_A_DQ28
67
M_A_DQ31
79
M_A_DQ27
80
M_A_DQ36
174
M_A_DQ37
173
M_A_DQ34
187
M_A_DQ38
186
M_A_DQ32
170
M_A_DQ33
169
M_A_DQ35
183
M_A_DQ39
182
M_A_DQ40
195
M_A_DQ41
194
M_A_DQ47
207
M_A_DQ46
208
M_A_DQ45
191
M_A_DQ44
190
M_A_DQ42
203
M_A_DQ43
204
M_A_DQ49
216
M_A_DQ48
215
M_A_DQ54
228
M_A_DQ50
229
M_A_DQ53
211
M_A_DQ52
212
M_A_DQ55
224
M_A_DQ51
225
M_A_DQ61
237
M_A_DQ60
236
M_A_DQ59
249
M_A_DQ63
250
M_A_DQ56
232
M_A_DQ57
233
M_A_DQ62
245
M_A_DQ58
246
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP2
55
M_A_DQSP3
76
M_A_DQSP4
179
M_A_DQSP5
200
M_A_DQSP6
221
M_A_DQSP7
242
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN2
53
M_A_DQSN3
74
M_A_DQSN4
177
M_A_DQSN5
198
M_A_DQSN6
219
M_A_DQSN7
240
95
M_A_DQ[63:0] 3,10
M_A_DQSP[7:0] 3,10
M_A_DQSN[7:0] 3,10
2.48A
+1.2VSUS
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
1
5
9
15
19
23
27
31
35
39
43
47
51
57
61
65
69
73
77
81
85
89
93
99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251
JDIM1B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
DDR4 STD H=4
+1.2VSUS
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
(260P)
DDR4 SODIMM 260 PIN
VSS69
94
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND1
262
GND2
263
GND3
264
GND4
+3V
+2.5V_SUS
+0.6V_DDR_VTT
+VREF_CA1
1uF/10uF 4pcs on each side of SODIMM
M_A_A[13:0]3,10
D D
M_A_WE#3,10
M_A_CAS#3,10
M_A_RAS#3,10
M_A_ACT#3,10
M_A_EVENT#3,10
M_A_RST#3,10
C C
B B
+1.2VSUS
M_A_BS#03,10
M_A_BS#13,10
M_A_BG#03,10
M_A_BG#13,10
M_A1_CS#03
M_A1_CS#13
M_A1_CKE03
M_A1_CKE13
M_A1_CLKP03
M_A1_CLKN03
M_A1_CLKP13
M_A1_CLKN13
M_A1_ODT03
M_A1_ODT13
SMB_RUN_CLK5,10,20
SMB_RUN_DAT5,10,20
+3V
M_A_DM[7..0]3,10
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
R165 *0_4/S
R166 *1K_1%_4
R169 4.7K_5%_4
TP43
TP44
For EMI CAP
Local Thermal Sensor
DDR_THRMSEN_CLK
R172 *10K_1%_4
+3V
DDR_THRMSEN_DATA
M_A_EVENT#
R171 *0_5%_4
Q7A
*2N7002KDW
MBDATA24,20,31
A A
MBCLK24,20,31
5
3 4
R173 *4.7K_5%_4
5
2
R174 *4.7K_5%_4
6 1
*2N7002KDW
Q7B
R175 *0_5%_4
DDR_THRMSEN_DATA
+3V
DDR_THRMSEN_CLK
4
U6
8
SMBCLK
7
SMBDATA
6
ALERT
4
THERM
*G781-1P8
Main:AL000781039 G781-1P8(9Ah)
2nd:AL001412005 EMC1412-2-ACZL-TR(9Ah)
Main:AL001412003 EMC1412-1-ACZL-TR(98h)
2nd:AL000431014 TMP431ADGKR(98h)
3
C1 *0.01u/50V_4
1
VCC
2
DXP
3
DXN
5
GND
+3V
DDR_THERMDA
C181
*2200p/50V_4
DDR_THERMDC
2
Q6
*METR3904-G
1 3
2
+1.2VSUS
EC1 *180p/50V_4
EC6 *180p/50V_4
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
CHA1 DDR4 DIMM1-STD(4.0H)
CHA1 DDR4 DIMM1-STD(4.0H)
NB5
NB5
NB5
CHA1 DDR4 DIMM1-STD(4.0H)
Date: Sheet
Date: Sheet
Date: Sheet
1
1A
1A
1A
of
of
of
11 48Wednesday, March 08, 2017
11 48Wednesday, March 08, 2017
11 48Wednesday, March 08, 2017
5
4
3
2
1
12
D D
C C
<Reserved>
B B
A A
NB5
NB5
NB5
5
4
3
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
2
Reserved
Reserved
Reserved
of
of
of
12 48Wednesday, March 08, 2017
12 48Wednesday, March 08, 2017
12 48Wednesday, March 08, 2017
1
1A
1A
1A
13
PEG_TXP02
PEG_TXN02
PEG_TXP12
PEG_TXN12
PEG_TXP22
PEG_TXN22
PEG_TXP32
PEG_TXN32
CLK_GFX_P6
CLK_GFX_N6
R1474 1K_1%_4
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
CLK_GFX_P
CLK_GFX_N
TEST_PG
PEGX_RST#
AF30
AE31
AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
W31
W29
AK30
AK32
AL27
U31
U29
R31
R29
N31
N29
M28
M30
N10
Y28
Y30
V28
V30
T28
T30
P28
P30
L31
L29
K30
U1010A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
NC#V30
NC#U31
NC#U29
NC#T28
NC#T30
NC#R31
NC#R29
NC#P28
NC#P30
NC#N31
NC#N29
NC#M28
NC#M30
NC#L31
NC#L29
NC#K30
CLOCK
PCIE_REFCLKP
PCIE_REFCLKN
TEST_PG
PERSTB
MESO_S3
C_PEG_RXP0
AH30
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCI EXPRESS INTERFACE
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
NC#W24
NC#W23
NC#V27
NC#U26
NC#U24
NC#U23
NC#T26
NC#T27
NC#T24
NC#T23
NC#P27
NC#P26
NC#P24
NC#P23
NC#M27
NC#N26
CALIBRATION
PCIE_CALR_TX
PCIE_CALR_RX
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
Y22
AA22
C_PEG_RXN0
C_PEG_RXP1
C_PEG_RXN1
C_PEG_RXP2
C_PEG_RXN2
C_PEG_RXP3
C_PEG_RXN3
SUN_PCIE_CALRP
SUN_PCIE_CALRN
C1179 0.22u/10V_4
C1180 0.22u/10V_4
C1190 0.22u/10V_4
C1286 0.22u/10V_4
C1500 0.22u/10V_4
C1501 0.22u/10V_4
C1502 0.22u/10V_4
C1503 0.22u/10V_4
R1493 1.69K_1%_4
R1494 1K_1%_4
PEG_RXP0 2
PEG_RXN0 2
PEG_RXP1 2
PEG_RXN1 2
PEG_RXP2 2
PEG_RXN2 2
PEG_RXP3 2
PEG_RXN3 2
+1.0V_VGA
+1.8V_VGA
+1.0V_VGA
GPU Reset Signal
PCIE_RST#4,5,24,30
VGA_RSTB5
1.8V ( 40mA)
C1331
10U/6.3VS_6
1.0V ( 32mA)
C1118
1u/6.3V_4
C1504 *0.1u/16V_4
R1303 *0_4/S
C1114
1u/6.3V_4
C1117
0.1u/16V_4
PCIE_RST#
DGPU_HIN_RST#
U1010G
AG15
NC_DP_VDDR#1
AG16
NC_DP_VDDR#2
AF16
NC_DP_VDDR#3
AG17
NC_DP_VDDR#4
AG18
NC_DP_VDDR#5
AG19
NC_DP_VDDR#6
AF14
DP_VDDR
AG20
NC_DP_VDDC#1
AG21
NC_DP_VDDC#2
AF22
NC_DP_VDDC#3
AG22
NC_DP_VDDC#4
AD14
DP_VDDC
AG14
NC_DP_VSSR#1
AH14
NC_DP_VSSR#2
AM14
NC_DP_VSSR#3
AM16
NC_DP_VSSR#4
AM18
NC_DP_VSSR#5
AF23
NC_DP_VSSR#6
AG23
NC_DP_VSSR#7
AM20
NC_DP_VSSR#8
AM22
NC_DP_VSSR#9
AM24
NC_DP_VSSR#10
AF19
NC_DP_VSSR#11
AF20
NC_DP_VSSR#12
AE14
DP_VSSR
AF17
NC_UPHYAB_DP_CALR
MESO_S3
D1500
1
2
BAT54AW-L
NC/DP POWERDP POWER
+3V_VGA
R1294
1K_1%_4
3
PEGX_RST#
R1296
100K_1%_4
NC#AE11
NC#AF11
NC#AE13
NC#AF13
NC#AG8
NC#AG10
NC#AF6
NC#AF7
NC#AF8
NC#AF9
NC#AE1
NC#AE3
NC#AG1
NC#AG6
NC#AH5
NC#AF10
NC#AG9
NC#AH8
NC#AM6
NC#AM8
NC#AG7
NC#AG11
NC#AE10
AE11
AF11
AE13
AF13
AG8
AG10
AF6
AF7
AF8
AF9
AE1
AE3
AG1
AG6
AH5
AF10
AG9
AH8
AM6
AM8
AG7
AG11
AE10
PEGX_RST# 14
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_PCIE/DP POWER
M1-70_S3_PCIE/DP POWER
NB5
NB5
NB5
M1-70_S3_PCIE/DP POWER
Date: Sheet
Date: Sheet
Date: Sheet
1A
1A
1A
of
of
of
13 48Wednesday, March 08, 2017
13 48Wednesday, March 08, 2017
13 48Wednesday, March 08, 2017
14
+3V_VGA
R1304
10K_1%_4
VGA_ALERT
R1300 *0_5%_4
R1295 *10K_1%_4
+3V_VGA
DGPU_OVT#31
AMD recommend
GPUT_DATA31
GPUT_CLK31
Thermal Solution(Close to GPU)
U1500
DGPUT_CLK
8
SMBCLK
DGPUT_DATA GPU_THERMDA
7
SMBDATA
VGA_ALERT_R
6
ALERT
4
THERM
*G781P8
Main:AL000781012 G781P8(98h)
+3V_VGA
R1305 10K_1%_4
R1449 *10K_1%_4
R1309 *10K_1%_4
R1395 *10K_1%_4
R1520 *5.1K_1%_4
R1601 *10K_1%_4
R1602
R1603 *10K_1%_4
R1604 *0_4/S
R1605 *0_4/S
C1507 8.2p/50V_4
C1508 8.2p/50V_4
*10K_1%_4
DGPU_OCP_L31, 44
Q1500A
*2N7002KDW
3 4
5
2
6 1
*2N7002KDW
Q1500B
1
2
4
3
Y1500
27MHZ/10ppm
GPU_AC_BATT#
DGPU_TDI
DGPU_TMS
DGPU_TDO
DGPU_TCK
TESTEN
DGPU_TRSTB
PCIE_REQ_GPU#
DGPU_PROCHOT#
+3V_VGA
DGPUT_DATA
R1606 *0_5%_4
R1607
DGPUT_CLK
R1608
1M_5%_4
+1.8V_VGA
C1505 *0.01u/50V_4
1
VCC
2
DXP
3
DXN
5
GND
R1302 *10K_1%_4
R1399 *10K_1%_4
R1526 1K_1%_4
R1614
*10K_1%_4
R1615 *1K_1 %_4
PEGX_RST# 13
*4.7K_5%_4
+3V_VGA
27M-XTALI
27M-XTALO
L1501
1 2
*0_HCB1608KF-121T30(120+-25%,3A)/S
+3V_VGA
C1506
*2200p/50V_4
GPU_THERMDC
10/18 change M1-30 setting
R17M-M1-70: Stuff
R17M-M1-30: NA
+3V_VGA
R1609 4.7K_5%_4
R1610 4.7K_5%_4
DGPUT_DATA
DGPUT_CLK
GPU_AC_BATT#31
C1509
*0.1u/16V_4
TEMP_FAIL31
1.8V(13mA TSVDD)
C1567
1u/6.3V_4
10/18 change M1-30 setting
+3V_VGA
R1616
10K_1%_4
+1.8V_VGA
TP1501
TP1502
R1381 4.7K_5%_4
R1380 4.7K_5%_4
R1611 *0_4/S
R1612 *0_4/S
R1613 *0_4/S
TP1503
TP1504
TP1505
TP1506
TP1507
TP1508
TP1509
TP1520
TP1521
TP1522
TP1523
TP1524
TP1525
TP1526
R1617 10K_1%_4
R1618 10K_1%_4
R1638 10K_1%_4
R17M-M1-70: NA
R17M-M1-30: Stuff
R1065
*10K_1%_4
DGPUT_DATA_R
DGPUT_CLK_R
GPU_GPIO5
GPU_GPIO6
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPU_SVD_JET
VGA_ALERT
TEMP_FAIL
GPU_SVC_JET
GPIO22
DGPU_PROCHOT#
GPIO30
PCIE_REQ_GPU#
DGPU_TRSTB
DGPU_TDI
DGPU_TCK
DGPU_TMS
DGPU_TDO
TESTEN
PX_EN
27M-XTALI
27M-XTALO
GPU_THERMDA
GPU_THERMDC
+1.8V_TSVDD
R1070
*10K_1%_4
U1010B
N9
DBG_DATA16
L9
DBG_DATA15
AE9
DBG_DATA14
Y11
DBG_DATA13
AE8
DBG_DATA12
AD9
DBG_DATA11
AC10
DBG_DATA10
AD7
DBG_DATA9
AC8
DBG_DATA8
AC7
DBG_DATA7
AB9
DBG_DATA6
AB8
DBG_DATA5
AB7
DBG_DATA4
AB4
DBG_DATA3
AB2
DBG_DATA2
Y8
DBG_DATA1
Y7
DBG_DATA0
W6
NC#W6
V6
NC#V6
AC5
NC#AC5
AC6
N#CAC6
AA5
NC#AA5
AA6
NC#AA6
U1
NC#U1/B P_0
U3
NC#U3/B P_1
Y6
NC#Y6
R1
SCL
R3
SDA
GENERAL PURPOSE I/O
U6
GPIO_0
U8
SMBDATA
U7
SMBCLK
T9
GPIO_5_AC_BATT
T8
PCC/GPIO_6
T7
NC_GPI O_7
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
NC_GPI O_11
N5
NC_GPI O_12
N3
NC_GPI O_13
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16
R6
GPIO_17_THERMAL_INT
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21
N8
GPIO_22_ROMCSB
AK10
GPIO_29
AM10
GPIO_30
N7
CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
K7
TESTEN
AF24
NC#AF24
W8
NC_GENE RICB
W7
NC_GENE RICD
AD10
NC_GENE RICE_ HPD4
AJ9
NC#AJ9
AL9
DBG_CNTL0
AB16
PX_EN
AC16
NC_DBG_ VREFG
AM28
XTALIN
AK28
XTALOUT
AC22
XO_IN
AB22
XO_IN2
T4
DPLUS
T2
DMINUS
R5
GPIO28_FDO
AD17
TSVDD
AC17
TSVSS
MESO_S3
DVO
I2C
PLL/CLOCK
THERMAL
NC#AF2
NC#AF4
NC#AG3
DPA
NC#AG5
NC#AH3
NC#AH1
NC#AK3
NC#AK1
NC#AK5
NC#AM3
NC#AK6
NC#AM5
DPB
NC#AJ7
NC#AH6
NC#AK8
NC#AL7
DPC
NC#W5
NC#AA1/P LL_ANAL OG_IN
NC#AA3/P LL_ANAL OG_OUT
DCM/NC_R
NC_AVSSN# AK26
NC_AVSSN# AJ25
NC_AVSSN# AG25
DAC1
NC_HSYNC
NC_VSYNC /WAKE b
NC_RSE T
NC_AVDD
NC_AVSSQ
NC_VDD1 DI
NC_VSS1 DI
NC_SVI2 #1/GP IO_S VD
NC_SVI2 #2/GP IO_S VT
NC_SVI2 #3/GP IO_S VC
NC_GENL K_CLK
NC_GENL K_VSYNC
DAC2
NC_SW APLOCK A
NC_SW APLOCK B
DDC/AUX
NC_DDC1 CLK
NC_DDC1 DATA
NC_AUX1P
NC_AUX1N
NC_AUX2P
NC_AUX2N
NC#AE16
NC#AD16
NC_DDCV GACLK
NC_DDCV GADATA
AF2
AF4
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
NC#V4
U5
NC#U5
V2
NC#V2
Y4
NC#Y4
W5
Y2
NC#Y2
J8
NC#J8
AA1
AA3
R1187 *16. 2K_1%_4
R17M-M1-70: Stuff
R17M-M1-30: NA
AM26
R1269 *1 0K_1%_4
AK26
+3V_VGA
AL25
NC_G
AJ25
AH24
NC_B
AG25
AH26
AJ27
AD22
AG24
AE22
AE23
AD23
AM12
NC
AK12
AL11
AJ11
AL13
AJ13
AG13
AH12
PS_0
AC19
PS_0
PS_1
AD19
PS_1
PS_2
AE17
PS_2
PS_3
AE20
PS_3
TS_A
AE19
TS_A
AE6
AE5
AD2
AD4
AD13
AD11
AE16
AD16
AC1
TP1529
AC3
TP1530
For AMD tuning timing purpose
R1619 *4.7K_5%_4
R1620
*4.7K_5%_4
R1621
*4.7K_5%_4
Level: 1.8V
GPU_SVD
GPU_SVT
GPU_SVC
Level: 3.3V
GPU_SVD_JET
GPU_SVC_JET
R1251 *0_5%_4
TP1527
321
Q1501
*2N7002K
R17M-M1-70: Stuff
R17M-M1-30: NA
R1207 *0_5%_4
R1201 *0_5%_4
R1204 *0_5%_4
R17M-M1-70: Stuff
R17M-M1-30: NA
R1635 0_5%_4
R1637 0_5%_4
R17M-M1-70: NA
R17M-M1-30: Stuff
R17M-M1-70: NA
R17M-M1-30: Stuff
PS_0
PS_2
000
Micron
001
010
Hynix H5TC4G63EFR-N0C
011
Micron
100
Samsung
101
Hynix 3.24K 5.62K
TP1528
SVI2_DATA
SVI2_DATA 44
SVI2_SVT 44
SVI2_CLK
SVI2_CLK 44
Level Setting by Power BOM!!
SVI2_DATA
SVI2_CLK
+3V_VGA
R1639
10K_1%_2
GPU_SVD_JET
GPU_SVC_JET
R1642
*10K_1%_2
+1.8V_VGA
R1246
8.45K_1%_4
PS0 => 11001 (BIT5~1)
R1256
2K_1%_4
+1.8V_VGA
R1244
*0_5%_4
PS2 => 11000 (BIT5~1)
R1254
4.75K_1%_4
Vendor Type Vendor P/NPS_3[3:1]
For R17M-M1-30 debug
R1640
*10K_1%_2
3 4
6 1
R1641
10K_1%_2
C1153
*0.01u/50V_4
C1151
*0.68U/4V_4
256Mx16 *4, 1000Mhz
256Mx16 *4, 1000Mhz K4W4G1646E-BC1ASamsung
256Mx16 *4, 1000Mhz
256Mx16 *8, 1000Mhz
256Mx16 *8, 1000Mhz
256Mx16 *8, 1000Mhz
+1.8V_VGA
5
Q1502A
*DMN5L06DWK-7
Q1502B
*DMN5L06DWK-7
2
+1.8V_VGA
SVI2_DATA
SVI2_CLK
+1.8V_VGA
R1492
8.45K_1%_4
PS1 => 11001 (BIT5~1)
PS_1
R1491
2K_1%_4
+1.8V_VGA
R1245
4.53K_1%_4
PS3 => 11000 (BIT5~1)
PS_3
R1255
2K_1%_4
MT41J256M16LY-091G:N
MT41J256M16LY-091G:N
K4W4G1646E-BC1A
H5TC4G63EFR-N0C
C1376
*0.082u/16V_4
C1152
*0.01u/50V_4
3.24K CS23242FB17
4.75K CS24752FB12
8.45K CS28452FB12
4.53K CS24532FB08
2.00K CS22002FB19
6.98K CS26982FB01
4.99K CS24992FB26
PU PD
NC 4.75K
8.45K 2.00K
4.53K 2.00K
6.98K 4.99K
4.99K
4.53K
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_MAIN
M1-70_S3_MAIN
NB5
NB5
NB5
M1-70_S3_MAIN
Date: Sheet of
Date: Sheet of
Date: Sheet of
1A
1A
1A
14 48Wednesday, March 08, 2017
14 48Wednesday, March 08, 2017
14 48Wednesday, March 08, 2017
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32
N11
N13
N16
N18
N21
R12
R15
R17
R20
T13
T16
T18
T21
U15
U17
U20
V13
V16
V18
Y10
Y15
Y17
Y20
AA11
M12
V11
M6
P6
P9
T6
U9
U1010E
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#86
GND#87
GND#88
GND
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#84
GND#85
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11
A32
AM1
AM32
U1010F
LVDS CONTROL
NC_UPHYAB_TMDPA_TX0N
NC_UPHYAB_TMDPA_TX0P
NC_UPHYAB_TMDPA_TX1N
NC_UPHYAB_TMDPA_TX1P
NC_UPHYAB_TMDPA_TX2N
NC_UPHYAB_TMDPA_TX2P
NC_UPHYAB_TMDPA_TX3N
NC_UPHYAB_TMDPA_TX3P
TMDP
NC_UPHYAB_TMDPB_TX0N
NC_UPHYAB_TMDPB_TX0P
NC_UPHYAB_TMDPB_TX1N
NC_UPHYAB_TMDPB_TX1P
NC_UPHYAB_TMDPB_TX2N
NC_UPHYAB_TMDPB_TX2P
NC_UPHYAB_TMDPB_TX3N
NC_UPHYAB_TMDPB_TX3P
MESO_S3
NC_TXOUT_L3P
NC_TXOUT_L3N
NC_TXOUT_U3P
NC_TXOUT_U3N
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
RECOMMENDED SETTINGS
CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
STRAPS DESCRIPTION OF DEFAULT SETTINGSPIN
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
RSVD GPIO2 RESERVED 0
RSVD GPIO8 RESERVED 0
RSVD GPIO21 RESERVED 0
BIOS_ROM_EN
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS (Removed on Seymour/W histler)
RSVD H2SYNC RESERVED 0
RSVD GENERICC RESERVED 0
GPIO_22_ROMCSB
GPIO[13:11]ROMIDCFG(2:0)
HSYNC 0AUD[1]
VSYNC 0AUD[0]
ENABLE EXTERNAL BIOS ROM
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
SEE DATABOOK FOR DETAIL
SEE DATABOOK FOR DETAIL
0= DO NOT INSTALL RESISTOR
1 = INSTALL 3K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
0
X
0GPIO9 VGA ENABLEDBIF_VGA DIS
0
010
0
NOTE1: AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INST ALL RESISTOR. IF THESE GPIOS ARE USED,
THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET.
GPIO2
H2SYNC GENERICCGPIO21
GPIO8
15
MESO_S3
NB5
NB5
NB5
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
PROJECT : Rams 0P2/0P2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
M1-70_S3_GND/LVDS/Strap
M1-70_S3_GND/LVDS/Strap
M1-70_S3_GND/LVDS/Strap
Date: Sheet
Date: Sheet
Date: Sheet
of
of
of
15 48Wednesday, March 08, 2017
15 48Wednesday, March 08, 2017
15 48Wednesday, March 08, 2017
1A
1A
1A
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