OTP CMOS 64K×8-Bit EPROM
Features
•
64K×8-bit organization
•
Single +3.3V power supply
•
Programming voltage
–
VPP=12.2V±0.2V
–
VCC=5.8V±0.2V
•
Low power consumption
–
Active: 15mA max.
–
Standby: 1µA typ.
•
Fast read access time: 120ns
•
CMOS and TTL compatible I/O
•
Commercial and industrial temperature range
•
Fast programming algorithm
General Description
The HT27LC512 chip family is a low-power,
512K bit, +3.3V electrically one-time programmable (OTP) read-only memories
(EPROM). Organized into 64K words with 8
bits per word, it features a fast singl e address
location programming, typically at 75
µs per
HT27LC512
•
Read access time: –120ns
•
Programming time 75µs typ.
•
High-reliability CMOS technology
•
Latch-up immunity to 100mA from -1.0V to
V
+1.0V
CC
•
Two line control (OE & CE)
•
Standard product identification code
•
Package type
–
28-pin DIP/SOP
–
32-pin PLCC
•
Commercial temperature ranges
(0
°C to +70°C)
byte. Any byte can be accessed in less than 120ns
wit h respect to Spec. This eliminates the need for
WAIT states in high-performance microprocessor
systems. The HT27 LC5 12 has sep ar ate Out pu t En ab le
(
OE) and Chip Enable (CE) controls which
eliminate bus contention issues.
Block Diagram
1 6th May ’99
Pin Assignment
Pin Description
Pin Name I/O/C/P Description
A0~A15 I Address input s
DQ0~DQ7 I/O Data inputs/outputs
CE C Chip enable
OE/VPP C/P Output enable/program voltage supply
NC — No connection
HT27LC512
Absolu te Maximum Ra tin g s
Operation Temperature Commercial ...................................................................................0°C to +70°C
Storage Temperature.................................... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .–65
Applied VCC Voltage with Respect to GND.................... .. .. .................... .. .. .................... .. . –0.6V to 7.0V
Applied Voltage on Input Pin with Respect to GND .......... .... .... .... .... .... .... .... .... .... .... .... ... –0.6V to 7.0V
Applied Voltage on Output Pin with Respect to GND ........... .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. –0.6V to V
Applied Voltage on A9 Pin with Respect to GND................................... ........ ...... ........ ... –0.6V to 13.5V
Applied VPP Voltage with Respect to GND.......................................... .... .... .... .... .... .... ....–0.6V to 13.5V
Applied READ V o ltage (Functionality is guaranteed between these limits) ................... +3V to +3.6V
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute M axi-
mum Ratings” may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme condition s may affect device reliability.
2 6th May ’99
°C to 125°C
+0.5V
CC
D.C. Characteristics
Read operation
Symbol Parameter
V
V
V
V
I
LI
I
LO
I
CC
I
SB1
I
SB2
I
PP
Programming operation
Symbol Parameter
V
V
V
V
I
LI
V
I
CC
I
PP
Output High Level 3.3V IOH=–0.4mA 2.4 — — V
OH
Output Low Level 3.3V IOL=2.0mA — — 0.45 V
OL
Input High Level 3.3V — 2.0 — VCC+0.5 V
IH
Input Low Level 3.3V — –0.3 — 0.8 V
IL
Input Leakage Current 3.3V VIN=0 to 3.6V –5 — 5 µA
Output Leakage Current 3.3V V
VCC Active Current 3.3V
Standby Current (CMOS) 3.3V CE=V
Standby Current (TTL) 3.3V CE=V
VPP Read/Standby Current 3.3V CE=OE=VIL, VPP=V
OH
OL
IH
IL
Output High Level 5.8V IOH=–0.4mA 2.4 — — V
Output Low Level 5.8V IOL=2.1mA — — 0.45 V
Input High Level 5.8V — 0.7V
Input Low Level 5.8V — –0.5 — 0.8 V
Input Load Current 5.8V VIN=VIL, V
H
A9 Product ID Voltage 5.8V — 11.5 — 12.5 V
VCC Supply Current 5.8V — — — 40 mA
VPP Supply Current 5.8V CE=V
Test Conditions
V
CC
Conditions
OUT
CE=VIL, f=5MHz,
I
=0mA
OUT
Test Conditions
V
CC
Conditions
IL
HT27LC512
Min. Typ. Max. Unit
=0 to 3.6V –10 — 10 µA
—— 15 mA
±0.3V — 1.0 10 µA
CC
IH
IH
—— 0.6 mA
—— 100 µA
CC
Min. Typ. Max. Unit
—VCC+0.5 V
CC
— — 5.0 µA
——10mA
3 6th May ’99
Capacitance
Symbol Parameter
C
C
C
IN
OUT
VPP
Input Capacitance 3.3V VIN=0V — 8 12 pF
Output Capacitance 3.3V V
VPP Capacitance 3.3V VPP=0V — 18 25 pF
A.C. Characteristics
Read operation
Symbol Parameter
t
ACC
t
CE
t
OE
t
DF
t
OH
Address to Output Delay 3.3V CE=OE=V
Chip Enable to Output Delay 3.3V OE=V
Output Enable to Output Delay 3.3V CE=V
CE or OE High to Output Float,
Whichever Occurred First
Output Hold from Address, CE or
OE, Whichever Occurred First
HT27LC512
Test Conditions
V
CC
Conditions
=0V — 8 12 pF
OUT
Test Conditions –120
V
Conditions Min. Max.
CC
IL
IL
IL
3.3V — — 40 ns
3.3V — 0 — ns
Min. Typ. Max. Unit
—120ns
—120ns
—45ns
Unit
Programming operation Ta=+25°C±5°C
Symbol Parameter
t
AS
t
OES
t
OEH
t
DS
t
AH
t
DH
t
DFP
t
PW
t
VCS
t
DV
t
VR
Address Setup Time 5.8V — 2 — — µs
CE/VPP Setup Time 5.8V — 2 — — µs
OE/VPP Hold Time 5.8V — 2 — — µs
Data Setup Time 5.8V — 2 — — µs
Address Hold Time 5.8V — 0 — — µs
Data Hold Time 5.8V — 2 — — µs
Output Enable to Output Float
Delay
PGM Program Pulse Width 5.8V — 30 75 105 µs
VCC Setup Time 5.8V — 2 — — µs
Data Valid From CE 5.8V — — — 150 ns
OE/VPP Recovery Time 5.8V — 2 — — µs
Test Conditions
V
CC
Conditions
Min. Typ. Max. Unit
5.8V — 0 — 130 ns
4 6th May ’99
Test waveforms and measurements
tR, tF< 20ns (10% to 90%)
Output test loa d
Product Identification Code
HT27LC512
Note: CL=100pF including jig capacitance
Code
Manufacturer 0 1 000111001C
Device Type 1 1 1000001183
Continuation
A0 A1 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
00011111117F
10011111117F
Pins
Hex
Data
5 6th May ’99
Functional Description
Operation mode
All the operation mo des are shown in the table following.
Mode CE OE/VPP A0 A9 Output
Read V
Output Disable V
Standby (TTL) V
Standby (CMOS) V
CC
Program V
Program Verify V
Product Inhi bi t V
Manufacturer Code (3) V
Device Code (3) V
IL
IL
IH
± 0.3V X X X High Z
IL
IL
IH
IL
IL
V
IL
V
IH
X X X High Z
V
PP
V
IL
V
PP
V
IL
V
IL
HT27LC512
X (2) X Dout
X X High Z
XX D
XX D
X X High Z
V
V
VH (1) 1C
IL
VH (1) 83
IH
IN
OUT
Notes: (1) V
= 12.0V ± 0.5V
H
(2) X=Either V
IH
or V
IL
(3) For Manufacturer Code and Device Code, A1=VIH, When A1=VIL, both codes will read 7F
Programming of the HT27LC512
When the HT27LC512 is delivered, the chip has
all 512K bits in the “ONE”, or HIGH state.
“ZEROs” are loaded into the HT27LC512
through the procedure of programmi ng.
The programming mode is entered when
12.2
±0.2V is applied to the OE/VPP pin and CE
is at V
. For programming, the data to be
IL
programmed is applied with 8 bits in parallel to
the data pins.
The programming flowchart in Figure 3. shows
the fast interactive programming algorithm.
The interactive algorithm reduces programming time by using 30
µs to 105µs programming
pulses and giving each address only as many
pulses a s is ne cessary in orde r to reli ably pr ogram the data. After each pulse is applied to a
given address, the data in th at address is verified. If the data is not verified, additional pulses
are given until it is verified or unti l the maximum number of puls es i s reac hed. Th is proc ess
is repeated while se quencing through each address of the HT27LC512. This part of the programming algorithm is carried at V
=5.8V to
CC
assure that each EPROM bit is programmed to
a sufficiently high thre shold voltage. This ensures that all bits have sufficient margin. After
the final address is completed, the entire
EPROM memory is read at V
CC=VPP
to verify the entire memory.
Program inhibit mode
Programming of multiple HT27LC512 in parallel with different data is also easily accomplished by using the Program Inhibit Mode.
Except for
CE, all like inputs of the parallel
HT27LC512 may be common. A TTL low-level
program pulse applied to an HT27LC512
input with
HT27LC512. A high-level
OE/VPP=12.2±0.2V will progra m that
CE input inhibits the
other HT27LC512 from being programmed.
Program verify mode
Verification should be performed on the programmed bits to determine whether they were
correctly programm ed. The verification should
be performed with
should be verified at t
of
CE.
OE/VPP and CE at VIL. Data
after the falling edge
DV
=5.25±0.25V
CE
6 6th May ’99
HT27LC512
Auto product identification
The Auto Product Identification mode allows
the reading out of a binary code from an
EPROM that will identify its manufacturer and
type. This mode i s inte nded for use by the programming equipment for the purpose of automatically matching the device to be
programmed with its corresponding programming algorithm. Thi s mod e is functio nal in the
25
°C±5°C ambient temperature range that is
required when programming the HT27LC512.
To activate this mode, the programming equip-
ment must force 12.0
±0.5V on the address line A9
of the HT27LC512. Two identifier byt es may then
be sequenced from the device outputs by toggling
address line A0 from V
other address lines must be held at V
to VIH, when A1=VIH. All
IL
during
IH
Auto Product Identification mode.
Byte 0 (A0=V
code, and byte 1 (A0=V
) represents the manufacturer
IL
), the device code . For
IH
HT27LC512, these two identifier bytes are show n
in the Mode Select Table. All identifiers for the
manufacturer and device codes w ill possess odd
parity, with the MSB (DQ7) d e f i n e d as the parity
bit. When A1=V
, the HT27LC512 will read out
IL
the binary code of 7F , continuat ion code, to signify
the unavailability of manufacturer ID codes.
Read mode
The HT27LC512 has two control functions,
both of which mu st be logical ly satisfied in o rder to obtain data at outputs. Chip Enable (
CE)
is the power control and should be used for
device selection. Output Enable (
OE) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that addresses are stable, address access time (t
from
CE to output (tCE). Data is available at the
outputs (t
suming the
) after t he falling ed ge of OE, as-
OE
CE has been LOW and addresses
have been stable for at least t
) is equal to the delay
ACC
ACC-tOE
.
standby mode which reduces the maximum
VCC current to 0.6mA. It is placed in TTLstandby when
CE is at VIH. When in standby
mode, the outputs are in a high-impedance
state, independent of the
OE input.
Two-line output control function
To accommodate multiple memory connections,
a two-line control functi on is provi ded to allow
for:
•
Low memory power consumption
•
Assurance that output bus contention will not
occur.
It is recommended that
CE be decoded an d used
as the primary device-selecti on functio n, while
OE be made a common connection to all devices
in the array and connected to the READ line
from the system contro l bus. This a ssures that
all deselected memory devices are in their lo wpower standby mode and that the output pins
are only active when data is desired from a
particular memory device.
System considerations
During the switch betwe en active and standby
conditions, transient current peaks are produced on th e rising and fall ing edges of Chip
Enable. T he magn itude o f these tra nsient current peaks is dependent on the output capacitance loading of the device. At a minimum, a
0.1
µF ceramic capacitor (high frequency, low
inherent inductance) should be used on each
device between VCC and VPP to minimize transient effects. In addition, to overco me the voltage drop cause d by the inductive effects of the
printed circuit board traces on EPROM arrays,
a 4.7
µF bulk electrolytic capacitor should be
used between VCC and VPP for each eight devices. The location of the capacitor should be
close to where the power supply is connected to
the array.
Standby mode
The HT27LC512 has CMOS standby mode
which reduces the maximum VCC current to
10
µA. It is placed in CMOS standby when CE is
at V
±0.3V. The HT27LC512 also has a TTL-
CC
7 6th May ’99
Figure 1. A.C. waveforms for read operation
HT27LC512
Figure 2. Programming waveforms
8 6th May ’99
HT27LC512
Figure 3. Fast programming flowchart
9 6th May ’99
HT27LC512
Holtek Semiconductor Inc. (Headquarters)
No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C.
Tel: 886-3-563-1999
Fax: 886-3-563-1189
Holtek Semiconductor Inc. (Taipei Office)
5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C.
Tel: 886-2-2782-9635
Fax: 886-2-2782-9636
Fax: 886-2-2782-7128 (International sales hotline)
Holtek Microelectronics Enterprises Ltd.
RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong
Tel: 852-2-745-8288
Fax: 852-2-742-8657
Copyright © 1999 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek
assumes no responsibility arising from the use of the specif ications descri bed. The applications mentioned herein are
used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications
will be suitable without further modification, nor recommends the use of its products for appli cation that may present
a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior
notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
10 6th May ’99
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