HITACHI HB56TW432D User Manual
查询HB56TW432D Series,供应商
HB56TW432D Series,
HB56TW433D Series
4,194,304-word × 32-bit High Density Dynamic RAM Module
Description
The HB56TW432D is a 4M × 32 dynamic RAM Small Outline Dual In-line Memory Module
(S.O.DIMM), mounted 8 pieces of 16-Mbit DRAM (HM51W16400) sealed in TSOP package. The
HB56TW433D is a 4M × 32 dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM),
mounted 8 pieces of 16-Mbit DRAM (HM51W17400) sealed in TSOP package. An outline of the
HB56TW432D, HB56TW433D is 72-pin Zig Zag Dual tabs socket type compact and thin package.
Therefore, the HB56TW432D, HB56TW433D make high density mounting possible without surface mount
technology. The HB56TW432D, HB56TW433D provide common data inputs and outputs. Decoupling
capacitors are mounted on the module board.
ADE-203-732A (Z)
Rev.1.0
Feb. 27, 1997
Features
• 72-pin Zig Zag Dual tabs socket type
Outline: 59.69 mm (Length) × 25.40 mm (Height) × 3.80 mm (Thickness)
Lead pitch: 1.27 mm
• Single 3.3 V (±0.3 V) supply
• High speed
Access time: t
• Low power dissipation
Active mode: 2.59/2.30/2.02 W (max) (HB56TW432D Series)
Standby mode (TTL): 57.6 mW (max)
• Fast page mode capability
= 50/60/70 ns (max)
RAC
t
= 13/15/18 ns (max)
CAC
2.88/2.59/2.30 W (max) (HB56TW433D Series)
(CMOS): 2.88 mW (max) (L-version)
HB56TW432D Series, HB56TW433D Series
• Refresh period
4096 refresh cycles: 64 ms (HB56TW432D Series)
128 ms (L-version)
2048 refresh cycles: 32 ms (HB56TW433D Series)
128 ms (L-version)
• 4 variations of refresh
RAS-only refresh
CAS-before-RAS refresh
Hidden refresh
Self refresh (L-version)
Ordering Information
Type No. Access time Package Contact pad
HB56TW432D-5
HB56TW432D-6
HB56TW432D-7
HB56TW432D-5L
HB56TW432D-6L
HB56TW432D-7L
HB56TW433D-5
HB56TW433D-6
HB56TW433D-7
HB56TW433D-5L
HB56TW433D-6L
HB56TW433D-7L
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
72-pin small outline DIMM Gold
2
Pin Arrangement
HB56TW432D Series, HB56TW433D Series
1 pin 71 pin
Front side
Back side
72 pin2 pin
Pin Arrangement
Front side Back side
Pin No. Pin name Pin No. Pin name Pin No. Pin name Pin No. Pin name
1V
SS
3 DQ1 39 V
5 DQ3 41 CE2 6 DQ4 42 CE3
7 DQ5 43 CE1 8 DQ6 44 RE0
9 DQ7 45 NC 10 V
11 PD1 47 WE 12 A0 48 NC
13 A1 49 DQ20 14 A2 50 DQ21
15 A3 51 DQ22 16 A4 52 DQ23
17 A5 53 DQ24 18 A6 54 DQ25
19 A10 55 NC 20 NC 56 DQ27
21 DQ9 57 DQ28 22 DQ10 58 DQ29
23 DQ11 59 DQ31 24 DQ12 60 DQ30
25 DQ13 61 V
27 DQ15 63 DQ33 28 A7 64 DQ34
29 A11 (NC)*
31 A8 67 PD3 32 A9 68 PD4
33 NC 69 PD5 34 RE2 70 PD6
35 DQ16 71 PD7 36 NC 72 V
Note: 1. A11: HB56TW432D, NC: HB56TW433D
37 DQ18 2 DQ0 38 DQ19
SS
CC
1
65 NC 30 V
4 DQ2 40 CE0
CC
46 NC
26 DQ14 62 DQ32
CC
66 PD2
SS
3
HB56TW432D Series, HB56TW433D Series
Pin Description
Pin name Function
A0 to A11 (HB56TW432D) Address inputs:
Row address: A0 to A11
Column address: A0 to A9
Refresh address: A0 to A11
A0 to A10 (HB56TW433D) Address inputs:
Row address: A0 to A10
Column address: A0 to A10
Refresh address: A0 to A10
DQ0 to DQ7, DQ9 to DQ16,
DQ18 to DQ25, DQ27 to DQ34
RE0, RE2 Row address strobe (RAS)
CE0 to CE3 column address strobe (CAS)
WE Read/Write enable
V
CC
V
SS
PD1 to PD7 Presence detect
NC No connection
Data-in/Data-out
Power supply
Ground
Presence Detect Pin Arrangement
Function
Pin No. Pin name 50 ns 60 ns 70 ns
11 PD1 NC NC NC
66 PD2 NC NC NC
67 PD3 V
SS
68 PD4 NC NC NC
69 PD5 V
70 PD6 V
SS
SS
71 PD7 NC NC NC
PD7 (L-version) V
SS
V
SS
V
NC V
NC NC
V
SS
V
SS
SS
SS
4
Block Diagram
2
3
2
HB56TW432D Series, HB56TW433D Series
RE0
CE0
WE
DQ0
to
DQ3
DQ4
to
DQ7
CE1
DQ9
to
DQ12
RE
CE
CAS RAS WE
4
I/O1 to I/O4
D0
DQ18
to
DQ21
4
OE
CAS RAS WE
4
I/O1 to I/O4 I/O1 to I/O4
D1
DQ22
to
DQ25
4
OE
CAS RAS WE
I/O1 to I/O4
D4
CAS RAS WE
D5
OE
OE
CE
CAS RAS WE
4
I/O1 to I/O4 I/O1 to I/O4
D2
DQ27
to
DQ30
4
CAS RAS WE
D6
DQ13
to
DQ16
A0 to An
V
V
CC
SS
OE
CAS RAS WE
4
I/O1 to I/O4
D3
DQ31
to
DQ34
4
OE
D0 to D7
D0 to D7
Note: D0 to D7: HM51W16400 (HB56TW432D)
HM51W17400 (HB56TW433D)
CAS RAS WE
I/O1 to I/O4
D7
OE
OE
0.22 µF × 8 pcs
D0 to D7
5
HB56TW432D Series, HB56TW433D Series
Absolute Maximum Ratings
Parameter Symbol Value Unit
Voltage on any pin relative to V
Supply voltage relative to V
SS
SS
V
T
V
CC
Short circuit output current Iout 50 mA
Power dissipation Pt 8 W
Operating temperature Topr 0 to +70 °C
Storage temperature Tstg –55 to +125 °C
Recommended DC Operating Conditions (Ta = 0 to 70°C)
Parameter Symbol Min Typ Max Unit Note
Supply voltage V
Input high voltage V
Input low voltage V
Note: 1. All voltage referred to VSS.
SS
VCC3.0 3.3 3.6 V 1
IH
IL
000 V
2.0 — VCC +0.3 V 1
–0.3 — 0.8 V 1
–0.5 to +4.6 V
–0.5 to +4.6 V
6
HB56TW432D Series, HB56TW433D Series
DC Characteristics (Ta = 0 to 70°C, VCC = 3.3 V ± 0.3V, VSS = 0 V) (HB56TW432D)
50 ns 60 ns 70 ns
Parameter Symbol Min Max Min Max Min Max Unit Test conditions Notes
Operating current I
Standby current I
Standby current
I
CC1
CC2
CC2
(L-version)
RAS-only refresh
I
CC3
current
Standby current I
CAS-before-RAS
I
CC5
CC6
refresh current
Fast page mode
I
CC7
current
Battery backup current
I
CC10
(Standby with CBR
refresh) (L-version)
Self refresh mode
I
CC11
current (L-version)
Input leakage current I
Output leakage current I
Output high voltage V
Output low voltage V
LI
LO
OH
OL
Notes: 1. ICC depends on output load condition when the device is selected, ICC max is specified at the
output open condition.
2. Address can be changed once or less while RAS = V
3. Address can be changed once or less while CAS = V
— 720 — 640 — 560 mA tRC = min 1, 2
— 16 — 16 — 16 mA TTL interface
RAS, CAS = V
IH
Dout = High-Z
— 8 — 8 — 8 mA CMOS interface
RAS, CAS ≥ V
– 0.2 V
CC
Dout = High-Z
— 0.8 — 0.8 — 0.8 mA CMOS interface
RAS, CAS ≥ V
– 0.2 V
CC
Dout = High-Z
— 720 — 640 — 560 mA tRC = min 2
—40—40—40mARAS = VIH, CAS = V
1
IL
Dout = enable
— 720 — 640 — 560 mA tRC = min
— 640 — 560 — 480 mA tPC = min 1, 3
— 2.4 — 2.4 — 2.4 mA CMOS interface
Dout = High-Z
CBR refresh:
t
= 31.3 µs
RC
t
≤ 0.3 µs
RAS
— 1.6 — 1.6 — 1.6 mA CMOS interface
RAS, CAS ≤ 0.2 V
Dout = High-Z
–10 10 –10 10 –10 10 µA 0 V ≤ Vin ≤ 4.6 V
–10 10 –10 10 –10 10 µA 0 V ≤ Vout ≤ 4.6 V
Dout = disable
2.4 VCC2.4 VCC2.4 VCCV High Iout = –2 mA
0 0.4 0 0.4 0 0.4 V Low Iout = 2 mA
.
IL
.
IH
7
HB56TW432D Series, HB56TW433D Series
DC Characteristics (Ta = 0 to 70°C, VCC = 3.3 V ± 0.3V, VSS = 0 V) (HB56TW433D)
50 ns 60 ns 70 ns
Parameter Symbol Min Max Min Max Min Max Unit Test conditions Notes
Operating current I
Standby current I
Standby current
I
CC1
CC2
CC2
(L-version)
RAS-only refresh
I
CC3
current
Standby current I
CAS-before-RAS
I
CC5
CC6
refresh current
Fast page mode
I
CC7
current
Battery backup current
I
CC10
(Standby with CBR
refresh) (L-version)
Self refresh mode
I
CC11
current (L-version)
Input leakage current I
Output leakage current I
Output high voltage V
Output low voltage V
LI
LO
OH
OL
Notes: 1. ICC depends on output load condition when the device is selected, ICC max is specified at the
output open condition.
2. Address can be changed once or less while RAS = V
3. Address can be changed once or less while CAS = V
— 800 — 720 — 640 mA tRC = min 1, 2
— 16 — 16 — 16 mA TTL interface
RAS, CAS = V
IH
Dout = High-Z
— 8 — 8 — 8 mA CMOS interface
RAS, CAS ≥ V
– 0.2 V
CC
Dout = High-Z
— 0.8 — 0.8 — 0.8 mA CMOS interface
RAS, CAS ≥ V
– 0.2 V
CC
Dout = High-Z
— 800 — 720 — 640 mA tRC = min 2
—40—40—40mARAS = VIH, CAS = V
1
IL
Dout = enable
— 800 — 720 — 640 mA tRC = min
— 720 — 640 — 560 mA tPC = min 1, 3
— 2.4 — 2.4 — 2.4 mA CMOS interface
Dout = High-Z
CBR refresh:
t
= 62.5 µs
RC
t
≤ 0.3 µs
RAS
— 1.6 — 1.6 — 1.6 mA CMOS interface
RAS, CAS ≤ 0.2 V
Dout = High-Z
–10 10 –10 10 –10 10 µA 0 V ≤ Vin ≤ 4.6 V
–10 10 –10 10 –10 10 µA 0 V ≤ Vout ≤ 4.6 V
Dout = disable
2.4 VCC2.4 VCC2.4 VCCV High Iout = –2 mA
0 0.4 0 0.4 0 0.4 V Low Iout = 2 mA
.
IL
.
IH
8
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