Datasheet HT16511 Datasheet (HANTRONIX)

1/8 to 1/16 Duty VFD Controller

Features

·

Logic voltage: 5V

·

High-voltage output: VDD-35V max.

·

Multiple display
(12-segment & 16-digit to 20-segment & 8-digit)

·

12´4 matrix key scanning

·

8 steps dimmer circuit

·

5 LED output ports (20mA max.)

Applications

·

Consumer products panel function control

·

Industrial measuring instrument panel function control

General Description

HT16511 is a VFD (Vacuum Fluorescent Display) con
troller/driver that is driven on a 1/8 to 1/16 duty factor. It
consists of 12 segment output lines, 8 grid output lines,
8 segment/grid output drive lines, 5 LED output ports, a
control circuit, a display memory,and a key scancircuit.

HT16511

·

4-bit general purpose input port

·

No external resistors necessary for driver output
(provides PMOS open-drain and pull-low resistor
output)

·

Serial interface with MCU (CLK, CS, DI, DO)

·

52-pin QFP package

·

Other similar application panel function control

Serial data inputs to the HT16511 through a three-line

­serial interface. This VFD controller/driver is ideal as a
peripheral device for an MCU.

Block Diagram

D I

D O

C L K

C S

O S C

K 0 ~ K 3

S W 0 ~ S W 3

S e r i a l I / F

O S C

4 - B i t

L a t c h

C o m m a n d D e c o d e r

D i s p l a y R A M

2 0 - B i t

1 6 W o r d s

´

T i m i n g G e n e r a t o r

K e y S c a n

K e y D a t a R A M

1 2 )

( 4

´

5 - B i t L a t c h

L E D 0 ~ L E D 4

2 0 - B i t

O u t p u t L a t c h

1 6 - B i t

S h i f t R e g i s t e r

2 0 1 2

8

D a t a

S e l e c t o r

8

1 6

D i m m i n g C i r c u i t

V D D V S S V E E

S e g m e n t

D r i v e r

8

M u l t i p l e x e d

D r i v e r

8

G r i d

D r i v e r

1 2

S 1 / K 1 ~
S 1 2 / K 1 2

8

S 1 3 / G 1 6 ~
S 2 0 / G 6

8

G 1 ~ G 8

Rev. 1.30 1 December 21, 2004

Pin Assignment

HT16511

L E D 0

L E D 1

L E D 2

L E D 3

O S C

V S S

L E D 4

V D D

G 1

G 5

G 4

G 3

G 2

Pad Assignment

O S C

S W 1

S W 2

S W 3

S W 4

D O

6

D I

C L K

C S

K 0

K 1

K 2

K 3

2 3 2 4 2 5 2 6

S 9 / K 9

S 1 0 / K 1 0

G 3

G 2

4 2

4 3

2 5

S 1 0 / K 1 0

S 1 1 / K 1 1

4 04 14 24 34 44 54 64 7

3 9

G 6

3 8

G 7

3 7

G 8

3 6

S 2 0 / G 9

3 5

S 1 9 / G 1 0

3 4

V E E

3 3

V D D

3 2

S 1 8 / G 1 1

3 1

S 1 7 / G 1 2

3 0

S 1 6 / G 1 3

2 9

S 1 5 / G 1 4

2 8

S 1 4 / G 1 5

2 7

S 1 3 / G 1 6

S 1 2 / K 1 2

S 1 1 / K 1 1

G 4

4 0

4 1

3 9

3 8

3 7

3 6

3 5

3 4

3 3

3 2

3 1

3 0

2 6

2 9

2 8

2 7

G 5

G 6

G 7

G 8

S 2 0 / G 9

S 1 9 / G 1 0

V E E

V D D

S 1 8 / G 1 1

S 1 7 / G 1 2

S 1 6 / G 1 3

S 1 5 / G 1 4

S 1 4 / G 1 5

S 1 3 / G 1 6

S 1 2 / K 1 2

1

S W 1

2

S W 2

3

S W 3

4

S W 4

5

D O

6

D I

7

N C

8

C L K

9

C S

1 0

K 0
K 1

1 1
1 2

K 2

1 3

K 3

1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2

V D D

L E D 0

V S S

5 1

L E D 1

5 0

1

4 84 95 05 15 2

H T 1 6 5 1 1

5 2 Q F P - A

S 1 / K 1

S 2 / K 2

S 3 / K 3

S 4 / K 4

L E D 2

L E D 3

L E D 4

4 6

4 84 9

4 7

S 8 / K 8

S 5 / K 5

S 6 / K 6

S 7 / K 7

V D D

G 1

4 5

4 4

2

3

4

5

( 0 , 0 )

7

8

9

1 0

1 1

1 4 1 5

1 7

1 6

2 0 2 1

1 9

1 8

2 3 2 4

2 2

1 2

1 3

S 1 / K 1

S 2 / K 2

S 3 / K 3

S 4 / K 4

S 5 / K 5

S 6 / K 6

S 7 / K 7

S 8 / K 8

V D D

S 9 / K 9

Chip Size: 103.5 ´ 70.5 (mil)

2

* The IC substrate should be connected to VSS in the PCB layout artwork.

Rev. 1.30 2 December 21, 2004

HT16511

Pad Coordinates

Pad No. X Y Pad No. X Y

1
2 -1110.000 450.300 28 977.250 -612.000
3 -1110.000 345.300 29 977.250 -504.000
4 -1110.000 240.300 30 977.250 -396.000
5 -1110.000 135.300 31 977.250 -288.000
6 -1165.900 9.800 32 977.250 -180.000
7 -1110.000 -125.500 33 977.250 -55.150
8 -1110.000 -230.500 34 977.250 49.850

9 -1110.000 -335.500 35 977.250 173.350
10 -1110.000 -440.500 36 977.250 281.350
11 -1110.000 -545.500 37 977.250 389.350
12 -1110.000 -650.500 38 977.250 497.350
13 -1110.000 -755.500 39 977.250 605.350
14 -897.200 -560.300 40 977.250 713.350
15 -782.500 -560.300 41 405.500 545.400
16 -674.500 -560.300 42 297.500 545.400
17 -566.500 -560.300 43 189.500 545.400
18 -458.500 -560.300 44 81.500 545.400
19 -350.500 -560.300 45 -34.700 545.400
20 -242.500 -560.300 46 -173.950 684.850
21 -134.500 -560.300 47 -285.150 684.850
22 -26.500 -560.300 48 -390.150 684.850
23 81.500 -560.300 49 -501.350 684.850
24 189.500 -560.300 50 -606.350 684.850
25 297.500 -560.300 51 -765.200 726.350
26 405.500 -560.300

-1110.000

555.300 27 977.250 -720.000

Unit: mm

Pin Description

Pin No. Pin Name I/O Description

1~4 SW1~SW4 I 4-bit general purpose input port

5DO O

6DI I

7NC

8 CLK I Reads serial data at the rising edge, and outputs data at the falling edge.

9CS

10~13 K0~K3 I Keying data input to these pins is latched at the end of the display cycle.

14, 33, 45 VDD

15~26 S1/K1~S12/K12 O

27~32,
35~36

34 VEE

37~44 G8~G1 O

46~50 LED4~LED0 O LED driver output ports. This is a CMOS output pin.

51 VSS

52 OSC I Connected to an external resistor or an RC oscillator circuit.

S13/G16~S20/G9 O

Output serial data at the falling edge of the shift clock, starting from low order
bit. This is an NMOS open-drain output pin.

Input serial data at the rising edge of the shift clock, starting from the low order
bit.

No connection

¾

Initializes serial interface at the rising or falling edge of the HT16511. Then it
waits to receive a command. Data input after CS

I

command. While command data is processed, current processing is stopped,
and the serial interface is initialized. While CS

Positive power supply

¾

Segment or key source output pins (dual function). This is PMOS open-drain
and pull-low resistor output.

Segment or Grid driver output pins. These pins are selectable for segment or
grid driving. This is PMOS open-drain and pull-low resistor output.

VFD power supply

¾

Grid driver output pins (Grid only). This is PMOS open-drain and pull-low re
sistor output.

Negative power supply, ground

¾

has fallen is processed as a

is high, CLK is ignored.

-

Rev. 1.30 3 December 21, 2004

Approximate Internal Connections

HT16511

N M O S O U T

P M O S O U T C M O S O U T

V

V

D D

V

E E

D D

Absolute Maximum Ratings

Supply Voltage...........................VSS-0.3V to VSS+6.0V

Input Voltage..............................V

-0.3V to VDD+0.3V

SS

Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil
ity.

D.C. Characteristics

Symbol Parameter

V

DD

V

EE

f

OSC

R

PL

I

DD

I

OL

I

OL1

I

OH1

I

OH21

I

OH22

I

OL3

V

IH

V

IL

V

OH1

V

OL1

V

OL2

Logic Supply Voltage

VFD Supply Voltage

Oscillation Frequency 5V

Output Pull-low Resistor 5V Driver output 50 100 150

Operating Current 5V No load, VFD display off

Driver Leakage Current 5V

LED Sink Current 5V

LED Source Current 5V

Segment/Key Source Current 5V

Segment/Grid Source Current 5V

DO Sink Current 5V

²H² Input Voltage ¾¾

²L² Input Voltage ¾¾

High-level Output Voltage 5V

Low-level Output Voltage 5V

Low-level Output Voltage 5V

V

DD

¾¾

¾¾

R

OSC

V

O=VDD

V

OL

V

OH

V

OH=VDD

V

OH=VDD

V

OL

LED0~LED4, I

LED0~LED4, I

DO, I

Operating Temperature...........................-25°Cto75°C

Storage Temperature............................-50°Cto125°C

Test Conditions

Conditions

Min. Typ. Max. Unit

4.5 5 5.5 V

0

¾ V

DD

=51kW

350 500 650 kHz

¾¾

5mA

-30V, VFD driver off ¾¾-10 mA

=1V, LED0~LED4

=0.9VDD, LED0~LED4

20

¾¾

-1 ¾¾

-2V, S1/K1~S12/K12 -3 ¾¾

-2V -15 ¾¾

=0.4V

OL2

=4mA

OH1

OL1

=-1mA

=20mA

0.7V

0.9V

4

¾¾

¾

DD

0

¾

¾

DD

0

¾

0

¾

V

DD

0.3V

V

DD

1V

0.4 V

-35

DD

Ta=25°C

V

kW

mA

mA

mA

mA

mA

V

V

V

-

Rev. 1.30 4 December 21, 2004

HT16511

A.C. Characteristics

Symbol Parameter

t

PHL

t

PLH

t

r1

t

r2

t

f

t

max

C

t

CW

t

SW

t

SU

t

h

t

CS

t

W

i

Propagation Delay Time

Rise Time

Fall Time 5V

Maximum Clock Frequency 5V Duty=50% 1

Input Capacitance 5V

Clock Pulse Width 5V

Strobe Pulse Width 5V

Data Setup Time 5V

Data Hold Time 5V

Clock-Strobe Time 5V CLK rising edge to CS rising edge 1

Wait Time 5V CLK risingedge to CLK fallingedge 1

V

DD

5V

5V

5V

5V

CLK®DO
C

=15pF, RL=10kW

L

=300pF, S0~S12

C

L

=300pF, G1~G16

C

L

=300pF, Sn, Gn

C

L

Functional Description

Display RAM and Display Mode

The static display RAM is organized into 40´8 bits and
stores the data transmitted from an external device to
the HT16511 through a serial interface. The contents of
the RAM are directly mapped to the contents of the VFD
driver. Data in the RAM can be accessed through the
data setting, address setting and display control com­mands. It is assigned addresses in 8-bit unit as follows:

S E G 1 S E G 4 S E G 8 S E G 1 2 S E G 1 6 S E G 2 0

0 1 H

0 0 H
0 3 H
0 6 H
0 9 H
0 C H
0 F H
1 2 H
1 5 H
1 8 H
1 B H
1 E H
2 1 H
2 4 H
2 7 H
2 A H
2 D H

0 0 H

L

U

0 3 H

L

U

0 6 H

L

U

0 9 H

L

U

0 C H

L

U

0 F H

L

U

1 2 H

L

U

1 5 H

L

U

1 8 H

L

U

1 B H

L

U

1 E H

L

U

2 1 H

L

U

2 4 H

L

U

2 7 H

L

U

2 A H

L

U

2 D H

L

U

0 4 H
0 7 H
0 A H
0 D H
1 0 H
1 3 H
1 6 H
1 9 H
1 C H
1 F H
2 2 H
2 5 H
2 8 H
2 B H
2 E H

0 1 H

U

L

0 4 H

U

L

0 7 H

U

L

0 A H

U

L

0 D H

U

L

1 0 H

U

L

1 3 H

U

L

1 6 H

U

L

1 9 H

U

L

1 C H

U

L

1 F H

U

L

2 2 H

U

L

2 5 H

U

L

2 8 H

U

L

2 B H

U

L

2 E H

U

L

b 0 b 3 b 4 b 7

X X H L X X H U

L o w e r

H i g h e r

4 b i t s

4 b i t s

0 2 H
0 5 H
0 8 H
0 B H
0 E H
1 1 H
1 4 H
1 7 H
1 A H
1 D H
2 0 H
2 3 H
2 6 H
2 9 H
2 C H
2 F H

D I G 1

L

D I G 2

L

D I G 3

L

D I G 4

L

D I G 5

L

D I G 6

L

D I G 7

L

D I G 8

L

D I G 9

L

D I G 1 0

L

D I G 1 1

L

D I G 1 2

L

D I G 1 3

L

D I G 1 4

L

D I G 1 5

L

D I G 1 6

L

Test Conditions

Conditions

Min. Typ. Max. Unit

¾¾

¾¾

¾¾

¾¾

¾¾

¾¾

¾¾¾

¾

¾

¾

¾

400

1

100

100

¾¾

¾¾

¾¾

¾¾

¾¾ms

¾¾ms

Dimming Control

HT16511 provides 8-step dimmer function on display by
controlling the 3-bit binary command code. The full
pulse width of grid signal is divides into 16 uniform sec­tions by PWM (pulse width modulation) technology.

The 16 uniform sections available form 8 steps dimmer
via 3-bit binary code. The 8-step dimmer includes 1/16,
2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The
1/16 pulse width indicates minimum lightness. The
14/16 pulse width represents maximum lightness (Refer
to the display control command).

Key Matrix and Key-Input Data Storage RAM

The key matrix scans the series key states at each level
of the key strobe signal (S1/K1~S12/K12) output of the
HT16511. The key strobe signal outputs are
time-multiplexed signals from S1/K1~S12/K12. The
states of inputs K0~K3 are sampled by strobe signal
S1/K1~S12/K12 and latched into the register.

Ta=25°C

300 ns

100 ns

2

ms

0.5

ms

120

ms

MHz

15 pF

ns

us

ns

ns

Note: Only the lower 4 bits of the addresses assigned

to SEG17 through SEG20 are valid, the higher
4 bits are ignored.

Rev. 1.30 5 December 21, 2004

The key matrix is made up of a 12´4 matrix, as shown below.

S 5 /

K 0

K 1

K 2

K 3

D e t a i l

S 1 /

K 1

K e y m a t r i x

S 2 /

S 4 /

S 3 /

K 4

K 3

K 2

S 6 /

K 5

K 6

S 7 /

HT16511

S 9 /

S 8 /

K 7

K 8

S 1 0 /

K 9

K 1 0

S 1 1 /

K 1 1

S 1 2 /

K 1 2

The data of each key is stored as illustrated below, and
is read with the read command, starting from the least
significant bit.

K 0 ~ K 3K 0 ~ K 3

S 1 / K 1

S 3 / K 3

S 5 / K 5

S 7 / K 7

S 9 / K 9

S 1 0 / K 1 0

b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 7

S 2 / K 2

S 4 / K 4

S 6 / K 6

S 8 / K 8

S 1 0 / K 1 0

S 1 2 / K 1 2

R e a d i n g s e q u e n c e

LED Port

The LED port belongs to the CMOS output configura­tion.

Data is written to the LED port with the write command,

starting from the least port¢s least significant bit. In our
application (see application circuits), the user adopts an
internal NMOS device to a driver LED component by
connecting VDD. When a bit of this port is 0, the corre
sponding LED lights; when the bit is 1, the LED turns off.
The data of bits 6 through 8 are ignored.

M S B L S B

b 4

D o n ' t c a r e

b 0b 1b 2b 3

L E D 0
L E D 1
L E D 2
L E D 3
L E D 4

SW Data

The HT16511 provides an extra 4-bit general input port.
The SW data is provided with available binary code. The
SW data is read with the read command, starting from
the least significant bit. Bits 5 through 8 of the SW data
are 0.

M S B L S B

0000

D o n ' t c a r e

b 0b 1b 2b 3

Commands

Commands set the display mode and status of the VFD
driver.

The first 1 byte input to the HT16511 through the DI pin
after the CS
CS

pin has fallen, is regarded as a command. If

is set high while commands/data are transmitted,
serial communication is initialized, and the commands/
data being transmitted are not valid (however, the com
mands/data previously transmitted remains valid).

-

·

Display mode setting commands
These commands initialize the HT16511 and select
the number of segments and the number of grids
(1/8~1/16 duty, 12 segments to 20 segments).
When these commands are executed, the display is
forcibly turned off, and key scanning is also stopped.

To resume display, the display command ²ON² must
be executed. If the same mode is selected, nothing
happens.

S W 0
S W 1
S W 2
S W 3

-

Rev. 1.30 6 December 21, 2004

M S B L S B

0 0

D o n ' t c a r e

b 0b 1b 2b 3

S e l e c t s d i s p l a y m o d e

8 d i g i t s , 2 0 s e g m e n t s

0 x x x :

9 d i g i t s , 1 9 s e g m e n t s

1 0 0 0 :

1 0 d i g i t s , 1 8 s e g m e n t s

1 0 0 1 :

1 1 d i g i t s , 1 7 s e g m e n t s

1 0 1 0 :

1 2 d i g i t s , 1 6 s e g m e n t s

1 0 1 1 :

1 3 d i g i t s , 1 5 s e g m e n t s

1 1 0 0 :

1 4 d i g i t s , 1 4 s e g m e n t s

1 1 0 1 :

1 5 d i g i t s , 1 3 s e g m e n t s

1 1 1 0 :

1 6 d i g i t s , 1 2 s e g m e n t s

1 1 1 1 :

Note: Power-on status: 16-digit, 12 segment mode is selected.

·

Data setting commands

These commands set the data write and data read modes.

M S B L S B

0 1

b 0b 1b 2b 3

HT16511

D o n ' t c a r e

S e t s d a t a w r i t e a n d r e a d m o d e
0 0 : W r i t e d a t a t o d i s p l a y m e m o r y
0 1 : W r i t e d a t a t o L E D p o r t
1 0 : R e a d k e y d a t a
1 1 : R e a d S W d a t a

A d d r e s s i n c r e m e n t m o d e s e t t i n g s ( d i s p l a y m e m o r y )
0 : I n c r e m e n t s a d d r e s s a f t e r d a t a h a s b e e n w r i t t e n
1 : F i x e s a d d r e s s

T e s t m o d e s e t t i n g s
0 : N o r m a l m o d e
1 : T e s t m o d e , u s e r d o n ' t u s e

Note: power-on status: normal mode operation and address increment mode are set.

·

Address setting commands

These commands set the address of the display memory.

M S B L S B

1 1

b 3b 4b 5

b 0b 1b 2

A d d r e s s ( 0 0 H ~ 2 F H )

If address 30H or higher is set, data is ignored until a valid address is set.
Note: power-on status: the address is set to 00H.

·

Display control commands

M S B L S B

1 0

D o n ' t c a r e

b 0b 1b 2b 3

S e t s d i m m i n g q u a n t i t y
0 0 0 : S e t p u l s e w i d t h t o 1 / 1 6
0 0 1 : S e t p u l s e w i d t h t o 2 / 1 6
0 1 0 : S e t p u l s e w i d t h t o 4 / 1 6
0 1 1 : S e t p u l s e w i d t h t o 1 0 / 1 6
1 0 0 : S e t p u l s e w i d t h t o 1 1 / 1 6
1 0 1 : S e t p u l s e w i d t h t o 1 2 / 1 6
1 1 0 : S e t p u l s e w i d t h t o 1 3 / 1 6
1 1 1 : S e t p u l s e w i d t h t o 1 4 / 1 6

T u r n s o n / o f f d i s p l a y
0 : D i s p l a y o f f ( k e y s c a n c o n t i n u e s )
1 : D i s p l a y o n

Note: power-on status: 1-16 pulse width is set and the display is turned off. Key scanning will be stopped during

power

Rev. 1.30 7 December 21, 2004

Timing Diagrams

HT16511

S n / G n

C S

t

C W

C L K

t

S U

D I

D O

Key Scanning and Display Timing

S n / K n o u t p u t

t

f

t

r 1

( t

)

r 2

9 0 %

1 0 %

t

S W

t

t

C W

t

h

t

P H L

t

P L H

C S

K e y s c a n d a t a

D i g i t 1D i g i t 1 D i g i t 2 D i g i t 3 D i g i t n

G 1 o u t p u t

1 / 1 6 t

G 2 o u t p u t

D I S P

G 3 o u t p u t

G n o u t p u t

t

5 0 0ms

@

1 f r a m e = T´( n + 1 )

Note: One cycle of key scan consists of two frames, and data of 12´4 matrixes is stored in RAM.

Rev. 1.30 8 December 21, 2004

Serial Communication Format

·

Reception (command/data write)

C S

HT16511

C L K

D I

·

Transmission (data read)

C S

C L K

D I

D O

1 2 3 7 8

b 0 b 1 b 2 b 6 b 7

1 2

b 0

3 4 5 6 7 8 1 2 3 4 5 6

b 2 b 3 b 4 b 5 b 6 b 7b 1

t

W

DO must be sure to connect an external pull-high resistor to this pin (1kW to 10kW).

Note: When data is read, a wait time ²t

·

Updating display memory by incrementing address

C S

C L K

² of 1ms is necessary.

W

b 0 b 1 b 2 b 3 b 4 b 5

D a t a i s r e a dA d a t a r e a d c o m m a n d i s s e t

C o m m a n d 1

D I

C o m m a n d 2

C o m m a n d 3 D a t a 1 D a t a n C o m m a n d 4

Note: Command 1: sets display mode

Command 2: sets data
Command 3: sets address
Data 1 to n: transfers display data (48 bytes max.)
Command 4: controls display

·

Updating specific addresses

C S

C L K

D I

C o m m a n d 1

C o m m a n d 2 D a t a C o m m a n d 2 D a t a n

Note: Command 1: sets data

Command 2: sets address
Data: display data

Rev. 1.30 9 December 21, 2004

Application Circuits

R 7

R 8

R 9

R 1 0

HT16511

V

D D

( 5 V )

V D D

K 0

K 1 K 2 K 3 S 1 / K 1 S 2 / K 2 S 3 / K 3 S 4 / K 4

R

O S C

M C U

Note:

O S C

C S
C L K
D I

V

D D

( 5 V )

R 1

D O

=51kW for oscillator resistor

R

OSC

L E D 0 L E D 1

R 2 R 3 R 4 R 5

V

D D

( 5 V )

R1=1~10kW for external pull-high resistor

R2~R6=750W~1.2kW

R7~R10=10kW for external pull-low resistor
D1~D12=1N4001
Ef=Filament voltage for VFD

D 1 D 2 D 3 D 4 D 5 D 6

S 6 / K 6 S 7 / K 7 S 8 / K 8 S 9 / K 9 S 1 0 / K 1 0 S 1 1 / K 1 1

S 5 / K 5

H T 1 6 5 1 1

L E D 2 L E D 3

L E D 4

R 6

D 7 D 8 D 9 D 1 0 D 1 1 D 1 2

S W 0 S W 1 S W 2 S W 3

V S S

S 1 2 / K 1 2

S 1 3 / G 1 6 ~ S 2 0 / G 9

G 1 ~ G 8

S 1
S 2
S 3
S 4
S 5
S 6
S 7
S 8

S 9
S 1 0
S 1 1
S 1 2

E f

V F D

V E E

- 3 0 V

Rev. 1.30 10 December 21, 2004

Package Information

52-pin QFP (14´14) Outline Dimensions

3 9

4 0

A

B

HT16511

C

D

2 7

2 6

F

E

H

G

I

5 2

Symbol

A 17.30

B 13.90

C 17.30

D 13.90

E

F

G 2.50

H

I

J 0.73

K 0.10

1

1 3

Dimensions in mm

Min. Nom. Max.

¾

¾

¾¾

¾

1 4

K

¾

¾

¾

¾

1.00

0.40

¾

0.10

¾

¾

a 0°¾7°

J

17.50

14.10

17.50

14.10

¾

¾

3.10

3.40

¾

1.03

0.20

Rev. 1.30 11 December 21, 2004

Holtek Semiconductor Inc. (Headquarters)

No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: [phone]
Fax: [phone]
http://www.holtek.com.tw

Holtek Semiconductor Inc. (Taipei Sales Office)

4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan
Tel: [phone]
Fax: [phone]
Fax: [phone] (International sales hotline)

HT16511

Holtek Semiconductor Inc. (Shanghai Sales Office)

7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China 200233
Tel: [phone]
Fax: [phone]
http://www.holtek.com.cn

Holtek Semiconductor Inc. (Shenzhen Sales Office)

5/F, Unit A, Productivity Building, Cross of Science M 3rd Road and Gaoxin M 2nd Road, Science Park, Nanshan District,
Shenzhen, China 518057
Tel: [phone]
Fax: [phone]

Holtek Semiconductor Inc. (Beijing Sales Office)

Suite 1721, Jinyu Tower, A129 West Xuan Wu Men Street, Xicheng District, Beijing, China 100031
Tel: [phone]
Fax: [phone]

Holtek Semiconductor Inc. (Chengdu Sales Office)

709, Building 3, Champagne Plaza, No.97 Dongda Street, Chengdu, Sichuan, China 610016
Tel: [phone]
Fax: [phone]

Holmate Semiconductor, Inc. (North America Sales Office)

46729 Fremont Blvd., Fremont, CA 94538
Tel: [phone]
Fax: [phone]
http://www.holmate.com

Copyright Ó 2004 by HOLTEK SEMICONDUCTOR INC.

The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek as
sumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.

-

Rev. 1.30 12 December 21, 2004