- 2-8 -
BLOCK DIAGRAM
THERMAL SHUTDOWN
BANDGAP REFERENCE
OVERVOLTAGE
PROTECTION
SOA PROTECTIO N
SHORTCIRCUIT
PROTECTION
1
4
3
2
Vin
Vdis
Vo
GND
HIGH / LOW OUTPUT
ON / OFF
Q1
R1
R2
+
+
1.4V
2-9 2-10
BLOCK DIAGRAM
- 3-10 -
BLOCK DIAGRAMS
1. RF/CD DSP/DVD DSP/DVD SERVO Block Diagram
IC2A1
33P3721
RF Signal
Processdr
IC206
DVDSP-3301
CD/DVD DSP
DVD SERVO
DRAM
256K x 16bit
IC2M1
KA3032
SpindleMotor,LoadingMotor,
Actuator Driver
PICK
UP
DVD:A,B,C,D,
FE,TE,PI,SBADD
SENS,FOK,SLD_FG,
MSDATO,DEFECT,DSP_SENSE
SQSO,SQCK,SCOR
XLAT,S_CLK,S_DA
TA
DSP_CS,/WR,/RD
DO[0:7]
AO[0:5]
DVD_DATA[0:7]
MCK
UCOM
I/F
MPEG
I/F
UCOM
I/F
M/D
DVD/CD RF
MIRR,TZC
ICADDR[0:8]
ICDATA[00:15]
MON,MDP
FDO,TDO,FMO
Spindle
focus,tracking,loading,sled
SPINDLE_FG
Load open/close(loading control)
CD:A,B,C,D/E,F
4
4
5
3
3
3
8
6
8
8
2
4
9
16
- 3-11 -
2. MPEG Block Diagram
DSP
I/F
IC301
ZiVA-4.1
MPEG A/V
Decoder
IC303
GM72V1621
1M x 16bit
SDRAM
IC302
GM72V1621
1M x 16bit
SDRAM
IC304
PLL1700
CLOCK
GENERATROR
27MHz
X-TAL
U-COM
I/F
DVD_DAT
A[0:7]
DAI_DATA
DA_DATA[0:3]
DA_BCK,DA_XCK,DA_LRCK
SPDIF
AUDIO
I/F
A/V
JACK
I/F
U-COM
I/F
SERVO
I/F
DA_XCK
MPEG_CLK
8
SDCLK1,ZISENB
REQZ1
2
2
A[00:02]
D[00:07]
MPEG_ERROR
MPEG_RST
DVD_SD_CS0,DVD_UDQM
DVD_MD[0:15]
DVD_MA[0:11]
DVD_SD_CAS
DVD_SD_RAS
DVD_SD_CLK
DVD_MWE
DVD_LDQM
DVD_SD_CS1
S_CLK,S_DATA<DPLL_L
MCK
8
4
4
21216
3
CVBS
Y.SEL
Y(G)
PB(B)
PR(R)
CVBS
Y
C
Y(G)
PB(B)
PR(R)
IC372
LA7135AM
SwitchIC
- 3-12 -
3. µ-COM Block Diagram
AV JACK
I/F
IC506
XC9536
IC502
FLASH
ROM
FRONT
I/F
IC503
DRAM
IC505
74HC374
IC501
SH6417034
MPEG
I/F
SERVO
I/F
DSP
I/F
IC504
EEPROM
2402/2416
16:9,SYSTEM_SW
LD_ON,LOAD CLOSE,MIRR,ACT_MUTE
LOAD_OPEN,SPINDLE_FG,SLD_FG,
D[00:07],A[00:02],IIC_CLK,IIC_DATA,SCLK0, MPEG_RST
,MPEG_INT,V_MUTE,A_MUTE,DAC_RST,Y_SEL
MPEG_ERROR
,DAC_L0
,RF_LAT
,/DSP_CS
,/MPEG_CS
,/PP_CS 16:,
,Y_SEL
,,MPEG_RST
PWR_CTL
,SENS,LIMIT_SW
,MIC_ON,CLOSE_SW
,OPEN_SW,MPEG_W
AIT
,16:9,,MPEG_RST
,M_RESET
M_RESET
,RXD0
,TXD0
,SCK0
,F_REQ
,MODE_SW
,M_REQ,
,ECHO
IIC_CLK
,IIC_DATA
SENS_MCOM
, MICOM_WAIT
/IOCS1,/WR
D[00:04]
A[19:21]
A[01:19]
D[00:15]
A[01:09]
D[00:15]
A[01:21]21 D[00:15]
D[00:07]
DAC_RST
,E_DR
,/S_XRST
,XLAT
,ACT_MUTE
,LOAD_OPEN
,LOAD CLOSE
,/PWR_RST
EXP_W2
,/PWR_CTL
2
2
2
8
10
2
2
2
19
16
9
16
16
8
8
21
D[00:07],A[00:05], ,E_SIN,E_CLK
LOAD_FR,F/R,LOCK,DEFECT,FOK
DSP_SENSE,
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