Goldstar FFH-DV25AX Service Manual ADJ

- 2-1 -

SECTION 2. AUDIO PART

ADJUSTMENTS

TAPE DECK ADJUSTMENT

1. AZIMUTH ADJUSTMENT

Figure 1. Azimuth Adjustment Connection Diagram

CH1 CH2

Speaker Out

Playback Mode

Head

Test Tape
MTT-114

L ch

R ch

GND

Dual-trace
synchroscope

Electronic
Voltmeter

L out

R out

Unit

This set has been aligned at the factory and normally will not require further adjustment. As a result, it is not
recommended that any attempt is made to modificate any circuit. If any parts are replaced or if anyone tampers
with the adjustment, realignment may be necessary.

IMPORTANT

1. Check Power-source voltage.

2. Set the function switch to band being aligned.

3. Turn volume control to minimum unless otherwise noted.

4. Connect low side of signal source and output indicator to chassis ground unless otherwise specified.

5. Keep the signal input as low as possible to avoid AGC and AC action.

Deck Mode Test Tape Test Point Adjustment Adjust for

Palyback MTT-114 Speaker Out

DECK Screw

Maximum

Azimuth Screw

2. RECORD BIAS ADJUSTMENT

Head

Unit

PN202

GND

Record/Playback
head

Test Tape
MTT-5511

Record/Playback
and Pause Mode

Frequency Counter

Deck Mode Test Tape Test Point Adjustment Adjust for

Rec/Pause MTT-5511

ERASE HEAD

L201

60kHz±5kHz (Auto stop)

WIRE(PN201) 85kHz±5kHz(Auto Reverse)

Figure 2. Record Bias Adjustment Connection Diagram

- 2-2 -

S20/PC 4
S19/PC 3
S18/PC 2
S17/PC 1
S16/PC 0
S15/PB7
S14/PB6
S13/PB5
S12/PB4
S11/PB3
S10/PB2
S9/PB1
S8/PB0
S7/PA7
S6/PA6
S5/PA5
S4/PA4
S3/PA3
S2/PA2
S1/PA1

V2/PL5

V1/PL4
COM0/PL0
COM1/PL1
COM2/PL2
COM3/PL3

P30
P31

VSS3

VDD3

P32
P33
P34
P35
P00
P01
P02
P03
P04
P05

V3/PL6

S47/PF7

S46/PF6

S45/PF5

S44/PF4

S43/PF3

S42/PF2

S41/PF1

S40/PF0

S39/PE7

S38/PE6

S37/PE5

S36/PE4

S35/PE3

S34/PE2

S33/PE1

S32/PE0

S31/PD7

S30/PD6

S29/PD5

S28/PD4

S27/PD3

S26/PD2

VSS2

VDD2

S25/PD1

S24/PD0

S23/PC7

S22/PC6

S21/PC5

P06

P07

P10/SO0

P11/SI0/SB0

P12/SCK0

P13/SO1

P14/SI1/SB1

P15/SCK1

P16/BUZ

P17/PWM0

P70/INT0

RES

XT1/

P74

XT2/P75

VSS1

CF1

CF2

VDD1

P80/AN0

P81/AN1

P82/AN2

P83/AN3

P84/AN4

P85/AN5

P86/AN6

P87/AN7

P71/INT1

P72/INT2/T0I

N

P73/INT3/T0IN

S0/

PA0

81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31

1 2 3 4 5 6 7 8 9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

8079787776757473727170696867666564636261605958575655545352

51

Pin Assignment

3. TUNER ADJUSTMENT
Non-adjusting

- 2-3 -

System Block Diagram

Interrupt Control

Stand-by Control

CF
RC

X’tal

Base Timer Bus Interface ACC

B Register

C Register

PSW

RAR

RAM

Stack Pointer

Port 0

Watchdog Timer

C Register

Port 1 SIO0

SIO1 Port 7

Port 8

Timer 0

Timer 1

Port 3

ADC Real Time Service

RAM 128 bytes

LCD Display

Controller

SO0 - S7 (PA)

S8 - S13 (PB)

S16 - S23 (PC)
S24 - S31 (PD)

S32 - S39 (PE)
S40 - S47 (PF)

COM0-COM3(PL)

INT0-3 Noise

Rejection Filter

ROM

IR

PLA

Clock

Gener

ator

PC