Gigabyte NF4 AM2 rev.1.2 Schematics
5
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PAGE
D D
C C
B B
CONTENTS
COVER & COMPONENT SIZE
1-2
BLOCK DIAGRAM
3
RESET MAP
4
CLOCK DISTRIBUTION
5
6
PCI DEVICE TABLE / VID TABLE
7-11
SKT 940 K8 M2 CPU
12
CPU DECOUPLING
DDR2 ADD/CTL TERMINATION
13
DDR2 DIMM A1
14
DDR2 DIMM B1
15
16
DDR2 DIMM A2
17
DDR2 DIMM B2
DDR2 VTT TERM 0-63
18
DDR2 VTT TERM 64-123
19
DDR2 DECOUPLING
20
CK804 HT
21
22
CK804 PCI EXPRESS
CK804 PCI
23
24
CK804 SATA / IDE
CK804 G/MII / AC97 / USB
25
CK804 POWER & DECOUPLING
26
PCI EXPRESS X1 CONNECTOR'S
27
PCI EXPRESS X16 CONNECTOR
28
29
PCI CONNECTOR 1/2
PCI CONNECTOR 3/4
30
PCI TERMINATION
31
AUDIO ALC655 CODEC
32-33
SIO ITE8712
34
35
H/W MON,FAN CONTROL
36
IDE CONNECTORS
FLOPPY / PS2
37
38
SERIAL PORT
39
USB CONNECTORS
40
POWER SEQUENCING
10/100/1000M LAN PHY Marvell
41
42
PWR CON / FNT PNL/ VBAT
OVER VOLTAGE CKT
43
44
VCC_CORE DC-DC CONVER
45
PLL DELAY / PWRGD / MEM VREG
46
CK804 CORE / LAN / HT - VREGS
FRONT USB
47
NF4ST-A2B ( CK804 )
REV 1.2
DDR2 X 4 Dual channel , PCI-Ex16 X 1 , PCI-Ex1 X 2 , PCI X
4 , Marvell 10/100 Lan PHY , AMD K8-940
& PARALLEL PORT
A A
Title
<Title>
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
NF4ST-A2B
1
1 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
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NF4ST-A2 V020 TO NF4ST-A2A V1.0 CHANGE LIST:
1.ADD R476 FOR RGMII
2.CHANGE R200 AND R201 FOR RGMII VREF(1.25V)
3.CHANGE R455 TO 4.99K FOR DDR2 VOLTAGE 1.94V
4.CHANGE R459 TO 8.87K FOR DDR2 OV 2.4V
D D
7.ADD R479 AND C631 FOR 10/100 MARVELL LAN
C C
B B
22U/25DE
5*7 mm
100U/16DE
220U/10DE
470U/16DE
1000U/10DE
1500U/16DE
3300U/25DE
6.3*11 mm
6.3*11 mm
8*11 mm
8*14 mm
10*25 mm
10*25 mm
5
A A
1
TO-263
B55QS03
2
3
D
G
TO-263
2SK3296 HSD882-D
D
S
G
TO-252 SOT-23
20N03
TM3055TL-S
45N03
FDD6030L
4
D
G
S
SOT-23
2N7002 LM431
SI2303S
SI2301S
C
S
B
2N3904
2N3906
MMBT2907A
3
C
E
B C
E
2
3
1
E
SOT-23
BAT54C
BAT54S
3
1
2
T0-92
T0-92
T0-92
2N2222A
78L05-D
2N2097A
LM432
B
Title
Size Document Number Rev
2
Date: Sheet of
Custom
Component Size
NF4ST-A2B
1
2 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
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D D
C C
B B
FLOPPY CONN
PS2/KBRD CONN
PARALLEL CONN
SERIAL CONN
SERIAL HDR
POWER
SUPPLY
CONNECTOR
PEX X16
PEX X1 (2)
PRIMARY IDE
SECONDARY IDE
X4 - SATA CONN
SIO
ITE 8712
VREG
PCI EXPRESS
PCI EXPRESS
ATA 133
INTEGRATED SATA
LPC BUS 33MHZ
BLOCK DIAGRAM
SOCKET M2
K8
HT 16X16 1GHZ
NFORCE
CRUSH K804
740BGA
LPC HDR
2MB FLASH
RGMII
PCI 33MHZ
AC97
X10 USB2
128-BIT 533/667MHZ
128-BIT 533/667MHZ
MII/RGMII
AC97
BACK PANEL CONN
USB2 PORTS 5-4
DOUBLE STACK
USB2 PORTS 3-2
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 1-0
USB2 PORTS 7-6
USB2 PORTS 9-8
DDR2 SDRAM CONN 0
DDR2 SDRAM CONN 1
DDR2 SDRAM CONN 2
DDR2 SDRAM CONN 3
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
A A
Title
<Title>
Size Document Number Rev
Custom
5
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3
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Date: Sheet of
NF4ST-A2B
1
3 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
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D D
RESET MAP
K8 SKT 939
CPU RST*
CPU PWRGD
CPU_RST*
CPU_PWRGD
PWR SWTCH
SIO
CK804
ITE8712
LPCRST_SIO*
CPU PWRGD
CPU RST*
PCI RST0*
PCI RST1*
PCI RST3*
LPC_RST*
PE_RESET*
GPIO_AUX*
LPCRST_SIO*
CPU_PWRGD
CPU_RST*
PCIRST_SLOT0*
PCIRST_SLOT1*
PCIRST_SLOT3*
LPCRST_FLASH*
LAN_PHY
RESET*
PEX X16
PEX X1(2)
PEX X1(1)
FLASH
PRI IDE
SEC IDE
PCI SLOT 3
PCI SLOT 4
PCI SLOT 1
PCI SLOT 2
C C
PWRBTN*
PWR CONN
PS ON
PSON#
PWR GOOD
B B
PWRGD SB
CIRCUIT
POWER_GOOD
PWRGD_SB
PANSWH# (75)
PSON# (76)
PWRONSB# (72)
PSIN (71)
SLP S3*
PWR BUTTON
PWRGD
PWRGD_SB
A A
Title
<Title>
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
NF4ST-A2B
1
4 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
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K8 940 M2 CPU
HT_TXCLK0
HT_TXCLK0*
HT_RXCLK0
HT_RXCLK0*
D D
HT_TXCLK1
HT_TXCLK1*
HT_RXCLK1
HT_RXCLK1*
CPU_CLK_IN*
CPU_CLK_IN
MEMORY_A1_CLK[2:0]
MEMORY_A1_CLK[2:0]*
MEMORY_B1_CLK[2:0]
MEMORY_B1_CLK[2:0]*
MEMORY_A2_CLK[2:0]
MEMORY_A2_CLK[2:0]*
MEMORY_B2_CLK[2:0]
MEMORY_B2_CLK[2:0]*
CHANNEL A1 0-63
CHANNEL B1 64-127
CHANNEL A2 0-63
CHANNEL B2 64-127
DIMM 0
DIMM 1
DIMM 2
DIMM 3
CK804
CPU_CLK_IN
CPU_CLK_IN*
HT_RXCLK1*
HT_RXCLK1
HT_TXCLK1*
HT_TXCLK1
HT_RXCLK0*
HT_RXCLK0
HT_TXCLK0*
C C
32.0 KHZ
25 MHZ
B B
HT_TXCLK0
XTAL_IN
XTAL_OUT
XTAL_IN
XTAL_OUT
PE0_REFCLK
PE0_REFCLK*
PE1_REFCLK
PE1_REFCLK*
PE2_REFCLK
PE2_REFCLK*
PE3_REFCLK
PE3_REFCLK*
BUF_SIO
SUSCLK
LPC_CLK0
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK_FB
LPC_CLK1
AC_97CLK
AC_BITCLK
BUF_25MHZ
24MHZ
AC '97 LINK
14MHZ OR 24MHZ
TP_N/A
ZDB
PEX X16
PEX X1
PEX X1
SIO
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
AC97
CODEC
FLASH
LPC
HEADER
LAN
PHY
A A
Title
<Title>
Size Document Number Rev
Custom
5
4
3
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Date: Sheet of
NF4ST-A2B
5 48Wednesday, April 04, 2007
1
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
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D D
C C
B B
VID [4..0] VDD
0X00000
0X00001
0X00010
0X00011
0X00100
0X00101
0X00110
0X00111
0X01000
0X01001
0X01010
0X01011 0X11011
0X01100
0X01101
0X01110
0X01111
CPU VID TABLE
1.525V
1.500V
1.475V
1.425V
1.400V
1.350V
1.375V
1.325V 0X11001
1.300V
1.275V
1.250V
1.225V
1.200V
1.175V
SMBUS ADDRESS MAP
DEVICE
DIMM 0
DIMM 1
DIMM 2
DIMM 3
SIO
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
DDC BUS
DDC BUS
SMBUS #
0
0
0
0
1
1
1
1
1
A
B
ADDRESS
VDD
1.150V
1.125V
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.825V
0.800V
OFF
VID [4..0]
0X100001.550V
0X10001
0X10010
0X10011
0X101001.450V
0X10101
0X10110
0X10111
0X11000
0X11010
0X11100 0.850V
0X11101
0X11110
0X11111
1010 000 = 0X50
1010 001 = 0X51
1010 010 = 0X52
1010 011 = 0X53
0101 101 = 0X2D
ARP
ARP
ARP
ARP
?
?
BACK PANEL
PCI BUS#
SLOT
4
01
01
3
01
2
1
01
PCI DEVICE MAP
DEVICE
CK804
MAC /MAC
PCI-PCI BRIDGE
SATA1
SATA0
IDE
MODEM CODEC
AUDIO CODEC
USB 2.0
USB 1.1
SHAPE TRIM
LDT
SMBUS2
LEGACY SLAVE
LPC
LOGICAL PCI BUS
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
PCI INTERRUPT/IDSEL MAP
IDSEL PIN
DEVICE#
25
0X09
0X08
24
23
0X07
22
0X06
PCI BUS#
CK804 LOGICAL
PCI BUS 0
DEVICE#
0X01-0X0F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
PCI SLOT
INTA*
P_INTX*
P_INTW*
P_INTZ*
P_INTY*
XA
X9
X8
X8
X6
X4
X4
X2
X2
X1
X0
X1
?
X1
?
PCI SLOT
PCI SLOT
INTB*
INTC*
P_INTZ*
P_INTY*
P_INTX*
P_INTY*
P_INTX*
P_INTW*
P_INTZ*
P_INTW* P_INTX* 0
FUNCTION
DEVICE ID
--
0
0X56/57
0
0X005C
0
0X0055
0
0X0054
0X0053
0
1
0X0058
0
0X0059
1
0X005B
0
0X005A
0X005F
2
0
0X005E
0X0052
1
0X00D3
?
0X0050/51
0
?
?
PCI SLOT
INTD*
P_INTW*
P_INTZ*
P_INTY*
--
REQ/GNT RESET
3/3
1
2/2
1
0
1/1
0/0
SOT23
1
SOT23-6
6
1
CLOCK
3
2
1
0
SOT23-5/SC70
SOT89-5
5
3
2
4
2
1
3
SOT223
5
4
2
3
4
2
1
3
A A
Title
<Title>
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
NF4ST-A2B
1
6 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
D D
HT_UPCLK121
HT_UPCLK1_21
HT_UPCLK021
HT_UPCLK0_21
C C
HT_UP[15..0]21
HT_UP_[15..0]21
B B
HT_UPCNTL21
HT_UPCNTL_21
HT_UP[15..0]
HT_UP_[15..0]
+1.2V_HT
4
HT_UPCLK1
HT_UPCLK1_
HT_UPCLK0
HT_UPCLK0_
R371 51 1%
1 2
R372 51 1%
1 2
HT_UPCNTL
HT_UPCNTL_
HT_UP15
HT_UP_15
HT_UP14
HT_UP_14
HT_UP13
HT_UP_13
HT_UP12
HT_UP_12
HT_UP11
HT_UP_11
HT_UP10
HT_UP_10
HT_UP9
HT_UP_9
HT_UP8
HT_UP_8
HT_UP7
HT_UP_7
HT_UP6
HT_UP_6
HT_UP5
HT_UP_5
HT_UP4
HT_UP_4
HT_UP3
HT_UP_3
HT_UP2
HT_UP_2
HT_UP1
HT_UP_1
HT_UP0
HT_UP_0
CPU1A
N6
L0_CLKIN_H(1)
P6
L0_CLKIN_L(1)
N3
L0_CLKIN_H(0)
N2
L0_CLKIN_L(0)
V4
L0_CTLIN_H(1)
V5
L0_CTLIN_L(1)
U1
L0_CTLIN_H(0)
V1
L0_CTLIN_L(0)
U6
L0_CADIN_H(15)
V6
L0_CADIN_L(15)
T4
L0_CADIN_H(14)
T5
L0_CADIN_L(14)
R6
L0_CADIN_H(13)
T6
L0_CADIN_L(13)
P4
L0_CADIN_H(12)
P5
L0_CADIN_L(12)
M4
L0_CADIN_H(11)
M5
L0_CADIN_L(11)
L6
L0_CADIN_H(10)
M6
L0_CADIN_L(10)
K4
L0_CADIN_H(9)
K5
L0_CADIN_L(9)
J6
L0_CADIN_H(8)
K6
L0_CADIN_L(8)
U3
L0_CADIN_H(7)
U2
L0_CADIN_L(7)
R1
L0_CADIN_H(6)
T1
L0_CADIN_L(6)
R3
L0_CADIN_H(5)
R2
L0_CADIN_L(5)
N1
L0_CADIN_H(4)
P1
L0_CADIN_L(4)
L1
L0_CADIN_H(3)
M1
L0_CADIN_L(3)
L3
L0_CADIN_H(2)
L2
L0_CADIN_L(2)
J1
L0_CADIN_H(1)
K1
L0_CADIN_L(1)
J3
L0_CADIN_H(0)
J2
L0_CADIN_L(0)
SOCKET_M2 940 SMD
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
3
HT_DWNCLK1
AD5
HT_DWNCLK1_
AD4
HT_DWNCLK0
AD1
HT_DWNCLK0_
AC1
Y6
W6
HT_DWNCNTL
W2
HT_DWNCNTL_
W3
HT_DWN15
Y5
HT_DWN_15
Y4
HT_DWN14
AB6
HT_DWN_14
AA6
HT_DWN13
AB5
HT_DWN_13
AB4
HT_DWN12
AD6
HT_DWN_12
AC6
HT_DWN11
AF6
HT_DWN_11
AE6
HT_DWN10
AF5
HT_DWN_10
AF4
HT_DWN9
AH6
HT_DWN_9
AG6
HT_DWN8
AH5
HT_DWN_8
AH4
HT_DWN7
Y1
HT_DWN_7
W1
HT_DWN6
AA2
HT_DWN_6
AA3
HT_DWN5
AB1
HT_DWN_5
AA1
HT_DWN4
AC2
HT_DWN_4
AC3
HT_DWN3
AE2
HT_DWN_3
AE3
HT_DWN2
AF1
HT_DWN_2
AE1
HT_DWN1
AG2
HT_DWN_1
AG3
HT_DWN0
AH1
HT_DWN_0
AG1
2
HT_DWNCLK121
HT_DWNCLK1_21
HT_DWNCLK021
HT_DWNCLK0_21
HT_DWNCNTL21
HT_DWNCNTL_21
HT_DWN[15..0]
HT_DWN_[15..0]
1
HT_DWN[15..0]21
HT_DWN_[15..0]21
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
NF4ST-A2B
7 48Wednesday, April 04, 2007
1
1.2Custom
PDF created with pdfFactory Pro trial version www.pdffactory.com
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CPU_M_VREFF
12
BC447
0.1UF 25V Y5V
U16
I O
VIN VOUT
ADJ
AZ1117H-ADJ SOT-223
A
CPU_VDDA_ADJ
12
BC448
1000P 50V X7R
+1.8V_SUS
CPU_CLK21
CPU_CLK_21
+5V
12
C442
+1.8V_SUS
BR381
16.9 1%
1 2
12
BR382
16.9 1%
0.1UF 25V Y5V /NI
D D
C C
B B
+2.5V
R374
301 1%
1 2
R375
301 1%
1 2
CPU_CLK
CPU_CLK_
5/10 M_ZN,M_ZP
R373 INDUCTOR 68NH 300MA 08051 2
12
CT43
100UF 16V 5X11 2mm
ROUTE AS DIF 20/5/5/5/20
LAYOUT: PLACE 169 OHM WITHIN
600mils OF CPU
AND TRACE TO AC CAPS LESS
THAN 1250mil
C445
12
3900P 50V X7R
C446
12
3900P 50V X7R
+1.8V_SUS
ROUTE AS DIFF PAIR
10/5/5/5/10
CPU_CORE_FB44
CPU_CORE_FB_44
+1.8V_SUS
CPU_THERMDC34
CPU_THERMDA34
12
C443
1UF 16V 0805 Y5V
R376
169 1%
1 2
R378 1K
1 2
R379 300
1 2
R380 300 /NI
1 2
CPU_CORE_FB
CPU_CORE_FB_
TP_VDDIOSENSE TP /NI
CPU_M_VREFF
R384 39.2 1%
1 2
R386 39.2 1%
1 2
R387 510
1 2
R388 510
1 2
R389 3001 2
R391 300
1 2
CPU_VDDA
12
C444
3900P 50V X7R
CPU_PWRGD
HT_STOP_
CPU_RST_
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AL10
AJ10
AH10
AL9
A5
G2
G1
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
CPU1D
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
+1.8V_SUS
RN106
330 8P4R
1 2
3 4
5 6
7 8
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
TDO
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
TP /NI
TP_VID5
TP /NI
TP_VDDIOFB
TP_VDDIOFB_
TP /NI
R383 44.2 1%12
R385 44.2 1%
FBCLKOUT
FBCLKOUT_
R392 300
12
R390
80.6 1%
1 2
LAYOUT: PLACE WITHIN 1 INCH OF CPU
LAYOUT: ROUTE 80 OHM DIFF IMPEDENCE
1 2
R393 3001 2
+1.8V_SUS
+3.3V_DUAL
12
R411
1K
Q65
2N3904 SOT23
+1.2V_HT
LAYOUT: PLACE WITHIN 1 INCH OF CPU
5/10LESS THAN 1000mil
20/8/5/8/20
+1.8V_SUS
K8_VID4 43
K8_VID3 43
K8_VID2 43
K8_VID1 43
K8_VID0 43
12
R377
1K
CPU_THERMTRIP_CPU_THERMTRIP
CPU_THERMTRIP_ 21
RN107
330 8P4R
1 2
3 4
5 6
7 8
A A
CPU_RST_21
CPU_PWRGD21
HT_STOP_21
5
CPU_RST_
CPU_PWRGD
HT_STOP_
Title
<Title>
Size Document Number Rev
Custom
4
3
2
Date: Sheet of
NF4ST-A2B
8 48Wednesday, April 04, 2007
1
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
4
3
2
1
D D
MEM_MA0_CLK_H213,14
MEM_MA0_CLK_L213,14
MEM_MA0_CLK_H113,14
MEM_MA0_CLK_L113,14
MEM_MA0_CLK_H013,14
MEM_MA0_CLK_L013,14
MEM_MA0_CS_L114,18
MEM_MA0_CS_L014,19
MEM_MA0_ODT014,18
MEM_MA1_CLK_H213,16
MEM_MA1_CLK_L213,16
MEM_MA1_CLK_H113,16
MEM_MA1_CLK_L113,16
MEM_MA1_CLK_H013,16
MEM_MA1_CLK_L013,16
MEM_MA1_CS_L116,18
MEM_MA1_CS_L016,19
C C
MEM_MA_ADD[15..0]14,16,18,19
B B
MEM_MA_DQS_H[8..0]14,16
MEM_MA_DQS_L[8..0]14,16
MEM_MA_DM[8..0]14,16
A A
MEM_MA1_ODT016,18
MEM_MA_CAS_L14,16,19
MEM_MA_RAS_L14,16,19
MEM_MA_BANK214,16,19
MEM_MA_BANK114,16,18
MEM_MA_BANK014,16,19
MEM_MA_ADD[15..0]
MEM_MA_DQS_H[8..0]
MEM_MA_DQS_L[8..0]
MEM_MA_DM[8..0]
MEM_MA_WE_L14,16,19
MEM_MA_CKE116,18
MEM_MA_CKE014,19
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
CPU1B
AG21
AG20
G19
H19
U27
U26
AC25
AA24
AC28
AE20
AE19
G20
G21
V27
W27
AD27
AA25
AC27
AB25
AB27
AA26
N25
Y27
AA27
L27
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
F19
F15
G15
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
MEMORY INTERFACE A
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
SOCKET_M2 940 SMD
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DM8
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA_DATA[0..63]
MEM_MA_CHECK[7..0]
MEM_MA_DATA[0..63]14,16
MEM_MA_CHECK[7..0]14,16
Title
<Title>
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
NF4ST-A2B
1
9 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
4
3
2
1
D D
C C
MEM_MB_ADD[15..0]15,17,18,19
B B
A A
MEM_MB_DQS_H[8..0]15,17
MEM_MB_DQS_L[8..0]15,17
MEM_MB_DM[8..0]15,17
MEM_MB0_CLK_H213,15
MEM_MB0_CLK_L213,15
MEM_MB0_CLK_H113,15
MEM_MB0_CLK_L113,15
MEM_MB0_CLK_H013,15
MEM_MB0_CLK_L013,15
MEM_MB0_CS_L115,18
MEM_MB0_CS_L015,19
MEM_MB0_ODT015,19
MEM_MB1_CLK_H213,17
MEM_MB1_CLK_L213,17
MEM_MB1_CLK_H113,17
MEM_MB1_CLK_L113,17
MEM_MB1_CLK_H013,17
MEM_MB1_CLK_L013,17
MEM_MB1_CS_L117,19
MEM_MB1_CS_L017,19
MEM_MB1_ODT017,18
MEM_MB_CAS_L15,17,18
MEM_MB_WE_L15,17,19
MEM_MB_RAS_L15,17,18
MEM_MB_BANK215,17,19
MEM_MB_BANK115,17,18
MEM_MB_BANK015,17,18
MEM_MB_CKE117,18
MEM_MB_CKE015,18
MEM_MB_ADD[15..0]
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]
MEM_MB_DM[8..0]
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
A18
A19
U31
U30
AE30
AC31
AD29
AL19
AL18
C19
D19
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
N31
AA31
AA28
M31
M29
N28
N29
AE31
N30
P29
AA29
P31
R29
R28
R31
R30
T31
T29
U29
U28
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
D31
C31
C24
C23
D17
C17
C14
C13
AJ14
AH17
AJ23
AK29
C30
A23
B17
B13
CPU1C
MEMORY INTERFACE B
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DM8
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB_DATA[0..63]
MEM_MB_CHECK[7..0]
MEM_MB_DATA[0..63]15,17
MEM_MB_CHECK[7..0]15,17
Title
<Title>
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
NF4ST-A2B
1
10 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
4
3
2
1
+1.8V_SUS
+1.2V_HT
+0.9V_SUS
C451
1UF 16V 0805 Y5V
1 2
2
C452
1UF 16V 0805 Y5V
1 2
CPU1I
VDDIO
AJ4
VLDT_B1
VLDT_A1
AJ3
VLDT_B2
VLDT_A2
AJ2
VLDT_B3
VLDT_A3
AJ1
VLDT_B4
VLDT_A4
D12
C12
B12
A12
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
VTT5
VTT1
VTT6
VTT2
VTT7
VTT3
VTT8
VTT4
VTT9
VDDIO1
VSS1
VDDIO2
VSS2
VDDIO3
VSS3
VDDIO4
VSS4
VDDIO5
VSS5
VDDIO6
VSS6
VDDIO7
VSS7
VDDIO8
VSS8
VDDIO29
VSS9
VDDIO9
VSS10
VDDIO10
VSS11
VDDIO11
VSS12
VDDIO12
VSS13
VDDIO13
VSS14
VDDIO14
VSS15
VDDIO15
VSS16
VDDIO16
VSS17
VDDIO17
VSS18
VDDIO18
VSS19
VDDIO19
VSS20
VDDIO20
VSS21
VDDIO21
VSS22
VDDIO22
VSS23
VDDIO23
VSS24
VDDIO24
VSS25
VDDIO25
VSS26
VDDIO26
VSS27
VDDIO27
VSS28
VDDIO28
Title
<Title>
Size Document Number Rev
Custom
Date: Sheet of
H6
H5
H2
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
NF4ST-A2B
C453
1 2
1UF 16V 0805 Y5V
+0.9V_SUS
1
11 48Wednesday, April 04, 2007
1.2
+V_CPU
C450
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD150
VDD151
CPU1F
VDD1
0.1UF 25V Y5V /NI
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS240
VSS241
+V_CPU +1.2V_HT
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
CPU1G
VDD2
L14
VDD1
L16
VDD2
L18
VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7
M11
VDD8
M13
VDD9
M15
VDD10
M17
VDD11
M19
VDD12
N8
VDD13
N10
VDD14
N12
VDD15
N14
VDD16
N16
VDD17
N18
VDD18
P7
VDD19
P9
VDD20
P11
VDD21
P13
VDD22
P15
VDD23
P17
VDD24
P19
VDD25
R4
VDD26
R5
VDD27
R8
VDD28
R10
VDD29
R12
VDD30
R14
VDD31
R16
VDD32
R18
VDD33
R20
VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38
T11
VDD39
T13
VDD40
T15
VDD41
T17
VDD42
T19
VDD43
T21
VDD44
U8
VDD45
U10
VDD46
U12
VDD47
U14
VDD48
U16
VDD49
U18
VDD50
U20
VDD51
V9
VDD52
V11
VDD53
V13
VDD54
V15
VDD55
V17
VDD56
V19
VDD57
V21
VDD58
W4
VDD59
W5
VDD60
W8
VDD61
W10
VDD62
W12
VDD63
W14
VDD64
W16
VDD65
W18
VDD66
W20
VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71
Y11
VDD72
Y13
VDD73
Y15
VDD74
Y21
VDD75
4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
+V_CPU
CPU1H
VDD3
AA20
VDD1
AA22
VDD2
AB13
VDD3
AB15
VDD4
AB17
VDD5
AB19
VDD6
AB21
VDD7
AB23
VDD8
AC12
VDD9
AC14
VDD10
AC16
VDD11
AC18
VDD12
AC20
VDD13
AC22
VDD14
AD11
VDD15
AD23
VDD16
AE12
VDD17
AF11
VDD18
L20
VDD19
L22
VDD20
M21
VDD21
M23
VDD22
N20
VDD23
N22
VDD24
P21
VDD25
P23
VDD26
R22
VDD27
T23
VDD28
U22
VDD29
V23
VDD30
W22
VDD31
Y23
VDD32
3
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
D D
+V_CPU
A4
A6
AA8
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
C C
B B
A A
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
E10
F5
F7
F9
F11
G6
G8
G10
G12
H7
H11
H23
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
K11
K13
K15
K17
K19
K21
K23
L4
L5
L8
L10
L12
Y17
Y19
5
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
DECOUPLING BETWEEN PROCESSOR AND DIMMS
PLACE AS CLOSE TO PROCESSOR AS
POSSIBLE
D D
+0.9V_SUS
C458
0.1UF 25V Y5V /NI
C462
0.1UF 25V Y5V
12
12
12
+0.9V_SUS
12
C C
C459
1UF 16V 0805 Y5V
C463
0.1UF 25V Y5V
12
C460
1UF 16V 0805 Y5V
12
C464
0.1UF 25V Y5V
12
C461
1UF 16V 0805 Y5V
12
C465
0.1UF 25V Y5V
4
12
C466
0.1UF 25V Y5V
12
C467
0.1UF 25V Y5V
3
2
1
12
12
C493
0.1UF 25V Y5V
BC482
1UF 16V 0805 Y5V
+1.8V_SUS
12
BC457
1UF 16V 0805 Y5V
12
BC483
1UF 16V 0805 Y5V
12
3
BC470
1UF 16V 0805 Y5V
12
BC484
1UF 16V 0805 Y5V
12
BC471
1UF 16V 0805 Y5V
12
BC485
12
0.1UF 25V Y5V
BC472
1UF 16V 0805 Y5V
12
BC486
1UF 16V 0805 Y5V
2
12
BC468
1UF 16V 0805 Y5V
12
BC487
0.1UF 25V Y5V
Title
<Title>
Size Document Number Rev
Custom
Date: Sheet of
NF4ST-A2B
1
12 48Wednesday, April 04, 2007
1.2
+V_CPU
12
BC473
B B
10UF 10V 0805 Y5V /NI
+V_CPU
12
BC477
1UF 16V 0805 Y5V
+1.8V_SUS
A A
12
C488
0.1UF 25V Y5V
PLACE BOTTOM SIDE DECOUPLING
12
12
BC478
1UF 16V 0805 Y5V
5
BC474
1UF 16V 0805 Y5V
12
12
BC479
1UF 16V 0805 Y5V
12
C490
0.1UF 25V Y5V
BC475
1UF 16V 0805 Y5V
12
BC480
1UF 16V 0805 Y5V
12
C491
0.1UF 25V Y5V
12
BC476
1UF 16V 0805 Y5V
4
12
BC481
1UF 16V 0805 Y5V
12
C492
0.1UF 25V Y5V
+V_CPU
BTC1
100UF 6.3V D TAN
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
D D
4
3
2
1
MEM_MA0_CLK_H29,14
MEM_MA0_CLK_L29,14
MEM_MA0_CLK_H19,14
MEM_MA0_CLK_L19,14
C C
B B
A A
5
MEM_MA0_CLK_H09,14
MEM_MA0_CLK_L09,14
MEM_MB0_CLK_H210,15
MEM_MB0_CLK_L210,15
MEM_MB0_CLK_H110,15
MEM_MB0_CLK_L110,15
MEM_MB0_CLK_H010,15
MEM_MB0_CLK_L010,15
12
C494
1.5P 50V NPO 0402
12
C496
1.5P 50V NPO 0402
12
C498
1.5P 50V NPO 0402
12
C500
1.5P 50V NPO 0402
12
C502
1.5P 50V NPO 0402
12
C504
1.5P 50V NPO 0402
4
MEM_MA1_CLK_H29,16
MEM_MA1_CLK_L29,16
MEM_MA1_CLK_H19,16
MEM_MA1_CLK_L19,16
MEM_MA1_CLK_H09,16
MEM_MA1_CLK_L09,16
MEM_MB1_CLK_H210,17
MEM_MB1_CLK_L210,17
MEM_MB1_CLK_H110,17
MEM_MB1_CLK_L110,17
MEM_MB1_CLK_H010,17
MEM_MB1_CLK_L010,17
3
12
C495
1.5P 50V NPO 0402
12
C497
1.5P 50V NPO 0402
12
C499
1.5P 50V NPO 0402
12
C501
1.5P 50V NPO 0402
12
C503
1.5P 50V NPO 0402
12
C505
1.5P 50V NPO 0402
Title
<Title>
Size Document Number Rev
Custom
2
Date: Sheet of
NF4ST-A2B
1
13 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
4
+1.8V_SUS +3.3V
3
2
1
DIMMA1
DIMMA1
172
178
184
187
189
1975359646769170
175
181
191
194515662727578
D D
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDDQ1
VDDQ2
VDDQ3
MEM_MA_DQS_H[8..0]
MEM_MA_DQS_L[8..0]
MEM_MA_CHECK[7..0]
5
MEM_MA_DM[8..0]
SMB_MEM_SCL15,16,17,25
SMB_MEM_SDA15,16,17,25
MEM_MA_BANK29,16,19
MEM_MA_BANK19,16,18
MEM_MA_BANK09,16,19
MEM_MA0_CLK_H09,13
MEM_MA0_CLK_L09,13
MEM_MA0_CLK_H19,13
MEM_MA0_CLK_L19,13
MEM_MA0_CLK_H29,13
MEM_MA0_CLK_L29,13
MEM_MA_CKE09,19
MEM_MA_RAS_L9,16,19
MEM_MA_CAS_L9,16,19
MEM_MA0_CS_L09,19
MEM_MA0_CS_L19,18
MEM_MA_DM[8..0]9,16
MEM_MA_DQS_H[8..0]9,16
MEM_MA_DQS_L[8..0]9,16
C C
MEM_MA_ADD[15..0]9,16,18,19
B B
MEM_MA_CHECK[7..0]9,16
A A
MEM_MA_DM8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA_CKE0
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
4
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
DDR2-240 pin
238
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDSPD
ERR_OUT_L
3
WE_L
VREF
PAR_IN
MEM_MA_DATA63
236
DQ63
MEM_MA_DATA62
235
DQ62
MEM_MA_DATA61
230
DQ61
MEM_MA_DATA60
229
DQ60
MEM_MA_DATA59
117
DQ59
MEM_MA_DATA58
116
DQ58
MEM_MA_DATA57
111
DQ57
MEM_MA_DATA56
110
DQ56
MEM_MA_DATA55
227
DQ55
MEM_MA_DATA54
226
DQ54
MEM_MA_DATA53
218
DQ53
MEM_MA_DATA52
217
DQ52
MEM_MA_DATA51
108
DQ51
MEM_MA_DATA50
107
DQ50
MEM_MA_DATA49
99
DQ49
MEM_MA_DATA48
98
DQ48
MEM_MA_DATA47
215
DQ47
MEM_MA_DATA46
214
DQ46
MEM_MA_DATA45
209
DQ45
MEM_MA_DATA44
208
DQ44
MEM_MA_DATA43
96
DQ43
MEM_MA_DATA42
95
DQ42
MEM_MA_DATA41
90
DQ41
MEM_MA_DATA40
89
DQ40
MEM_MA_DATA39
206
DQ39
MEM_MA_DATA38
205
DQ38
MEM_MA_DATA37
200
DQ37
MEM_MA_DATA36
199
DQ36
MEM_MA_DATA35
87
DQ35
MEM_MA_DATA34
86
DQ34
MEM_MA_DATA33
81
DQ33
MEM_MA_DATA32
80
DQ32
MEM_MA_DATA31
159
DQ31
MEM_MA_DATA30
158
DQ30
MEM_MA_DATA29
153
DQ29
MEM_MA_DATA28
152
DQ28
MEM_MA_DATA27
40
DQ27
MEM_MA_DATA26
39
DQ26
MEM_MA_DATA25
34
DQ25
MEM_MA_DATA24
33
DQ24
MEM_MA_DATA23
150
DQ23
MEM_MA_DATA22
149
DQ22
MEM_MA_DATA21
144
DQ21
MEM_MA_DATA20
143
DQ20
MEM_MA_DATA19
31
DQ19
MEM_MA_DATA18
30
DQ18
MEM_MA_DATA17
25
DQ17
MEM_MA_DATA16
24
DQ16
MEM_MA_DATA15
141
DQ15
MEM_MA_DATA14
140
DQ14
MEM_MA_DATA13
132
DQ13
MEM_MA_DATA12
131
DQ12
MEM_MA_DATA11
22
DQ11
MEM_MA_DATA10
21
DQ10
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA0
3
DQ0
73
1
102
TEST
195
ODT0
77
ODT1
55
68
19
NC1
MEM_MA_WE_L9,16,19
MEM_MA0_ODT09,18
MEM_MA_DATA[0..63]
2
MEM_MA_DATA[0..63]9,16
+1.8V_SUS
R399
12
C506
150 1%
1UF 10V Y5V
1 2
R400
150 1%
1 2
MEM_M_VREF
Title
<Title>
Size Document Number Rev
Custom
Date: Sheet of
MEM_M_VREF
12
C507
1UF 10V Y5V
PLACE NEAR DIMM SOCKETS
NF4ST-A2B
1
14 48Wednesday, April 04, 2007
1.2
PDF created with pdfFactory Pro trial version www.pdffactory.com
5
4
3
2
1
+1.8V_SUS
+3.3V
DIMMB1
DIMMB1
172
178
184
187
189
1975359646769170
175
181
191
194515662727578
D D
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDDQ1
VDDQ2
MEM_MB_DM[8..0]
MEM_MB_DQS_H[8..0]10,17
C C
B B
A A
MEM_MB_DQS_L[8..0]10,17
MEM_MB_ADD[15..0]10,17,18,19
MEM_MB_CHECK[7..0]10,17
5
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]
SMB_MEM_SCL14,16,17,25
SMB_MEM_SDA14,16,17,25
MEM_MB_BANK210,17,19
MEM_MB_BANK110,17,18
MEM_MB_BANK010,17,18
MEM_MB_ADD[15..0]
MEM_MB_CHECK[7..0]
MEM_MB0_CLK_H010,13
MEM_MB0_CLK_L010,13
MEM_MB0_CLK_H110,13
MEM_MB0_CLK_L110,13
MEM_MB0_CLK_H210,13
MEM_MB0_CLK_L210,13
MEM_MB_RAS_L10,17,18
MEM_MB_CAS_L10,17,18
MEM_MB0_CS_L010,19
MEM_MB0_CS_L110,18
MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
+3.3V
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB_CKE010,18
4
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
DQS0_H
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
DDR2-240 pin
VDDQ3
3
238
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDSPD
WE_L
VREF
ERR_OUT_L
PAR_IN
MEM_MB_DATA63
236
DQ63
MEM_MB_DATA62
235
DQ62
MEM_MB_DATA61
230
DQ61
MEM_MB_DATA60
229
DQ60
MEM_MB_DATA59
117
DQ59
MEM_MB_DATA58
116
DQ58
MEM_MB_DATA57
111
DQ57
MEM_MB_DATA56
110
DQ56
MEM_MB_DATA55
227
DQ55
MEM_MB_DATA54
226
DQ54
MEM_MB_DATA53
218
DQ53
MEM_MB_DATA52
217
DQ52
MEM_MB_DATA51
108
DQ51
MEM_MB_DATA50
107
DQ50
MEM_MB_DATA49
99
DQ49
MEM_MB_DATA48
98
DQ48
MEM_MB_DATA47
215
DQ47
MEM_MB_DATA46
214
DQ46
MEM_MB_DATA45
209
DQ45
MEM_MB_DATA44
208
DQ44
MEM_MB_DATA43
96
DQ43
MEM_MB_DATA42
95
DQ42
MEM_MB_DATA41
90
DQ41
MEM_MB_DATA40
89
DQ40
MEM_MB_DATA39
206
DQ39
MEM_MB_DATA38
205
DQ38
MEM_MB_DATA37
200
DQ37
MEM_MB_DATA36
199
DQ36
MEM_MB_DATA35
87
DQ35
MEM_MB_DATA34
86
DQ34
MEM_MB_DATA33
81
DQ33
MEM_MB_DATA32
80
DQ32
MEM_MB_DATA31
159
DQ31
MEM_MB_DATA30
158
DQ30
MEM_MB_DATA29
153
DQ29
MEM_MB_DATA28
152
DQ28
MEM_MB_DATA27
40
DQ27
MEM_MB_DATA26
39
DQ26
MEM_MB_DATA25
34
DQ25
MEM_MB_DATA24
33
DQ24
MEM_MB_DATA23
150
DQ23
MEM_MB_DATA22
149
DQ22
MEM_MB_DATA21
144
DQ21
MEM_MB_DATA20
143
DQ20
MEM_MB_DATA19
31
DQ19
MEM_MB_DATA18
30
DQ18
MEM_MB_DATA17
25
DQ17
MEM_MB_DATA16
24
DQ16
MEM_MB_DATA15
141
DQ15
MEM_MB_DATA14
140
DQ14
MEM_MB_DATA13
132
DQ13
MEM_MB_DATA12
131
DQ12
MEM_MB_DATA11
22
DQ11
MEM_MB_DATA10MEM_MB_ADD8
21
DQ10
MEM_MB_DATA9
13
DQ9
MEM_MB_DATA8
12
DQ8
MEM_MB_DATA7
129
DQ7
MEM_MB_DATA6
128
DQ6
MEM_MB_DATA5
123
DQ5
MEM_MB_DATA4
122
DQ4
MEM_MB_DATA3
10
DQ3
MEM_MB_DATA2
9
DQ2
MEM_MB_DATA1
4
DQ1
MEM_MB_DATA0
3
DQ0
73
1
102
TEST
195
ODT0
77
ODT1
55
68
19
NC1
MEM_MB_WE_L10,17,19
MEM_MB0_ODT010,19
2
MEM_MB_DATA[0..63]
12
C508
0.1UF 25V Y5V
PLACE NEAR DIMM SOCKETS
Title
<Title>
Size Document Number Rev
Custom
Date: Sheet of
MEM_MB_DATA[0..63]10,17MEM_MB_DM[8..0]10,17
MEM_M_VREF
NF4ST-A2B
15 48Wednesday, April 04, 2007
1
1.2
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