5
Merom / Crestline / ICH8-M
4
3
2
1
http://hobi-elektronika.net
X'TAL
14.318MHz
D D
CPU THERMAL
SENSOR
+3.3V
PG 3
(479 Micro-FCPGA)
+1.5V
+1.05V_VCCP
+VCC_CORE
PG 3,4
CPU CLK_ 200MHz
GMCH CLK_ 200MHz
DREFCLK_96MHz
PCIE MCH CLK_100MHz
CLOCK GEN
ICS9LPRS365/RTM875T-606
64pins
+3.3V
FSB
667/800 MHz
FOR Crestline (LCD/CRT/S-VIDEO)
FOR Crestline (LCD/CRT)
Chrontel
SDVO
Sil1392
MODEM CONN.
(MDC)
+3.3V_SUS
WIRE
RJ11/USB X 1
Board to
board CONN.
SPI FLASH
PG 19
USB 2.0
PCI-E
Azalia
PG 25
PG 25
HDMI
+AVDDA
+5V_SPK_AMP
JACK
HEADPHONE/SPDIF
INT. DMIC
INT. SPEAKERS
PG 18
PG 29
PG 28
PG 29
PG 27
PG 27
DDRII 667 MHz
USB 2.0
PATA
SATA
Crestline 965GM
1299 uFCBGA
+1.05V_VCCP
+1.8V_SUS
+1.25V
+3.3V
V_DDR_MCH_REF
X'TAL
32.768KHz
+1.5V
+1.05V_VCCP
+1.25V
+3.3V
+3.3V_ALW
+3.3V_S5
+3.3V_SUS
+3V_VCCLAN
+5V
+5V_ALW
+5V_S5
VCCRTC_(1~4)
X'TAL
32.768KHz
DMI LINK
4X PCI-E
652 BGA
PG 14~17
LPC
PG 5~11
DDRII-SODIMM1
DDRII-SODIMM2
+0.9V_DDR_VTT
+1.8V_SUS
+3.3V
V_DDR_MCH_REF
C C
Web Cam on LCD
USB3
+5V
PG 12,13
Bluetooth
USB9
+5V_SUS
USB PORT X 3
USB0~2,
+5V_SUS
Fingerprint
USB8
B B
ODD(fixed)
+5V
Internal HDD
+5V
+3.3V
IT8512E
+3.3V_ALW
+3.3V
+5V
RTC_VCC
A A
PG 3
Touchpad
PG 31 PG 31 PG 29
SWITCH BOARD
+3.3V_ALW +3.3V_ALW
PG 31
FAN
LQFP 128PIN
PG 29
Keyboard
+3.3V_ALW +5V
LCD Panel
VIN_BLIGHT
LCDVCC
+3.3V
CRT port
+5V
+3.3V
HDMI port
+3.3V
+2.5V
+1.8V
Azalia
Codec
STAC-9205
AMP
MAX 9789/TI**
PG 24
PG 23
PG 18
PG 20
PG 19
LAN(10/100)
Realtek 8101E
LAN_A1.8
LAN_A3.3
LAN_D1.5
LAN_E1.8
LANVCC
RJ45
JACK
PG 20
PG 24
5
4
3
+3V_S5/+5V_S5
CPU CORE POWER
ISL6260C+ISL6208
+1.5V
+1.25V & +1.05VCCP
(ISL6236)
DDR2
+1.8V_SUS & +0.9V
D/D POWER
+5_ALW & +3.3V_ALW
CHARGER
MAX8724ETI+
RUN POWER SW
& DISCHARGE
PG 32
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
Quanta Computer Inc.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
CARDREADER
CONTROLLER
Realtek RTS5158
USB4
+3.3V_SUS
+5V_SUS
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
SATA ICH CLK_100MHz
PCIE ICH CLK_100MHz
PG 20,21
X'TAL
25MHz
PG 2
PCIE MINICARD CLK_100MHz
PCIE NEW CARD CLK_100MHz
PCIE LAN CLK_100MHz
MINI-PCI-E Card
X2
+3.3V_SUS
+3.3V
+1.5V
PG 26
2
EXPRESS CARD
(NEW CARD)
USB5 USB6~7
3V_NEWCARD
3VAUX
1.5V_NEWCARD
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PG 40
PG 39
PG 38
PG 37
PG 36
PG 35
PG 34
PG 33
X'TAL
12MHz
PG 22
4 IN 1
SM/xD-Picture
SD/MMC
MS/MSPRO
(CF)
PG 22
14 3
14 3
14 3
1
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
L14
L14
BLM21PG600SN1D
+3.3V
D D
C C
BLM21PG600SN1D
L15
L15
BLM21PG600SN1D
BLM21PG600SN1D
1 2
SATA_CLKREQ# 16
MINI1CLK_REQ# 26
PCLK_LPC_DEBUG 26
PCI_CLK_8512 30
CLK_ICH_48M 16
CPU_MCH_BSEL0 3,6
CPU_MCH_BSEL1 3,6
CPU_MCH_BSEL2 3,6
CLK_ICH_14M 16
C210
C210
22U/6.3V/X5R_8
22U/6.3V/X5R_8
C211
C211
22U/6.3V/X5R_8
22U/6.3V/X5R_8
SATA_CLKREQ#
PCLK_LPC_DEBUG
CLK_PCI_ICH 15
CLK_PCI_ICH
CLK_ICH_48M
CLK_ICH_14M
C214 22P/50V/NPO_4 C214 22P/50V/NPO_4
C215 22P/50V/NPO_4 C215 22P/50V/NPO_4
C246
C246
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C212
C212
0.1U/10V/X5R_4
0.1U/10V/X5R_4
4
C250
C250
C251
C251
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C217
C217
C218
C218
0.1U/10V/X5R_4
0.1U/10V/X5R_4
R143
R143
R147
R147
R189 33_4 R189 33_4
R185 33_4 R185 33_4
R187 33_4 R187 33_4
R180 33_4 R180 33_4
R181 4.7K_4 R181 4.7K_4
R115 4.7K_4 R115 4.7K_4
R116 33_4 R116 33_4
2 1
CK_VDD_MAIN1
C213
C213
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
CK_VDD_MAIN2
C248
C248
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
475/F_4
475/F_4
475/F_4
475/F_4
Y1
Y1
14.318MHZ
14.318MHZ
3
http://hobi-elektronika.net
U10
C216
C216
C219
C219
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C247
C247
C249
C249
0.1U/10V/X5R_4
0.1U/10V/X5R_4
SATACLKREQ#_R
MINI1CLK_REQ#_R MINI1CLK_REQ#
T37T37
FCTSEL1 PCI_CLK_8512
PCI_F5/ITP_EN
FSLA
FSLC
XIN
XOUT
U10
2
VDDPCI
9
VDD48
16
VDDPLL3
61
VDDREF
39
VDDSRC
55
VDDCPU
0.1U/10V/X5R_4
0.1U/10V/X5R_4
12
VDD96_IO
20
VDDPLL3_IO
26
VDDSRC_IO
36
VDDSRC_IO
49
VDDCPU_IO
45
VDDSRC_IO
0.1U/10V/X5R_4
0.1U/10V/X5R_4
1
PCI0/CR#_A
3
PCI1/CR#_B
4
PCI2/TME
5
PCI3
6
PCI4/27_Select
7
PCI_F5/ITP_EN
10
USB_48MHz/FSLA
57
FSLB/TEST_MODE
62
REF0/FSLC/TEST_SEL
60
X1
59
X2
8
GNDPCI
11
GND48
15
GND
19
GND
52
GNDCPU
23
GNDSRC
29
GNDSRC
42
GNDSRC
58
GNDREF
ICS9LPRS365BGLFT / RTM875T-606
ICS9LPRS365BGLFT / RTM875T-606
CK505
CK505
PCI_STOP#
CPU_STOP#
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
SRCT11/CR#_H
SRCC11/CR#_G
SRCT7/CR#_F
SRCC7/CR#_E
CR#_C/SRC-3
SRCC3/CR#_C
SRCT2/SATAT
SRCC2/SATAC
27MHz_NonSS/SRCT1/SE1
27MHz_SS/SRCC1/SE2
SRCT0/DOTT_96
SRCC0/DOTC_96
CK_PWRGD/PD#
SCLK
SDATA
CPUT0
CPUC0
CPUT1_F
CPUC1_F
SRCC10
SRCT10
SRCT9
SRCC9
SRCT6
SRCC6
SRCT4
SRCC4
NC
48
CGCLK_SMB_M
64
CGDAT_SMB_M
63
38
37
CPU_BCLK
54
CPU_BCLK#
53
MCH_BCLK
51
MCH_BCLK#
50
CLK_PCIE_NEW
47
CLK_PCIE_NEW#
46
MCH_3GPLL#
35
MCH_3GPLL
34
33
32
PCIE_MINI2
30
PCIE_MINI2# PCI2/TME
31
44
SRCC7
43
PCIE_ICH
41
PCIE_ICH#
40
PCIE_MINI1
27
PCIE_MINI1#
28
CLK_LAN
24
CLK_LAN#
25
PCIE_SATA
21
PCIE_SATA#
22
DREFSSCLK_R
17
DREFSSCLK#_R
18
DREFCLK_R
13
DREFCLK#_R
14
56
T26T26
4
2
4
2
4
2
4
2
R118 475/F_4 R118 475/F_4
R144 475/F_4 R144 475/F_4
2
4
R114 475/F_4 R114 475/F_4
T27T27
4
2
2
4
2
4
2
4
2
4
2
4
2
CGCLK_SMB_M 12,13,26
CGDAT_SMB_M 12,13,26
H_STP_PCI# 16
RP22
RP22
3
0X2
0X2
1
RP23
RP23
3
0X2
0X2
1
3
0X2
0X2
1
RP21
RP21
RP25
RP25
3
0X2
0X2
1
CLK_3GPLLREQ# CLK_3GPLLREQ#_R
MINI2CLK_REQ# MINI2CLK_REQ#_R
RP28
RP28
1
0X2
0X2
3
NEW-CARD_CLK_REQ# NEW-CARD_CLK_REQ#_R
RP24
RP24
3
0X2
0X2
1
RP27
RP27
1
0X2
0X2
3
1
0X2
0X2
3
RP31
RP31
RP26
RP26
1
0X2
0X2
3
RP30
RP30
1
0X2
0X2
3
RP29
RP29
1
0X2
0X2
3
H_STP_CPU# 16
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_PCIE_NEW_C 32
CLK_PCIE_NEW_C# 32
CLK_MCH_3GPLL# 6
CLK_MCH_3GPLL 6
CLK_3GPLLREQ# 6
MINI2CLK_REQ# 26
CLK_PCIE_MINI2 26
CLK_PCIE_MINI2# 26
NEW-CARD_CLK_REQ# 32
CLK_PCIE_ICH 15
CLK_PCIE_ICH# 15
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26
CLK_PCIE_LAN 21
CLK_PCIE_LAN# 21
CLK_PCIE_SATA 14
CLK_PCIE_SATA# 14
DREF_SSCLK 6
DREF_SSCLK# 6
MCH_DREFCLK 6
MCH_DREFCLK# 6
CLK_PWRGD 16
1
02
+3.3V +3.3V
R162
R162
10K_4
10K_4
B B
PCI2/TME PCI_F5/ITP_EN
R170
R170
*10K_4
*10K_4
CPU Clock select
FSC FSB
13 3 0
0
0
0
00
A A
1
1
1
R179
R179
*10K_4
*10K_4
R190
R190
10K_4
10K_4
PCI2/TME
FSA CPU SRC PCI
133.33
166.66
200.00
266.66
333.33
400.00
200.00
100
100
100
100
100
100
100
100
33
33
33
33
33
33
1 100.00
1 0
1
1
1
0
0
03 3
0
1
0
1
1
5
PULL HIGH PULL LOW
Overclocking of CPU
and SRC not allowed
MINI2CLK_REQ#
CLK_3GPLLREQ#
SATA_CLKREQ#
MINI1CLK_REQ#
NEW-CARD_CLK_REQ#
C255 15P/50V C255 15P/50V
C220 15P/50V C220 15P/50V
C257 15P/50V C257 15P/50V
C267 15P/50V C267 15P/50V
C264 15P/50V C264 15P/50V
SRC8/SRC8# ITP/ITP# PCI_F5/ITP_EN
Overclocking of CPU
and SRC allowed
R134 10K_4 R134 10K_4
R123 10K_4 R123 10K_4
R132 10K_4 R132 10K_4
R152 10K_4 R152 10K_4
R113 10K_4 R113 10K_4
EMI CAP
EC B-26
4
+3.3V
CLK_ICH_48M
CLK_ICH_14M
PCI_CLK_8512
PCLK_LPC_DEBUG
CLK_PCI_ICH
GCLK_SEL = FCTSEL1
FCTSEL1
(PIN6)
0=UMA
1 = External VGA
PIN13
SRC-0 SRC-0# 27Mout-NSS 27Mout-SS
3
PIN14 PIN17 PIN18
SRC-1#/LCDT_100 DOT96
+3.3V
SRC-1/LCDT_100 DOT96#
R165
R165
*10K_4
*10K_4
FCTSEL1
R166
R166
10K_4
10K_4
CGDAT_SMB_M
CGCLK_SMB_M
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Thursday, July 26, 2007
Thursday, July 26, 2007
2
Thursday, July 26, 2007
+3.3V
R130
R130
10K_4
10K_4
2
Q6
Q6
1
2N7002E/CH2507SPT
2N7002E/CH2507SPT
R119
R119
10K_4
10K_4
1
2N7002E/CH2507SPT
2N7002E/CH2507SPT
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
3
+3.3V
2
Q5
Q5
3
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
1
ICH_SMBDATA 16,32
ICH_SMBCLK 16,32
Rev Size
Rev Size
Rev Size
4A
4A
24 3
24 3
24 3
4A
5
CPU(HOST)
H_A#[3..16] 5
D D
C C
B B
+1.05V_VCCP
A A
H_ADSTB#0 5
H_REQ#[0..4] 5
H_A#[17..35] 5
H_ADSTB#1 5
H_A20M# 14
H_FERR# 14
H_IGNNE# 14
H_STPCLK# 14
H_INTR 14
H_NMI 14
H_SMI# 14
H_D#[0..63] 5
H_DSTBN#0 5
H_DSTBP#0 5
H_DINV#0 5
H_D#[0..63] 5
Layout Note:
Place voltage divider within
0.5" of GTLREF pin
R313
R313
1K/F_4
1K/F_4
R314
R314
2K/F_4
2K/F_4
H_DSTBN#1 5
H_DSTBP#1 5
H_DINV#1 5
R39 *1K_4 R39 *1K_4
R47 *1K_4 R47 *1K_4
T7T7
T80T80
R48 *0_4 R48 *0_4
CPU_MCH_BSEL0 2,6
CPU_MCH_BSEL1 2,6
CPU_MCH_BSEL2 2,6
Layout Note:
Place C close to the CPU_TEST4 pin. Make sure
CPU_TEST4 routing is reference to GND and away
from other noisy signal.
H_A#[3..16]
H_REQ#[0..4]
H_A#[17..35]
H_D#[0..63] H_D#[0..63]
H_D#[0..63]
C375 *0.1U/10V_4 C375 *0.1U/10V_4
5
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
U22A
U22A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
D22
RSVD[08]
D3
RSVD[09]
F6
RSVD[10]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
U22B
U22B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
DBR#
THERMAL
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
BCLK[0]
BCLK[1]
RESERVED
RESERVED
DATA GRP 0
DATA GRP 0
DATA GRP 2 DATA GRP 3
DATA GRP 2 DATA GRP 3
DSTBN[2]#
DSTBP[2]#
DINV[2]#
DATA GRP 1
DATA GRP 1
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
MISC
MISC
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
PWRGOOD
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
DPWR#
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
SLP#
PSI#
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
B25
C7
A22
A21
4
H_IERR#
H_RESET#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#
H_PROCHOT#
H_THERMDA
H_THERMDC
H_THERMTRIP_R#
H_D#32
Y22
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
V23
H_D#37
T22
H_D#38
U25
H_D#39
U23
H_D#40
Y25
H_D#41
W22
H_D#42
Y23
H_D#43
W24
H_D#44
W25
H_D#45
AA23
H_D#46
AA24
H_D#47
AB25
Y26
AA26
U22
H_D#48
AE24
H_D#49
AD24
H_D#50
AA21
H_D#51
AB22
H_D#52
AB21
H_D#53
AC26
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AC25
H_D#58
AE21
H_D#59
AD21
H_D#60
AC22
H_D#61
AD23
H_D#62
AF22
H_D#63
AC23
AE25
AF24
AC20
COMP0
R26
COMP1
U26
COMP2
AA1
COMP3
Y1
E5
B5
D24
D6
D7
AE6
4
3
H_ADS# 5
http://hobi-elektronika.net
H_BNR# 5
H_BPRI# 5
H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
R43 56.2/F_4 R43 56.2/F_4
T4T4
T3T3
T79T79
T6T6
T5T5
T81T81
R41 56_4 R41 56_4
R340 0_4 R340 0_4 C484
R341 *56.2/F_4 R341 *56.2/F_4
CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
H_BR0# 5
+1.05V_VCCP
H_INIT# 14
H_LOCK# 5
H_RESET# 5
H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5
H_HIT# 5
H_HITM# 5
*330_4
*330_4
ITP_DBRESET# 16
+1.05V_VCCP
H_THERMTRIP# 6,14
+1.05V_VCCP
H_D#[0..63] 5
+1.05V_VCCP
R42
R42
2
1 3
<check list>
Default PU 56ohm if no
use.Serial R NC
If connect to power side
PU 75ohm.
Q2
Q2
*MMST3904-7-F
*MMST3904-7-F
IMVP6_PROCHOT# 39
CPU Thermal monitor
2N7002W-7-F
2N7002W-7-F
ABCLK 30
ABDATA 30
THERM_ALERT# 16
SYS_SHDN# 35
PWM_FAN1 30
ABCLK THCLK_SMB
2N7002W-7-F
2N7002W-7-F
ABDATA
2N7002W-7-F
2N7002W-7-F
R112
R112
+5V_FAN
1 2
100K
100K
Q3
Q3
3 1
Q4
Q4
3 1
Q25
Q25
3 1
30 mil
C209
C209
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3.3V
+3.3V
2
2
2
+5V
2
THDAT_SMB
6648OVERT#
U7
U7
1
VEN
2
VIN
3
VO
SET4GND
R334 *0_4 R334 *0_4
30 mil
GND
GND
GND
G993P1U
G993P1U
+3.3V +3.3V
R332
R332
R333
R333
R53
R53
10K_4
10K_4
8
7
6
5
FANSIG1 30
10K_4
10K_4
10K_4
10K_4
Layout Note:
Layout Note:Routing 10:10 mils and
away from noise source with ground
gard
C208
C208
1U/10V/X5R_6
1U/10V/X5R_6
R342
R342
*10K_4
*10K_4
C485
C485
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3.3V
1 3
R370
R370
100K
100K
R343 220_6 R343 220_6
U24
U24
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
G781P8
G781P8
ADDRESS:
98H
30 mil
2
Q26
Q26
PDTA124EU
PDTA124EU
1
6648VCC
VCC
DXP
DXN
GND
+5V_FAN
C482
C482
10U/10V/X5R_8
10U/10V/X5R_8
Populate ITP700Flex for bringup
+1.05V_VCCP
H_DSTBN#2 5
H_DSTBP#2 5
H_D#[0..63]
R331 27.4/F_4 R331 27.4/F_4
R328 54.9/F_4 R328 54.9/F_4
R329 27.4/F_4 R329 27.4/F_4
R330 54.9/F_4 R330 54.9/F_4
H_DINV#2 5
H_D#[0..63] 5
Layout Note:
Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be at
least 25 mils away from any other toggling
signal.
H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
Layout Note:
H_DPRSTP# 6,14,39
H_DPSLP# 14
H_DPWR# 5
H_PWRGOOD 14
H_CPUSLP# 5
H_PSI# 39
ICH_DPRSTP# need to daisy chain
from ICH8 to IMVP6 to CPU.
H_RESET#
ITP_TMS
ITP_TDI
ITP_TDO
ITP_TCK
ITP_TRST#
ITP_DBRESET#
3
R339 *51/F_4 R339 *51/F_4
C586
C586
*0.1U/10V/X5R_4
*0.1U/10V/X5R_4
R326 39/F_4 R326 39/F_4
R327 150/F_4 R327 150/F_4
R322 *51_4 R322 *51_4
R320 27/F_4 R320 27/F_4
R321 649/F_4 R321 649/F_4
C585
C585
*0.1U/10V/X5R_4
*0.1U/10V/X5R_4
C584
C584
*0.1U/10V/X5R_4
*0.1U/10V/X5R_4
+3.3V_S5
R44 150/F_4 R44 150/F_4
Signal
TDI
TMS
TRST#
TCK
TDO
RESET#
2
Resistor Value
39 ohm ± 1%
500 to 680
ohm ± 5%
27 ohm ± 1%
51 ohm ± 5%
22.6 ohm ± 1%
series resistor
and pullup 51
ohm ± 1%.
ITP700 layout guidelines
Connect To
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Resistor Placement
VCCP 150 ohm ± 5%
Place the pull-up near CPU
Within 200ps of ITP connector
VCCP
Place the pull-up near CPU
GND
Connect to TCK pin of CPU and then
connect it to FBO pin of ITP connector
GND
in daisy chain. Place the pull-down
near TCK0 pin of ITP connector
Place the pull-up near CPU
VCCP
Connect to CPURST# pin of GMCH through
the series resistor placed within
200ps of ITP connector. Place the
VCCP
pull-up after the series resistor from
ITP connector.
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Monday, July 23, 2007
Monday, July 23, 2007
Monday, July 23, 2007
Quanta Computer Inc.
CPU(1 of 2)/FAN/Thermal
CPU(1 of 2)/FAN/Thermal
CPU(1 of 2)/FAN/Thermal
1
03
C418
C418
0.1U/10V/X5R_4
0.1U/10V/X5R_4
1
2
3
5
34 3
34 3
34 3
H_THERMDA
C419
C419
2200P/50V_6
2200P/50V_6
H_THERMDC
CN21
CN21
1
234
5
FAN
FAN
C484
1000P/16V/X7R_4
1000P/16V/X7R_4
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
CPU(Power)
+VCC_CORE
D D
+VCC_CORE
+VCC_CORE
+VCC_CORE
C C
+VCC_CORE
C37
C37
10U/4V/X6S_8
10U/4V/X6S_8
+VCC_CORE
B B
C50
C50
10U/4V/X6S_8
10U/4V/X6S_8
All use 10U 4V(+-20%,X6S,0805)Pb-Free.
C394
C393
C393
10U/4V/X6S_8
10U/4V/X6S_8
C389
C389
10U/4V/X6S_8
10U/4V/X6S_8
C394
10U/4V/X6S_8
10U/4V/X6S_8
C391
C391
10U/4V/X6S_8
10U/4V/X6S_8
C56
C56
10U/4V/X6S_8
10U/4V/X6S_8
C404
C404
10U/4V/X6S_8
10U/4V/X6S_8
8 inside cavity, north side, secondary layer.
C26
C390
C390
10U/4V/X6S_8
10U/4V/X6S_8
C27
C27
10U/4V/X6S_8
10U/4V/X6S_8
C26
10U/4V/X6S_8
10U/4V/X6S_8
C30
C30
10U/4V/X6S_8
10U/4V/X6S_8
C29
C29
10U/4V/X6S_8
10U/4V/X6S_8
C38
C38
10U/4V/X6S_8
10U/4V/X6S_8
8 inside cavity, south side, secondary layer.
C44
C44
10U/4V/X6S_8
10U/4V/X6S_8
C43
10U/4V/X6S_8
10U/4V/X6S_8
C24
C24
10U/4V/X6S_8
10U/4V/X6S_8
C43
6 inside cavity, north side, primary layer.
C51
C51
10U/4V/X6S_8
10U/4V/X6S_8
C52
10U/4V/X6S_8
10U/4V/X6S_8
C53
C53
10U/4V/X6S_8
10U/4V/X6S_8
C52
6 inside cavity, south side, primary layer.
C406
C406
10U/4V/X6S_8
10U/4V/X6S_8
C407
C407
10U/4V/X6S_8
10U/4V/X6S_8
C28
C28
10U/4V/X6S_8
10U/4V/X6S_8
C55
C55
10U/4V/X6S_8
10U/4V/X6S_8
C23
C23
10U/4V/X6S_8
10U/4V/X6S_8
C408
C408
10U/4V/X6S_8
10U/4V/X6S_8
4
C405
C405
10U/4V/X6S_8
10U/4V/X6S_8
C57
C57
10U/4V/X6S_8
10U/4V/X6S_8
C409
C409
10U/4V/X6S_8
10U/4V/X6S_8
C392
C392
10U/4V/X6S_8
10U/4V/X6S_8
C25
C25
10U/4V/X6S_8
10U/4V/X6S_8
C54
C54
10U/4V/X6S_8
10U/4V/X6S_8
+VCC_CORE
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
U22C
U22C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
AB9
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
3
http://hobi-elektronika.net
AB20
VCC[068]
AB7
VCC[069]
AC7
VCC[070]
AC9
VCC[071]
AC12
VCC[072]
AC13
VCC[073]
AC15
VCC[074]
AC17
VCC[075]
AC18
VCC[076]
AD7
VCC[077]
AD9
VCC[078]
AD10
VCC[079]
AD12
VCC[080]
AD14
VCC[081]
AD15
VCC[082]
AD17
VCC[083]
AD18
VCC[084]
AE9
VCC[085]
AE10
VCC[086]
AE12
VCC[087]
AE13
VCC[088]
AE15
VCC[089]
AE17
VCC[090]
AE18
VCC[091]
AE20
VCC[092]
AF9
VCC[093]
AF10
VCC[094]
AF12
VCC[095]
AF14
VCC[096]
AF15
VCC[097]
AF17
VCC[098]
AF18
VCC[099]
AF20
VCC[100]
G21
VCCP[01]
V6
VCCP[02]
J6
VCCP[03]
K6
VCCP[04]
M6
VCCP[05]
J21
VCCP[06]
K21
VCCP[07]
M21
VCCP[08]
N21
VCCP[09]
N6
VCCP[10]
R21
VCCP[11]
R6
VCCP[12]
T21
VCCP[13]
T6
VCCP[14]
V21
VCCP[15]
W21
VCCP[16]
B26
VCCA[01]
C26
VCCA[02]
AD6
VID[0]
AF5
VID[1]
AE5
VID[2]
AF4
VID[3]
AE3
VID[4]
AF3
VID[5]
AE2
VID[6]
VCCSENSE
VSSSENSE
AF7
AE7
<REV.NO. 0.5/REF.NO.19343>
Ivcc Max 52A
Ivccp Max 6A(VCCP supply before Vcc stable)
Max 2A(VCCP supply after Vcc stable)
Ivcca Max 130mA
+1.05V_VCCP
C397
C397
C401
C401
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
Layout out:
Place these inside socket cavity on North side secondary.
VID0 39
VID1 39
VID2 39
VID3 39
VID4 39
VID5 39
VID6 39
Layout Note:
Route VCCSENSE and VSSSENSE
traces at 27.4ohms and length
matched to within 25 mil. Place PU
and PD within 2 inch of CPU.
+VCC_CORE
C396
C396
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.05V_VCCP
+
+
C388
C388
330U/2V_7343
330U/2V_7343
0.01U/16V/X7R_4
0.01U/16V/X7R_4
R317
R317
100/F_6
100/F_6
R318
R318
100/F_6
100/F_6
C398
C398
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.5V
C76
C76
2
C400
C400
C402
C402
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C73
C73
10U/6.3V/X5R_8
10U/6.3V/X5R_8
Layout Note:
Place C76,C73 near PIN B26.
VCCSENSE 39
VSSSENSE 39
U22D
U22D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
1
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[163]
04
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
A A
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Quanta Computer Inc.
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
CPU(2 of 2)
CPU(2 of 2)
CPU(2 of 2)
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
44 3
44 3
44 3
1
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
4
3
2
1
NB(HOST)
http://hobi-elektronika.net
05
D D
U25A
M10
N12
W10
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
AC6
AE2
AC5
AG3
AH8
AJ14
AE9
AE11
AH12
AH5
AE7
AE5
AH2
AH13
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
N9
H5
P13
K9
M2
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
Y3
AJ9
AJ5
AJ6
AJ7
AJ2
AJ3
B3
C2
W1
W2
B6
E5
B9
A9
U25A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CRESTLINE
CRESTLINE
H_ADSTB#_0
H_ADSTB#_1
HOST
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_D#[0..63] 3
+1.05V_VCCP
R346
R346
221/F_4
221/F_4
H_SWING
C442
+1.05V_VCCP
R59
R59
54.9/F_4
54.9/F_4
H_SCOMP
H_SCOMP#
H_RCOMP
R345
R345
24.9/F_4
24.9/F_4
C442
0.1U/10V/X5R_4
0.1U/10V/X5R_4
Layout Note:
0.1U close to B3
Layout Note:
Impedance 55ohm
Layout Note:
10:20 mils(Width:Spacing)
+1.05V_VCCP
R74
R74
1K/F_4
1K/F_4
R71
R71
C137
C137
2K/F_4
2K/F_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
H_RESET# 3
H_CPUSLP# 3
H_REF
Layout Note:
Place the 0.1 uF
decoupling capacitor
within 100 mils from
GMCH pins.
R347
R347
100/F_4
100/F_4
C C
R60
R60
54.9/F_4
54.9/F_4
B B
A A
H_D#[0..63]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_A#[3..35]
H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3
H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3
H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3
H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3
H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3
H_RS#0 3
H_RS#1 3
H_RS#2 3
H_A#[3..35] 3
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Quanta Computer Inc.
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
GMCH HOST(1 of 6)
GMCH HOST(1 of 6)
GMCH HOST(1 of 6)
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
54 3
54 3
54 3
1
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
+1.8V_SUS
R364
R364
1K/F_4
1K/F_4
SM_RCOMP_VOH
C464
R361
R361
3.01K/F_4
3.01K/F_4
D D
R360
R360
1K/F_4
1K/F_4
C C
B B
A A
+3.3V
+1.05V_VCCP
CPU_MCH_BSEL0 2,3
CPU_MCH_BSEL1 2,3
CPU_MCH_BSEL2 2,3
MCH_CFG_5 11
MCH_CFG_9 11
MCH_CFG_12 11
MCH_CFG_13 11
MCH_CFG_16 11
MCH_CFG_19 11
MCH_CFG_20 11
PM_BMBUSY# 16
H_DPRSTP# 3,14,39
PM_EXTTS#0 12,13
PM_EXTTS#1 12
DELAY_VR_PG 16,39
PLTRST#_NB 15
H_THERMTRIP# 3,14
PM_DPRSLPVR 16,39
C464
0.01U/16V/X7R_4
0.01U/16V/X7R_4
SM_RCOMP_VOL
C461
C461
0.01U/16V/X7R_4
0.01U/16V/X7R_4
Santa Rosa Platform MOW WW15
For 4GB DRAM support,
change Pin-BJ29 to DDR_A_MA14,
change Pin-BE24 to DDR_B_MA14.
CRESTLINE
new pin
define
R94 10K_4 R94 10K_4
R93 10K_4 R93 10K_4
R78
R78
*56.2/F_4
*56.2/F_4
C465
C465
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
C463
C463
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
DDR_A_MA14 12,13
DDR_B_MA14 12,13
PM_EXTTS#0
PM_EXTTS#1
THRMTRIP#_GMCH
T89T89
T90T90
T16T16
T14T14
T8T8
T13T13
T15T15
T9T9
T12T12
T17T17
T19T19
R368 0_4 R368 0_4
R83 100_4 R83 100_4
R77 0_4 R77 0_4
R96 0_4 R96 0_4
5
T25T25
T24T24
MCH_CFG_3
MCH_CFG_4
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_10
MCH_CFG_11
MCH_CFG_14
MCH_CFG_15
MCH_CFG_17
MCH_CFG_18 INT_HSYNC1
PM_EXTTS#0
PM_EXTTS#1
PLTRST#_R
THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH
TP_NC1
T101T101
TP_NC2
T102T102
TP_NC3
T100T100
TP_NC4
T97T97
TP_NC5
T96T96
TP_NC6
T87T87
TP_NC7
T84T84
TP_NC8
T83T83
TP_NC9
T86T86
TP_NC10
T85T85
TP_NC11
T88T88
TP_NC12
T99T99
TP_NC13
T103T103
TP_NC14
T98T98
TP_NC15
T95T95
TP_NC16
T82T82
P36
P37
R35
N35
AR12
AR13
AM12
AN13
AR37
AM36
AL36
AM37
D20
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
G23
C20
R24
E23
E20
K23
M20
M24
G41
AW49
AV20
N20
G36
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
C51
B50
A50
A49
BK2
J12
P27
N27
N24
C21
C23
F23
N23
J20
L23
J23
L32
N33
L35
L39
L36
J36
BJ1
U25B
U25B
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
E1
NC_10
A5
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
CRESTLINE
CRESTLINE
4
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
DDR MUXING CLK
DDR MUXING CLK
SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
CFG RSVD
CFG RSVD
PM
PM
NC
NC
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI
DMI
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
GRAPHICS VID
GRAPHICS VID
ME
ME
MISC
MISC
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
TEST_2
4
3
http://hobi-elektronika.net
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BL15
BK14
BK31
BL31
AR49
AW4
B42
C42
H48
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
AT43
AN49
AM50
H35
K36
G39
G40
A37
R32
M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR3 13
M_CLK_DDR4 13
M_CLK_DDR#0 13
M_CLK_DDR#1 13
M_CLK_DDR#3 13
M_CLK_DDR#4 13
DDR_CKE0_DIMMA 12,13
DDR_CKE1_DIMMA 12,13
DDR_CKE3_DIMMB 12,13
DDR_CKE4_DIMMB 12,13
DDR_CS0_DIMMA# 12,13
DDR_CS1_DIMMA# 12,13
DDR_CS2_DIMMB# 12,13
DDR_CS3_DIMMB# 12,13
M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13
SMRCOMPP
SMRCOMPN
SM_RCOMP_VOH
SM_RCOMP_VOL
V_DDR_MCH_REF 13,36
C123 0.1U/10V/X5R_4 C123 0.1U/10V/X5R_4
C190 0.1U/10V/X5R_4 C190 0.1U/10V/X5R_4
MCH_DREFCLK
MCH_DREFCLK#
DREF_SSCLK
DREF_SSCLK#
CLK_MCH_3GPLL 2
CLK_MCH_3GPLL# 2
T18T18
T94T94
T92T92
T93T93
T91T91
MCH_CLVREF
GMCH_TEST1
GMCH_TEST2
V_DDR_MCH_REF
MCH_DREFCLK 2
MCH_DREFCLK# 2
DREF_SSCLK 2
DREF_SSCLK# 2
DMI_MRX_ITX_N0 15
DMI_MRX_ITX_N1 15
DMI_MRX_ITX_N2 15
DMI_MRX_ITX_N3 15
DMI_MRX_ITX_P0 15
DMI_MRX_ITX_P1 15
DMI_MRX_ITX_P2 15
DMI_MRX_ITX_P3 15
DMI_MTX_IRX_N0 15
DMI_MTX_IRX_N1 15
DMI_MTX_IRX_N2 15
DMI_MTX_IRX_N3 15
DMI_MTX_IRX_P0 15
DMI_MTX_IRX_P1 15
DMI_MTX_IRX_P2 15
DMI_MTX_IRX_P3 15
PWROK 16,30
ICH_CL_RST0# 16
R366 0_4 R366 0_4
R86 20K_4 R86 20K_4
+1.8V_SUS
R352
R352
20/F_4
20/F_4
R350
R350
20/F_4
20/F_4
+1.25V 9,17,33,37
CL_CLK0 16
CL_DATA0 16
C198
C198
0.1U/10V/X5R_4
0.1U/10V/X5R_4
SDVO_CTRLCLK 19
SDVO_CTRLDATA 19
CLK_3GPLLREQ# 2
MCH_ICH_SYNC# 16
INT__BKLT_CTRL 18
INT_LVDS_BLON 18
Layout Note:
Place 150 ohm
termination resistors
close to GMCH.
INT_HSYNC 20
INT_VSYNC 20
Layout Note:
HSYNC/VSYNC serial R
place close to NB
+1.25V
R108
R108
1K/F_4
1K/F_4
R109
R109
392/F_4
392/F_4
3
+3.3V
INT_LVDS_EDIDCLK 18
INT_LVDS_EDIDDATA 18
EC B-20
INT_LVDS_DIGON 18
TV_COMP_R
TV_Y/G_R
TV_C/R_R
INT_CRT_DDCCLK 20
INT_CRT_DDCDAT 20
R90 39/F_4 R90 39/F_4
R85 1.33K/F_6 R85 1.33K/F_6
R92 39/F_4 R92 39/F_4
2
1
06
U25C
U25C
J40
L_BKLT_CTRL
H39
M35
E39
E40
C37
D35
K40
L41
L43
N41
N40
D46
C45
D44
E42
G51
E51
F49
G50
E50
F48
G44
B47
B45
E44
A47
A45
E27
G27
K27
F27
L27
P33
H32
G32
K29
F29
E29
K33
G35
F33
C32
E33
J27
J29
CRESTLINE
CRESTLINE
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
TVA_DAC
TVB_DAC
TVC_DAC
TVA_RTN
TVB_RTN
TVC_RTN
TV_DCONSEL_0
TV_DCONSEL_1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
LVDS
LVDS
TV VGA
TV VGA
DVO_RED#_C
DVO_GREEN#_C
DVO_BLUE#_C
DVO_CLK#_C
DVO_RED_C
DVO_GREEN_C
DVO_BLUE_C
DVO_CLK_C
R98 10K_4 R98 10K_4 R104 24.9/F_4 R104 24.9/F_4
R97 10K_4 R97 10K_4
R101 2.4K/F_4 R101 2.4K/F_4
R99 0_4 R99 0_4
TXLCLKOUT- 18
TXLCLKOUT+ 18
TXUCLKOUT- 18
TXUCLKOUT+ 18
TXLOUT0- 18
TXLOUT1- 18
TXLOUT2- 18
TXLOUT0+ 18
TXLOUT1+ 18
TXLOUT2+ 18
TXUOUT0- 18
TXUOUT1- 18
TXUOUT2- 18
TXUOUT0+ 18
TXUOUT1+ 18
TXUOUT2+ 18
R518 75/F_4 R518 75/F_4
R519 75/F_4 R519 75/F_4
R520 75/F_4 R520 75/F_4
R87 150/F_4 R87 150/F_4
R89 150/F_4 R89 150/F_4
R88 150/F_4 R88 150/F_4
INT_CRT_BLU 20
INT_CRT_GRN 20
INT_CRT_RED 20
L_CTRL_CLK
L_CTRL_DATA
INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA
TV_DCONSEL_0
TV_DCONSEL_1
INT_CRT_DDCCLK
INT_CRT_DDCDAT
CRTIREF
INT_VSYNC1
LVDS_IBG
T22T22
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
C201 0.1U/10V/X5R_4 C201 0.1U/10V/X5R_4
C203 0.1U/10V/X5R_4 C203 0.1U/10V/X5R_4
C205 0.1U/10V/X5R_4 C205 0.1U/10V/X5R_4
C207 0.1U/10V/X5R_4 C207 0.1U/10V/X5R_4
C200 0.1U/10V/X5R_4 C200 0.1U/10V/X5R_4
C202 0.1U/10V/X5R_4 C202 0.1U/10V/X5R_4
C204 0.1U/10V/X5R_4 C204 0.1U/10V/X5R_4
C206 0.1U/10V/X5R_4 C206 0.1U/10V/X5R_4
DC Blocked Cap.
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 20, 2007
Friday, July 20, 2007
2
Friday, July 20, 2007
Quanta Computer Inc.
GMCH DMI/VIDEO(2 of 6)
GMCH DMI/VIDEO(2 of 6)
GMCH DMI/VIDEO(2 of 6)
EXP_A_COMPX
N43
M43
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
+VCC_PEG 9
C594
C594
10P/50V/COG_4
10P/50V/COG_4
EC A-07
C595
C595
10P/50V/COG_4
10P/50V/COG_4
DVO_RED#_C
DVO_GREEN#_C
DVO_BLUE#_C
DVO_CLK#_C
DVO_RED_C
DVO_GREEN_C
DVO_BLUE_C
DVO_CLK_C
SDVOB_RED- 19
SDVOB_GREEN- 19
SDVOB_BLUE- 19
SDVOB_CLK- 19
SDVOB_RED+ 19
SDVOB_GREEN+ 19
SDVOB_BLUE+ 19
SDVOB_CLK+ 19
64 3
64 3
64 3
1
SDVOB_INT- 19
SDVOB_INT+ 19
+VCC_PEG
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
4
3
2
1
NB(Memory controller)
http://hobi-elektronika.net
07
D D
DDR_A_D[0..63] 13 DDR_B_D[0..63] 13
C C
B B
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
U25D
U25D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CRESTLINE
CRESTLINE
DDR_A_BS0
BB19
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVEN#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_WE#
BK19
BF29
BL17
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_RAS#
DDR_A_WE#
DDR_A_BS0 12,13
DDR_A_BS1 12,13
DDR_A_BS2 12,13
DDR_A_CAS# 12,13 DDR_B_CAS# 12,13
DDR_A_DM[0..7] 13
DDR_A_DQS[0..7] 13
DDR_A_DQS#[0..7] 13
DDR_A_MA[0..13] 12,13 DDR_B_MA[0..13] 12,13
DDR_A_RAS# 12,13
T11T11
DDR_A_WE# 12,13
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BK5
BK9
BK10
BH5
BG1
BC2
BK3
BE4
BD3
BA3
BB3
AR1
AY2
AY3
AU2
BL9
BL5
BJ8
BJ6
BF4
BJ2
AT3
AT2
U25E
U25E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CRESTLINE
CRESTLINE
DDR_B_BS0
AY17
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BG18
BG36
BE17
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_RAS#
DDR_B_WE#
T10T10
DDR_B_BS0 12,13
DDR_B_BS1 12,13
DDR_B_BS2 12,13
DDR_B_DM[0..7] 13
DDR_B_DQS[0..7] 13
DDR_B_DQS#[0..7] 13
DDR_B_RAS# 12,13
DDR_B_WE# 12,13
A A
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Quanta Computer Inc.
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
GMCH DDR/Strap(3 of 6)
GMCH DDR/Strap(3 of 6)
GMCH DDR/Strap(3 of 6)
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
74 3
74 3
74 3
1
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
GMCH 1.05V
VCC Core
VCC_AXG
VCC_AXD
VTT
D D
VCC_PEG
VCC_AXM
VCCR_RX_DMI
current(A)
1.573
7.7
0.2
0.85
1.2
0.54
0.25
12.313 SUM
+1.8V_SUS
Remark
( 1.3A for
external GFX )
for integrated
Gfx
FSB VCCP
for PCIEG
for IAMT
function
DMI
+1.05V_VCCP
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
U25G
U25G
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
R30
VCC_13
IVCCSM supply current 1 channel 1.615A 2 channel 3.138A
AU32
VCC_SM_1
AU33
VCC_SM_2
C175
C175
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C C
Layout Note:
Place C175 where
LVDS and DDR2
taps.
B B
A A
+
+
330U/2.5V_7343
330U/2.5V_7343
1 2
C483
C483
22U/4V/X6S_8
22U/4V/X6S_8
5
C171
C171
C172
C172
22U/4V/X6S_8
22U/4V/X6S_8
+1.05V_VCCP
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
W13
W14
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
R20
T14
Y12
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
CRESTLINE
CRESTLINE
4
VCC CORE
VCC CORE
POWER
POWER
VCC SM VCC GFX
VCC SM VCC GFX
4
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
VCC SM LF
3
http://hobi-elektronika.net
+1.05V_VCCP
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
Ivcc_AXG Graphics core supply current 7.7A
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
+1.05V_VCCP
Layout Note:
370 mils
from edge.
+
+
C420
C420
330U/2V/_7343
330U/2V/_7343
C179
C179
0.1U/10V/X5R_4
0.1U/10V/X5R_4
Layout Note:
Inside GMCH cavity for VCC_AXG.
C131
C131
C129
C129
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
3
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+
+
C178
C178
C422
C422
0.22U/6.3V/X5R_4
0.22U/6.3V/X5R_4
C127
C127
+3.3V
R349 10_6 R349 10_6
+VCC_GMCH_L
Ivcc (External GFX 1.310 A, integrate 1.572 A)
+
+
C84
C84
C96
C96
C163
1U/6.3V/X5R_6
1U/6.3V/X5R_6
C148
C148
0.22U/6.3V/X5R_4
0.22U/6.3V/X5R_4
C163
22U/4V/X6S_8
22U/4V/X6S_8
330U/2V/_7343
330U/2V/_7343
330U/2V_7343
330U/2V_7343
0.47U/10V/X7R_6
0.47U/10V/X7R_6
C162
C162
22U/4V/X6S_8
22U/4V/X6S_8
Ivcc_AXM Controller supply current 540mA
+1.05V_VCCP
C177
C177
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C176
C176
22U/4V/X6S_8
22U/4V/X6S_8
Layout Note:
Place close to GMCH edge.
C181
0.22U/6.3V/X5R_4
0.22U/6.3V/X5R_4
C158
C158
0.47U/6.3V/X5R_4
0.47U/6.3V/X5R_4
C181
0.22U/6.3V/X5R_4
0.22U/6.3V/X5R_4
Layout Note:
370 mils from edge.
C149
C149
2
D23 CH751H-40PT D23 CH751H-40PT
C173
C173
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C154
C154
Layout Note:
Inside GMCH
cavity.
C99
C99
10U/6.3V/X5R_8
10U/6.3V/X5R_8
Layout Note:
Inside GMCH cavity
for VCC_AXG.
+1.05V_VCCP 3,4,5,6,9,14,17,37
C168
C168
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C155
C155
0.22U/6.3V/X5R_4
0.22U/6.3V/X5R_4
C187
C174
C174
1U/6.3V/X5R_6
1U/6.3V/X5R_6
C187
1U/6.3V/X5R_6
1U/6.3V/X5R_6
2
2 1
+1.05V_VCCP
C161
C161
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C169
C169
0.22U/6.3V/X5R_4
0.22U/6.3V/X5R_4
1
08
U25F
U25F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
CRESTLINE
CRESTLINE
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
POWER
POWER
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
GMCH Power-1(4 of 6)
GMCH Power-1(4 of 6)
GMCH Power-1(4 of 6)
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS NCTF
VSS NCTF
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VCC NCTF
VCC NCTF
VSS SCB VCC AXM
VSS SCB VCC AXM
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
VCC AXM NCTF
VCC AXM NCTF
1
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
VSS_SCB1
B2
VSS_SCB2
C1
VSS_SCB3
BL1
VSS_SCB4
BL51
VSS_SCB5
A51
VSS_SCB6
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
84 3
84 3
84 3
+1.05V_VCCP
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
R91 0_6 R91 0_6
+3.3V
C474
C474
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C475
C475
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3.3V
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+VCC_TVDACA
L44 10uH/100mA_8 L44 10uH/100mA_8
+1.25V
D D
+1.25V
470U/2V_7343
470U/2V_7343
L41
L41
470U/2V_7343
470U/2V_7343
+
C480
+
C480
10uH/100mA_8
10uH/100mA_8
C481
C481
+
+
+3V_VCCSYNC
C170
C170
0.1U/10V/X5R_4
0.1U/10V/X5R_4
L37
L37
1 2
BLM18PG181SN1_6
BLM18PG181SN1_6
IVCCA_DAC_BG current 0.005A
R358
R358
+VCC_TVBG
1 2
0.03/F_20
0.03/F_20
0.1U/10V/X7R_4
0.1U/10V/X7R_4
IVCCA_DPLLA~B current 0.08A
C431
C431
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C428
C428
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C104
C104
IVCCA_HPLL current 0.05A
IVCCA_MPLL current 0.15A
C430
C430
+VCC_TVDACA
+VCC_TVDACA
+VCC_TVDACA
1 2
C455
C455
1 2
L30 BLM11A05S_6 L30 BLM11A05S_6
L31 BLM11A05S_6 L31 BLM11A05S_6
+VCCA_MPLL_L
22U/4V/X6S_8
22U/4V/X6S_8
+1.25V
+1.25V
1 2
C450
C450
0.1U/10V/X7R_4
0.1U/10V/X7R_4
1 2
C449
C449
0.1U/10V/X7R_4
0.1U/10V/X7R_4
1 2
R356 0_4 R356 0_4
1 2
123
C425
C425
22U/4V/X6S_8
22U/4V/X6S_8
+
C79
+
C79
100U/10V_7343
100U/10V_7343
R351 0_4 R351 0_4
1 2
123
C447
C447
*22nF/3P_6
*22nF/3P_6
R353 0_4 R353 0_4
1 2
123
C452
C452
*22nF/3P_6
*22nF/3P_6
R355 0_4 R355 0_4
1 2
123
C453
C453
*22nF/3P_6
*22nF/3P_6
R357 0_6 R357 0_6
IVCCD_TVDAC current 0.06A
C456
C456
*22nF/3P_6
*22nF/3P_6
R344
R344
0.5/F_6
0.5/F_6
22U/4V/X6S_8
22U/4V/X6S_8
R79 0_6 R79 0_6
+1.25V
C C
+1.25V 6,17,33,37
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
L34
L34
+3.3V
1 2
BLM18PG181SN1_6
BLM18PG181SN1_6
C445
C445
10U/6.3V/X5R_8
B B
A A
10U/6.3V/X5R_8
22nF & 0.1uF for
VCC_TVDACA:C_R should
be placed within 250
mils from Crestline.
0.1U/10V/X7R_4
0.1U/10V/X7R_4
+1.5V
0.1U/10V/X7R_4
0.1U/10V/X7R_4
+1.5V 4,17,26,32,33,38
C457
C457
IVCC_QDAC current 0.005A
C185
C185
0.1U/10V/X7R_4
0.1U/10V/X7R_4
5
R103 0_4 R103 0_4
1 2
123
C180
C180
*22nF/3P_6
*22nF/3P_6
C183
C183
1U/ 6.3V_X5R
1U/ 6.3V_X5R
+VCCQ_QDAC
R102
R102
100/F_6
100/F_6
FB_180ohm+-25%_
100mHz_1500mA_
0.09ohm DC
1 2
4
IVCC_SYNC current 0.01A
IVCCA_CRT_DAC current 0.08A
+VCCA_CRTDAC
1 2
C466
C466
0.1U/10V/X7R_4
0.1U/10V/X7R_4
R359 0_4 R359 0_4
1 2
123
1 2
C458
C458
C87
C87
4.7U/6.3V/X5R_8
4.7U/6.3V/X5R_8
C165
C165
1U/6.3V/X5R_6
1U/6.3V/X5R_6
+1.25V
+1.25V
C167
C167
C459
C459
*22nF/3P
*22nF/3P
+3.3V
C191
C191
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C103
C103
*22U/4V/X6S_8
*22U/4V/X6S_8
C460
C460
22U/4V/X6S_8
22U/4V/X6S_8
1U/6.3V/X5R_6
1U/6.3V/X5R_6
IVCCD_HPLL current 0.25A
C153
C153
0.1U/10V/X5R_4
0.1U/10V/X5R_4
L39
L39
1 2
BLM21PG221SN1D_8
BLM21PG221SN1D_8
IVCCA/D_PEG_PLL current 0.1A
+V1.25S_PEGPLL_FB
C479
C479
10U/6.3V/X5R_8
10U/6.3V/X5R_8
IVCCD_LVDS current 0.15A
4
R110 0_6 R110 0_6
1U/6.3V/X5R_6
1U/6.3V/X5R_6
+1.8V_SUS
http://hobi-elektronika.net
R362 0_4 R362 0_4
1 2
1
3
C462
C462
2
*22nF/3P
*22nF/3P
+3V_VCCSYNC
+VCCA_CRTDAC_R
+VCC_TVBG_R
+VCCA_DPLLA
+VCCA_DPLLB
+VCCA_HPLL
+VCCA_MPLL
IVCCA_LVDS current 0.01A
+VCC_TX_LVDS
C182
C182
1000P/16V/X7R_4
1000P/16V/X7R_4
IVCCA_PEG_BG current 0.04A
+VCCA_PEG_PLL
C152
C152
1U/6.3V/X5R_6
1U/6.3V/X5R_6
C166
C166
+VCCA_SM_CK
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+VCC_TVDACA_R
+VCC_TVDACB_R
+VCC_TVDACC_R
+VCCD_CRT
+VCCD_TVDAC_R
+VCCQ_QDAC_R
+VCCA_PEG_PLL
C189
C189
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C188
C186
C186
C188
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+VCCD_LVDS
C197
C197
*10U/6.3V/X5R_8
*10U/6.3V/X5R_8
R369
R369
1/F_8
1/F_8
3
U25H
U25H
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
CRESTLINE
CRESTLINE
If:SDVO Disabled,VCCD_LVDS to GND.
If:SDVO Enabled,VCCD_LVDS to +1.8V.
3
CRT PLL A PEG A SM TV
CRT PLL A PEG A SM TV
POWER
POWER
A CK A LVDS
A CK A LVDS
D TV/CRT LVDS
D TV/CRT LVDS
VTT
VTT
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
AXD
AXD
VCC_AXD_6
VCC_AXD_NCTF
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
AXF
AXF
VCC_DMI
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
VCC_HV_1
VCC_HV_2
HV
HV
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
PEG
PEG
VCC_PEG_5
VCC_RXR_DMI_1
VCC_RXR_DMI_2
DMI
DMI
VTTLF
VTTLF
+3V_VCC_HV
+3V_VCC_HV
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTTLF1
VTTLF2
VTTLF3
*CH751H-40HPT
*CH751H-40HPT
R367 0_6 R367 0_6
+1.05V_VCCP
U13
U12
U11
U9
U8
U7
U5
U3
+VCC_AXD
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
+VCC_SM_CK
BK24
BK23
BJ24
BJ23
+VCC_TX_LVDS
A43
IVCC_HV current 0.1A
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
+VTTLF1
A7
+VTTLF2
F2
+VTTLF3
AH1
+1.05V_VCCP
D22
D22
2
Ivtt_FSB core supply current 0.85A
C97
C97
4.7U/6.3V/X5R_8
4.7U/6.3V/X5R_8
C164
C164
1U/6.3V/X5R_6
1U/6.3V/X5R_6
1U/6.3V/X5R_6
1U/6.3V/X5R_6
C160
C160
0.1U/10V/X5R_4
0.1U/10V/X5R_4
IVCC_TX_LVDS current 0.1A
+3V_VCC_HV
C468
C468
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+VCC_PEG 6
C443 0.47U/6.3V/X5R_4 C443 0.47U/6.3V/X5R_4
C432 0.47U/6.3V/X5R_4 C432 0.47U/6.3V/X5R_4
2 1
+3.3V
C429 0.47U/6.3V/X5R_4 C429 0.47U/6.3V/X5R_4
+3V_VCC_HV_L
R348
R348
*10_6
*10_6
40 mil
wide
2
10U/6.3V/X5R_8
10U/6.3V/X5R_8
+VCC_RXR_DMI
C98
C98
4.7U/6.3V/X5R_8
4.7U/6.3V/X5R_8
L13 0_6 L13 0_6
C159
C159
*22U/4V/X6S_8
*22U/4V/X6S_8
C138
C138
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
C157
C157
0.47U/6.3V/X5R_4
0.47U/6.3V/X5R_4
Ivcc_AXD current 0.2A
Ivcc_AXF current 0.35A
C122
C151
C151
C122
10U/6.3V/X5R_8
10U/6.3V/X5R_8
Ivcc_DMI current 0.1A
C199
C199
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C476
C476
Ivcc_SM_CK current 0.2A
L36 1uH/300mA_8 L36 1uH/300mA_8
C156
C156
R354 1/F_8 R354 1/F_8
22U/4V/X6S_8
22U/4V/X6S_8
+VCC_PEG
+
+
C477
C477
*10U/6.3V/X5R_8
*10U/6.3V/X5R_8
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
+V1.8_SMCK_RC
L40 1uH/300mA_8 L40 1uH/300mA_8
+
C184
C184
1000P/16V/X7R_4
1000P/16V/X7R_4
C486
C486
220U/2.5V_7343
220U/2.5V_7343
GMCH Power-2(5 of 6)
GMCH Power-2(5 of 6)
GMCH Power-2(5 of 6)
+
C473
C473
220U/2.5V_7343
220U/2.5V_7343
L42 91nH/1.5A L42 91nH/1.5A
Ivcc_PEG PCI-E current 1.2A
Ivcc_RX_DMI current 0.25A
L43 *91nH/1.5A L43 *91nH/1.5A
C478
C478
+
+
*220U/2.5V_7343
*220U/2.5V_7343
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
1
09
1 2
+
+
C421
C421
220U/2.5V_7343
220U/2.5V_7343
+1.25V 6,17,33,37
+1.25V
+1.25V
+1.25V 6,17,33,37
+1.25V
+1.8V_SUS
C454 22U/4V/X6S_8 C454 22U/4V/X6S_8
+1.05V_VCCP
94 3
94 3
94 3
1
+1.8V_SUS
+1.05V_VCCP
Rev Size
Rev Size
Rev Size
4A
4A
4A
5
NB(Power-3)
U25I
U25I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
D D
C C
B B
A A
5
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
AL1
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
CRESTLINE
CRESTLINE
VSS
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
4
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
4
3
http://hobi-elektronika.net
U25J
U25J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
CRESTLINE
CRESTLINE
3
VSS
VSS
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
2
1
10
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Quanta Computer Inc.
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
GMCH Power-3(6 of 6)
GMCH Power-3(6 of 6)
GMCH Power-3(6 of 6)
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
1
10 43
10 43
10 43
Rev Size
Rev Size
Rev Size
4A
4A
4A
Strap table
5
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
Any CFG signal strapping option not list below should be left NC Pin
Pin Name Strap description
D D
CFG[2:0]
CFG[4:3]
CFG5
CFG6
CFG7
FSB Frequency Select
Reserved
DMI X2 Select
Reserved
IntelR Management
Engine Crypto strap
4
3
2
1
http://hobi-elektronika.net
11
Configuration
010 = FSB 800MHz
011 = FSB 667MHz
0 = DMI X2
1 = DMI X4(Default)
0 = Intel Management Engine Crypto Transport Layer
Security (TLS) cipher suite with no confidentiality.
1= Intel Management Engine Crypto TLS cipher suite with
confidentiality (default).
CFG8
CFG9
C C
CFG[11:10]
CFG[13:12]
CFG[15:14]
CFG16
CFG[18:17]
SDVO_CTRLDATA
CFG19
CFG20
B B
DMI X2 Select
MCH_CFG_5
MCH_CFG_5 6
Low = DMIX2
High = IDMIX4(Default)
FSB Dynamic ODT
MCH_CFG_16
A A
MCH_CFG_16 6
Low = ODT Disable
High = ODT Enable(Default)
5
Reserved
PCI Express Graphics Lane Reversal
Reserved
XOR/ALLZ
Reserved
FSB Dynamic ODT
Reserved
SDVO Present
DMI Lane Reversal
SDVO/PCIe concurrent
DMI Lane Reversal
MCH_CFG_19
R82
R82
*4.02K/F_4
*4.02K/F_4
MCH_CFG_19 6
SDVO/PCIE Concurrent operation
MCH_CFG_20
R75
R75
*4.02K/F_4
*4.02K/F_4
MCH_CFG_20 6
Low = Normal operation(Default)
High = Reverse Lane
+3.3V
R95
R95
*4.02K/F_4
*4.02K/F_4
Low = Only SDVO or PCIE X1 is
operational(Default)
High = SDVO andPCIE X1 are operating
simultaneously via the PEG port
+3.3V
R100
R100
*4.02K/F_4
*4.02K/F_4
4
0 = Reverse Lanes
1 = Normal operation(Default)
00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)
0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)
0 = No SDVO Card present(Default)
1 = SDVO Card Present
0 = Normal operation(Default)
1 = Reverse Lanes
0 = Only SDVO or PCIE x1 is operation(Default)
1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
XOR /ALLz /Clock Un-gating
MCH_CFG_12 MCH_CFG_13 Configuration
0
0
1
1
MCH_CFG_12 6
MCH_CFG_13 6
*4.02K/F_4
*4.02K/F_4
Layout Note:
Location of all MCH_CFG strap resistors
needs to be close to minmize stub.
3
Clock gating disable
0
1
XOR Mode Enable
ALL-z Mode Enable
0
1
Normal operation(Default)
R80
R80
R81
R81
*4.02K/F_4
*4.02K/F_4
PCI Express Graphics
MCH_CFG_9
MCH_CFG_9 6
2
Strap define at External
Low = Reverse Lane
High = Normal operation(Default)
R76
R76
*4.02K/F_4
*4.02K/F_4
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
GMCH Strap Table
GMCH Strap Table
GMCH Strap Table
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
DVI control page
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SDVO Present
11 43
11 43
11 43
1
Rev Size
Rev Size
Rev Size
4A
4A
4A
1
DDR2 Dual channel A/B PU
+0.9V_DDR_VTT
C139
C139
A A
0.1U/10V/X5R_4
0.1U/10V/X5R_4
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
C89
C89
C108
C108
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
2
DDRII A CHANNEL
C133
C133
C116
C116
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C145
C145
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C142
C142
0.1U/10V/X5R_4
0.1U/10V/X5R_4
3
4
5
6
7
8
http://hobi-elektronika.net
12
C141
C128
C128
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C141
C91
C91
C130
C81
C81
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C130
C92
C92
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+0.9V_DDR_VTT
C85
C85
C150
C150
C136
C136
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
B B
C C
DDRII B CHANNEL
C143
C143
C146
C146
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C120
C120
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C144
C144
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C124
C80
C80
C132
C132
C86
C86
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C102
C102
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
Please these resistor
closely DIMMA,all
trace length<750 mil.
C124
C112
C112
0.1U/10V/X5R_4
0.1U/10V/X5R_4
DDR_A_MA[0..13] 7,13 DDR_B_MA[0..13] 7,13
DDR_A_MA7
DDR_A_MA11
DDR_A_MA4
DDR_A_MA6
DDR_A_RAS# 7,13
DDR_A_BS1 7,13
M_ODT0 6,13
DDR_A_BS2 7,13
DDR_A_BS0 7,13
DDR_A_WE# 7,13
DDR_A_CAS# 7,13
M_ODT1 6,13
DDR_CS0_DIMMA# 6,13
DDR_CS1_DIMMA# 6,13
DDR_CKE0_DIMMA 6,13
DDR_CKE1_DIMMA 6,13
DDR_A_MA13
DDR_A_MA12
DDR_A_MA8
DDR_A_MA9
DDR_A_MA5
DDR_A_MA3
DDR_A_MA10
DDR_A_BS0
DDR_A_MA0
DDR_A_MA2
DDR_A_MA1
RP17 56X2 RP17 56X2
1
3
RP15 56X2 RP15 56X2
1
3
RP9 56X2 RP9 56X2
1
3
RP2 56X2 RP2 56X2
1
3
RP20 56X2 RP20 56X2
1
3
RP18 56X2 RP18 56X2
1
3
RP12 56X2 RP12 56X2
1
3
RP7 56X2 RP7 56X2
1
3
RP4 56X2 RP4 56X2
1
3
RP11 56X2 RP11 56X2
1
3
R57 56_4 R57 56_4
R65 56_4 R65 56_4
R64 56_4 R64 56_4
R61 56_4 R61 56_4
R73 56_4 R73 56_4
R69 56_4 R69 56_4
R66 56_4 R66 56_4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
+0.9V_DDR_VTT
RP16 56X2 RP16 56X2
RP13 56X2 RP13 56X2
RP6 56X2 RP6 56X2
RP1 56X2 RP1 56X2
RP10 56X2 RP10 56X2
RP19 56X2 RP19 56X2
RP14 56X2 RP14 56X2
RP5 56X2 RP5 56X2
RP3 56X2 RP3 56X2
RP8 56X2 RP8 56X2
R54 56_4 R54 56_4
R68 56_4 R68 56_4
R62 56_4 R62 56_4
R58 56_4 R58 56_4
R72 56_4 R72 56_4
R70 56_4 R70 56_4
R67 56_4 R67 56_4
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA13
DDR_B_MA3
DDR_B_MA5
DDR_B_MA9
DDR_B_MA12
DDR_B_MA1
DDR_B_MA8
DDR_B_MA10
DDR_B_MA2
DDR_B_MA0
+0.9V_DDR_VTT 33,36
DDR_B_RAS# 7,13
DDR_B_BS1 7,13
M_ODT2 6,13
DDR_B_BS0 7,13
DDR_B_WE# 7,13
DDR_B_CAS# 7,13
M_ODT3 6,13
DDR_B_BS2 7,13
DDR_CS2_DIMMB# 6,13
DDR_CS3_DIMMB# 6,13
DDR_CKE3_DIMMB 6,13
DDR_CKE4_DIMMB 6,13
DDR_B_MA14 6,13 DDR_A_MA14 6,13
Please these resistor
closely DIMMB,all
trace length<750 mil.
+3.3V
C59
DDR_THERMDA
DDR_THERMDC
3
C59
*0.1U/10V/X5R_4
*0.1U/10V/X5R_4
R33
R33
*220_6
VCC
DXP
DXN
GND
*220_6
LM86_3V
1
2
3
5
U4
D D
CGCLK_SMB_M 2,13,26
CGDAT_SMB_M 2,13,26
PM_EXTTS#0 6,13
PM_EXTTS#1 6
1
R34 *0_4 R34 *0_4
U4
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
*LM86CIMM
*LM86CIMM
2
Uninstall DDR2 Thermal Sensor SO-DIMM 0 & 1
+3.3V 2,3,6,8,9,11,13,14,15,16,17,18,19,20,21,24,26,27,29,30,31,32,33
1 3
*MMBT3904_NL
*MMBT3904_NL
2
Q1
Q1
4
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Document Number
Quanta Computer Inc.
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
6
Date: Sheet of
DDR RES. ARRAY
DDR RES. ARRAY
DDR RES. ARRAY
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
7
12 43
12 43
12 43
8
Rev Size
Rev Size
Rev Size
4A
4A
4A
1
A is required to route to Top
SoDIMM for AMT to
function.This will need to
change for M08
A A
DDR_CKE0_DIMMA 6,12
B B
DDR_A_BS2 7,12
DDR_A_BS0 7,12
DDR_A_WE# 7,12
DDR_A_CAS# 7,12
DDR_CS1_DIMMA# 6,12
M_ODT1 6,12
C C
+3.3V
D D
1
DDR2 Dual channel A/B CONN
V_DDR_MCH_REF
+1.8V_SUS
DDR_A_D0
DDR_A_D6
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D9
DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D15
DDR_A_D11
DDR_A_D20
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D23
DDR_A_D19
DDR_A_D25
DDR_A_D24
DDR_A_DM3
DDR_A_D30
DDR_A_D31
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_D32
DDR_A_D37
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D39
DDR_A_D41
DDR_A_D40
DDR_A_DM5
DDR_A_D42
DDR_A_D46
DDR_A_D48
DDR_A_D52
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D51
DDR_A_D50
DDR_A_D57
DDR_A_D61
DDR_A_DM7
DDR_A_D62
DDR_A_D59
CGDAT_SMB_M
CGCLK_SMB_M
CN18
CN18
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DIMM1_9.2
DIMM1_9.2
CKE 0,1
CLOCK 0,1
2
+1.8V_SUS
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
DDR_A_D4
4
DDR_A_D5
6
8
DDR_A_DM0
10
12
DDR_A_D1
14
DDR_A_D7
16
18
DDR_A_D12
20
DDR_A_D8
22
24
DDR_A_DM1
26
28
30
32
34
DDR_A_D14
36
DDR_A_D10
38
40
42
DDR_A_D21
44
DDR_A_D16
46
48
50
DDR_A_DM2
52
54
DDR_A_D18
56
DDR_A_D22
58
60
DDR_A_D29
62
DDR_A_D28
64
66
DDR_A_DQS#3
68
DDR_A_DQS3
70
72
DDR_A_D26
74
DDR_A_D27
76
78
80
82
84
86
88
DDR_A_MA11
90
DDR_A_MA7
92
DDR_A_MA6
94
96
DDR_A_MA4
98
DDR_A_MA2
100
DDR_A_MA0
102
104
106
108
110
112
114
DDR_A_MA13
116
118
120
122
DDR_A_D36
124
DDR_A_D33
126
128
DDR_A_DM4
130
132
DDR_A_D35
134
DDR_A_D38
136
138
DDR_A_D44
140
DDR_A_D45
142
144
DDR_A_DQS#5
146
DDR_A_DQS5
148
150
DDR_A_D43
152
DDR_A_D47
154
156
DDR_A_D53
158
DDR_A_D49
160
162
164
166
168
DDR_A_DM6
170
172
DDR_A_D54
174
DDR_A_D55
176
178
DDR_A_D60
180
DDR_A_D56
182
184
DDR_A_DQS#7
186
DDR_A_DQS7
188
190
DDR_A_D58
192
DDR_A_D63
194
196
198
200
R335
R335
10K_4
10K_4
SMbus address A0
2
3
DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7
DDR_A_DQS[0..7] 7
DDR_A_DQS#[0..7] 7
DDR_A_MA[0..13] 7,12 DDR_B_MA[0..13] 7,12
M_CLK_DDR0 6
M_CLK_DDR#0 6
PM_EXTTS#0 6,12 PM_EXTTS#0 6,12
DDR_CKE1_DIMMA 6,12
DDR_A_MA14 6,12 DDR_B_MA14 6,12
DDR_A_BS1 7,12
DDR_A_RAS# 7,12
DDR_CS0_DIMMA# 6,12
M_ODT0 6,12
M_CLK_DDR1 6
M_CLK_DDR#1 6
CGDAT_SMB_M 2,12,26
CGCLK_SMB_M 2,12,26
R336
R336
10K_4
10K_4
+3.3V
4
V_DDR_MCH_REF
http://hobi-elektronika.net
+1.8V_SUS
1
DDR_B_D0
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D7
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D17
DDR_B_D21
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D22
DDR_B_D23
DDR_B_D29
DDR_B_DM3
DDR_B_D31
DDR_CKE3_DIMMB 6,12
DDR_B_BS2 7,12
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS0 7,12
DDR_B_WE# 7,12
DDR_B_CAS# 7,12
DDR_CS3_DIMMB# 6,12
M_ODT3 6,12
DDR_B_D32
DDR_B_D36
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D41
DDR_B_D44
DDR_B_DM5
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D52
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D55
DDR_B_D50
DDR_B_D57
DDR_B_D60
DDR_B_DM7
DDR_B_D62
DDR_B_D59
CGDAT_SMB_M
CGCLK_SMB_M
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
5
V_DDR_MCH_REF 6,36
CN19
CN19
VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50
VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)
DIMM2_5.2
DIMM2_5.2
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
GND
202
+1.8V_SUS
DDR_B_D4
DDR_B_D5
DDR_B_DM0
DDR_B_D6
DDR_B_D2
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D20
DDR_B_DM2
DDR_B_D18
DDR_B_D19
DDR_B_D28 DDR_B_D24
DDR_B_D25
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D26 DDR_B_D27
DDR_B_D30
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_MA13
DDR_B_D37
DDR_B_D38
DDR_B_DM4
DDR_B_D39
DDR_B_D33
DDR_B_D40
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D42
DDR_B_D43
DDR_B_D49
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D51
DDR_B_D56
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D63
DDR_B_D58
R31 10K_4 R31 10K_4
R32
R32
10K_4
10K_4
6
DDR_B_DM[0..7] 7
DDR_B_D[0..63] 7
DDR_B_DQS[0..7] 7
DDR_B_DQS#[0..7] 7
M_CLK_DDR3 6
M_CLK_DDR#3 6
DDR_CKE4_DIMMB 6,12
DDR_B_BS1 7,12
DDR_B_RAS# 7,12
DDR_CS2_DIMMB# 6,12
M_ODT2 6,12
M_CLK_DDR4 6
M_CLK_DDR#4 6
+3.3V
CKE 2,3
CLOCK 3,4
+3.3V 2,3,6,8,9,11,12,14,15,16,17,18,19,20,21,24,26,27,29,30,31,32,33
3
4
5
SMbus address A4
6
7
8
13
+1.8V_SUS
Place these Caps near So-Dimm1.
C438
C438
C441
C441
C588
C588
+
+
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
*330U/2.5V_7343
*330U/2.5V_7343
+1.8V_SUS
C95
C95
C105
C105
0.1U/10V/X5R_4
0.1U/10V/X5R_4
V_DDR_MCH_REF
C195
C195
C193
C193
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.8V_SUS
Place these Caps near So-Dimm2.
C126
C126
C448
C448
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
+1.8V_SUS
C110
C110
C134
C134
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
V_DDR_MCH_REF
C196
C196
C194
C194
0.1U/10V/X5R_4
0.1U/10V/X5R_4
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
DDR SO-DIMM(200P)
DDR SO-DIMM(200P)
DDR SO-DIMM(200P)
Friday, July 20, 2007
Friday, July 20, 2007
Friday, July 20, 2007
7
C427
C427
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
C140
C140
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3.3V
C47
C47
C49
C49
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
C101
C101
C117
C117
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
C111
C111
C125
C125
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3.3V
C46
C46
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
PROJECT : SA1
PROJECT : SA1
PROJECT : SA1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
C115
C115
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C435
C435
C135
C135
C48
C48
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C444
C444
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
0.1U/10V/X5R_4
0.1U/10V/X5R_4
13 43
13 43
13 43
8
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
Rev Size
Rev Size
Rev Size
4A
4A
4A