Fujitsu sa3650 Schematics

S13 Block Diagram

DDRII 667/800

D D

DDRII 667/800

C C

1394a

SD/MMC

MS/MS Pro/xD

Digital Array

B B

Mic

MIC IN

LINE IN

LINE OUT HP OUT

OP AMP G1412

Slot 0

Slot 1

LASSO CONN

DVI-I CONN

LCD CONN

1394 card reader

JMB380

Azalia CODEC

ALC888

http://hobi-elektronika.net

DDRII 667/800 MHz Channel A

DDRII 667/800 MHz Channel B

PCIE X8

DVI-I

LVDS

W/SPDIF

2CH SPEAKER

A A

OP AMP

G1432Q

HyperTransport

PCIE

AZALIA

AMD S1G2 CPU

638-Pin uFCPGA

4,5,6,7

16X16

OUT

North Bridge

ATi RS780M

HyperTransport LINK0 CPU I/F DX10 IGP LVDS/TVOUT/TMDS DISPLY PORT X2

Side Port Memory

1 X 16 PCIE I/F 1 X 4 PCIE I/F WITH SB

6 X 1 PCIE I/F

10,11,12,13

PCIE

4X4

South Bridge

Ati SB700

USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

ATA 66/100

PCI/PCI BRIDGE

ACPI 1.1 LPC I/F

16,17,18,19,20

KBC

Winbond WPC775L

30,31

Touch Pad

32 32

Int. KB

Flash ROM

LPC Bus

SPI

2MB

CPU V_CORE

34,35

Thermal & Fan

G792

Project code : 91.4H801.001 PCB Number : 48.4H801.0SC

Revision : SC

INPUTS

DCBATOUT

ISL6265

OUTPUTS VCC_CORE

SYSTEM DC/DC

TPS51124

Side Port

PCIE

USB 2.0

CLK GEN

ICS9LPR480

DDRII (32MB)

PCIE x 1 & USB 2.0 x 1

PCIE x 1 USB 2.0 x 1 STAT & USB 2.0 x 1

USB 2.0 x 1

Power SW

G577

New Card

Mini-Card

802.11a/b/g/n

Daughter CONN

(e-SATA Combo+USBx1)

(USB Port x1) (RJ45 CONN)

USB Port

Bluetooth

INPUTS

DCBATOUT

SYSTEM DC/DC

INPUTS

DCBATOUT

SYSTEM DC/DC

LDO

INPUTS

5V_S5

SYSTEM DC/DC

INPUTS

3D3V_S5 3D3V_S0

OUTPUTS

1D8V_S3 1D2V_S0

TPS51125

OUTPUTS

5V_S5 3D3V_S5

OUTPUTS

0D9V_S3 1D5V_S03D3V_S0

LDO

OUTPUTS

1D2V_S5 2D5V_S0

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

OUTPUTS

5V_AUX_S5 3D3V_AUX_S5

MAXIM CHARGER

BQ24745

DCBATOUT

144Friday, May 16, 2008

OUTPUTS

INPUTS

AD+ BT+

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SATA

USB 2.0 x 1

SATA

CAMERA

HDD

PATA

SATA

Hyper Flash

ODD

LPC DEBUG CONN

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet of

Date: Sheet of

System Block Diagram

S13

http://hobi-elektronika.net

USB PORT#

D D

1 2 3 4 5

USB1 CAMERA

Combo(ESATA/USB)

NEW CARD

USB2

Bluetooth

DESTINATION

RS780M Functional Strap Definitions

STRAP_DEBUG_BUS_GPIO_ENABLE

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC) 0 : Enable 1 : Disable

RS780: Enables Side port memory ( RS780 use HSYNC)

0 : Enable 1 : Disable

SUS_STAT#

Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

2.0

SB700

6 7

C C

1.1

B B

PCI EXPRESS

Lane 0

8 9NC 10 11 12 13

NC WLAN NC

NC NC NC NC

DESTINATION

NEW CARD

SB700 Functional Strap Definitions

PULL LOWPULL HIGH

CLK_PCI_2

CLK_PCI_3

CLK_PCI_1 CLK_PCI_4

LPCCLK0

LPCCLK1

RTCCLK

AZ_RST#

SB_GPO17 SB_GPO16

WatchDOG (NB_PWRGD) ENABLED DISABLED

DEBUG STRAPS

RESERVED

PCI MEM BOOT

INTERNAL CLK GEN

INTERNAL RTC

IMC

ROM TYPE H, H = Reserved

USB IGNORE

ENABLED DISABLED

DEFAULT

H, L = SPI ROM L, H = LPC ROM L, L = FWH ROM

DEFAULT

DISABLEDENABLED

DEFAULT

DISABLEDENABLED

DEFAULT

Lane 1 Lane 2 Lane 3

CARD READER&1394

Lane 4

A A

Lane 5

WLAN

LAN

NC NC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet of

Date: Sheet

Table of Content

S13 SC

244Friday, May 16, 2008

3D3V_S0

1 2

L18

BLM18AG601SN-3GP

3D3V_CLK_VDD

C297

C314

SC22U6D3V5MX-2GP

C537

C534

SCD1U10V2KX-4GP

http://hobi-elektronika.net

C514

C517

SCD1U10V2KX-4GP

C511

C512

SCD1U10V2KX-4GP

C515

SCD1U10V2KX-4GP

C533

C516

SCD1U10V2KX-4GP

3D3V_S0

1 2

L45

BLM18AG601SN-3GP

3D3V_48MPWR_S0

SC2D2U6D3V3KX-GP

C528

Due to PLL issue on current clock chip, the SBlink clock need to come from SRC clocks for RS740 and RS780. Future clock chip revision will fix this.

D D

1 2

3D3V_S0

1D2V_S0

BLM18AG601SN-3GP

C C

EXPRESS CARD

WLAN

CARD READER

B B

NB ALINK(100MHz)

SB PCIE(100MHz)

3D3V_S0 3D3V_S0

R321

10KR2J-3-GP

A A

R318

10KR2J-3-GP

1 2

10KR2J-3-GP

1 2

R311

R315

R325 0R3-0-U-GP

1 2

L44

LAN

R317

10KR2J-3-GP

1 2

R320

10KR2J-3-GP

1 2

CLK_NB_GPPSB11

CLK_NB_GPPSB#11

CLK_PCIE_SB16

CLK_PCIE_SB#16

1 2

1D1V_CLK_VDDIO

C312

SC22U6D3V5MX-2GP

CLK_PCIE_NEW22

CLK_PCIE_NEW#22

CLK_PCIE_LAN25

CLK_PCIE_LAN#25

CLK_PCIE_WLAN22

CLK_PCIE_WLAN#22

CLK_PCIE_CARD24

CLK_PCIE_CARD#24

CLK_NBHT_CLK11 CLK_NBHT_CLK#11

REF0 REF1 REF2

C536

C530

SCD1U10V2KX-4GP

3D3V_CLK_VDD

C518

SCD1U10V2KX-4GP

SC10U10V5KX-2GP

RN21

SRN22-3-GP

RN22

SRN0J-6-GP

RN26

SRN0J-6-GP

RN25

SRN0J-6-GP

RN24

SRN22-3-GP

RN23

RN23 SRN0J-6-GP

SRN0J-6-GP

* default

SEL_HTT66 FS0

SEL_SATA FS1

SEL_27 FS2

C510

SCD1U10V2KX-4GP

R323

1 2

C739

2 3 1

RN19

RN19 SRN0J-6-GP

SRN0J-6-GP

C523

C513

SCD1U10V2KX-4GP

0R0603-PAD

C521

C521 SC1U10V2KX-1GP

SC1U10V2KX-1GP

CLK_NB_GPPSB_R CLK_NB_GPPSB#_R

CLK_PCIE_NEW_R

CLK_PCIE_NEW#_R

CLK_PCIE_LAN_R

CLK_PCIE_LAN#_R

CLK_PCIE_WLAN_R

CLK_PCIE_WLAN#_R

CLK_PCIE_CARD_R

CLK_PCIE_CARD#_R

CLK_PCIE_SB_R CLK_PCIE_SB#_R

2 3 1

R314 10KR2J-3-GPR314 10KR2J-3-GP

66 MHz 3.3V single ended HTT clock

100 MHz differential HTT clock

100 MHz non-spreading differential SATA clock

100 MHz spreading differential SRC clock

27MHz non-spreading singled clock on pin 13 and

27MHz spread clock on pin 14

0*100MHz differential spreading SRC clock

1D1V_CLK_VDDIO

3D3V_48MPWR_S0

CLK_NBHT_CLK_R

CLK_NBHT_CLK#_R

VDD_REF

PD#

3D3V_CLK_VDD

PD#

U32

VDDATIG

VDDATIG_IO

VDDCPU

VDDCPU_IO

VDDSRC

VDDSRC_IO

VDDSB_SRC

VDDSB_SRC_IO

VDDSATA

VDDDOT

VDDHTT

VDDREF

VDD48

PD#

SRC0T

SRC0C

SRC1T

SRC1C

SRC2T

SRC2C

SRC3T

SRC3C

SRC4T

SRC4C

SRC6T/SATAT

SRC6C/SATAC

SRC7T/27M_SS

SRC7C/27M_NS

SB_SRC0T

SB_SRC0C

SB_SRC1T

SB_SRC1C

HTT0T/66M

HTT0C/66M

RTM880N-796-GRT-GP

SEL_HTT66/REF0

SEL_SATA/REF1

REF1

SMBCLK SMBDAT

ATIG0T ATIG0C ATIG1T ATIG1C

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

CPUK8_0T

CPUK8_0C

48MZ_0

SEL_27/REF2

GNDSATA

GNDATIG

GNDDOT

GNDHTT GNDREF GNDCPU

GND48

GNDSRC GNDSRC

GNDSB_SRC

GND

C306

R180

1 2

10MR2J-L-GP

CLK_X1

X1 X2

2 3

30 29 28 27

23 45 44 39 38

50 49

59 58 57

43 24 7 52 60 46 1

10 18

33 65

CLK_X2

CLK_PCIE_LASSO_R CLK_PCIE_LASSO#_R

CLK_NB_GFX_R

CLK_NB_GFX#_R

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

CPU_CLK_R CPU_CLK#_R

CLK_48

REF0 REF1 REF2

R313150R2F-1-GP R313150R2F-1-GP

R31275R2F-2-GP R31275R2F-2-GP

CL=20pF±0.2pF

SMBCLK0_SB 8,9,17 SMBDAT0_SB 8,9,17

TP30 TPAD28TP30 TPAD28 TP27 TPAD28TP27 TPAD28 TP26 TPAD28TP26 TPAD28 TP24 TPAD28TP24 TPAD28 TP25 TPAD28TP25 TPAD28

RN17

R324 33R2J-2-GPR324 33R2J-2-GP

EC48

SC4D7P50V2CN-1GP

CLK_NB_14M 11

SC27P50V2JN-2-GP

1 2 3

CLKREQ# Internal pull high

R176 261R2F-GP

23 1

SRN0J-6-GP

C306

SC27P50V2JN-2-GP

SRN0J-6-GP

23 1

SRN22-3-GP

C311

X-14D31818M-44GP

RN18

RN20

CPU_CLK 6 CPU_CLK# 6

CLK48_USB 17

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

* RS780 can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode.

OSC_14M_NB

1.1V 158R/90.9RRS780M

Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.

CLK_PCIE_LASSO 10 CLK_PCIE_LASSO# 10

CLK_NB_GFX 11

CLK_NB_GFX# 11

CPU_CLK(200MHz)

RS740 RX780 RS780

66M SE(SINGLE END)

14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref

100M DIFF NC 100M DIFF

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet of

Clock Gen-ICS 9LPR473

100M DIFF 100M DIFF

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

S13 SC

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

344Friday, May 16, 2008

http://hobi-elektronika.net

D D

1D2V_S0

SC4D7U6D3V5KX-3GP

C C

B B

C440

Place close to socket

SC4D7U6D3V5KX-3GP

SCD22U6D3V2KX-1GP

C277

C483

C282

SC180P50V2JN-1GP

SCD22U6D3V2KX-1GP

C442

C268

HT_NB_CPU_CAD_H010 HT_NB_CPU_CAD_L010 HT_NB_CPU_CAD_H110 HT_NB_CPU_CAD_L110 HT_NB_CPU_CAD_H210 HT_NB_CPU_CAD_L210 HT_NB_CPU_CAD_H310 HT_NB_CPU_CAD_L310 HT_NB_CPU_CAD_H410 HT_NB_CPU_CAD_L410 HT_NB_CPU_CAD_H510 HT_NB_CPU_CAD_L510 HT_NB_CPU_CAD_H610 HT_NB_CPU_CAD_L610 HT_NB_CPU_CAD_H710 HT_NB_CPU_CAD_L710 HT_NB_CPU_CAD_H810 HT_NB_CPU_CAD_L810 HT_NB_CPU_CAD_H910 HT_NB_CPU_CAD_L910 HT_NB_CPU_CAD_H1010 HT_NB_CPU_CAD_L1010 HT_NB_CPU_CAD_H1110 HT_NB_CPU_CAD_L1110 HT_NB_CPU_CAD_H1210 HT_NB_CPU_CAD_L1210 HT_NB_CPU_CAD_H1310 HT_NB_CPU_CAD_L1310 HT_NB_CPU_CAD_H1410 HT_NB_CPU_CAD_L1410 HT_NB_CPU_CAD_H1510 HT_NB_CPU_CAD_L1510

HT_NB_CPU_CLK_H010 HT_NB_CPU_CLK_L010 HT_NB_CPU_CLK_H110 HT_NB_CPU_CLK_L110

HT_NB_CPU_CTL_H010 HT_NB_CPU_CTL_L010 HT_NB_CPU_CTL_H110 HT_NB_CPU_CTL_L110

SC180P50V2JN-1GP

C261

(1.2V)1.5A for VLDT

U54A

D1 D2 D3 D4

E3 E2 E1 F1 G3 G2 G1 H1

L3 L2

L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4

L5 M5 M3 M4 N5 P5

J5 K5

N1 P1 P3 P4

SKT-CPU638P-GP-U2

62.10055.111

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

HT LINK

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

HT_CPU_NB_CAD_H0 10 HT_CPU_NB_CAD_L0 10 HT_CPU_NB_CAD_H1 10 HT_CPU_NB_CAD_L1 10 HT_CPU_NB_CAD_H2 10 HT_CPU_NB_CAD_L2 10 HT_CPU_NB_CAD_H3 10 HT_CPU_NB_CAD_L3 10 HT_CPU_NB_CAD_H4 10 HT_CPU_NB_CAD_L4 10 HT_CPU_NB_CAD_H5 10 HT_CPU_NB_CAD_L5 10 HT_CPU_NB_CAD_H6 10 HT_CPU_NB_CAD_L6 10 HT_CPU_NB_CAD_H7 10 HT_CPU_NB_CAD_L7 10 HT_CPU_NB_CAD_H8 10 HT_CPU_NB_CAD_L8 10 HT_CPU_NB_CAD_H9 10 HT_CPU_NB_CAD_L9 10 HT_CPU_NB_CAD_H10 10 HT_CPU_NB_CAD_L10 10 HT_CPU_NB_CAD_H11 10 HT_CPU_NB_CAD_L11 10 HT_CPU_NB_CAD_H12 10 HT_CPU_NB_CAD_L12 10 HT_CPU_NB_CAD_H13 10 HT_CPU_NB_CAD_L13 10 HT_CPU_NB_CAD_H14 10 HT_CPU_NB_CAD_L14 10 HT_CPU_NB_CAD_H15 10 HT_CPU_NB_CAD_L15 10

HT_CPU_NB_CLK_H0 10 HT_CPU_NB_CLK_L0 10 HT_CPU_NB_CLK_H1 10 HT_CPU_NB_CLK_L1 10

HT_CPU_NB_CTL_H0 10 HT_CPU_NB_CTL_L0 10 HT_CPU_NB_CTL_H1 10 HT_CPU_NB_CTL_L1 10

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CPU_HT_LINK I/F_(1/4)

S13 SC

444Friday, May 16, 2008

http://hobi-elektronika.net

0D9V_S3

D D

C291

C289

1D8V_S3

C C

B B

SC4D7U6D3V5KX-3GP

R127

R127 39D2R2F-L-GP

39D2R2F-L-GP

1 2 1 2

R126

R126 39D2R2F-L-GP

39D2R2F-L-GP

MEM_MA0_ODT08 MEM_MA0_ODT18

MEM_MA0_CS#08 MEM_MA0_CS#18

MEM_MA_CKE08 MEM_MA_CKE18

MEM_MA_CLK0_P8 MEM_MA_CLK0_N8 MEM_MA_CLK1_P8 MEM_MA_CLK1_N8

MEM_MA_ADD08 MEM_MA_ADD18 MEM_MA_ADD28 MEM_MA_ADD38 MEM_MA_ADD48 MEM_MA_ADD58 MEM_MA_ADD68 MEM_MA_ADD78 MEM_MA_ADD88 MEM_MA_ADD98 MEM_MA_ADD108 MEM_MA_ADD118 MEM_MA_ADD128 MEM_MA_ADD138 MEM_MA_ADD148 MEM_MA_ADD158

MEM_MA_BANK08 MEM_MA_BANK18 MEM_MA_BANK28

MEM_MA_RAS#8 MEM_MA_CAS#8 MEM_MA_WE#8

C118

C120

SC4D7U6D3V5KX-3GP

TP14TP14

Place near to CPU

SCD22U6D3V2KX-1GP

SC4D7U6D3V5KX-3GP

C266

0D9V_S3

C127

SCD22U6D3V2KX-1GP

C273

SCD22U6D3V2KX-1GP

C258

(0.9V)750mA for VTT

U54B

D10

VTT1

MEM:CMD/CTRL/CLK

C10 B10

MEMZP MEMZN CPU_VTT_SUS_FB

MEM_RSVD_M1

AD10

AF10

AE10

H16 T19

V22 U21 V19

T20 U19 U20 V20

N19 N20 E16 F16 Y16

AA16

P19 P20

N21 M20 N22 M19 M22

M24

K22 R21

K20 V24 K24 K19

R20 R23

R19 T22 T24

J22 J20

L20 L21

L19

L22

J21

MEM:CMD/CTRL/CLK

VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SKT-CPU638P-GP-U2

C124

SC1000P50V3JN-GP

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C284

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

SC1000P50V3JN-GP

C121

SC1000P50V3JN-GP

MEM_RSVD_M2

C280

C287

SC1000P50V3JN-GP

MEM_MB0_ODT0 9 MEM_MB0_ODT1 9

MEM_MB0_CS#0 9 MEM_MB0_CS#1 9

MEM_MB_CKE0 9 MEM_MB_CKE1 9

MEM_MB_CLK0_P 9 MEM_MB_CLK0_N 9 MEM_MB_CLK1_P 9 MEM_MB_CLK1_N 9

MEM_MB_ADD0 9 MEM_MB_ADD1 9 MEM_MB_ADD2 9 MEM_MB_ADD3 9 MEM_MB_ADD4 9 MEM_MB_ADD5 9 MEM_MB_ADD6 9 MEM_MB_ADD7 9 MEM_MB_ADD8 9 MEM_MB_ADD9 9 MEM_MB_ADD10 9 MEM_MB_ADD11 9 MEM_MB_ADD12 9 MEM_MB_ADD13 9 MEM_MB_ADD14 9 MEM_MB_ADD15 9

MEM_MB_BANK0 9 MEM_MB_BANK1 9 MEM_MB_BANK2 9

MEM_MB_RAS# 9 MEM_MB_CAS# 9 MEM_MB_WE# 9

TP17TP17

SC180P50V2JN-1GP

TP9TP9

C128

SC180P50V2JN-1GP

SCD1U10V2KX-4GP

0D9V_S3_VREF

SC1000P50V3JN-GP

C132

C130

C137

SC180P50V2JN-1GP

C152

SCD1U10V2KX-4GP

C131

SC180P50V2JN-1GP

1D8V_S3

R142

R142 1KR2F-3-GP

1KR2F-3-GP

R145

R145 1KR2F-3-GP

1KR2F-3-GP

U54C

MEM_MA_DATA08 MEM_MA_DATA18 MEM_MA_DATA28 MEM_MA_DATA38 MEM_MA_DATA48 MEM_MA_DATA58 MEM_MA_DATA68 MEM_MA_DATA78 MEM_MA_DATA88 MEM_MA_DATA98 MEM_MA_DATA108 MEM_MA_DATA118 MEM_MA_DATA128 MEM_MA_DATA138 MEM_MA_DATA148 MEM_MA_DATA158 MEM_MA_DATA168 MEM_MA_DATA178 MEM_MA_DATA188 MEM_MA_DATA198 MEM_MA_DATA208 MEM_MA_DATA218 MEM_MA_DATA228 MEM_MA_DATA238 MEM_MA_DATA248 MEM_MA_DATA258 MEM_MA_DATA268 MEM_MA_DATA278 MEM_MA_DATA288 MEM_MA_DATA298 MEM_MA_DATA308 MEM_MA_DATA318 MEM_MA_DATA328 MEM_MA_DATA338 MEM_MA_DATA348 MEM_MA_DATA358 MEM_MA_DATA368 MEM_MA_DATA378 MEM_MA_DATA388 MEM_MA_DATA398 MEM_MA_DATA408 MEM_MA_DATA418 MEM_MA_DATA428 MEM_MA_DATA438 MEM_MA_DATA448 MEM_MA_DATA458 MEM_MA_DATA468 MEM_MA_DATA478 MEM_MA_DATA488 MEM_MA_DATA498 MEM_MA_DATA508 MEM_MA_DATA518 MEM_MA_DATA528 MEM_MA_DATA538 MEM_MA_DATA548 MEM_MA_DATA558 MEM_MA_DATA568 MEM_MA_DATA578 MEM_MA_DATA588 MEM_MA_DATA598 MEM_MA_DATA608 MEM_MA_DATA618 MEM_MA_DATA628 MEM_MA_DATA638

MEM_MA_DM08 MEM_MA_DM18 MEM_MA_DM28 MEM_MA_DM38 MEM_MA_DM48 MEM_MA_DM58 MEM_MA_DM68 MEM_MA_DM78

MEM_MA_DQS0_P8 MEM_MA_DQS0_N8 MEM_MA_DQS1_P8 MEM_MA_DQS1_N8 MEM_MA_DQS2_P8 MEM_MA_DQS2_N8 MEM_MA_DQS3_P8 MEM_MA_DQS3_N8 MEM_MA_DQS4_P8 MEM_MA_DQS4_N8 MEM_MA_DQS5_P8 MEM_MA_DQS5_N8 MEM_MA_DQS6_P8 MEM_MA_DQS6_N8 MEM_MA_DQS7_P8 MEM_MA_DQS7_N8

G12

F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14

F14 C17 G17 G18 C19 D22 E20 E18

F18 B22 C23

F20

F22 H24

J19 E21 E22 H20 H22 Y24

AB24 AB22 AA21

W22 W21

Y22

AA22

Y20

AA20 AA18 AB18 AB21 AD21 AD19

Y18

AD17

W16 W14

Y14 Y17

AB17 AB15 AD15 AB13 AD13

Y12

W11 AB14 AA14 AB12 AA12

E12 C15 E19

F24

AC24

Y19

AB16

Y13 G13

H13 G16 G15 C22 C21 G22

G21 AD23 AC23 AB19 AB20

Y15

W15 W12 W13

SKT-CPU638P-GP-U2

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

MEM:DATA

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0

MB_DQS_L0

MB_DQS_H1

MB_DQS_L1

MB_DQS_H2

MB_DQS_L2

MB_DQS_H3

MB_DQS_L3

MB_DQS_H4

MB_DQS_L4

MB_DQS_H5

MB_DQS_L5

MB_DQS_H6

MB_DQS_L6

MB_DQS_H7

MB_DQS_L7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11

A12 B16 A22 E25 AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

MEM_MB_DATA0 9 MEM_MB_DATA1 9 MEM_MB_DATA2 9 MEM_MB_DATA3 9 MEM_MB_DATA4 9 MEM_MB_DATA5 9 MEM_MB_DATA6 9 MEM_MB_DATA7 9 MEM_MB_DATA8 9 MEM_MB_DATA9 9 MEM_MB_DATA10 9 MEM_MB_DATA11 9 MEM_MB_DATA12 9 MEM_MB_DATA13 9 MEM_MB_DATA14 9 MEM_MB_DATA15 9 MEM_MB_DATA16 9 MEM_MB_DATA17 9 MEM_MB_DATA18 9 MEM_MB_DATA19 9 MEM_MB_DATA20 9 MEM_MB_DATA21 9 MEM_MB_DATA22 9 MEM_MB_DATA23 9 MEM_MB_DATA24 9 MEM_MB_DATA25 9 MEM_MB_DATA26 9 MEM_MB_DATA27 9 MEM_MB_DATA28 9 MEM_MB_DATA29 9 MEM_MB_DATA30 9 MEM_MB_DATA31 9 MEM_MB_DATA32 9 MEM_MB_DATA33 9 MEM_MB_DATA34 9 MEM_MB_DATA35 9 MEM_MB_DATA36 9 MEM_MB_DATA37 9 MEM_MB_DATA38 9 MEM_MB_DATA39 9 MEM_MB_DATA40 9 MEM_MB_DATA41 9 MEM_MB_DATA42 9 MEM_MB_DATA43 9 MEM_MB_DATA44 9 MEM_MB_DATA45 9 MEM_MB_DATA46 9 MEM_MB_DATA47 9 MEM_MB_DATA48 9 MEM_MB_DATA49 9 MEM_MB_DATA50 9 MEM_MB_DATA51 9 MEM_MB_DATA52 9 MEM_MB_DATA53 9 MEM_MB_DATA54 9 MEM_MB_DATA55 9 MEM_MB_DATA56 9 MEM_MB_DATA57 9 MEM_MB_DATA58 9 MEM_MB_DATA59 9 MEM_MB_DATA60 9 MEM_MB_DATA61 9 MEM_MB_DATA62 9 MEM_MB_DATA63 9

MEM_MB_DM0 9 MEM_MB_DM1 9 MEM_MB_DM2 9 MEM_MB_DM3 9 MEM_MB_DM4 9 MEM_MB_DM5 9 MEM_MB_DM6 9 MEM_MB_DM7 9

MEM_MB_DQS0_P 9 MEM_MB_DQS0_N 9 MEM_MB_DQS1_P 9 MEM_MB_DQS1_N 9 MEM_MB_DQS2_P 9 MEM_MB_DQS2_N 9 MEM_MB_DQS3_P 9 MEM_MB_DQS3_N 9 MEM_MB_DQS4_P 9 MEM_MB_DQS4_N 9 MEM_MB_DQS5_P 9 MEM_MB_DQS5_N 9 MEM_MB_DQS6_P 9 MEM_MB_DQS6_N 9 MEM_MB_DQS7_P 9 MEM_MB_DQS7_N 9

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CPU_DDR_(2/4)

S13 SC

544Friday, May 16, 2008

1D8V_S0

678

RN31

RN31 SRN300J-1-GP

SRN300J-1-GP

123

4 5

D D

C C

CPU_LDT_RST#16

CPU_PWRGD16 CPU_LDT_STOP#16 CPU_LDT_REQ#11

1D8V_S3

R134

1 2

R133

HDT_RST# LDT_RST#_CPU

1 2

R297 0R0402-PADR297 0R0402-PAD

1 2

R296 0R0402-PADR296 0R0402-PAD

1 2

R295 0R0402-PADR295 0R0402-PAD

1 2

R300 0R0402-PADR300 0R0402-PAD

390R2J-1-GP

1 2

390R2J-1-GP

3D3V_S0

R308

R308 10KR2J-3-GP

10KR2J-3-GP

CPU_LDT_REQ#_CPU

CPU_SIC CPU_SID

1D8V_S0

http://hobi-elektronika.net

LDT_PWROK

FDV301N-NL-GP

Q10

LDT_RST#_CPU 11

LDT_STP#_CPU 11

CPU_CLK3 CPU_CLK#3

2D5V_S0

L15

L15 BLM18PG330SN1D-GP

BLM18PG330SN1D-GP

1 2

C505 SC3900P50V2KX-2GPC505 SC3900P50V2KX-2GP

1 2

C506 SC3900P50V2KX-2GPC506 SC3900P50V2KX-2GP

R294 169R2F-GPR294 169R2F-GP

1D2V_S0

R146 44D2R2F-GPR146 44D2R2F-GP R147 44D2R2F-GPR147 44D2R2F-GP

For HDT DBG

B B

3D3V_S03D3V_S5

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

LDT_PWROK

A A

10KR2J-3-GP

FDV301N-NL-GP

R170

LDT_PWROK#

S D

R171

R171 10KR2J-3-GP

10KR2J-3-GP

S D

CPU_PWRGD_SVID_REG 34

Q11

Q11 FDV301N-NL-GP

FDV301N-NL-GP

LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

+2.5V_RUN_VDDA

(2.5V)250mA for VDDA

SC3300P50V2KX-1GP

SC4D7U6D3V5KX-3GP

1 2

TP51TP51

1 2 1 2

CPU_VDD0_RUN_FB_H34 CPU_VDD0_RUN_FB_L34

CPU_VDD1_RUN_FB_H34 CPU_VDD1_RUN_FB_L34

1 2

R302

R302 0R2J-2-GP

0R2J-2-GP

C288

TP50TP50

TP21TP21 TP23TP23

SC3300P50V2KX-1GP

SCD22U6D3V2KX-1GP

C241

CLKCPU_IN

CLKCPU#_IN

LDT_RST#_CPU LDT_PWROK LDT_STP#_CPU

CPU_SIC CPU_SID CPU_ALERT#

CPU_HTREF0

CPU_HTREF1

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPU_TEST23

CPU_TEST18 CPU_TEST19

CPU_TEST25_H

CPU_TEST25_L

CPU_TEST21 CPU_TEST20

CPU_TEST24

CPU_TEST22 CPU_TEST12 CPU_TEST27

CPU_TEST9

C242

AE6

AB6 G10

AA9 AC9 AD9

AD7

AB8 AE7

AE8 AC8

AA6

F10

AF4 AF5

AF9

H10

AF7

AF8

U54D

VDDA1

VDDA2

CLKIN_H

CLKIN_L

RESET_L

PWROK LDTSTOP_L

LDTREQ_L SIC

SID ALERT_L

HT_REF0

HT_REF1

VDD0_FB_H

VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19

TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

SKT-CPU638P-GP-U2

CPU_DBREQ# CPU_TEST27

CPU_TEST12 CPU_TEST15 CPU_TEST14 CPU_TEST18 CPU_TEST19 CPU_TEST21 CPU_TEST20 CPU_TEST22

CPU_TEST24

1KR2F-3-GP

M11

KEY1

W18

KEY2

SVC

SVD

CPU exceeds to 125

THERMDC THERMDA

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

1 2 1 2

1 2

1 2 1 2

1 2

AF6

CPU_PROCHOT#_LCPU_LDT_REQ#_CPU

AC7 AA8

W7 W8

C133

C133 SC100P50V2JN-3GP

SC100P50V2JN-3GP

W9 Y9

H6 G6

CPU_DBREQ#

E10

CPU_TDO

AE9

CPU_TEST28_H

CPU_TEST28_L

CPU_TEST17

CPU_TEST16

CPU_TEST15

CPU_TEST14

C7 C3

K8 C4

CPU_TEST29H

CPU_TEST29L

H18 H19 AA7 D5 C5

1 2

THERMTRIP_L

PROCHOT_L

MEMHOT_L

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

R344 300R2J-4-GPR344 300R2J-4-GP R124 300R2J-4-GP

R124 300R2J-4-GP R139 300R2J-4-GP

R139 300R2J-4-GP R162 300R2J-4-GP

R162 300R2J-4-GP R160 300R2J-4-GP

R160 300R2J-4-GP R303 300R2J-4-GP

R303 300R2J-4-GP R304 300R2J-4-GP

R304 300R2J-4-GP R128 300R2J-4-GPR128 300R2J-4-GP R136 300R2J-4-GP

R136 300R2J-4-GP R138 300R2J-4-GP

R138 300R2J-4-GP R137 300R2J-4-GPR137 300R2J-4-GP

1D8V_S3

R301

R299

CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L

1D8V_S3

R301 1KR2F-3-GP

1KR2F-3-GP

CPU_VDDNB_RUN_FB_H 34 CPU_VDDNB_RUN_FB_L 34

1 1

R131

CPU_SVC 34 CPU_SVD 34

TP13TP13 TP15TP15

TP22TP22 TP19TP19

TP20TP20 TP18TP18

1D8V_S3

300R2J-4-GP

1 1

LDT_PWROK

R130

R116

300R2J-4-GP

1 2

R129

R129 0R2J-2-GP

0R2J-2-GP

H_THERMDC 21 H_THERMDA 21

TP8TP8 TP6TP6

R122

2K2R2F-GP

C112

1 2

SCD1U16V2ZY-2GP

Q8 MMBT3904-3-GP

MMBT3904-3-GP

CPU_THERMTRIP#_L 17

CPU_PROCHOT# 16

300R2J-4-GP

The Processor has reached a preset maximum operating temperature. 100 I=Active HTC O=FAN

LAYOUT: Route FBCLKOUT_H/L

differentially impedance 80

HDT Connectors

HDT1

CPU_DBREQ#

CPU_DBRDY

CPU_TCK CPU_TMS CPU_TDI

CPU_TRST#

CPU_TDO

1D8V_S3

HDT_RST#

5 7

9 11 13 15 17 19 21 23

SMC-CONN26A-FP

20.F0357.025

2 4

6 8 10 12 14 16 18 20 22 24 26

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CPU_Control&Debug_(3/4)

S13 SC

644Friday, May 16, 2008

http://hobi-elektronika.net

D D

U54F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

C C

B B

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

VSS28

VSS29

VSS30

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

VSS40

VSS41

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

VSS51

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

VSS61

VSS62

H21

VSS63

H23

VSS64

VSS65

SKT-CPU638P-GP-U2

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

+VCC_CORE0

CPU_VDDNB

1D8V_S3

36A for VDD0&VDD1

Bottom Side Decoupling Bottom Side Decoupling

C221

C216

SC22U6D3V5MX-2GP

C222

SC22U6D3V5MX-2GP

C176

C221

C220

SC22U6D3V5MX-2GP

(0.8~1.1V)3A for VDDNB

SC22U6D3V5MX-2GP

C194

C185

C179

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

SC22U6D3V5MX-2GP

C205

SC180P50V2JN-1GP

C208

(1.8V)2A for VDDIO

Bottom Side Decoupling

C234

C149

SC22U6D3V5MX-2GP

C212

C190

C230

SCD22U6D3V2KX-1GP

C190

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

C169

U54E

VDD0_1

VDD0_2

VDD0_3

J11

VDD0_4

J13

VDD0_5

J15

VDD0_6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

VDD0_11

VDD0_12

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

VDD0_17

VDD0_18

VDD0_19

M10

VDD0_20

VDD0_21

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SKT-CPU638P-GP-U2

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

C122

SC180P50V2JN-1GP

C144

C182

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

C146

C147

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

Place near to CPU

C181

SCD22U6D3V2KX-1GP

SCD01U50V2KX-1GP

C162

C153

SC22U6D3V5MX-2GP

C150

C174

SCD22U6D3V2KX-1GP

+VCC_CORE1

C161

C160

SC22U6D3V5MX-2GP

C229

C202

SCD22U6D3V2KX-1GP

SC4D7U6D3V3KX-GP

C163

C209

SC4D7U6D3V3KX-GP

1D8V_S3

C175

C193

SC4D7U6D3V3KX-GP

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

CPU_Power_(4/4)

S13 SC

744Friday, May 16, 2008

http://hobi-elektronika.net

CN10

MEM_MA_ADD05 MEM_MA_ADD15 MEM_MA_ADD25

D D

C C

B B

VREF_DDR_MEM

A A

MEM_MA_ADD35 MEM_MA_ADD45 MEM_MA_ADD55 MEM_MA_ADD65 MEM_MA_ADD75 MEM_MA_ADD85 MEM_MA_ADD95 MEM_MA_ADD105 MEM_MA_ADD115 MEM_MA_ADD125 MEM_MA_ADD135 MEM_MA_ADD145 MEM_MA_ADD155

MEM_MA_BANK25 MEM_MA_BANK05 MEM_MA_BANK15

MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215 MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5 MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5 MEM_MA_DQS7_P5

MEM_MA0_ODT05 MEM_MA0_ODT15

SC2D2U6D3V3KX-GP

SCD1U16V2KX-3GP

C299

Place C2.2uF and 0.1uF < 500mils from DDR connector

C303

102

101

100

105

A10/AP

A11

A12

116

A13

A14

A15

A16/BA2

107

BA0

106

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

DQS0#

DQS1#

DQS2#

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

DQS0

DQS1

DQS2

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

VREF

VSS

202

GND

MH1

DDR2-200P-22-GP-U2

NC#163/TEST

REVERSE TYPE

HI 9.2mm

RAS# CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

VDDSPD

NC#50 NC#69 NC#83

NC#120

108 109

WE#

113 110

115 79

80 30

CK0

32 164

CK1

166 10

DM0

DM1

DM2

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

DIMM1_SA0

198

SA0

DIMM1_SA1

200

SA1

50 69 83 120 163

1D8V_S3

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

MH2

MEM_MA_RAS# 5 MEM_MA_WE# 5 MEM_MA_CAS# 5

MEM_MA0_CS#0 5 MEM_MA0_CS#1 5

MEM_MA_CKE0 5 MEM_MA_CKE1 5

MEM_MA_CLK0_P 5 MEM_MA_CLK0_N 5

MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5

MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5

1 2

R123 10KR2J-3-GPR123 10KR2J-3-GP

1 2

R117 10KR2J-3-GPR117 10KR2J-3-GP

(A0)

TP54

TPAD60

TP57

TPAD60

TP53

TP52

SC2D2U6D3V3KX-GP

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

MEM_MA_CLK0_P

C296

C296 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MA_CLK0_N MEM_MA_CLK1_P

C126

C126 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MA_CLK1_N

DDR_VREF

1D8V_S3

R178

R178 1KR2F-3-GP

1KR2F-3-GP

R177

R177 1KR2F-3-GP

1KR2F-3-GP

C300

C300 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C111

C301

SCD1U10V2KX-4GP

LAYOUT: Locate close to DIMM

SMBDAT0_SB 3,9,17

SMBCLK0_SB 3,9,17

VREF_DDR_MEM

C304

C304 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

A4C1A6

J3 W3

BGA638_50_26SQ_S1G2_OEM

P4G4

R2 V2

T5T6T7

V3D3

W4W5W6

AA3

AA4

AA5

AA1

AA2

AB2

AB3

AB4

AB5

AB1

AC1

AC5

AC3

AC2

AC4

AD4

AD3

AD2

AD1

AD5

AE4P8AE6

AE3

AE2

AE5

AF5

AF4

C114

C114 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

TP58

TPAD60

E8E9E10

U8N8

AA8

AA6

AA7

AB6

AB8

AB7

AC6

AC7

AC8

AD8

AD6

AD7

AE7

AE8

AF6

AF7

AF8

3D3V_S0

A10

B10

C10

D10

F10

G10

H10

J10

K10

L10

M10

N10

N9 P9

P1 0 AA10

R10

T10 AE10

U10

V10

W10

Y10

AA9

AB10

AB9

AC10

AC9

AD10

AD9

AE9

AF10

AF9

A12

A13

A11

B13

B12

B11 AB11

C12

C11

C13

D12

D13

D11

E12H3E14

E13

E11

F13

F11

F12

G12

G13

G11 AD11

H11

H12

H13

J13

J11

J12

K12

K11

K13

L11 AE11

L12

L13

M11

N11

P11K8P17

R11

T13

T11

U13

U12

U11

V11

V12

V13

W13

W12

W11

Y12

Y11

Y13

AA11

AA12

AA13

AB12

AB13

AC13

AC11

AC12

AD12

AD13

AE12

AE13

AF11

AF13

AF12

(A0)

A18

A19

A20

A24

A23

A16

A15D7A17

A21

A22

A14

B21

B20

B16

B25

B24

B14

B23

B22

B19

B18

B15

B17

C20

C25

C23

C24

C18

C14

C15

C22

C17

C16

C19

C21

D14

D18

D21

D15

D16

D19

D20

D24

D22

D23

D17

D25

D26

E25

E21

E22

E24

E16

E17

E15

E20

E18

E19

E26

E23

F16

F14

F19

F18

F20

F22

F23

F17

F21

F26

F24

F25

F15

G24

G17

G25

G14

G23

G18

G21

G22

G15

G26

G16

H26

H18

H19

H21

H22

H14

H23

H24

H25

H16

H17

H20

J16

J17

J18

J20

J14

J26

J21

J25

J24

J22

J23

K23

K26

K16

K17

K20

K24

K19

K21

K22

K25

K14

K15

K18

L15

L17

L22

L24

L23

L16

L26

L14

L21

L25

L18

L19

L20

M16

M21

M22

M25

M23

M24

M20

M17

M18

M19

M26C26

N20

N17

N18

N16

N22

N21U2N23

N24

N25

N26

P24

P22

P25

P20

P21

P26

P16

P18

R19

R20

R16

R26

R23

R24

R25

R21

R22

R18

R17

T21

T15

T23

T18

T16

T17N6T12

T14

T22

T24

T25

T26

T20

U17

U18

U14

U15

U24

U25

U19N19

U21

U22

U20

U23

U26

U16

V19J19 P19

V18

V21

V22

V23P23

V24

V17

V15

V16

V14

V26

V25

W24

W16

W17

W14

W15

W23

W18

W26

W21

W22

W25

Y23

Y24

Y25

Y26

Y21

Y22

Y19

Y20

Y14

Y15

Y16

Y18

Y17

AA25

AA21

AA17

AA14

AA16

AA15

AA19

AA20

AA18

AA22

AA23

AA24

AA26

AB14

AB15J15

AB23

AB16

AB17

AB18

AB19W7AB21

AB22

AB20

AB24

AB25

AB26

AC21

AC14

AC26

AC22

AC23

AC24

AC25

AC18

AC15

AC16

AC17

AC19

AC20

AD19M9AD21

AD23

AD15

AD16

AD17

AD18

AD20

AD26

AD14

AD22M8AD24

AD25

AE21

AE18

AE16

AE14

AE15H15

AE22

AE23

AE24

AE17

AE25

AE19

AE20

AF14

AF16

AF17

AF18

AF19T19

AF15

AF21

AF20

AF23

AF22

AF24

1D8V_S3

SC2D2U6D3V3KX-GP

C456

C276

0D9V_S3

C173

C223

SCD1U10V2KX-4GP

DIMM1

DIMM2

(A4)

Decoupling Capacitor

Place these Caps near DM1

SCD01U50V2KX-1GP

SC2D2U6D3V3KX-GP

C502

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

C158

C279

SCD1U10V2KX-4GP

0D9V_S3

C294

C213

SCD1U10V2KX-4GP

1D8V_S3

1 2

C166

C166 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C269

C269 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C231

C231 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C224

C224 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C253

C253 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C196

C196 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C167

C167 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C257

C257 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C302

C248

C265

C214

SCD1U16V2KX-3GP

1 2

C498

C498 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C228

C228 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C243

C243 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C482

C482 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

C454

C493

C246

C256

C235

SCD1U10V2KX-4GP

C256

SCD1U10V2KX-4GP

0D9V_S3

RN6

4 5

SRN47J-4-GP

SRN47J-4-GP RN7

RN7

4 5

SRN47J-4-GP

RN15

4 5

SRN47J-4-GP

RN5

4 5

SRN47J-4-GP

SRN47J-4-GP RN2

RN2

4 5

SRN47J-4-GP

SRN47J-4-GP RN13

RN13

4 5

SRN47J-4-GP

SRN47J-4-GP RN11

RN11

4 5

SRN47J-4-GP

PARALLEL TERMINATION

SC180P50V2JN-1GP

C198

Put decap near power(0.9V) and pull-up resistor

Do not share the Term resistor between the DDR addess and Control Signals.

C200

C274

SCD1U10V2KX-4GP

C170

C180

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

Title

DDR_DIMM1

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

Date: Sheet of

MEM_MA_ADD0 5 MEM_MA_ADD2 5 MEM_MA_ADD4 5 MEM_MA_BANK1 5

MEM_MA_BANK0 5 MEM_MA_WE# 5 MEM_MA_ADD3 5 MEM_MA_ADD1 5

MEM_MA_ADD15 5 MEM_MA_CKE0 5 MEM_MA_BANK2 5 MEM_MA_CKE1 5

MEM_MA0_ODT1 5 MEM_MA0_CS#1 5 MEM_MA_CAS# 5 MEM_MA_ADD10 5

MEM_MA0_CS#0 5 MEM_MA_RAS# 5 MEM_MA0_ODT0 5 MEM_MA_ADD13 5

MEM_MA_ADD8 5 MEM_MA_ADD5 5 MEM_MA_ADD9 5 MEM_MA_ADD12 5

MEM_MA_ADD14 5 MEM_MA_ADD11 5 MEM_MA_ADD7 5 MEM_MA_ADD6 5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

S13 SC

844Friday, May 16, 2008

http://hobi-elektronika.net

DIMM1

MH1

C305

102

101

100

105

A10/AP

A11

A12

116

A13

A14

A15

A16_BA2

107

BA0

106

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

NC#50

NC#69

NC#83

120

NC#120

163

NC#163/TEST

110

CS0#

115

CS1#

CKE0

CKE1

108

RAS#

113

CAS#

109

WE#

197

SCL

195

SDA

114

ODT0

119

ODT1

VREF

201

GND

SKT-SODIMM200-38GP

62.10017.E31

MEM_MB_ADD05 MEM_MB_ADD15 MEM_MB_ADD25 MEM_MB_ADD35 MEM_MB_ADD45

D D

C C

B B

VREF_DDR_MEM

A A

MEM_MB_ADD55 MEM_MB_ADD65 MEM_MB_ADD75 MEM_MB_ADD85

MEM_MB_ADD95 MEM_MB_ADD105 MEM_MB_ADD115 MEM_MB_ADD125 MEM_MB_ADD135 MEM_MB_ADD145 MEM_MB_ADD155

MEM_MB_BANK25

MEM_MB_BANK05 MEM_MB_BANK15

MEM_MB_DATA05 MEM_MB_DATA15 MEM_MB_DATA25 MEM_MB_DATA35 MEM_MB_DATA45 MEM_MB_DATA55 MEM_MB_DATA65 MEM_MB_DATA75 MEM_MB_DATA85

MEM_MB_DATA95 MEM_MB_DATA105 MEM_MB_DATA115 MEM_MB_DATA125 MEM_MB_DATA135 MEM_MB_DATA145 MEM_MB_DATA155 MEM_MB_DATA165 MEM_MB_DATA175 MEM_MB_DATA185 MEM_MB_DATA195 MEM_MB_DATA205 MEM_MB_DATA215 MEM_MB_DATA225 MEM_MB_DATA235 MEM_MB_DATA245 MEM_MB_DATA255 MEM_MB_DATA265 MEM_MB_DATA275 MEM_MB_DATA285 MEM_MB_DATA295 MEM_MB_DATA305 MEM_MB_DATA315 MEM_MB_DATA325 MEM_MB_DATA335 MEM_MB_DATA345 MEM_MB_DATA355 MEM_MB_DATA365 MEM_MB_DATA375 MEM_MB_DATA385 MEM_MB_DATA395 MEM_MB_DATA405 MEM_MB_DATA415 MEM_MB_DATA425 MEM_MB_DATA435 MEM_MB_DATA445 MEM_MB_DATA455 MEM_MB_DATA465 MEM_MB_DATA475 MEM_MB_DATA485 MEM_MB_DATA495 MEM_MB_DATA505 MEM_MB_DATA515 MEM_MB_DATA525 MEM_MB_DATA535 MEM_MB_DATA545 MEM_MB_DATA555 MEM_MB_DATA565 MEM_MB_DATA575 MEM_MB_DATA585 MEM_MB_DATA595 MEM_MB_DATA605 MEM_MB_DATA615 MEM_MB_DATA625 MEM_MB_DATA635

MEM_MB0_CS#05 MEM_MB0_CS#15

MEM_MB_CKE05 MEM_MB_CKE15 MEM_MB_RAS#5 MEM_MB_CAS#5

MEM_MB_WE#5

SMBCLK0_SB3,8,17

SMBDAT0_SB3,8,17

MEM_MB0_ODT05 MEM_MB0_ODT15

SC2D2U6D3V3KX-GP

SCD1U16V2KX-3GP

C298

LOW 5.2 mm

Place C2.2uF and 0.1uF < 500mils from DDR connector

MH2

DQS0

DQS1

DQS2

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

DQS0#

DQS1#

DQS2#

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

DM0

DM1

DM2

DM3

130

DM4

147

DM5

170

DM6

185

DM7

CK0

CK0#

164

CK1

166

CK1#

DIMM2_SA0

198

SA0

DIMM2_SA1

200

SA1

199

VDD_SPD

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

VSS

REVERSE TYPE

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

202

GND

R119 10KR2J-3-GPR119 10KR2J-3-GP R120 10KR2J-3-GPR120 10KR2J-3-GP

1D8V_S3

1 2 1 2

MEM_MB_DQS0_P 5 MEM_MB_DQS1_P 5 MEM_MB_DQS2_P 5 MEM_MB_DQS3_P 5 MEM_MB_DQS4_P 5 MEM_MB_DQS5_P 5 MEM_MB_DQS6_P 5 MEM_MB_DQS7_P 5 MEM_MB_DQS0_N 5 MEM_MB_DQS1_N 5 MEM_MB_DQS2_N 5 MEM_MB_DQS3_N 5 MEM_MB_DQS4_N 5 MEM_MB_DQS5_N 5 MEM_MB_DQS6_N 5 MEM_MB_DQS7_N 5

MEM_MB_DM0 5 MEM_MB_DM1 5 MEM_MB_DM2 5 MEM_MB_DM3 5 MEM_MB_DM4 5 MEM_MB_DM5 5 MEM_MB_DM6 5 MEM_MB_DM7 5

MEM_MB_CLK0_P 5 MEM_MB_CLK0_N 5 MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5

3D3V_S0

LOW 5.2 mm

(A2)

SC2D2U6D3V3KX-GP

C113

C110

SCD1U10V2KX-4GP

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

MEM_MB_CLK0_P

C295

C295 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK0_N MEM_MB_CLK1_P

C123

C123 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK1_N

0D9V_S3

SCD1U10V2KX-4GP

1D8V_S3

SC2D2U6D3V3KX-GP

C164

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

Do not share the Term resistor between the DDR addess and Control Signals.

3D3V_S0

Decoupling Capacitor

Place these Caps near DM2

SC2D2U6D3V3KX-GP

C466

SC2D2U6D3V3KX-GP

C497

C206

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

C255

SC2D2U6D3V3KX-GP

C457

C159

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

C479

C509

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

C236

C263

C178

SCD1U10V2KX-4GP

C178

SCD1U10V2KX-4GP

SCD01U50V2KX-1GP

C184

SCD1U10V2KX-4GP

C197

SC180P50V2JN-1GP

SCD1U10V2KX-4GP

0D9V_S3

RN12

8 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN10

RN10

1 2 3 4 5

SRN47J-4-GP

RN8

1 2 3 4 5

SRN47J-4-GP

RN16

1 2 3 4 5

SRN47J-4-GP

RN14

1 2 3 4 5

SRN47J-4-GP

RN4

1 2 3 4 5

SRN47J-4-GP

RN3

1 2 3 4 5

SRN47J-4-GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

C215

C211

SCD1U10V2KX-4GP

C225

C239

C270

C244

C237

SCD1U10V2KX-4GP

C260

C251

SCD1U10V2KX-4GP

MEM_MB_ADD8 5

MEM_MB_ADD5 5

MEM_MB_ADD12 5 MEM_MB_ADD9 5

MEM_MB_ADD10 5

MEM_MB_BANK0 5

MEM_MB_ADD1 5 MEM_MB_ADD3 5

MEM_MB_ADD4 5

MEM_MB_ADD2 5

MEM_MB_ADD0 5 MEM_MB_BANK1 5

MEM_MB_BANK2 5

MEM_MB_CKE0 5

MEM_MB_ADD15 5 MEM_MB_CKE1 5

MEM_MB_ADD14 5

MEM_MB_ADD11 5

MEM_MB_ADD7 5 MEM_MB_ADD6 5

MEM_MB0_ODT1 5

MEM_MB0_CS#1 5

MEM_MB_WE# 5 MEM_MB_CAS# 5

MEM_MB0_CS#0 5

MEM_MB_RAS# 5

MEM_MB0_ODT0 5 MEM_MB_ADD13 5

0D9V_S3

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

Date: Sheet of

1D8V_S3

1 2

C171

C171 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C199

C199 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C250

C250 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C168

C168 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C227

C227 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C254

C254 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C157

C157 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C275

C275 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DDR_DIMM2

1 2

C503

C503 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C481

C481 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C475

C475 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C461

C461 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

S13 SC

944Friday, May 16, 2008

U55A

HT_CPU_NB_CAD_H04 HT_CPU_NB_CAD_L04 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H24 HT_CPU_NB_CAD_L24 HT_CPU_NB_CAD_H34 HT_CPU_NB_CAD_L34 HT_CPU_NB_CAD_H44 HT_CPU_NB_CAD_L44

D D

C C

B B

NEW WLAN LAN CARD

A A

A-LINK

HT_CPU_NB_CAD_H54 HT_CPU_NB_CAD_L54 HT_CPU_NB_CAD_H64 HT_CPU_NB_CAD_L64 HT_CPU_NB_CAD_H74 HT_CPU_NB_CAD_L74

HT_CPU_NB_CAD_H84 HT_CPU_NB_CAD_L84 HT_CPU_NB_CAD_H94 HT_CPU_NB_CAD_L94 HT_CPU_NB_CAD_H104 HT_CPU_NB_CAD_L104 HT_CPU_NB_CAD_H114 HT_CPU_NB_CAD_L114 HT_CPU_NB_CAD_H124 HT_CPU_NB_CAD_L124 HT_CPU_NB_CAD_H134 HT_CPU_NB_CAD_L134 HT_CPU_NB_CAD_H144 HT_CPU_NB_CAD_L144 HT_CPU_NB_CAD_H154 HT_CPU_NB_CAD_L154

HT_CPU_NB_CLK_H04 HT_CPU_NB_CLK_L04 HT_CPU_NB_CLK_H14 HT_CPU_NB_CLK_L14

HT_CPU_NB_CTL_H04 HT_CPU_NB_CTL_L04 HT_CPU_NB_CTL_H14 HT_CPU_NB_CTL_L14

1 2

Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24

PCIE_NBRX_NEWTX_P022 PCIE_NBRX_NEWTX_N022 PCIE_NBRX_WLANTX_P122 PCIE_NBRX_WLANTX_N122

PCIE_NBRX_LANTX_P225

PCIE_NBRX_LANTX_N225 PCIE_NBRX_CARDTX_P324 PCIE_NBRX_CARDTX_N324

ALINK_NBRX_SBTX_P016

ALINK_NBRX_SBTX_N016

ALINK_NBRX_SBTX_P116

ALINK_NBRX_SBTX_N116

ALINK_NBRX_SBTX_P216

ALINK_NBRX_SBTX_N216

ALINK_NBRX_SBTX_P316

ALINK_NBRX_SBTX_N316

R288

R288 301R2F-GP

301R2F-GP

HT_RXCALP HT_TXCALP HT_RXCALN

PCIE_NB_LASSO_RX0P PCIE_NB_LASSO_RX0N PCIE_NB_LASSO_TX0N PCIE_NB_LASSO_RX1P PCIE_NB_LASSO_RX1N PCIE_NB_LASSO_RX2P PCIE_NB_LASSO_RX2N PCIE_NB_LASSO_RX3P PCIE_NB_LASSO_RX3N PCIE_NB_LASSO_RX4P PCIE_NB_LASSO_RX4N PCIE_NB_LASSO_RX5P PCIE_NB_LASSO_RX5N PCIE_NB_LASSO_RX6P

PCIE_NB_LASSO_RX6N PCIE_NB_LASSO_RX7P PCIE_NB_LASSO_RX7N

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M-GP-U2

U55B

GFX_RX0P

GFX_RX0N

GFX_RX1P

GFX_RX1N

GFX_RX2P

GFX_RX2N

GFX_RX3P

GFX_RX3N

GFX_RX4P

GFX_RX4N

GFX_RX5P

GFX_RX5N

GFX_RX6P

GFX_RX6N

GFX_RX7P

GFX_RX7N

GFX_RX8P

GFX_RX8N

GFX_RX9P

GFX_RX9N

GFX_RX10P

GFX_RX10N

GFX_RX11P

GFX_RX11N

GFX_RX12P

GFX_RX12N

GFX_RX13P

GFX_RX13N

GFX_RX14P

GFX_RX14N

GFX_RX15P

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

GPP_RX3P

GPP_RX3N

GPP_RX4P

GPP_RX4N

GPP_RX5P

GPP_RX5N

AA8

SB_RX0P

SB_RX0N

AA7

SB_RX1P

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

SB_RX3P

SB_RX3N

RS780M-GP-U2

http://hobi-elektronika.net

PART 1 OF 6

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24

HT_TXCALN

B25

GFX_TX0P_CGFX_TX0P_C

GFX_TX0N_CGFX_TX0N_C

GFX_TX1P_CGFX_TX1P_C

GFX_TX1N_C

GFX_TX2P_CGFX_TX2P_C

GFX_TX2N_CGFX_TX2N_C

GFX_TX3P_CGFX_TX3P_C

GFX_TX3N_CGFX_TX3N_C

D2 E2 E1 F4 F3 F1 F2 H4 H3

GFX_TX8P_C

GFX_TX8N_C

GFX_TX9N_C

GFX_TX9P_C

GFX_TX10N_C

GFX_TX10P_C

GFX_TX11N_C

GFX_TX11P_C

GFX_TX12N_C

GFX_TX12P_C

GFX_TX13N_C

GFX_TX13P_C

GFX_TX14P_C

GFX_TX14N_C

GFX_TX15N_C

GFX_TX15P_C

PCIE_NBTX_NEWRX_P0

AC1

PCIE_NBTX_NEWRX_N0

AC2

PCIE_NBTX_WLANRX_P1

AB4

PCIE_NBTX_WLANRX_N1

AB3

PCIE_NBTX_LANRX_P2

AA2

PCIE_NBTX_LANRX_N2

AA1

PCIE_NBTX_CARDRX_P2

PCIE_NBTX_CARDRX_N2

Y2 Y4 Y3 V1 V2

ALINK_NBTX_SBRX_P0

AD7

ALINK_NBTX_SBRX_N0

AE7

ALINK_NBTX_SBRX_P1

AE6

ALINK_NBTX_SBRX_N1

AD6

ALINK_NBTX_SBRX_P2

AB6

ALINK_NBTX_SBRX_N2

AC6

ALINK_NBTX_SBRX_P3

AD5

ALINK_NBTX_SBRX_N3

AE5

PCE_PCAL

AC8

PCE_NCAL

AB8

Placement: close RS780

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

PART 2 OF 6

GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP PCE_CALRN

Place < 100mils from pin AC8 and AB8

HT_NB_CPU_CAD_H0 4 HT_NB_CPU_CAD_L0 4 HT_NB_CPU_CAD_H1 4 HT_NB_CPU_CAD_L1 4 HT_NB_CPU_CAD_H2 4 HT_NB_CPU_CAD_L2 4 HT_NB_CPU_CAD_H3 4 HT_NB_CPU_CAD_L3 4 HT_NB_CPU_CAD_H4 4 HT_NB_CPU_CAD_L4 4 HT_NB_CPU_CAD_H5 4 HT_NB_CPU_CAD_L5 4 HT_NB_CPU_CAD_H6 4 HT_NB_CPU_CAD_L6 4 HT_NB_CPU_CAD_H7 4 HT_NB_CPU_CAD_L7 4

HT_NB_CPU_CAD_H8 4 HT_NB_CPU_CAD_L8 4 HT_NB_CPU_CAD_H9 4 HT_NB_CPU_CAD_L9 4 HT_NB_CPU_CAD_H10 4 HT_NB_CPU_CAD_L10 4 HT_NB_CPU_CAD_H11 4 HT_NB_CPU_CAD_L11 4 HT_NB_CPU_CAD_H12 4 HT_NB_CPU_CAD_L12 4 HT_NB_CPU_CAD_H13 4 HT_NB_CPU_CAD_L13 4 HT_NB_CPU_CAD_H14 4 HT_NB_CPU_CAD_L14 4 HT_NB_CPU_CAD_H15 4 HT_NB_CPU_CAD_L15 4

HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4

HT_NB_CPU_CTL_H0 4 HT_NB_CPU_CTL_L0 4 HT_NB_CPU_CTL_H1 4 HT_NB_CPU_CTL_L1 4

1 2

C485 SCD1U10V2KX-4GPC485 SCD1U10V2KX-4GP C486 SCD1U10V2KX-4GPC486 SCD1U10V2KX-4GP C487 SCD1U10V2KX-4GPC487 SCD1U10V2KX-4GP C488 SCD1U10V2KX-4GPC488 SCD1U10V2KX-4GP C490 SCD1U10V2KX-4GPC490 SCD1U10V2KX-4GP C489 SCD1U10V2KX-4GPC489 SCD1U10V2KX-4GP C492 SCD1U10V2KX-4GPC492 SCD1U10V2KX-4GP C491 SCD1U10V2KX-4GPC491 SCD1U10V2KX-4GP

C478 SCD1U10V2KX-4GPC478 SCD1U10V2KX-4GP C480 SCD1U10V2KX-4GPC480 SCD1U10V2KX-4GP C476 SCD1U10V2KX-4GPC476 SCD1U10V2KX-4GP C477 SCD1U10V2KX-4GPC477 SCD1U10V2KX-4GP C472 SCD1U10V2KX-4GPC472 SCD1U10V2KX-4GP C473 SCD1U10V2KX-4GPC473 SCD1U10V2KX-4GP C468 SCD1U10V2KX-4GPC468 SCD1U10V2KX-4GP C470 SCD1U10V2KX-4GPC470 SCD1U10V2KX-4GP C465 SCD1U10V2KX-4GPC465 SCD1U10V2KX-4GP C467 SCD1U10V2KX-4GPC467 SCD1U10V2KX-4GP C463 SCD1U10V2KX-4GPC463 SCD1U10V2KX-4GP C464 SCD1U10V2KX-4GPC464 SCD1U10V2KX-4GP C460 SCD1U10V2KX-4GPC460 SCD1U10V2KX-4GP C462 SCD1U10V2KX-4GPC462 SCD1U10V2KX-4GP C458 SCD1U10V2KX-4GPC458 SCD1U10V2KX-4GP C459 SCD1U10V2KX-4GPC459 SCD1U10V2KX-4GP

C451 SCD1U10V2KX-4GPC451 SCD1U10V2KX-4GP C453 SCD1U10V2KX-4GPC453 SCD1U10V2KX-4GP C446 SCD1U10V2KX-4GPC446 SCD1U10V2KX-4GP C444 SCD1U10V2KX-4GPC444 SCD1U10V2KX-4GP C445 SCD1U10V2KX-4GPC445 SCD1U10V2KX-4GP C443 SCD1U10V2KX-4GPC443 SCD1U10V2KX-4GP C450 SCD1U10V2KX-4GPC450 SCD1U10V2KX-4GP C448 SCD1U10V2KX-4GPC448 SCD1U10V2KX-4GP

C434 SCD1U10V2KX-4GPC434 SCD1U10V2KX-4GP C433 SCD1U10V2KX-4GPC433 SCD1U10V2KX-4GP C430 SCD1U10V2KX-4GPC430 SCD1U10V2KX-4GP C429 SCD1U10V2KX-4GPC429 SCD1U10V2KX-4GP C436 SCD1U10V2KX-4GPC436 SCD1U10V2KX-4GP C435 SCD1U10V2KX-4GPC435 SCD1U10V2KX-4GP C438 SCD1U10V2KX-4GPC438 SCD1U10V2KX-4GP C437 SCD1U10V2KX-4GPC437 SCD1U10V2KX-4GP

1 2

R262 1K27R2F-L-GPR262 1K27R2F-L-GP

1 2

R261 2KR2F-3-GPR261 2KR2F-3-GP

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

R282

R282 301R2F-GP

301R2F-GP

R253 0R5J-6-GP

1 2

FUSE-1A6V-2-GP

R465 8K2R2F-1-GPR465 8K2R2F-1-GP

3D3V_S0 3D3V_S0

R455 0R0402-PADR455 0R0402-PAD

1 2

R486 0R0402-PADR486 0R0402-PAD

1 2

R487 0R0402-PADR487 0R0402-PAD

1 2

R488 0R0402-PADR488 0R0402-PAD

1 2

R489 0R0402-PADR489 0R0402-PAD

1 2

R490 0R0402-PADR490 0R0402-PAD

1 2

R491 0R0402-PADR491 0R0402-PAD

1 2

R492 0R0402-PADR492 0R0402-PAD

1 2

PCIE_NB_LASSO_TX0P PCIE_NB_LASSO_TX1P

PCIE_NB_LASSO_TX1N PCIE_NB_LASSO_TX2P PCIE_NB_LASSO_TX2N PCIE_NB_LASSO_TX3P PCIE_NB_LASSO_TX3N PCIE_NB_LASSO_TX4P PCIE_NB_LASSO_TX4N PCIE_NB_LASSO_TX5P PCIE_NB_LASSO_TX5N PCIE_NB_LASSO_TX6P PCIE_NB_LASSO_TX6N PCIE_NB_LASSO_TX7P PCIE_NB_LASSO_TX7N

PCIE_NBTX_C_NEWRX_P0 22 PCIE_NBTX_C_NEWRX_N0 22 PCIE_NBTX_C_WLANRX_P1 22 PCIE_NBTX_C_WLANRX_N1 22 PCIE_NBTX_C_LANRX_P2 25 PCIE_NBTX_C_LANRX_N2 25 PCIE_NBTX_C_CARDRX_P3 24 PCIE_NBTX_C_CARDRX_N3 24

ALINK_NBTX_C_SBRX_P0 16 ALINK_NBTX_C_SBRX_N0 16 ALINK_NBTX_C_SBRX_P1 16 ALINK_NBTX_C_SBRX_N1 16 ALINK_NBTX_C_SBRX_P2 16 ALINK_NBTX_C_SBRX_N2 16 ALINK_NBTX_C_SBRX_P3 16 ALINK_NBTX_C_SBRX_N3 16

1D1V_S0

1 2

R404 8K2R2F-1-GPR404 8K2R2F-1-GP

1 2

MXM_RST#16

CPWRON33

SB_PCIE_WAKE#17,22,25

3D3V_S5

1 2

R494

R494 10KR2J-3-GP

10KR2J-3-GP

3D3V_BUS

3D3V_S03D3V_BUS

CPRSNT2#17

DVI_TXAOUT2+ 15 DVI_TXAOUT2- 15 DVI_TXAOUT1+ 15 DVI_TXAOUT1- 15 DVI_TXAOUT0+ 15 DVI_TXAOUT0- 15 DVI_TXACLK+ 15 DVI_TXACLK- 15

PCIE_NB_LASSO_TX0P PCIE_NB_LASSO_TX0N

PCIE_NB_LASSO_TX1P PCIE_NB_LASSO_TX1N

PCIE_NB_LASSO_TX2P PCIE_NB_LASSO_TX2N

PCIE_NB_LASSO_TX3P PCIE_NB_LASSO_TX3N

R284 33R2J-2-GPR284 33R2J-2-GP R283 33R2J-2-GPR283 33R2J-2-GP R285 33R2J-2-GPR285 33R2J-2-GP

12 12 12

PCIE_NB_LASSO_TX4P PCIE_NB_LASSO_TX4N PCIE_NB_LASSO_TX5P

PCIE_NB_LASSO_TX5N PCIE_NB_LASSO_TX6P

PCIE_NB_LASSO_TX6N PCIE_NB_LASSO_TX7P

PCIE_NB_LASSO_TX7N

CPRSNT2#

NEW WLAN LAN CARD

CN9

NP1

T1 T2 T3 T4 T5 T6 T7 T8

T9 T10 T11 T12 T13

NP3

T14 T15 T16 T17 T18 T19 T20 T21

NP4

T22 T23 T24 T25 T26 T27 T28 T29 T30 T31 T32 T33 T34

NP2

JAE-CONN68-GP-U1

35 B1 B2

B3 B4 B5 B6 B7 B8 B9 B10 B11 B12

B13 B14 B15 B16 B17 B18 B19 B20

B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34

USBP_9+ USBP_9-

PCIE_NB_LASSO_RX0P PCIE_NB_LASSO_RX0N

PCIE_NB_LASSO_RX1P PCIE_NB_LASSO_RX1N

PCIE_NB_LASSO_RX2P PCIE_NB_LASSO_RX2N

PCIE_NB_LASSO_RX3P PCIE_NB_LASSO_RX3N

CLK_PCIE_LASSO 3

PCIE_NB_LASSO_RX4P PCIE_NB_LASSO_RX4N PCIE_NB_LASSO_RX5P

PCIE_NB_LASSO_RX5N PCIE_NB_LASSO_RX6P

PCIE_NB_LASSO_RX6N PCIE_NB_LASSO_RX7P

PCIE_NB_LASSO_RX7N

CLK_PCIE_LASSO# 3

LASSO CONNECTOR

RN37

USBP9-17

USBP9+17

USBP9USBP9+ USBP_9+

Title

Size Document Number Rev

Date: Sheet

ATi-RS780M_HT LINK&PCIE(1/4)

RN37

SRN0J-6-GP

S13 SC

USBP_9-

23 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

10 44Friday, May 16, 2008

1 2

LDT_RST#_CPU6

PLTRST#16,33

D D

LDT_STP#_CPU6

ALLOW_LDTSTOP16

CPU_LDT_REQ#6

C C

1D8V_S0

1 2

R220 300R2J-4-GPR220 300R2J-4-GP

R309 0R2J-2-GP

1 2

R310 0R2J-2-GPR310 0R2J-2-GP

1 2

R290 0R0402-PADR290 0R0402-PAD

4K7R2F-GP

1 2

R289

R289 0R0402-PAD

R291

R291 0R2J-2-GP

0R2J-2-GP

0R0402-PAD

NB_PWRGD

3D3V_S0

R287

4K7R2F-GP

3D3V_S0

R286

NB_ALLOW_LDTSTOP

1D8V_S0

SYSREST#

NB_LDT_STOP#

NB_CRT_GREEN15

L14

1 2

BLM15AG221SN-GP

SC10U10V5KX-2GP

http://hobi-elektronika.net

1D8V_S0

NB_CRT_RED15

NB_CRT_BLUE15

L39

1 2

BLM15AG221SN-GP

SC2D2U6D3V3KX-GP

+1.8V_RUN_PLVDD18

C281

ENABLE External CLK GEN

B B

GPIO MODE STRP_DATA 01 VCC_NB

1.0V 1.1V

3D3V_S0

BLM18PG330SN1D-GP

1D8V_S0

R165

1 2

BLM18BB221SN1D-GP

C286

SC2D2U6D3V3KX-GP

C286

Close to NB ball

R152 140R2F-GPR152 140R2F-GP

1 2

R157 150R2F-1-GPR157 150R2F-1-GP

1 2

R155 150R2F-1-GPR155 150R2F-1-GP

1 2

+1.1V_RUN_PLLVDD1D1V_S0

C494

C278

C278 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D1V_S0

1KR2F-3-GP

1KR2F-3-GP R169

R169

1 2

1KR2F-3-GP

3D3V_S0

L13

1 2

33ohm 3A

R164

1 2

0R0603-PAD

+1.8V_RUN_AVDDQ

NB_CRT_HSYNC15 NB_CRT_VSYNC15

1 2

R167

+3.3V_RUN_AVDD

C264

C264 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

+1.8V_RUN_AVDDDI

C233

SCD1U10V2KX-4GP

+1.8V_VDDA18HTPLL

+1.8V_VDDA18PCIEPLL

NB_PWRGD33

CLK_NBHT_CLK3 CLK_NBHT_CLK#3

CLK_NB_14M3

CLK_NB_GPPSB3 CLK_NB_GPPSB#3

NB_LCD_DDCLK14

NB_LCD_DDCDAT14

DVI_DDCCLK15

DVI_DDCDATA15

R292

1 2

10KR2J-3-GP

R158

1 2

150R2F-1-GP

C283

SC2D2U6D3V3KX-GP

DAC_RSET

1 2

R153 715R2F-GPR153 715R2F-GP

SYSREST# NB_PWRGD NB_LDT_STOP# NB_ALLOW_LDTSTOP

NB_REFCLK_N

CLK_NB_GFX3 CLK_NB_GFX#3

TP64TP64 TP65TP65

STRP_DATA

RS780_AUX_CAL

F12

E12

F14 G15 H15 H14

E17

F17

F15 G18

G17 E18

F18 E19

F19 A11

B11

G14 A12

D14 B12

H17

A10 C10 C12

C25 C24

E11

F11

1 1

B10 G11

3KR2F-GP

U55C

AVDD1 AVDD2 AVDDDI AVSSDI AVDDQ AVSSQ

C_Pr Y COMP_Pb

RED REDb GREEN GREENb BLUE BLUEb

DAC_HSYNC DAC_VSYNC

DAC_SCL

DAC_SDA DAC_RSET PLLVDD

PLLVDD18 PLLVSS

VDDA18HTPLL

VDDA18PCIEPLL1

VDDA18PCIEPLL2

SYSRESET# POWERGOOD LDTSTOP# ALLOW_LDTSTOP

HT_REFCLKP HT_REFCLKN

REFCLK_P/OSCIN REFCLK_N

GFX_REFCLKP

GFX_REFCLKN

GPP_REFCLKP

GPP_REFCLKN

GPPSB_REFCLKP

GPPSB_REFCLKN

I2C_CLK

I2C_DATA

DDC_CLK0/AUX0P

DDC_DATA0/AUX0N

DDC_CLK1/AUX1P

DDC_DATA1/AUX1N STRP_DATA RESERVED

AUX_CAL

RS780M-GP-U2

3D3V_S0

R156

R159

R163

R163 3KR2F-GP

3KR2F-GP

1 2

NB_CRT_VSYNC NB_CRT_HSYNC

R161

R161 3KR2F-GP

3KR2F-GP

PART 3 OF 6

CRT/TVOUT

CLOCKs PLL PWR

MIS.

DDC_DATA0/AUX0N DDC_CLK0/AUX0P

LVTM

STRAP_DEBUG_BUS_GPIO_ENABLE

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC) 0 : Enable 1 : Disable

RS780: Enables Side port memory ( RS780 use HSYNC)

0 : Enable 1 : Disable

SUS_STAT#

Selects Loading of STRAPS From EEPROM

: Bypass the loading of EEPROM straps and use Hardware Default Values

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP

TXCLK_LN TXCLK_UP TXCLK_UN

VDDLTP18

VSSLTP18

VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2

VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7

LVDS_DIGON

LVDS_BLON

LVDS_ENA_BL

TMDS_HPD

HPD

SUS_STAT#

THERMALDIODE_P THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8

TESTMODE_NB

D13

+1.8V_RUN_VDDLP18

+1.8V_RUN_VDDLT18

PANEL_BKEN

SUS_STAT#_R

TXCLK+ 14 TXCLK- 14

TXOUT0+ 14 TXOUT0- 14 TXOUT1+ 14 TXOUT1- 14 TXOUT2+ 14 TXOUT2- 14

SC2D2U6D3V3KX-GP

SC4D7U6D3V3KX-GP

R154 1K27R2F-L-GPR154 1K27R2F-L-GP

1 2

R293 100KR2J-1-GP

1 2

R307 0R0402-PADR307 0R0402-PAD

1 2

NB_THERMDP 21 NB_THERMDN 21

R305

R305 1K8R2F-GP

1K8R2F-GP

C499

L41

1 2

BLM15AG221SN-GP

C500

L42

1 2

BLM15AG221SN-GP

C496

C496 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

NB_LVDS_DIGON 14

PANEL_BKEN 30

DVI_A_HPD 15 SUS_STAT# 17

1D8V_S0

A A

1D8V_S0

15mil width

+1.8V_VDDA18HTPLL

L11

1 2

BLM15AG221SN-GP

C218

SC2D2U6D3V3KX-GP

C218

1D8V_S0

C238

C238 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

BLM18BB221SN1D-GP

15mil width

+1.8V_VDDA18PCIEPLL

L43

1 2

C508

SC2D2U6D3V3KX-GP

C508

Wistron Corporation

C252

C252 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

ATi-RS780M_LVDS&CRT_(2/4)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

S13 SC

11 44Friday, May 16, 2008

http://hobi-elektronika.net

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7

D D

+1.8V_MEM_VDDQ

C C

U28

MEM_BA0 MEM_BA1

MEM_A12 MEM_A11 MEM_A10 MEM_A9 MEM_A8 MEM_A7 MEM_A6 MEM_A5 MEM_A4 MEM_A3 MEM_A2 MEM_A1 MEM_A0

MEM_CLKN MEM_CLKP

B B

+1.8V_MEM_VDDQ

R112

C105

SCD1U10V2KX-4GP

C104

SCD1U10V2KX-4GP

A A

R112 1KR2F-3-GP

1KR2F-3-GP

R111

R111 1KR2F-3-GP

1KR2F-3-GP

1 2

CKE

CS# WE# RAS# CAS# MEM_DM0

MEM_DM1

ODT

MEM_DQS0P MEM_DQS0N

MEM_DQS1P MEM_DQS1N

MEM_VREF_CHIP

MEM_BA2

R251

R251 100R2F-L1-GP-U

100R2F-L1-GP-U

U28

BA0

BA1

A12

A11

A10/AP

CKE

RAS

CAS

LDM

UDM

ODT

LDQS

UDQS

VREF

NC#A2

NC#E2

NC#L1

NC#R3

NC#R7

NC#R8

HYB18T512161B2F-25-GP

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

MEM_DQ15 MEM_DQ14 MEM_DQ13 MEM_DQ12 MEM_DQ11 MEM_DQ10

MEM_DQ9 MEM_DQ8 MEM_DQ7 MEM_DQ6 MEM_DQ5 MEM_DQ4 MEM_DQ3 MEM_DQ2 MEM_DQ1 MEM_DQ0

+1.8V_MEM_VDDQ

VDDL_VRAM

C100

40D2R2F-GP

40D2R2F-GP R265

R265

1 2 1 2

R266

R266 40D2R2F-GP

40D2R2F-GP

L4 BLM18AG601SN-3GP

BLM18AG601SN-3GP

600 ohm @ 100MHz,200mA

Layout Note: 50 mil for VSSDL

SC1U6D3V2KX-GP

C101

MEM_A8 MEM_A9

MEM_A11 MEM_A12 MEM_A13

TP11TP11

MEM_BA0 MEM_BA1 MEM_BA2 MEM_DQS0P

RAS# CAS# WE# CS# CKE ODT

MEM_CLKN

MEM_COMPP MEM_COMPN

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

U55D

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CKP MEM_CKN

MEM_COMPP MEM_COMPN

RS780M-GP-U2

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC

MEM_DQ2/DVO_DE

MEM_DQ3/DVO_D0

MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5

MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7

MEM_DQ12

MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11

MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN

MEM_DQS1P MEM_DQS1N

MEM_DM0

MEM_DM1/DVO_D8

SBD_MEM/DVO_I/F

1D8V_S0

HCB2012KF-221T30-GP

1 2

IOPLLVDD18

IOPLLVDD IOPLLVSS

MEM_VREF

MEM_DQ0

AA18

MEM_DQ1

AA20

MEM_DQ2

AA19

MEM_DQ3

Y19

MEM_DQ4

V17

MEM_DQ5

AA17

MEM_DQ6

AA15

MEM_DQ7

Y15

MEM_DQ8

AC20

MEM_DQ9

AD19

MEM_DQ10MEM_A10

AE22

MEM_DQ11

AC18

MEM_DQ12

AB20

MEM_DQ13

AD22

MEM_DQ14

AC22

MEM_DQ15

AD21 Y17

MEM_DQS0N

W18

MEM_DQS1P

AD20

MEM_DQS1N

AE21

MEM_DM0

W17

MEM_DM1

AE19

+1.8V_IOPLLVDD18

AE23

+1.1V_IOPLLVDDMEM_CLKP

AE24 AD23

MEM_VREF_NB

AE18

220 ohm @ 100MHz,2A

SC10U6D3V5KX-1GP

C117

SC10U6D3V5KX-1GP

C119

SCD1U10V2KX-4GP

MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

15mil width

SC2D2U6D3V3KX-GP

+1.8V_MEM_VDDQ

SCD1U10V2KX-4GP

SC1U6D3V2KX-GP

C426

C431

C106

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

ATi-RS780M_SidePort_(3/4)

1 2

BLM15AG221SN-GP

C138

C138 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

1 2

BLM15AG221SN-GP

C141

C135

SCD1U10V2KX-4GP

+1.8V_MEM_VDDQ

R143

1KR2F-3-GP

R141

1KR2F-3-GP

C422

S13 SC

1D8V_S0

1D1V_S0

SCD1U10V2KX-4GP

C134

SCD1U10V2KX-4GP

C140

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12 44Friday, May 16, 2008

http://hobi-elektronika.net

D D

1D1V_S0

L10

1 2

HCB2012KF-221T30-GP

220 ohm @ 100MHz,2A

1D1V_S0

L40

1 2

HCB2012KF-221T30-GP

220 ohm @ 100MHz,2A

C C

1D2V_S0

L37

1 2

HCB2012KF-221T30-GP

220 ohm @ 100MHz,2A

1D8V_S0

1 2

HCB2012KF-221T30-GP

220 ohm @ 100MHz,2A

B B

1D8V_S0

SC1U6D3V2KX-GP

C249

SC4D7U6D3V3KX-GP

1D8V_S0

SC4D7U6D3V3KX-GP

C441

C165

15mil width

0.6A per ANT Rev1.1, Page3

+1.1V_RUN_VDDHT

SCD1U10V2KX-4GP

C156

C219

SCD1U10V2KX-4GP

C207

0.45A per ANT Rev1.1, Page3

SC4D7U6D3V3KX-GP

C495

SCD1U10V2KX-4GP

20mil width

SC4D7U6D3V3KX-GP

C155

SCD1U10V2KX-4GP

C201

SCD1U10V2KX-4GP

1 2

R257

0R0603-PAD

+1.1V_RUN_VDDHTRX

SCD1U10V2KX-4GP

C484

C247

+1.2V_RUN_VDDHTTX

SCD1U10V2KX-4GP

C148

C151

+1.8V_RUN_VDDA18PCIE

SCD1U10V2KX-4GP

C217

C172

+1.8V_RUN_VDD18_MEM

15mil width

C188

SCD1U10V2KX-4GP

C259

SCD1U10V2KX-4GP

C177

SCD1U10V2KX-4GP

C191

C154

SC1U6D3V2KX-GP

C425

M16 R16

H18 G19

D22

AE25 AD24 AC23 AB22 AA21

W19

U17 R17 M17

M10

R10 AA9

AB9 AD9 AE9 U10

AE11 AD11

J17 K16 L16

P16 T16

F20 E21

B23 A23

Y20 V18 T17 P17

J10 P10 K10

L10

T10

U55E

VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2

RS780M-GP-U2

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13

POWER

VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6

VDD33_1 VDD33_2

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

SCD1U10V2KX-4GP

C98

15mil width

+3.3V_RUN_VDD33

SCD1U10V2KX-4GP

C240

+1.1V_RUN_VDDPCIE

SCD1U10V2KX-4GP

C203

C262

C203

SCD1U10V2KX-4GP

C186

C103

SCD1U10V2KX-4GP

C504

0.7A per ANT Rev1.1, Page3

100mil Width

SC1U6D3V2KX-GP

C183

SCD1U10V2KX-4GP

C232

SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

C267

SCD1U10V2KX-4GP

C204

C189

C245

SCD1U10V2KX-4GP

15mil width

SCD1U10V2KX-4GP

C145

1 2

R306

0R0603-PAD

C136

SCD1U10V2KX-4GP

C142

3D3V_S0

C226

+1.8V_RUN_MEM

C143

L12

1 2

HCB2012KF-221T30-GP

220 ohm @ 100MHz, 2A

+NB_VCORE

1D1V_S0

SC10U6D3V5KX-1GP

SC4D7U6D3V3KX-GP

C125

C210

1 2

HCB2012KF-221T30-GP

C129

220 ohm @ 100MHz, 2A

1D1V_S0

1D8V_S0

M20 N22

R19 R22 R24 R25 H20 U22

W22 W24 W25

AD25

M14 N13

R11 R14

U14 U11 U15

W11

W15 AC12 AA14

AB11 AB15 AB17 AB19 AE20 AB21

A25 D23 E22 G22 G24 G25 H19

L17 L22 L24 L25

P20

V19

Y21

L12

P12 P15

T12

V12

Y18

K11

J22

U55F

VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS780M-GP-U2

PART 6/6

GROUND

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet

Date: Sheet

ATi-RS780M_PWR&GD_(4/4)

S13 SC

13 44Friday, May 16, 2008

http://hobi-elektronika.net

LCD CONNECTOR

D D

C53

SCD1U25V3KX-GP

CN5

BRIGHTNESS31 BLON_OUT30

R77

10KR2F-2-GP

CAMERA POWER

C C

R493 0R3-0-U-GPR493 0R3-0-U-GP

1 2

U18

5V_S0

SCD1U16V2ZY-2GP

B B

C82

IN#5

IN#6

IN#7 IN#88OUT

GND

G5281RC1U-GP

74.05281.093

GND

IN#1

4 3

2 1

CAMERA_EN

R93

R93 100KR2J-1-GP

100KR2J-1-GP

CAMERA_EN 30

C60

C60 SC1U10V2KX-1GP

SC1U10V2KX-1GP

5V_CAM_S0

1 2

R69 0R0402-PADR69 0R0402-PAD

USBP1+17

USBP1-17

TXOUT2-11

TXOUT2+11

TXOUT1-11

TXOUT1+11 TXOUT0+11

TXOUT0-11

TXCLK+11

TXCLK-11

20 19 18 17 16 15 14 13 12 11 10

21 22 23 24 25 26 27 28 29 30 31

40 41

ETY-CONN40C-GP-U1

SCD1U16V2ZY-2GP

SCD1U25V3KX-GP

D_MIC_CLKOUT DMIC_DATAIN D_MIC_CLKOUT DMIC_DATAIN CAMERA_EN

SCD1U16V2ZY-2GP

C91

D_MIC_CLKOUT

EC4

ARRAY_DETC 27

SC33P50V2JN-3GP

SC33P50V2JN-3GP C619

C619

C50

R96 4K7R2F-GPR96 4K7R2F-GP

1 2

R100 4K7R2F-GPR100 4K7R2F-GP

1 2

3D3V_S0

LCDVDD_S0

C96

SC10U10V5KX-2GP

DCBATOUT

SC10U25V6KX-1GP

5V_CAM_S0

C69

SCD1U16V2ZY-2GP

3D3V_S0

NB_LCD_DDCLK 11

NB_LCD_DDCDAT 11

D_MIC_CLKOUT 27

LCDVDD_S0

C90

C90 SC1U10V2KX-1GP

U22

3D3V_S0

SCD1U16V2ZY-2GP

A A

C84

<DUMMY>

IN#5

IN#6

IN#7 IN#88OUT

GND

G5281RC1U-GP

74.05281.093

GND

IN#1

4 3

2 1

SC1U10V2KX-1GP

R109

R109 100KR2J-1-GP

100KR2J-1-GP

NB_LVDS_DIGON 11

TOP VIEW

DMIC_DATAIN

SC33P50V2JN-3GP

SC33P50V2JN-3GP C653

C653

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet of

Date: Sheet

LCD CONN/CAMERA

DMIC_DATAIN 27

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

S13 SC

14 44Friday, May 16, 2008

+ 30 hidden pages