FUJITSU MB39A104 User Manual

FUJITSU MICROELECTRONICS

DATA SHEET

DS04-27231-5Ea

ASSP For Power Management Applications (General Purpose DC/DC Converter)

2-ch DC/DC Converter IC

with Overcurrent Protection

MB39A104

■ DESCRIPTION

The MB39A104 is a 2-channel DC/DC converter IC using pulse width modulation (PWM), incorporating an overcurrent protection circuit (requiring no current sense resistor). This IC is ideal for down conversion.

Operating at high frequency reduces the value of coil.

This is ideal for built-in power supply such as LCD monitors and ADSL.

This product is covered by US Patent Number 6,147,477.

■ FEATURES

• Built-in timer-latch overcurrent protection circuit (requiring no current sense resistor)

• Power supply voltage range : 7 V to 19 V

• Reference voltage : 5.0 V ± 1 %

• Error amplifier threshold voltage : 1.24 V ± 1 %

• High-frequency operation capability : 1.5 MHz (Max)

• Built-in standby function: 0 µA (Typ)

• Built-in soft-start circuit independent of loads

• Built-in totem-pole type output for P-ch MOS FET

• One type of package (SSOP-24 pin : 1 type)

■ APPLICATION

• LCD monitor/panel

• IP phone

• Printer

• Video capture etc.

2006.8

MB39A104

■ PIN ASSIGNMENTS

(TOP VIEW)

VCCO :

VH :

OUT1 :

VS1 :

ILIM1 :

DTC1 :

VCC :

CSCP :

FB1 :

−INE1 :

CS1 :

RT :

: CTL

: GNDO

: OUT2

: VS2

: ILIM2

: DTC2

: GND

: VREF

: FB2

: −INE2

: CS2

: CT

(FPT-24P-M03)

MB39A104

■ PIN DESCRIPTION

Pin No. Symbol I/O Descriptions

1 VCCO ⎯ Output circuit power supply terminal (Connect to same potential as VCC pin) 2 VH O Power supply terminal for FET drive circuit (VH = V

3 OUT1 O External P-ch MOS FET gate drive terminal

4 VS1 I Overcurrent protection circuit input terminal

Overcurrent protection circuit detection resistor connection terminal. Set

5ILIM1I

6DTC1I

7VCC⎯

8CSCP⎯ Timer-latch short-circuit protection capacitor connection terminal

9 FB1 O Error amplifier (Error Amp 1) output terminal

10 −INE1 I Error amplifier (Error Amp 1) inverted input terminal 11 CS1 ⎯ Soft-start capacitor connection terminal 12 RT ⎯ Triangular wave oscillation frequency setting resistor connection terminal 13 CT ⎯ Triangular wave oscillation frequency setting capacitor connection terminal 14 CS2 ⎯ Soft-start capacitor connection terminal 15 −INE2 I Error amplifier (Error Amp 2) inverted input terminal

16 FB2 O Error amplifier (Error Amp 2) output terminal

overcurrent detection reference voltage depending on external resistor and internal current resource (110 µA at R

PWM comparator block (PWM) input terminal. Compares the lowest voltage among FB1 and DTC1 terminals with triangular wave and controls output.

Power supply terminal for reference power supply and control circuit (Connect to same potential as the VCCO terminal)

T = 24 kΩ)

CC − 5 V)

17 VREF O Reference voltage output terminal

18 GND ⎯

19 DTC2 I

20 ILIM2 I

21 VS2 I Overcurrent protection circuit input terminal

22 OUT2 O External P-ch MOS FET gate drive terminal 23 GNDO ⎯ Output circuit ground terminal (Connect to same potential as GND terminal)

24 CTL I

Output circuit ground terminal (Connect to same potential as GNDO terminal.)

PWM comparator block (PWM) input terminal. Compares the lowest voltage among FB2 and DTC2 terminals with triangular wave and controls output.

Overcurrent protection circuit detection resistor connection terminal. Set overcurrent detection reference voltage depending on external resistor and internal current resource (110 µA at R

Power supply control terminal. Setting the CTL terminal at “L” level places IC in the standby mode.

T = 24 kΩ)

MB39A104

■ BLOCK DIAGRAM

−INE1

10 µA

CS1

FB1

DTC1

VREF

1.24 V

Error Amp1

+ +

L priority

PWM Comp.1

+ +

P-ch

IO = 200 mA at VCCO = 12 V

Current

Protection

Logic

CH1

Drive1

VCCO

OUT1

VS1

ILIM1

−INE2

CS2

FB2

DTC2

CSCP

VREF

10 µA

1.24 V

H: at SCP

+ +

L priority

H priority

SCP Comp.

Error Amp2

+ +

(3.1 V)

SCP

Logic

UVLO

H:UVLO

release

OSC

12 13 1817

RT CT GNDVREF

L priority

PWM Comp.2

+ +

2.5 V

1.5 V

Accuracy

±1%

5.0 V

bias

CH2

Drive2

P-ch

O = 200 mA

at VCCO = 12 V

Current

Protection

Logic

H: at OCP

Bias

Voltage

Error Amp Power Supply

Error Amp Referennce

1.24 V

VREF

VR1

CC − 5 V

Powe r

ON/OFF

CTL

OUT2

VS2

ILIM2

GNDO

VCC

CTL

■ ABSOLUTE MAXIMUM RATINGS

MB39A104

Parameter Symbol Condition

Unit

Min Max

Rating

Power supply voltage V

Output current I

Output peak current I

Power dissipation P

Storage temperature T

CC VCC, VCCO terminal ⎯ 20 V O OUT1, OUT2 terminal ⎯ 60 mA

OP Duty ≤ 5% (t = 1/fOSC×Duty) ⎯ 700 mA

D Ta ≤ +25 °C ⎯ 740* mW

STG ⎯−55 +125 °C

* : The packages are mounted on the epoxy board (10 cm × 10 cm).

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

■ RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Condition

Power supply voltage V

Reference voltage output current I

VH output current I

Input voltage

Control input voltage V

Output current I

Output Peak current I

Oscillation frequency f

CC VCC, VCCO terminal 7 12 19 V

REF VREF terminal −1 ⎯ 0mA

VH VH terminal 0⎯30 mA

INE −INE1, −INE2 terminal 0 ⎯ VCC − 0.9 V DTC DTC1, DTC2 terminal 0 ⎯ VCC − 0.9 V CTL CTL terminal 0 ⎯ 19 V

O OUT1, OUT2 terminal −45 ⎯+45 mA

Duty ≤ 5% (t = 1/fOSC×Duty)

Overcurrent detection

OSC

by ON resistance of FET

Min Typ Max

−450 ⎯+450 mA

100 500 1000 kHz

* 100 500 1500 kHz

Timing capacitor C

Timing resistor R

VH terminal capacitor C

Soft-start capacitor C

Short-circuit detection capacitor C

Reference voltage output capacitor

T ⎯ 39 100 560 pF T ⎯ 11 24 130 kΩ

VH VH terminal ⎯ 0.1 1.0 µF

S CS1, CS2 terminal ⎯ 0.1 1.0 µF

SCP CSCP terminal ⎯ 0.1 1.0 µF

REF VREF terminal ⎯ 0.1 1.0 µF

Operating ambient temperature Ta ⎯−30 +25 +85 °C

Val ue

Unit

* : Refer to“ ■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY”.

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand.

MB39A104

■ ELECTRICAL CHARACTERISTICS

Parameter

Output voltage VREF 17 Ta = +25 °C 4.95 5.00 5.05 V

Output voltage temperature variation

Input stability Line 17 VCC = 7 V to 19 V ⎯ 310mV

voltage

Load stability Load 17 VREF = 0 mA to −1 mA ⎯ 110mV

block [REF]

1.Reference Short-circuit

output current

Threshold voltage

2.Under

voltage lockout

Hysteresis

block [UVLO]

width

protection circuit

Threshold voltage

Input source current

[SCP Logic]

3.Short-circuit

Reset voltage V

detection block

Symbol

∆V

REF/

REF

OS 17 VREF = 1 V −50 −25 −12 mA

TLH 17 VREF = 2.6 2.8 3.0 V

THL 17 VREF = 2.4 2.6 2.8 V

H 17 ⎯⎯0.2* ⎯ V

TH 8 ⎯ 0.68 0.73 0.78 V

CSCP 8 ⎯−1.4 −1.0 −0.6 µA

RST 17 VREF = 2.4 2.6 2.8 V

Pin No Conditions

(VCC = VCCO = 12 V, VREF = 0 mA, Ta = +25 °C)

Val ue

Unit

Min Typ Max

17 Ta = 0 °C to +85 °C ⎯ 0.5* ⎯%

Threshold voltage

[SCP Comp.]

4.Short-circuit

detection block

Oscillation frequency

[OSC]

Frequency temperature

block

6.Soft-

5.Triangular

start

variation

wave oscillator

Charge current ICS 11, 14 CS1 = CS2 = 0 V −14 −10 −6 µA

block

[CS1, CS2]

Threshold voltage

Input bias

block

7.Error amplifier

current

[Error Amp1,

Error Amp2]

Voltage gain A

TH 8 ⎯ 2.8 3.1 3.4 V

OSC 13 CT = 100 pF, RT = 24 kΩ 450 500 550 kHz

∆f

OSC/

OSC

TH 9, 16 FB1 = FB2 = 2 V 1.227 1.240 1.253 V

B 10, 15 −INE1 = −INE2 = 0 V −120 −30 ⎯ nA

V 9, 16 DC ⎯ 100* ⎯ dB

13 Ta = 0 °C to +85 °C ⎯ 1* ⎯%

(Continued)

[Error Amp1,

Error Amp2]

7.Error amplifier block

block

(VCC = VCCO = 12 V, VREF = 0 mA, Ta = +25 °C)

Parameter Symbol Pin No. Conditions

Frequency bandwidth

BW 9, 16 A

OH 9, 16 ⎯ 4.7 4.9 ⎯ V

V = 0 dB ⎯ 1.6* ⎯ MHz

Output voltage

OL 9, 16 ⎯⎯40 200 mV

Output source current

Output sink current I

SOURCE 9, 16 FB1 = FB2 = 2 V ⎯−2 −1mA

SINK 9, 16 FB1 = FB2 = 2 V 150 200 ⎯µA

T0 6, 19 Duty cycle = 0 % 1.4 1.5 ⎯ V

Threshold voltage

T100 6, 19 Duty cycle = Dtr ⎯ 2.5 2.6 V

MB39A104

Val ue

Unit

Min Typ Max

PWM Comp.2]

[PWM Comp.1,

8.PWM comparator

block

9.Overcurrent

10.Bias

[OCP1, OCP2]

protection circuit

[VH]

block

voltage

[Drive1, Drive2]

11.Output block

[CTL]

12.Control block

Input current I

ILIM terminal input current

Offset voltage V

Output voltage VH 2

Output source current

DTC 6, 19 DTC1 = DTC2 = 0.4 V −2.0 −0.6 ⎯µA

LIM 5, 20 RT = 24 kΩ, CT = 100 pF 99 110 121 µA

IO 5, 20 ⎯⎯1* ⎯ mV

VCC = VCCO = 7 V to 19 V VH = 0 mA to 30 mA

VCC−

5.5

VCC−

5.0

VCC−

4.5

OUT1 to OUT4 = 7 V,

ISOURCE 3, 22

Duty ≤ 5 % (t = 1/f

OSC×Duty)

⎯−300 ⎯ mA

OUT1 to OUT4 = 12 V,

Output sink current I

Output ON resistor

SINK 3, 22

OH 3, 22 OUT1 = OUT2 = −45 mA ⎯ 8.0 12.0 Ω

OL 3, 22 OUT1 = OUT2 = 45 mA ⎯ 6.5 9.7 Ω

IH 24 IC Active mode 2 ⎯ 19 V

Duty ≤ 5 % (t = 1/f

OSC×Duty)

⎯ 350 ⎯ mA

CTL input voltage

IL 24 IC Standby mode 0 ⎯ 0.8 V

CTLH 24 CTL = 5 V ⎯ 50 100 µA

Input current

CTLL 24 CTL = 0 V ⎯⎯ 1 µA

Standby current ICCS 1, 17 CTL = 0 V ⎯ 010µA

Power supply current

13.General

*: Standard design value.

CC 1, 17 CTL = 5 V ⎯ 4.0 6.0 mA

MB39A104

■ TYPICAL CHARACTERISTICS

Power Supply Current vs. Power Supply Voltage

Power supply current ICC (mA)

0 5 10 15 20

Power supply voltage VCC (V) Power supply voltage VCC (V)

Ta = +25 °C CTL = 5 V

Reference Voltage vs. Load current

Ta = +25 °C VCC = 12 V CTL = 5 V

Reference Voltage vs. Power Supply Voltage

REF (V)

Reference voltage V

0 5 10 15 20

= +25 °C

Ta CTL = 5 V VREF = 0 mA

Reference Voltage vs. Ambient Temperature

2.0

1.5

1.0

0.5

0.0

−0.5

VCC

= 12 V CTL = 5 V VREF = 0 mA

Reference voltage VREF (V)

0 5 10 15 20 25 30 35

Load current IREF (mA)

CTL terminal Current vs. CTL terminal Voltage

500

400

300

200

100

CTL terminal current ICTL (µA)

0 5 10 15 20

VREF

ICTL

Ta = +25 °C VCC = 12 V VREF = 0 mA

CTL terminal voltage VCTL (V)

Reference voltage VREF (V)

−1.0

−1.5

Reference voltage ∆VREF (%)

−2.0

−40 −20 0 +20 +40 +60 +80 +100

Ambient temperature Ta (°C)

(Continued)

MB39A104

Triangular Wave Oscillation Frequency

vs. Timing Resistor

10000

OSC (kHz)

frequency f

Triangular wave oscillation

1000

100

CT = 560 pF

1 10 100 1000

CT = 220 pF

Timing resistor RT (kΩ)

Ta = +25 °C VCC = 12 V CTL = 5 V

CT = 39 pF

CT = 100 pF

Triangular Wave Upper and Lower Limit Voltage

vs. Triangular Wave Oscillation Frequency

3.2

3.0

2.8

CT (V)

2.6

2.4

2.2

2.0

1.8

1.6

1.4

lower limit voltage V

Triangular wave upper and

1.2

Triangular wave oscillation frequency fOSC (kHz)

= +25 °C

Ta VCC = 12 V CTL = 5 V R

T = 47 kΩ

0 200 400 600 800 1000 1200

Upper

Lower

16001400

Triangular Wave Oscillation Frequency

vs. Timing Capacitor

Triangular wave oscillation

10000

OSC (kHz)

frequency f

1000

100

RT = 130 kΩ

10 100 1000 1000

RT = 68 kΩ

Timing capacitor CT (pF)

Ta = +25 °C VCC = 12 V CTL = 5 V

RT = 11 kΩ

RT = 24 kΩ

Triangular Wave Upper and Lower Limit Voltage

vs. Ambient Temperature

3.2

VCC = 12 V

3.0

CTL = 5 V R

T = 24 kΩ

2.8

CT = 100 pF

CT (V)

2.6

2.4

2.2

2.0

1.8

1.6

1.4

lower limit voltage V

Triangular wave upper and

1.2

−40 −20 0 +20 +40 +60 +80 +100

Ambient temperature Ta ( °C)

Upper

Lower

Triangular Wave Oscillation Frequency

vs. Ambient Temperature

560

540

520

OSC (kHz)

500

480

frequency f

460

Triangular wave oscillation

440

−40 −20 0 +20 +40 +60 +80 +100

Ambient temperature Ta ( °C)

VCC = 12 V CTL = 5 V R

T = 24 kΩ

CT = 100 pF

Triangular Wave Oscillation Frequency

vs. Power supply voltage

560

540

520

OSC (kHz)

500

480

frequency f

460

Triangular wave oscillation

440

0 5 10 15 20

Power supply voltage VCC (V)

Ta = +25 °C CTL = 5 V R

T = 24 kΩ

CT = 100 pF

(Continued)

MB39A104

(Continued)

Error Amplifier, Gain, Phase vs. Frequency

Ta = +25 °C VCC = 12 V

Gain AV (dB)

−10

−20

−30

−40

100 1 k 10 k 100 k 1 M 10 M

Frequency f (Hz)

Power Dissipation vs. Ambient Temperature

1000

800 740

180

−90

−180

240 kΩ

10 kΩ

1 µF

2.4 kΩ

10 kΩ

Phase φ (deg)

(15)

(14)

−

+ +

1.24 V

(16)

Error Amp1

(Error Amp2)

OUT

600

400

200

Power dissipation PD (mW)

−40 −20 0 +20 +40 +60 +80 +100

Ambient temperature Ta ( °C)

MB39A104

■ FUNCTIONS

1. DC/DC Converter Functions

(1) Reference voltage block (REF)

The reference voltage circuit generates a temperature-compensated reference voltage (5.0 V Typ) from the voltage supplied from the VCC terminal (pin 7). The voltage is used as the reference voltage for the IC’s internal circuitry. The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal (pin 17).

(2) Triangular-wave oscillator block (OSC)

The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the CT terminal (pin 13) and RT terminal (pin 12) to generate triangular oscillation waveform amplitude of 1.5 V to 2.5 V. The triangular waveforms are input to the PWM comparator in the IC.

(3) Error amplifier block (Error Amp1, Error Amp2)

The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS1 terminal (pin 11) and CS2 terminal (pin 14) which are the non-inverted input terminal for Error Amp. The use of Error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the DC/DC converter.

(4) PWM comparator block (PWM Comp.1, PWM Comp.2)

The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. The comparator keeps output transistor on while the error amplifier output voltage remain higher than the triangular wave voltage.

(5) Output block (Drive1, Drive2)

The output block is in the totem pole configuration, capable of driving an external P-channel MOS FET.

(6) Bias voltage block (VH)

This bias voltage circuit outputs V circuit outputs the potential equal to V

CC − 5 V(Typ) as minimum potential of the output circuit. In standby mode, this

CC.

MB39A104

2. Control Function

When CTL terminal (pin 24) is “L” level, IC becomes the standby mode. The power supply current is 10 µA (Max) at the standby mode.

On/Off Setting Conditions

CTL Power

L OFF (Standby)

H ON (Operating)

3. Protective Functions

(1) Timer-latch overcurrent protection circuit block (OCP)

The timer-latch overcurrent protection circuit is actuated upon completion of the soft-start period. When an overcurrent flows, the circuit detects the increase in the voltage between the FET’s drain and source using the external FET ON resistor, actuates the timer circuit, and starts charging the capacitor C CSCP terminal (pin 8). If the overcurrent remains flowing beyond the predetermined period of time, latch is set and OUT terminals (pin 3,22) of each channel are fixed at “H” level. And the circuit sets the latch to turn off the external FET. The detection current value can be set by resistor R the ILIM1 terminal (pin 5) and resistor R

LIM2 connected between the drain and the ILIM2 terminal (pin 20).

LIM1 connected between the FET’s drain and

Changing connection enables to detect overcurrent at current sense resistor.

To reset the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal (pin 6) to the “L” level to lower the VREF terminal (pin 17) voltage to 2.4 V (Min) or less. (Refer to “1. Setting Timer-Latch Overcurrent Protection Detection Current” in “■ABOUT TIMER-LATCH PROTECTION CIRCUIT”.)

SCP connected to the

(2) Timer-latch short-circuit protection circuit (SCP Logic, SCP Comp.)

The short-circuit detection comparator (SCP Comp.) detects the output voltage level of Error Amp, and if the error amp output voltage of any channel falls below the short-circuit detection voltage (3.1 V Typ), the timer circuits are actuated to start charging the external capacitor C

SCP connected to the CSCP terminal (pin 8).

When the capacitor voltage reaches about 0.73 V, the circuit is turned off the output transistor and sets the dead time to 100 %. To reset the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal (pin 24) to the “L” level to lower the VREF terminal (pin 17) voltage to 2.4 V (Min) or less. (Refer to “2. Setting Time Constant for Timer-Latch Short-Circuit Protection Circuit” in “■ABOUT TIMER-LATCH PROTECTION CIRCUIT”.)

(3) Under voltage lockout protection circuit (UVLO)

The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the CSCP terminal (pin 8) at the “L” level. The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit.

(4) Protection circuit operating function table

This table refers to output condition when protection circuit is operating.

Operating circuit CS1 CS2 OUT1 OUT2

Overcurrent protection circuit L L H H

Short-circuit protection circuit L L H H

Under-voltage lockout L L H H

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