ASSP F or Pow er Supply Applications (Secondary battery)
DC/DC Converter IC
for Charging Li-ion battery
MB3887
DESCRIPTION
■
The MB3887 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and
enabling output voltage to be set to any desired level from one cell to four cells.
These ICs can dynamically control the secondary batter y’s charge current by detecting a voltage drop in an AC
adapter in order to keep its power constant (dynamically-controlled charging) .
The charging method enables quick charging, f or example, with the A C adapter during operation of a notebook PC.
The MB3887 provides a broad power supply voltage range and low standby current as well as high efficiency,
making it ideal for use as a built-in charging device in products such as notebook PC.
This product is covered by US Patent Number 6,147,477.
FEATURES
■
• Detecting a voltage drop in the AC adapter and dynamically controlling the charge current
(Dynamically-controlled charging)
(Continued)
PACKAGE
■
24-pin plastic SSOP
(FPT-24P-M03)
Page 2
MB3887
(Continued)
• Output voltage setting using external resistor : 1 cell to 4 cells
• High efficiency : 96% (VIN = 19 V, Vo = 16.8 V)
• Wide range of operating supply voltages : 8 V to 25 V
• Output voltage setting accuracy : 4.2 V ± 0.74% (T a = −10 °C to +85 °C , per cell)
• Charging current accuracy : ±5%
• Built-in frequency setting capacitor enables frequency setting using external resistor only
• Oscillation frequency range : 100 kHz to 500 kHz
• Built-in current detection amplifier with wide in-phase input voltage range : 0 V to VCC
• In standby mode, leave output voltage setting resistor open to prevent inefficient current loss
• Built-in standby current function : 0 µA (standard)
• Built-in soft-start function independent of loads
• Built-in totem-pole output stage supporting P-channel MOS FET devices
17RT⎯
18VCC⎯Power supply terminal for reference power supply and control circuit.
19VHOPower supply terminal for FET drive circuit (VH = VCC − 6 V) .
20OUTOExternal FET gate drive terminal.
21VCC (O) ⎯Output circuit power supply terminal.
22CS⎯Soft-start capacitor connection terminal.
23GND⎯Ground terminal.
24+INC2ICurrent detection amplifier (Current Amp2) input terminal.
Setting the CTL terminal at “L” level places the IC in the standby
mode.
Triangular-wave oscillation frequency setting resistor connection
terminal.
4
Page 5
BLOCK DIAGRAM
O
O
)
■
−INE1
UTC1
+INC1
−INC1
+INE1
FB1
−INE2
8
10
<Current Amp1>
13
12
9
7
4
+
× 20
−
<Error Amp1>
VREF
−
+
<PWM Comp.>
+
+
+
−
<OUT>
Drive
MB3887
21
VCC (O
20
OUT
2
UTC2
+INC2
−INC2
+INE2
FB2
−INE3
OUTD
FB3
CS
<Current Amp2>
24
1
3
5
16
11
15
<SOFT>
VREF
22
+
× 20
−
10
µA
<Error Amp2>
VREF
−
+
<Error Amp3>
VREF
−
+
+
4.2 V
45 pF
VCC
Bias
Voltage
<VH>
<UVLO>
(VCC UVLO)
4.2 V
<OSC>
17623
RT
<REF><CTL>
bias
VREF
2.5 V
1.5 V
0.91 V
(0.77 V)
VREF
UVLO
VREF
5.0 V
(V
CC
215 kΩ
+
35 kΩ
−
VCC
GND
− 6 V)
VCC
19
18
14
VH
VCC
CTL
5
Page 6
MB3887
ABSOLUTE MAXIMUM RATINGS
■
ParameterSymbolConditions
Unit
MinMax
Rating
Power supply voltageV
Output currentI
Peak output currentI
Power dissipationP
Storage temperatureT
CC
OUT
OUT
STG
VCC, VCC (O) terminal*
⎯⎯60mA
Duty ≤ 5 %
(t = 1 / f
D
Ta ≤ +25 °C⎯740*
× Duty)
OSC
⎯−55+125°C
2
⎯28V
⎯700mA
1
mW
*1 : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) .
*2 : Refer to “ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY” for details.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
* : Refer to “ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY” for details.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Current detection amplifier gain and phase vs. Frequency
40
20
(dB)
V
0
Gain A
−20
−40
1 k10 k100 k1 M10 M
A
V
φ
Ta = +25 °C
180
90
0
−90
−180
Phase φ (deg)
Frequency f (Hz)
VCC = 19 V
13
+
(24)
×20
−
12
(1)
Current Amp1
(Current Amp2)
12.55 V12.6 V
10
(2)
OU
(Continued)
Page 15
(Continued)
8
7
6
5
4
3
2
1
7
0
Power dissipation vs. Operating ambient temperature
00
40
00
(mW)
D
00
00
00
00
00
00
Power dissipation P
0
−40−2002040608010
Operating ambient temperature Ta ( °C)
MB3887
15
Page 16
MB3887
FUNCTIONAL DESCRIPTION
■
1.DC/DC Converter Unit
(1) Reference voltage block (REF)
The reference voltage generator uses the voltage supplied from the VCC terminal (pin 18) to generate a temperature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC’s internal
circuitry.
This terminal can also be used to obtain a load current to a maximum of 1mA from the reference voltage VREF
terminal (pin 6) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave
oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current amp1) , compares this to
the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charging current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB1 terminal (pin 7) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier (Error Amp2) detects voltage drop of the AC adapter and outputs a PWM control signal.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2
terminal (pin 5) to the −INE2 terminal (pin 4) of the error amplifier, enabling stable phase compensation to the
system.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC conver ter and outputs the PWM
control signal. External output voltage setting resistors can be connected to the error amplifier inverted input
terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3
terminal (pin 15) to the −INE3 terminal (pin 16) of the error amplifier, enabling stable phase compensation to
the system.
Connecting a soft-start capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the
output sense resistor (R
terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the next
stage.
) due to the flow of the charge current, using the +INC1 terminal (pin 13) and −INC1
S
16
Page 17
MB3887
(7) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width conver ter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the
error amplifier output voltage and turns on the external output transistor during the interval in which the triangular
wave voltage is lower than the error amplifier output voltage.
(8) Output block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET.
The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias v oltage b lock
(VH) .
This results in increasing conversion efficiency and suppressing the withstand v oltage of the connected external
transistor in a wide range of input voltages.
(9) Control block (CTL)
Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The supply current is 10 µA at maximum
in the standby mode.)
CTL function table
CTLPowerOUTD
LOFF (Standby) Hi-Z
HON (Active) L
(10) Bias voltage block (VH)
The bias voltage circuit outputs V
mode, this circuit outputs the potential equal to VCC.
−6 V (Typ) as the minimum potential of the output circuit. In the standby
CC
2.Protection Functions
Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF) , which
occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in
breakdown or degradation of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal
reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The system restores voltage supply
when the supply voltage or internal reference voltage reaches the threshold v oltage of the under v oltage lock out
protection circuit.
Protection circuit (UVLO) operation function table
When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.)
OUTDOUTCS
Hi-ZHL
17
Page 18
MB3887
R
R
3.Soft-Start Function
Soft-start block (SOFT)
Connecting a capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an
error amplifier for soft-start detection makes the soft-start time constant, being independent of the output load
of the DC/DC converter.
SETTING THE CHARGING VOLTAGE
■
The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R3,
R4) to the −INE3 terminal (pin 16) . Be sure to select a resistor value that allows you to ignore the on-resistor
(35 Ω, 1mA) of the internal FET connected to the OUTD terminal (pin 11) . In standby mode, the charging
voltage is applied to OUTD termial. Therefore, output v oltage must be adjusted so that v oltage applied to OUTD
terminal is 17 V or less.
Battery charging voltage : V
VO (V) = (R3 + R4) / R4 × 4.2 (V)
O
V
O
B
3
−INE3
16
4
11
OUTD
22
CS
METHOD OF SETTING THE CHARGING CURRENT
■
<Error Amp3>
−
+
+
4.2 V
The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 9) .
If a current exceeding the set v alue attempts to flow, the charge voltage drops according to the set current v alue.
Battery charge current setting voltage : +INE1
+INE1 (V) = 20 × I1 (A) × R
(Ω)
S
METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
■
The triangular wave oscillation frequency can be set b y the timing resistor (RT) connected the RT terminal (pin 17) .
Triangular wave oscillation frequency : f
f
(kHz) := 13630 / RT (kΩ)
OSC
OSC
18
Page 19
MB3887
C
METHOD OF SETTING THE SOFT-START TIME
■
For pre venting rush current upon activation of IC, the IC allows soft-start using the capacitor (Cs) connected to
the CS terminal (pin 22) .
When CTL terminal (pin 14) is placed under “H” level and IC is activated (V
is turned off and the external soft-start capacitor (Cs) connected to the CS terminal is charged at 10 µA.
Error Amp output (FB3 terminal (pin 15) ) is determined by comparison between the lower voltage of the two
non-reverse input terminals (4.2 V and CS terminal voltage) and re v erse input terminal voltage (−INE3 terminal
(pin 16) voltage) . Within the soft-start period (CS terminal voltage < 4.2 V) , FB3 is determined by comparison
between −INE3 terminal voltage and CS terminal voltage, and DC/DC con verter output voltage goes up proportionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor.Soft-start time
is found by the following formula :
Soft-start time : ts (time to output 100 %)
t
(s) := 0.42 × CS (µF)
S
≥ UVLO threshold voltage) , Q2
CC
= 4.9 V
= 4.2 V
= 0 V
Soft-start time: ts
15
FB3
16
−INE3
CS
22
VREF
10 µA10 µA
CS terminal voltage
Comparison with Error Amp block − INE3
voltage.
Error
Amp3
−
+
+
4.2 V
S
Q2
UVLO
Soft-start circuit
19
Page 20
MB3887
V
V
V
E
E
E
■ AC ADAPTOR VOLTAGE DETECTION
With an external resistor connected to the +INE2 terminal (pin 3) , the IC enters the dynamically-controlled
charging mode to reduce the charge current to keep AC adapter po wer constant when the partial potential point
A of the AC adapter voltage (VCC) becomes lower than the voltage at the −INE2 terminal.
AC adapter detection voltage setting : Vth
Vth (V) = (R1 + R2) / R2 × −INE2
<Error Amp2>
−
+
CC
R1
R2
−INE2
A
+INE2
4
3
■ OPERATION TIMING DIAGRAM
rror Amp2 FB2
rror Amp1 FB1
2.5
rror Amp2 FB3
1.5
OUT
Constant voltage controlConstant current control
AC adapter dynamically-
controlled charging
20
Page 21
MB3887
PROCESSING WITHOUT USING THE CURRENT AMP
■
When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , −INC1 terminal
(pin 12) , and −INC2 terminal (pin 1) to VREF, and then leave OUTC1 terminal (pin 10) and OUTC2 terminal
(pin 2) open.
“Open”
+INC2
1312
24
−INC1+INC1
−INC2
1
10
OUTC1
2
OUTC2
6
VREF
Connection when Current Amp is not used
21
Page 22
MB3887
PROCESSING WITHOUT USING OF THE ERROR AMP
■
When Error Amp is not used, leave FB1 terminal (pin 7) , FB2 terminal (pin 5) open and connect the −INE1
terminal (pin 8) and −INE2 terminal (pin 4) to GND and connect +INE1 terminal (pin 9) , and +INE2 terminal (pin
3) , to VREF.
23
GND
“Open”
9
+INE1
+INE2
3
8
−INE1
4
−INE2
7
FB1
5
FB2
6
VREF
Connection when Error Amp is not used
22
Page 23
PROCESSING WITHOUT USING OF THE CS TERMINAL
T
■
When soft-start function is not used, leave the CS terminal (pin 22) open.
22
CS
MB3887
“Open”
Connection when soft-start time is not specified
NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE
■
• Insert a reverse-current prev entive diode at one of the three locations marked * to pre vent re verse current from
the battery.
• When selecting the rev erse current prev ention diode, be sure to consider the re v erse voltage (V
current (I
) of the diode.
R
VCC(O)
21
OUT
20
VH
19
VIN
*
*
AB
I1
*
Battery
RS
BAT
) and reverse
R
23
Page 24
MB3887
THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY
■
Please start up and off the VCC terminal (pin 18) and VCC(O) terminal (pin 21) of the power supply terminal at
the same time. No do occurrence of the bias from the VH terminal (pin 19) , when there is a period of 8 V or
less in the VCC voltage after previously starting up VCC(O). At this time, there is a possibility of leading to
permanent destruction of the device when the voltage of 17 V or more is impressed to the VCC(O) terminal.
Moreover, when earliness VCC falls more than VCC(O) when falling, it is similar.
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(V
BATT× IBATT) /
(V
IN× IIN) × 100
(A)
BATT
Conversion efficiency vs. Charge current
(Constant current mode)
00
Ta = +25 °C
98
VIN = 19 V
96
BATT charge voltage =
set at 12.6 V
94
SW = ON
92
Efficiency η (%) =
(V
BATT× IBATT) /
90
(V
IN× IIN) × 100
88
86
84
82
Conversion efficiency η (%)
80
BATT charge voltage V
BATT
(V)
Conversion efficiency vs. Charge current
(Constant current mode)
00
98
96
94
92
90
88
86
84
82
Conversion efficiency η (%)
80
0 2 4 6 8 10121416182
BATT charge voltage V
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(V
BATT× IBATT) /
(V
IN× IIN) × 100
(V)
BATT
(Continued)
27
Page 28
MB3887
1
0
1
0
1
1
1
1
1
5
2
1
1
1
1
1
5
Conversion efficiency vs. Charge current
(Constant voltage mode)
00
98
96
94
92
90
88
86
84
82
Conversion efficiency η (%)
80
10 m100 m11
BATT charge current I
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(V
BATT× IBATT) /
(V
IN× IIN) × 100
(A)
BATT
BATT voltage vs. BATT charge current
(set at 12.6 V)
8
6
4
(V)
2
BATT
0
8
6
4
BATT voltage V
2
0
Dead Battery MODEDCC MODE
01232.51.50.54
BATT charge current I
Ta = +25 °C VIN = 19 V
BATT : Electronic load
(Product of KIKUSUI PLZ-150W)
DCC : Dynamically-Controlled
BATT
,
(A)
Conversion efficiency vs. Charge current
(Constant current mode)
00
98
96
94
92
90
88
86
84
82
Conversion efficiency η (%)
80
0 2 4 6 810121416182
BATT charge voltage V
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(V
BATT× IBATT) /
(V
IN× IIN) × 100
(V)
BATT
BATT voltage vs. BATT charge current
(set at 16.8 V)
0
8
6
(V)
4
BATT
2
0
8
6
4
BATT voltage V
2
4.53.5
0
Dead Battery MODEDCC MODE
00.511.522.533.544.5
BATT charge current I
BATT : Electronic load,
(Product of KIKUSUI PLZ-150W)
Ta = +25 °C
VIN = 19 V
DCC : Dynamically-Controlled
(A)
BATT
(Continued)
28
Page 29
MB3887
V
0
)
V
0
)
V
V
0
)
V
0
)
Switching waveform constant voltage mode
(set at 12.6 V)
BATT (mV)
100
−100
V
D (V)
Ta = +25 °C
VIN = 19 V
BATT = 1.5 A
98 mVp-p
0
15
10
5
0
01234567891
VBATT
VD
Switching waveform constant voltage mode
(set at 16.8 V)
15
0
Ta = +25 °C
VIN = 19 V
BATT = 1.5 A
58 mVp-p
VBATT
VD
BATT (mV)
100
−100
D (V)
(µs
Switching waveform constant current mode
(set at 12.6 V, with 10 V)
BATT (mV)
100
−100
V
D (V)
Ta = +25 °C
VIN = 19 V
BATT = 3.0 A
98 mVp-p
VBATT
0
V
15
10
5
0
01234567891
D
Switching waveform constant current mode
(set at 16.8 V, with 10 V)
15
0
Ta = +25 °C
VIN = 19 V
BATT = 3.0 A
96 mVp-p
VBATT
V
D
BATT (mV)
100
−100
V
D (V)
(µs
10
5
0
01234567891
(µs
10
5
0
01234567891
(µs
(Continued)
29
Page 30
MB3887
V
s)
V
s)
V
s)
V
s)
(Continued)
Soft-start operating waveform
constant voltage mode
(set at 12.6 V)
BATT (V)
20
Ta = +25 °C, VIN = 19 V
10
BATT = 12 Ω
0
CS (V)
V
V
CTL (V)
4
2
0
5
0
0 2 4 6 8 101214161820
ts = 10.4 ms
Soft-start operating waveform
constant voltage mode
(set at 16.8 V)
BATT (V)
20
Ta = +25 °C, VIN = 19 V
10
BATT = 12 Ω
0
V
CS (V)
4
2
0
ts = 10.4 ms
VBATT
VCS
VCTL
VBATT
VCS
(m
Discharge operating waveform
constant voltage mode
(set at 12.6 V)
BATT (V)
20
10
0
CS (V)
V
4
2
0
V
CTL (V)
VCTL
5
0
0 2 4 6 8 101214161820
Discharge operating waveform
constant voltage mode
(set at 16.8 V)
BATT (V)
20
10
0
V
CS (V)
4
2
0
VBATT
VCS
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
(m
VBATT
VCS
V
CTL (V)
5
0
0 2 4 6 8 101214161820
VCTL
(m
CTL (V)
V
VCTL
5
0
02468101214161820
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
(m
30
Page 31
MB3887
USAGE PRECAUTIONS
■
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should hav e anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
• The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
malfunction.
ORDERING INFORMATION
■
Part numberPackageRemarks
MB3887PFV
24-pin plastic SSOP
(FPT-24P-M03)
31
Page 32
MB3887
PACKAGE DIMENSION
■
24-pin plastic SSOP
(FPT-24P-M03)
INDEX
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) .
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
2
5.60±0.107.60±0.20
*
(.220±.004) (.299±.008)
Details of "A" part
+0.20
–0.10
1.25
.049
(Mounting height)
+.008
–.004
0.25(.010)
112
0.65(.026)
0.10(.004)
0.10(.004)
0.24
.009
+0.08
–0.07
+.003
–.003
0.13(.005)
M
2003 FUJITSU LIMITED F24018S-c-4-5
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
"A"
0~8
˚
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10±0.10
(.004±.004)
(Stand off)
32
Page 33
MB3887
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information, such as descriptions of function and application
circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
information. When you develop equipment incorporating the
device based on such information, you must assume any
responsibility arising out of such use of the information. Fujitsu
assumes no liability for any damages whatsoever arising out of
the use of the information.
Any information in this document, including descriptions of
function and schematic diagrams, shall not be construed as license
of the use or exercise of any intellectual property right, such as
patent right or copyright, or any other right of Fujitsu or any third
party or does Fujitsu warrant non-infringement of any third-party’s
intellectual property right or other right by using such information.
Fujitsu assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result
from the use of information contained herein.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.