Fujitsu MB3887 Schematic [ru]

Page 1
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27709-4E
ASSP F or Pow er Supply Applications (Secondary battery)
DC/DC Converter IC for Charging Li-ion battery
MB3887
The MB3887 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and enabling output voltage to be set to any desired level from one cell to four cells. These ICs can dynamically control the secondary batter y’s charge current by detecting a voltage drop in an AC adapter in order to keep its power constant (dynamically-controlled charging) . The charging method enables quick charging, f or example, with the A C adapter during operation of a notebook PC.
The MB3887 provides a broad power supply voltage range and low standby current as well as high efficiency, making it ideal for use as a built-in charging device in products such as notebook PC. This product is covered by US Patent Number 6,147,477.

FEATURES

• Detecting a voltage drop in the AC adapter and dynamically controlling the charge current (Dynamically-controlled charging)
(Continued)

PACKAGE

24-pin plastic SSOP
(FPT-24P-M03)
Page 2
MB3887
(Continued)
• Output voltage setting using external resistor : 1 cell to 4 cells
• High efficiency : 96% (VIN = 19 V, Vo = 16.8 V)
• Wide range of operating supply voltages : 8 V to 25 V
• Output voltage setting accuracy : 4.2 V ± 0.74% (T a = −10 °C to +85 °C , per cell)
• Charging current accuracy : ±5%
• Built-in frequency setting capacitor enables frequency setting using external resistor only
• Oscillation frequency range : 100 kHz to 500 kHz
• Built-in current detection amplifier with wide in-phase input voltage range : 0 V to VCC
• In standby mode, leave output voltage setting resistor open to prevent inefficient current loss
• Built-in standby current function : 0 µA (standard)
• Built-in soft-start function independent of loads
• Built-in totem-pole output stage supporting P-channel MOS FET devices
2
Page 3

PIN ASSIGNMENT

INC2 :
OUTC2 :
+INE2 :
INE2 :
FB2 :
VREF :
FB1 :
MB3887
(TOP VIEW)
: +INC2
1
2
3
4
5
6
7
24
: GND
23
: CS
22
: VCC (O)
21
: OUT
20
: VH
19
: VCC
18
INE1 :
+INE1 :
OUTC1 :
OUTD :
INC1 :
10
11
12
: RT
8
9
17
16
15
14
13
: INE3
: FB3
: CTL
: +INC1
(FPT-24P-M03)
3
Page 4
MB3887

PIN DESCRIPTION

Pin No. Symbol I/O Descriptions
1 INC2 I Current detection amplifier (Current Amp2) input terminal. 2 OUTC2 O Current detection amplifier (Current Amp2) output terminal. 3 +INE2 I Error amplifier (Error Amp2) non-inverted input terminal. 4 INE2 I Error amplifier (Error Amp2) inverted input terminal. 5 FB2 O Error amplifier (Error Amp2) output terminal. 6 VREF O Reference voltage output terminal. 7 FB1 O Error amplifier (Error Amp1) output terminal. 8 INE1 I Error amplifier (Error Amp1) inverted input terminal 9 +INE1 I Error amplifier (Error Amp1) non-inverted input terminal.
10 OUTC1 O Current detection amplifier (Current Amp1) output terminal.
With IC in standby mode, this terminal is set to “Hi-Z” to prevent loss
11 OUTD O
of current through output voltage setting resistance.
Set CTL terminal to “H” level to output “L” level. 12 INC1 I Current detection amplifier (Current Amp1) input terminal. 13 +INC1 I Current detection amplifier (Current Amp1) input terminal.
Power supply control terminal. 14 CTL I
15 FB3 O Error amplifier (Error Amp3) output terminal. 16 INE3 I Error amplifier (Error Amp3) inverted input terminal.
17 RT 18 VCC Power supply terminal for reference power supply and control circuit.
19 VH O Power supply terminal for FET drive circuit (VH = VCC − 6 V) . 20 OUT O External FET gate drive terminal. 21 VCC (O) Output circuit power supply terminal. 22 CS Soft-start capacitor connection terminal. 23 GND Ground terminal. 24 +INC2 I Current detection amplifier (Current Amp2) input terminal.
Setting the CTL terminal at “L” level places the IC in the standby
mode.
Triangular-wave oscillation frequency setting resistor connection
terminal.
4
Page 5

BLOCK DIAGRAM

O
O
)
INE1 UTC1
+INC1
INC1
+INE1
FB1
INE2
8
10
<Current Amp1>
13 12
9
7 4
+
× 20
<Error Amp1>
VREF
+
<PWM Comp.>
+ + +
<OUT>
Drive
MB3887
21
VCC (O
20
OUT
2
UTC2
+INC2
INC2
+INE2
FB2
INE3
OUTD
FB3
CS
<Current Amp2>
24
1 3
5
16
11
15
<SOFT>
VREF
22
+
× 20
10 µA
<Error Amp2>
VREF
+
<Error Amp3>
VREF
− +
+
4.2 V
45 pF
VCC
Bias
Voltage
<VH>
<UVLO>
(VCC UVLO)
4.2 V
<OSC>
17 6 23 RT
<REF> <CTL>
bias
VREF
2.5 V
1.5 V
0.91 V
(0.77 V)
VREF UVLO
VREF
5.0 V
(V
CC
215 k
+
35 k
VCC
GND
6 V)
VCC
19
18 14
VH
VCC CTL
5
Page 6
MB3887

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Conditions
Unit
Min Max
Rating
Power supply voltage V Output current I
Peak output current I Power dissipation P
Storage temperature T
CC
OUT
OUT
STG
VCC, VCC (O) terminal*
⎯⎯60 mA
Duty 5 % (t = 1 / f
D
Ta ≤ +25 °C 740*
× Duty)
OSC
⎯−55 +125 °C
2
28 V
700 mA
1
mW
*1 : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) . *2 : Refer to “ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY” for details. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
6
Page 7

RECOMMENDED OPERATING CONDITIONS

MB3887
Parameter Symbol Conditions
Power supply voltage V Reference voltage output
current
I
VH terminal output current I
V
Input voltage
V
OUTD terminal output voltage V OUTD terminal output current I
OUTD
CTL terminal input voltage V Output current I
Peak output current I Oscillation frequency f
Timing resistor R Soft-start capacitor C
CC
REF
VH
INE
INC
OUTD
CTL
OUT
OUT
OSC
T
S
Value
Unit
Min Typ Max
VCC, VCC (O) terminal* 8 25 V
INE1 to INE3, +INE1, +INE2 terminal
+INC1, +INC2, INC1,
INC2 terminal
1 0mA
0 30 mA 0 V
0 V
1.8 V
CC
CC
0 17 V 0 2mA 0 25 V ⎯−45 ⎯+45 mA
Duty 5 % (t = 1 / fosc × Duty)
600 ⎯+600 mA
100 290 500 kHz 27 47 130 kΩ ⎯⎯0.022 1.0 µF
V
VH terminal capacitor C Reference voltage output
capacitor
C
Operating ambient temperature
VH
REF
Ta ⎯−30 +25 +85 °C
⎯⎯0.1 1.0 µF ⎯⎯0.1 1.0 µF
* : Refer to “ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY” for details. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
7
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MB3887

ELECTRICAL CHARACTERISTICS

Parameter
Sym-
bol
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Pin No.
Conditions
Min Typ Max
Value
Unit
1. Reference voltage block [REF]
2. Under voltage lockout protec­tion circuit block [UVLO]
3. Soft-start block [SOFT]
4. Triangular waveform os­cillator circuit block [OSC]
V
REF1
6Ta = +25 °C 4.967 5.000 5.041 V
Output voltage
V
REF2
6Ta = −10 °C to +85 °C 4.95 5.00 5.05 V Input stability Line 6 VCC = 8 V to 25 V 310mV Load stability Load 6 VREF = 0 mA to 1 mA 110mV Short-circuit output
current
Ios 6 VREF = 1 V 50 25 12 mA
V
TLH
VCC = VCC (O) ,
18
VCC =
6.2 6.4 6.6 V
Threshold voltage
V
Hysteresis width V
V
THL
H
TLH
VCC = VCC (O) ,
18
VCC =
5.2 5.4 5.6 V
18 VCC = VCC (O) 1.0* V
6VREF = 2.6 2.8 3.0 V Threshold voltage
V
Hysteresis width V
Charge current I
Oscillation frequency
f
THL
CS
OSC
6VREF = 2.4 2.6 2.8 V
6 ⎯⎯0.2 V
H
22 ⎯−14 10 −6 µA
20 RT = 47 k 260 290 320 kHz
Frequency temperature
f/fdt 20 Ta = 30 °C to +85 °C 1* ⎯%
stability
Input offset voltage V
3, 4,
IO
FB1 = FB2 = 2 V 15mV
8, 9 Input bias current I In-phase input
5-1. Error amplifier block [Error Amp1, Error Amp2]
voltage range Voltage gain A Frequency
bandwidth
Output voltage
Output source current
Output sink current I
* : Standard design value.
8
3, 4,
B
8, 9
3, 4,
V
CM
8, 9
5, 7 DC 100* dB
V
100 30 nA
0 V
1.8 V
CC
BW 5, 7 AV = 0 dB 2* MHz
V
V
I
SOURCE
5, 7 4.7 4.9 V
FBH
5, 7 ⎯⎯20 200 mV
FBL
5, 7 FB1 = FB2 = 2 V ⎯−2 1mA
5, 7 FB1 = FB2 = 2 V 150 300 ⎯µA
SINK
(Continued)
Page 9
Parameter
Sym-
bol
MB3887
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Pin No.
Conditions
Min Typ Max
Value
Unit
5-2. Error amplifier block [Error Amp3]
6. Current detec­tion amplifier block [Current Amp1, Current Amp2]
V
Threshold voltage
V
Input current I Voltage gain A Frequency
bandwidth
BW 15 AV = 0 dB 2* MHz
V
Output voltage
V
Output source current
I
SOURCE
Output sink current I OUTD terminal
output leak current OUTD terminal
output ON resistor
I
R
Input offset voltage V
I
+INCH
I
INCH
Input current
I
I
TH1
TH2
INE3
V
FBH
FBL
SINK
LEAK
ON
IO
+INCL
INCL
16 FB3 = 2 V, Ta = +25 °C 4.183 4.200 4.225 V
FB3 = 2 V,
16
Ta = −10 °C to +85 °C
4.169 4.200 4.231 V
16 INE3 = 0 V 100 30 nA
15 DC 100* dB
15 4.7 4.9 V
15 ⎯⎯20 200 mV
15 FB3 = 2 V ⎯−2 1mA
15 FB3 = 2 V 150 300 ⎯µA
11 OUTD = 17 V 01µA
11 OUTD = 1 mA 35 50
1,
+INC1 = +INC2 =
12,
INC1 = INC2 =
13,
3 V to VCC
24
+INC1 = +INC2 =
13,
3 V to VCC,
24
V
= 100 mV
IN
3 ⎯+3mV
20 30 µA
+INC1 = +INC2 =
1, 12
3 V to VCC,
0.1 0.2 µA
Vin = −100 mV
13, 24+INC1 = +INC2 = 0 V,
∆Vin = −100 mV +INC1 = +INC2 = 0 V,
1, 12
Vin = −100 mV
180 120 ⎯µA
195 130 ⎯µA
* : Standard design value
(Continued)
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Page 10
MB3887
Parameter
6. Current detection amplifier block [Current Amp1, Current Amp2]
Sym-
bol
V
OUTC1
V
OUTC2
Current detection voltage
V
OUTC3
V
OUTC4
In-phase input voltage range
V
Voltage gain A
Frequency bandwidth
BW 2, 10 AV = 0 dB 2* MHz
V
OUTCH
Output voltage
V
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Pin No.
Conditions
Min Typ Max
Value
+INC1 = +INC2 =
2, 10
3 V to VCC,
1.9 2.0 2.1 V
∆Vin = −100 mV +INC1 = +INC2 =
2, 10
3 V to VCC,
0.34 0.40 0.46 V
∆Vin = −20 mV +INC1 = +INC2 =
2, 10
0 V to 3 V,
1.8 2.0 2.2 V
∆Vin = −100 mV +INC1 = +INC2 =
2, 10
0 V to 3 V,
0.2 0.4 0.6 V
Vin = 20 mV
1,
CM
12, 13,
0 V
24
+INC1 = +INC2 =
2, 10
V
3 V to VCC,
19 20 21 V/V
Vin = 100 mV
2, 10 4.7 4.9 V 2, 10 ⎯⎯20 200 mV
OUTCL
CC
Unit
V
7. PWM comparator block [PWM Comp.]
* : Standard design value
10
Output source current
Output sink cur­rent
Threshold voltage
I
SOURCE
I
SINK
V
TL
TH
V
2, 10 OUTC1 = OUTC2 = 2 V ⎯−2 1mA
2, 10 OUTC1 = OUTC2 = 2 V 150 300 ⎯µA
5, 7,
Duty cycle = 0 % 1.4 1.5 V
15
5, 7,
Duty cycle = 100 %⎯2.5 2.6 V
15
(Continued)
Page 11
(Continued)
Parameter
Sym-
bol
MB3887
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
Pin No.
Conditions
Min Typ Max
Value
Unit
8. Output block [OUT]
9. Control block [CTL]
10. Bias voltage block [VH]
11. General
Output source current
Output sink current
Output ON resistor
I
SOURCE
I
SINK
R
OH
R
OL
20
20 20 OUT = −45 mA 6.5 9.8
20 OUT = 45 mA 5.0 7.5
Rise time tr1 20
Fall time tf1 20
14 IC Active mode 2 25 V
ON
V
CTL input voltage
V I
CTLH
14 IC Standby mode 0 0.8 V
OFF
14 CTL = 5 V 100 150 µA
Input current
I
Output voltage V
Standby current I Power supply cur-
rent
CTLL
CCS
I
14 CTL = 0 V 01µA
19
H
18
18
CC
OUT = 13 V, Duty 5 % (t = 1 / f
× Duty)
OSC
OUT = 19 V, Duty 5 % (t = 1 / f
× Duty)
OSC
OUT = 3300 pF (Si4435 × 1)
OUT = 3300 pF (Si4435 × 1)
VCC = VCC (O) = 8 V to 25 V, VH = 0 to 30 mA
VCC = VCC (O) , CTL = 0 V
VCC = VCC (O) , CTL = 5 V
⎯−400* mA
400* mA
50* ns
50* ns
VCC 6.5 VCC 6.0 VCC 5.5 V
010µA
812mA
* : Standard design value
11
Page 12
MB3887
6
5
4
3
2
1
0
5
6
5
4
3
2
1
0
5
6
5
4
3
2
1
0
0
5 5 5 5 5 4 4 4 4
0
1
0

TYPICAL CHARACTERISTICS

Power supply current vs. Power supply voltage
Ta = +25 °C
(mA)
CC
CTL = 5 V
Power supply current I
0 5 10 15 20 2
Power supply voltage V
CC
(V)
Reference voltage
vs. Reference voltage output current
Ta = +25 °C
(V)
REF
VCC = 19 V CTL = 5 V
Reference voltage V
0 5 10 15 20 25 3
Reference voltage output current I
REF
(mA)
Reference voltage vs. Power supply voltage
(V)
REF
Ta = +25 °C CTL = 5 V VREF = 0 mA
Reference voltage V
0 5 10 15 20 2
Power supply voltage VCC (V)
Reference voltage
vs. Operating ambient temperature
.08 .06
(V)
REF
.04 .02 .00 .98 .96 .94
Reference voltage V
.92
40 20 0 20 40 60 80 10
VCC = 19 V CTL = 5 V
Operating ambient temperature Ta ( °C)
CTL terminal current, Reference voltage
vs. CTL terminal voltage
000
Ta = +25 °C
900
(µA)
CTL
12
CTL terminal current I
VCC = 19 V
800 700 600 500 400 300 200 100
0
0 5 10 15 20 25
CTL terminal voltage V
VREF
ICTL
(V)
CTL
1 9
(V)
8
REF
7 6 5 4 3 2 1
Reference voltage V
0
(Continued)
Page 13
MB3887
1
0
3 3 3 3 3 2 2 2 2
5
3 3 3 3 3 2 2 2 2 2 2 2 2
0
4 2 4 2 4 4 4 4 4 4 4
0
Triangular wave oscillation frequency
vs. Timing resistor
1 M
(Hz)
OSC
00 k
frequency f
Triangular wave oscillation
10 k
10 100 100
Timing resistor RT (kΩ)
Triangular wave oscillation frequency
vs. Operating ambient temperature
20 15 10 05 00 95
(kHz)
90
OSC
85 80 75 70
frequency f
65
Triangular wave oscillation
60
40 20 0 20 40 60 80 10
Ta = +25 °C VCC = 19 V CTL = 5 V
VCC = 19 V CTL = 5 V RT = 47 k
Triangular wave oscillation frequency
vs. Power supply voltage
40 30 20 10
(kHz)
OSC
00 90 80
frequency f
70
Triangular wave oscillation
60
0 5 10 15 20 2
Power supply voltage VCC (V)
Error amplifier threshold voltage
vs. Operating ambient temperature
.25 .24 .23 .22
(V)
.21
TH
.20 .19 .18
voltage V
.17 .16
Error amplifier threshold
.15
40 20 0 20 40 60 80 10
Ta = +25 °C CTL = 5 V RT = 47 k
VCC = 19 V CTL = 5 V
Operating ambient temperature Ta ( °C)
Operating ambient temperature Ta ( °C)
(Continued)
13
Page 14
MB3887
T
T
T
Error amplifier gain and phase vs. Frequency
V
Ta = +25 °C
180
90
0
90
180
40
A
20
(dB)
V
0
Gain A
20
40
1 k 10 k 100 k 1 M 10 M
φ
Frequency f (Hz)
Error amplifier gain and phase vs. Frequency
40
20
(dB)
V
0
Gain A
20
40
Ta = +25 °C
V
A
φ
180
90
0
90
180
Phase φ (deg)
Phase φ (deg)
IN
IN
10 k
1 µF
10 k
1 µF
VCC = 19 V
4.2 V 240 k
10 k
+
2.4 k
10 k10 k
+
2.4 k
10 k10 k
10 k
8
(4)
9
(3)
4.2 V
16 22
+
Error Amp1
(Error Amp2)
VCC = 19 V
240 k
+
+
Error Amp3
4.2 V
(5)
15
7
OU
OU
14
1 k 10 k 100 k 1 M 10 M
Frequency f (Hz)
Current detection amplifier gain and phase vs. Frequency
40
20
(dB)
V
0
Gain A
20
40
1 k 10 k 100 k 1 M 10 M
A
V
φ
Ta = +25 °C
180
90
0
90
180
Phase φ (deg)
Frequency f (Hz)
VCC = 19 V
13
+
(24)
×20
12
(1)
Current Amp1
(Current Amp2)
12.55 V12.6 V
10
(2)
OU
(Continued)
Page 15
(Continued)
8 7 6 5 4 3 2 1
7
0
Power dissipation vs. Operating ambient temperature
00 40
00
(mW)
D
00 00 00 00 00 00
Power dissipation P
0
40 2002040608010
Operating ambient temperature Ta ( °C)
MB3887
15
Page 16
MB3887

FUNCTIONAL DESCRIPTION

1. DC/DC Converter Unit
(1) Reference voltage block (REF)
The reference voltage generator uses the voltage supplied from the VCC terminal (pin 18) to generate a tem­perature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC’s internal circuitry.
This terminal can also be used to obtain a load current to a maximum of 1mA from the reference voltage VREF terminal (pin 6) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current amp1) , compares this to the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charging current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the FB1 terminal (pin 7) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier (Error Amp2) detects voltage drop of the AC adapter and outputs a PWM control signal. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2
terminal (pin 5) to the −INE2 terminal (pin 4) of the error amplifier, enabling stable phase compensation to the system.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC conver ter and outputs the PWM control signal. External output voltage setting resistors can be connected to the error amplifier inverted input terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3 terminal (pin 15) to the INE3 terminal (pin 16) of the error amplifier, enabling stable phase compensation to the system.
Connecting a soft-start capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the output sense resistor (R terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the next stage.
) due to the flow of the charge current, using the +INC1 terminal (pin 13) and −INC1
S
16
Page 17
MB3887
(7) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width conver ter for controlling the output duty of the error amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the error amplifier output voltage and turns on the external output transistor during the interval in which the triangular wave voltage is lower than the error amplifier output voltage.
(8) Output block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET. The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias v oltage b lock
(VH) . This results in increasing conversion efficiency and suppressing the withstand v oltage of the connected external
transistor in a wide range of input voltages.
(9) Control block (CTL)
Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The supply current is 10 µA at maximum in the standby mode.)
CTL function table
CTL Power OUTD
L OFF (Standby) Hi-Z HON (Active) L
(10) Bias voltage block (VH)
The bias voltage circuit outputs V mode, this circuit outputs the potential equal to VCC.
6 V (Typ) as the minimum potential of the output circuit. In the standby
CC
2. Protection Functions
Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF) , which occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in breakdown or degradation of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The system restores voltage supply when the supply voltage or internal reference voltage reaches the threshold v oltage of the under v oltage lock out protection circuit.
Protection circuit (UVLO) operation function table
When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.)
OUTD OUT CS
Hi-Z H L
17
Page 18
MB3887
R
R
3. Soft-Start Function
Soft-start block (SOFT)
Connecting a capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, being independent of the output load of the DC/DC converter.

SETTING THE CHARGING VOLTAGE

The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R3, R4) to the INE3 terminal (pin 16) . Be sure to select a resistor value that allows you to ignore the on-resistor (35 Ω, 1mA) of the internal FET connected to the OUTD terminal (pin 11) . In standby mode, the charging voltage is applied to OUTD termial. Therefore, output v oltage must be adjusted so that v oltage applied to OUTD terminal is 17 V or less.
Battery charging voltage : V
VO (V) = (R3 + R4) / R4 × 4.2 (V)
O
V
O
B
3
INE3 16
4
11
OUTD
22
CS

METHOD OF SETTING THE CHARGING CURRENT

<Error Amp3>
− +
+
4.2 V
The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 9) . If a current exceeding the set v alue attempts to flow, the charge voltage drops according to the set current v alue.
Battery charge current setting voltage : +INE1
+INE1 (V) = 20 × I1 (A) × R
()
S

METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY

The triangular wave oscillation frequency can be set b y the timing resistor (RT) connected the RT terminal (pin 17) .
Triangular wave oscillation frequency : f
f
(kHz) := 13630 / RT (kΩ)
OSC
OSC
18
Page 19
MB3887
C

METHOD OF SETTING THE SOFT-START TIME

For pre venting rush current upon activation of IC, the IC allows soft-start using the capacitor (Cs) connected to the CS terminal (pin 22) .
When CTL terminal (pin 14) is placed under “H” level and IC is activated (V is turned off and the external soft-start capacitor (Cs) connected to the CS terminal is charged at 10 µA.
Error Amp output (FB3 terminal (pin 15) ) is determined by comparison between the lower voltage of the two non-reverse input terminals (4.2 V and CS terminal voltage) and re v erse input terminal voltage (INE3 terminal (pin 16) voltage) . Within the soft-start period (CS terminal voltage < 4.2 V) , FB3 is determined by comparison between INE3 terminal voltage and CS terminal voltage, and DC/DC con verter output voltage goes up propor­tionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor.Soft-start time is found by the following formula :
Soft-start time : ts (time to output 100 %)
t
(s) := 0.42 × CS (µF)
S
UVLO threshold voltage) , Q2
CC
= 4.9 V = 4.2 V
= 0 V
Soft-start time: ts
15
FB3
16
INE3 CS
22
VREF
10 µA 10 µA
CS terminal voltage Comparison with Error Amp block INE3
voltage.
Error Amp3
− + +
4.2 V
S
Q2
UVLO
Soft-start circuit
19
Page 20
MB3887
V
V
V
E E
E

AC ADAPTOR VOLTAGE DETECTION

With an external resistor connected to the +INE2 terminal (pin 3) , the IC enters the dynamically-controlled charging mode to reduce the charge current to keep AC adapter po wer constant when the partial potential point A of the AC adapter voltage (VCC) becomes lower than the voltage at the INE2 terminal.
AC adapter detection voltage setting : Vth
Vth (V) = (R1 + R2) / R2 × −INE2
<Error Amp2>
+
CC
R1 R2
INE2
A
+INE2
4
3

OPERATION TIMING DIAGRAM

rror Amp2 FB2 rror Amp1 FB1
2.5
rror Amp2 FB3
1.5
OUT
Constant voltage control Constant current control
AC adapter dynamically-
controlled charging
20
Page 21
MB3887

PROCESSING WITHOUT USING THE CURRENT AMP

When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , INC1 terminal (pin 12) , and INC2 terminal (pin 1) to VREF, and then leave OUTC1 terminal (pin 10) and OUTC2 terminal (pin 2) open.
“Open”
+INC2
1312 24
INC1 +INC1
INC2
1
10
OUTC1
2
OUTC2
6
VREF
Connection when Current Amp is not used
21
Page 22
MB3887

PROCESSING WITHOUT USING OF THE ERROR AMP

When Error Amp is not used, leave FB1 terminal (pin 7) , FB2 terminal (pin 5) open and connect the −INE1 terminal (pin 8) and INE2 terminal (pin 4) to GND and connect +INE1 terminal (pin 9) , and +INE2 terminal (pin
3) , to VREF.
23
GND
“Open”
9
+INE1 +INE2
3 8
INE1
4
INE2
7
FB1
5
FB2
6
VREF
Connection when Error Amp is not used
22
Page 23

PROCESSING WITHOUT USING OF THE CS TERMINAL

T
When soft-start function is not used, leave the CS terminal (pin 22) open.
22
CS
MB3887
“Open”
Connection when soft-start time is not specified

NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE

• Insert a reverse-current prev entive diode at one of the three locations marked * to pre vent re verse current from the battery.
• When selecting the rev erse current prev ention diode, be sure to consider the re v erse voltage (V current (I
) of the diode.
R
VCC(O)
21
OUT
20
VH
19
VIN
*
*
A B
I1
*
Battery
RS
BAT
) and reverse
R
23
Page 24
MB3887

THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY

Please start up and off the VCC terminal (pin 18) and VCC(O) terminal (pin 21) of the power supply terminal at the same time. No do occurrence of the bias from the VH terminal (pin 19) , when there is a period of 8 V or less in the VCC voltage after previously starting up VCC(O). At this time, there is a possibility of leading to permanent destruction of the device when the voltage of 17 V or more is impressed to the VCC(O) terminal. Moreover, when earliness VCC falls more than VCC(O) when falling, it is similar.
24
Page 25

APPLICATION EXAMPLE

2
r
AC Adapto
MB3887
O
V
B
R1
A
I1
0.033
Battery
C3
100 µF
VIN = 13.93 V to 25 V
(at 3 cell)
<Error Amp1>
IIN
VIN = 17.65 V to 25 V
(at 4 cell)
VCC (O)
VREF
C1
+
C5
0.1 µF
21
<PWM Comp.>
+
22 µF
<OUT>
+++
Q1
OUT
20
Drive
L1
22 µH
VCC
VREF
<Error Amp2>
+ +
D1
VH
C2
19
CC 6 V)
(V
Bias
Voltage
+
100 µF
Output voltage (Battery
voltage) is adjustable
VCC
2.5 V
1.5 V
<VH>
<UVLO>
VREF
<Error Amp3>
Note:
Set output voltage so
that voltage applied to
OUTD terminal is 17 V or
less.
35 k
215 k
+
0.91 V
(0.77 V)
VREF
UVLO
(VCC UVLO)
+
+
4.2 V
VCC
VCC
18
4.2 V
C7
0.1 µF
CTL 14
<REF> <CTL>
<OSC>
VREF
5.0 V
bias
45 pF
17 6 23
GND
VREF
RT
R2
C9
0.1 µF
47 k
R8
<Current Amp1>
8
10
INE1 OUTC1
100 k
C10
+
× 20
13
INC1
+INC1
A
R9
10 k
5600 pF
10
VREF
<SOFT>
µA
22
CS
C4
0.022 µF
12
B
R12
R14
+INE1
30 k
1 k
9
R13
R15
R16
00 k
FB1
20 k
120
7
Q2
4
INE2
C8
10000 pF
SW
2
OUTC2
R7
22 k
R4
+
× 20
<Current Amp2>
1
INC2
R5
330 k
3
+INE2
24
+INC2
82 k
R6
68 k
R10
FB2
30 k
5
R19
100 k
R11
16
11
INE3
200 k
C6
1500 pF
R17
100 k
R3
330 k
R18
30 k
OUTD
15
FB3
25
Page 26
MB3887

PARTS LIST

COMPONENT ITEM SPECIFICATION VENDOR PARTS No.
Q1 Q2
D1 Diode VF = 0.42 V (Max) , IF = 3 A ROHM RB053L-30
P-ch FET
N-ch FET
VDS = −30 V, ID = ±8 A (Max)
VDS = 60 V, ID = 0.115 A
(Max)
VISHAY SILICONIX VISHAY SILICONIX
Si4435DY
2N7002E
L1 Inductor 22 µH
C1
C2, C3
C4 C5 C6 C7 C8 C9
C10
R1 R2 R3 R4 R5 R6 R7 R8 R9
R10 to R12
R13 R14
R15 R16, R18 R17, R19
OS-CON
Electrolytic Condenser
Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser
Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor
TM
22 µF
100 µF
0.022 µF
0.1 µF
1500 pF
0.1 µF
10000 pF
0.1 µF
5600 pF
0.033 47 k
330 k
82 k
330 k
68 k 22 k
100 k
10 k 30 k 20 k
1 k
120
200 k 100 k
3.5 A,
31.6 m
25 V (10 %) 25 V (10 %)
50 V 16 V 10 V 25 V 10 V 16 V 10 V
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
TDK
SANYO SANYO
TDK
KYOCERA
MURATA MURATA MURATA
KYOCERA
MURATA
SEIDEN TECHNO
KOA KOA KOA KOA KOA KOA KOA
KYOCERA
KOA KOA KOA
ssm KOA KOA
SLF12565T-
220M3R5 25SL22M
25CV100AX
C1608JB1H223K
CM21W5R104K16
GRM39B152K10
GRM39F104KZ25
GRM39B103K10
CM21W5R104K16
GRM39B562K10
RK73Z1J-0D RK73G1J-473D RK73G1J-334D RK73G1J-823D RK73G1J-334D RK73G1J-683D RK73G1J-223D RK73G1J-104D
CR21-103-F RK73G1J-303D RK73G1J-203D RK73G1J-102D
RR0816P121D RK73G1J-204D RK73G1J-104D
Note : VISHAY SILICONIX : VISHAY Intertechnology, Inc.
ROHM : ROHM CO., LTD. TDK : TDK Corporation SANYO : SANYO Electric Co., Ltd. KYOCERA : Kyocera Corporation MURATA : Murata Manufacturing Co., Ltd. SEIDEN TECHNO : SEIDEN TECHNO CO., LTD. KOA : KOA Corporation ssm : SUSUMU Co., Ltd.
OS-CON is a trademark of SANYO Electric Co., Ltd.
26
Page 27

REFERENCE DATA

1
0246810121416
1
0
1
0
MB3887
Conversion efficiency vs. Charge current
(Constant voltage mode)
100
Ta = +25 °C
98
VIN = 19 V BATT charge voltage =
96
set at 12.6 V
94
SW = ON
92
Efficiency η (%) =
BATT × IBATT) /
(V
90
(V
IN × IIN) × 100
88 86 84 82
Conversion efficiency η (%)
80
10 m 100 m 1 10
BATT charge current I
BATT
(A)
Conversion efficiency vs. Charge current
(Constant voltage mode)
00 98 96 94 92 90 88 86 84 82
Conversion efficiency η (%)
80
10 m 100 m 1 1
BATT charge current I
Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (V
BATT × IBATT) /
(V
IN × IIN) × 100
(A)
BATT
Conversion efficiency vs. Charge current
(Constant current mode)
00
Ta = +25 °C
98
VIN = 19 V
96
BATT charge voltage = set at 12.6 V
94
SW = ON
92
Efficiency η (%) = (V
BATT × IBATT) /
90
(V
IN × IIN) × 100
88 86 84 82
Conversion efficiency η (%)
80
BATT charge voltage V
BATT
(V)
Conversion efficiency vs. Charge current
(Constant current mode)
00 98 96 94 92 90 88 86 84 82
Conversion efficiency η (%)
80
0 2 4 6 8 10121416182
BATT charge voltage V
Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (V
BATT × IBATT) /
(V
IN × IIN) × 100
(V)
BATT
(Continued)
27
Page 28
MB3887
1
0
1
0
1 1 1 1 1
5
2 1 1 1 1 1
5
Conversion efficiency vs. Charge current
(Constant voltage mode)
00 98 96 94 92 90 88 86 84 82
Conversion efficiency η (%)
80
10 m 100 m 1 1
BATT charge current I
Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (V
BATT × IBATT) /
(V
IN × IIN) × 100
(A)
BATT
BATT voltage vs. BATT charge current
(set at 12.6 V)
8 6 4
(V)
2
BATT
0 8 6 4
BATT voltage V
2 0
Dead Battery MODE DCC MODE
01232.51.50.5 4
BATT charge current I
Ta = +25 °C VIN = 19 V
BATT : Electronic load (Product of KIKUSUI PLZ-150W)
DCC : Dynamically-Controlled
BATT
,
(A)
Conversion efficiency vs. Charge current
(Constant current mode)
00 98 96 94 92 90 88 86 84 82
Conversion efficiency η (%)
80
0 2 4 6 810121416182
BATT charge voltage V
Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (V
BATT × IBATT) /
(V
IN × IIN) × 100
(V)
BATT
BATT voltage vs. BATT charge current
(set at 16.8 V)
0 8 6
(V)
4
BATT
2 0 8 6 4
BATT voltage V
2
4.53.5
0
Dead Battery MODE DCC MODE
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
BATT charge current I
BATT : Electronic load, (Product of KIKUSUI PLZ-150W)
Ta = +25 °C VIN = 19 V
DCC : Dynamically-Controlled
(A)
BATT
(Continued)
28
Page 29
MB3887
V
0 )
V
0
)
V
V
0 )
V
0
)
Switching waveform constant voltage mode
(set at 12.6 V)
BATT (mV)
100
100
V
D (V)
Ta = +25 °C VIN = 19 V BATT = 1.5 A
98 mVp-p
0
15 10
5 0
01234567891
VBATT
VD
Switching waveform constant voltage mode
(set at 16.8 V)
15
0
Ta = +25 °C VIN = 19 V BATT = 1.5 A
58 mVp-p
VBATT
VD
BATT (mV)
100
100
D (V)
(µs
Switching waveform constant current mode
(set at 12.6 V, with 10 V)
BATT (mV)
100
100
V
D (V)
Ta = +25 °C VIN = 19 V BATT = 3.0 A
98 mVp-p
VBATT
0
V
15 10
5 0
01234567891
D
Switching waveform constant current mode
(set at 16.8 V, with 10 V)
15
0
Ta = +25 °C
VIN = 19 V
BATT = 3.0 A
96 mVp-p
VBATT
V
D
BATT (mV)
100
100
V
D (V)
(µs
10
5 0
01234567891
(µs
10
5 0
01234567891
(µs
(Continued)
29
Page 30
MB3887
V
s)
V
s)
V
s)
V
s)
(Continued)
Soft-start operating waveform
constant voltage mode
(set at 12.6 V)
BATT (V)
20
Ta = +25 °C, VIN = 19 V
10
BATT = 12
0
CS (V)
V
V
CTL (V)
4 2 0
5 0
0 2 4 6 8 101214161820
ts = 10.4 ms
Soft-start operating waveform
constant voltage mode
(set at 16.8 V)
BATT (V)
20
Ta = +25 °C, VIN = 19 V
10
BATT = 12
0
V
CS (V)
4 2 0
ts = 10.4 ms
VBATT
VCS
VCTL
VBATT
VCS
(m
Discharge operating waveform
constant voltage mode
(set at 12.6 V)
BATT (V)
20 10
0
CS (V)
V
4 2 0
V
CTL (V)
VCTL
5 0
0 2 4 6 8 101214161820
Discharge operating waveform
constant voltage mode
(set at 16.8 V)
BATT (V)
20 10
0
V
CS (V)
4 2 0
VBATT
VCS
Ta = +25 °C VIN = 19 V BATT = 12
(m
VBATT
VCS
V
CTL (V)
5 0
0 2 4 6 8 101214161820
VCTL
(m
CTL (V)
V
VCTL
5 0
02468101214161820
Ta = +25 °C
VIN = 19 V
BATT = 12
(m
30
Page 31
MB3887

USAGE PRECAUTIONS

• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
Containers for semiconductor materials should hav e anti-static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 k to 1 M between body and ground.
• Do not apply negative voltages.
The use of negative voltages below 0.3 V may create parasitic transistors on LSI lines, which can cause malfunction.

ORDERING INFORMATION

Part number Package Remarks
MB3887PFV
24-pin plastic SSOP
(FPT-24P-M03)
31
Page 32
MB3887

PACKAGE DIMENSION

24-pin plastic SSOP
(FPT-24P-M03)
INDEX
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
2
5.60±0.10 7.60±0.20
*
(.220±.004) (.299±.008)
Details of "A" part
+0.20 –0.10
1.25 .049
(Mounting height)
+.008 –.004
0.25(.010)
112
0.65(.026)
0.10(.004)
0.10(.004)
0.24 .009
+0.08 –0.07
+.003 –.003
0.13(.005)
M
2003 FUJITSU LIMITED F24018S-c-4-5
Dimensions in mm (inches) . Note : The values in parentheses are reference values.
"A"
0~8
˚
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10±0.10
(.004±.004)
(Stand off)
32
Page 33
MB3887
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0501 © 2005 FUJITSU LIMITED Printed in Japan
Page 34
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