5
4
3
Foxconn MCP61M05
2
1
D D
Fab :A
nVIDIA MCP61 Chipset for AMD M2 CPU
(3/31/2008)
PAGE PAGE CONTENT CONTENT
1
2
3
C C
4
5
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12
13
B B
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A A
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24
01. COVER
02. BLOCK DIAGRAM
03. RESET MAP
04. CLOCK DISTRIBUTION
05. PCI DEVICE / VID TABLE
06. M2-1 Hyper Transport
07. M2-2 DDRII -1
08. M2-2 DDRII -2
09. M2-3 MISC
10. M2-4 Power
11. DDRII SDRAM DIMM1-2
12. DDRII Terminator
13. MCP61_HT
14. MCP61_PCI-E_RGM_VGA
15. MCP61_POWER
16. MCP61_PCI
17. MCP61_SATA_IDE
18. MCP61_HDA_USB
19. PCI_E X16 Slot
20. PCI SLOT 1 2 3
21. SIO IT8716F
22. IDE / Floppy / PS2
23. PLT / COM
24. FAN / HARDWARE MONITOR /VID
25. USB CONNECTORS
25
26. LAN
26
27. PWR CONN / FNT PNL / VBAT
27
28. ACPI VREG
28
29. MCP61 CORE POWER
29
30. VRM
30
31. LAN CONN
31
32. AUDIO ALC888/ALC662
32
33. Power Map
33
34. Modify List
34
35. Optional Part
35
LEADTEK RESEARCH INC. ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS.
THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE.
COPYRIGHT 2002 LEADTEK RESEARCH INC. .
5
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FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Cover
Cover
Cover
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
13 5 Friday, June 27, 2008
13 5 Friday, June 27, 2008
13 5 Friday, June 27, 2008
of
of
of
A C
A C
A C
5
D D
4
3
2
1
MCP61M05 Block Diagram
64-BIT 800/667/533/400MHZ
POWER
SUPPLY
CONNECTOR
2*12 = 24 pin
2*2 = 4 pin (12V)
VREG -> ISL6566 => 3 phase
60 Amp
SOCKET M2
DDRII Memory CH:A
DDRII Memory CH:B
DDRII SDRAM CONN 1
DDRII SDRAM CONN 2
S I/O PWRBTN#
SW PANSWHJ
HT 16X16 2GT/S
C C
B B
FLOPPY CONN
PS2/KB CONN
PARALLEL CONN
SERIAL CONN (COM1)
SERIAL Header (COM2)
PCI Express X16
PCI Express X1
PRIMARY IDE
SATA-II CONN * 4
PCI EXPRESS Lane * 16
PCI EXPRESS Lane * 1
ATA 133
INTEGRATED SATA
SIO
ITE IT8716F/FX
4MB FLASH
LPC BUS V1.0 / 33MHZ
NFORCE
MCP61
692 Ball BGA
PCI V2.3 / 33MHZ
HDA
X8 USB ( V2.0 EHCI / V1.1 OHCI )
RGMII/MII
PCI SLOT 1
PCI SLOT 2
Azalia / ALC888 (7.1 Audio)
BACK PANEL CONN => 4 Port
USB2 PORTS 7,8
USB2 PORTS 1,6
10/100Mb (Giga-Bit )LAN PHY
FRONT PANEL Header * 2 => 4 Port
USB2 PORTS 2,3
USB2 PORTS 4,5
AC131
PCI_RESET0*
CPU_VLD
HT_VLD
SB ACPI PS_ON#
SLP_S5*
SLP_S3*
VRM_EN
VRM
PWM_GD
PWRGD_PS
PS_OUT#
ATX POWER
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
23 5 Friday, June 27, 2008
23 5 Friday, June 27, 2008
23 5 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
4
3
2
1
RESET MAP
D D
K8 Socket M2
CPU RST*
CPU PWRGD
MCP61
AUDIO_PHY
RESET*
PSON#
HT_CPU_PWRGD
HT_CPU_RST*
PCIRST_SLOT1*
PCIRST_SLOT2*
PCIRST_SLOT3*
PCIRST_IDE*
LPCRST_FLASH*
LPCRST_SIO*
ATX
Power
Supply
PWRGD_PS
PWRGD_PS
PWR_OK
(46)
MCP61
PWRGD PWROK
SEC IDE
TIGER ONE
ALL_PWR_OK
HT_VLD
(1)
HT_VLD
ALL_PWROK
PWM_GD
(8)
VRM_EN
(9)
PWM_GD
VRM_EN
CPU
PWROK
PGOOD
(35)
ENLL
(37)
PCI SLOT 1 PCI SLOT 2 VT6307 PRI IDE FLASH SIO
VRM
PE_RESET*
PEX X16
PEX X1
PWR CONN
C C
B B
PS ON
PWR GOOD
PWRGD SB
CIRCUIT
PWR SWTCH
PWRBTN*
SLP_S3*
POWER_GOOD
PWRGD_SB
PWR BUTTON
SLP S3*
PWRGD
PWRGD_SB
GPIO_AUX*
LAN_PHY
RESET*
HT CPU PWRGD
HT CPU RST*
PCI RST0*
PCI RST1*
PCI RST2*
PCI RST3*
LPC_RST*
AC_RESET*
POWER ON SCHEME
MCP61
SLP_S3#
PWBTN#
SLP_S5#
PWRBTN#
Power button input
PANSWHJ
PWRON#
(72)
PANSWH#
IT8716F
PSIN
(71)
PSON#
TIGER ONE
PS_ON_IN#
(6) (75) (76)
PS_ON_OUT#
(7)
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Reset Map
Reset Map
Reset Map
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
A C
A C
33 5 Friday, June 27, 2008
33 5 Friday, June 27, 2008
33 5 Friday, June 27, 2008
A C
of
of
of
5
4
3
2
1
D D
HT_CPU_TXCLK0
HT_CPU_TXCLK0*
HT_CPU_RXCLK0
HT_CPU_RXCLK0*
HT_CPU_TXCLK1
HT_CPU_TXCLK1*
HT_CPU_RXCLK1
HT_CPU_RXCLK1*
CPUCLK_IN*
CPUCLK_IN
K8 M2 CPU
MEMCLK_L[0,5,7]
MEMCLK_H[0,5,7]
MEMCLK_L[2,3]
MEMCLK_H[2,3]
MEMCLK_L[1,4,6]
MEMCLK_H[1,4,6]
NC
CHANNEL A1 0-63
CHANNEL B1 0~63
DIMM 0
DIMM 1
MCP61
CLKOUT_200MHZ
CLKOUT_200MHZ*
HT_CPU_RXCLK1*
HT_CPU_RXCLK1
HT_CPU_TXCLK1*
C C
32.768 KHZ
B B
25 MHZ
HT_CPU_TXCLK1
HT_CPU_RXCLK0*
HT_CPU_RXCLK0
HT_CPU_TXCLK0*
HT_CPU_TXCLK0
RTC_XTAL
XTAL_IN
XTAL_OUT
PE0_REFCLK
PE0_REFCLK*
PE1_REFCLK
PE1_REFCLK*
PE2_REFCLK
PE2_REFCLK*
LPC_CLK0
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK_FB
LPC_CLK1
AC_BITCLK
BUF_25MHZ
BUF_SIO
SUSCLK
14MHZ OR 24MHZ
SIO
AZALIA
CODEC
PEX X16
PEX X1
FLASH
LPC
HEADER
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
LAN
PHY
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
43 5 Friday, June 27, 2008
43 5 Friday, June 27, 2008
43 5 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
4
3
2
1
D D
VID [4..0]
0X00000
0X00001
0X00010
0X00011
0X00100
0X00101
0X00110
0X00111
0X01000
0X01001
0X01010
0X01011
0X01100
0X01101
0X01110
C C
B B
0X01111
CPU VID TABLE
VDD
1.550V
1.525V
1.500V
1.475V
1.450V
1.425V
1.400V
1.375V
1.350V
1.325V
1.300V
1.275V
1.250V
1.225V
1.200V
1.175V 0X11111
SMBUS ADDRESS MAP
DEVICE
DIMM 0 0
DIMM 1 0
DIMM 2
DIMM 3
SIO
PCI SLOT 1
PCI SLOT 2
1394
DDC BUS
DDC BUS
SMBUS #
VID [4..0]
0X10000
0X10001
0X10010
0X10011
0X10100
0X10101
0X10110
0X10111
0X11000
0X11001
0X11010
0X11011
0X11100
0X11101
0X11110
VDD
1.150V
1.125V
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.850V
0.825V
0.800V
OFF
ADDRESS
1010 000 = 0X50
1010 001 = 0X51
0
1010 010 = 0X52
0
1010 011 = 0X53
1
0101 101 = 0X2D
ARP
1
ARP
1
1
ARP
A
?
B
?
BACK PANEL
SLOT
VT6308
PCI 1
PCI DEVICE MAP
DEVICE
MCP 61
MAC /MAC
PCI-PCI BRIDGE
SATA1 X8 0
SATA0 0 X8 0
IDE X6
MODEM CODEC 0
AUDIO CODEC X4 0
USB 2.0 X2
USB 1.1 0 X2 0
SHAPE TRIM
LDT 0 X0 0
SMBUS2
LEGACY SLAVE
LPC
LOGICAL PCI BUS
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
PCI BUS# DEVICE# IDSEL PIN PCI SLOT PCI SLOT
PCI INTERRUPT/IDSEL MAP
P_INTZ*
DEVICE#
0X01-0X0F
22
P_INTW*
23
P_INTX* P_INTW*
24
FUNCTION
XA
X9
X4
X1
X1
?
X1
?
0
0
1
1
2
1
?
0
?
01
01 PCI 2
0X06
0X08
PCI BUS#
MCP51 LOGICAL
PCI BUS 0
0
00
0
0
0
0
0
0
0
0
1
DEVICE ID
0X56/57
0X005C
0X0055
0X0054
0X0053
0X0058
0X0059
0X005B
0X005A
0X005F
0X005E
0X0052
0X00D3
0X0050/51
?
P_INTX*
P_INTY*
-- --
INTC* INTB* INTA*
P_INTY*
P_INTZ*
PCI SLOT PCI SLOT
INTD*
SOT23
1
SOT23-6
6
12
REQ/GNT
1/1
2/2 P_INTZ*
3/3 01 0X09
SOT23-5/SC70
SOT89-5
3
2
4 5
3
2 1
SOT223
4 5
3
4
3 2 1
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PCI Device / VID Table
PCI Device / VID Table
PCI Device / VID Table
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
53 5 Friday, June 27, 2008
53 5 Friday, June 27, 2008
53 5 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
D D
HT_RC_CPU_CLK_H1 13
HT_RC_CPU_CLK_L1 13
+1.2V_HT
C C
HT_RC_CPU_CAD_H[15..0] 13
HT_RC_CPU_CAD_L[15..0] 13
B B
HT_RC_CPU_CLK_H0 13
HT_RC_CPU_CLK_L0 13
R150 49.9 +/-1%
R150 49.9 +/-1%
*
*
R149 49.9 +/-1%
R149 49.9 +/-1%
*
*
HT_RC_CPU_CTL_H0 13
HT_RC_CPU_CTL_L0 13
4
U9A
U9A
HYPERTRANSPORT
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
J6
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
J1
L0_CADIN_H(1)
L0_CADIN_L(1)
J3
L0_CADIN_H(0)
J2
L0_CADIN_L(0)
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
AD5
AD4
AD1
AC1
HT_CPU_CTLOUT_H1
Y6
HT_CPU_CTLOUT_L1
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
N6
P6
N3
HT_CPU_CTLIN_H1
HT_CPU_CTLIN_L1
HT_RC_CPU_CAD_H15
HT_RC_CPU_CAD_L15
HT_RC_CPU_CAD_H14
HT_RC_CPU_CAD_L14
HT_RC_CPU_CAD_H13
HT_RC_CPU_CAD_L13
HT_RC_CPU_CAD_H12
HT_RC_CPU_CAD_L12
HT_RC_CPU_CAD_H11
HT_RC_CPU_CAD_L11
HT_RC_CPU_CAD_H10
HT_RC_CPU_CAD_L10
HT_RC_CPU_CAD_H9
HT_RC_CPU_CAD_L9
HT_RC_CPU_CAD_H8
HT_RC_CPU_CAD_L8
HT_RC_CPU_CAD_H7
HT_RC_CPU_CAD_L7
HT_RC_CPU_CAD_H6
HT_RC_CPU_CAD_L6
HT_RC_CPU_CAD_H5
HT_RC_CPU_CAD_L5
HT_RC_CPU_CAD_H4
HT_RC_CPU_CAD_L4
HT_RC_CPU_CAD_H3
HT_RC_CPU_CAD_L3
HT_RC_CPU_CAD_H2
HT_RC_CPU_CAD_L2
HT_RC_CPU_CAD_H1
HT_RC_CPU_CAD_L1
HT_RC_CPU_CAD_H0 HT_CPU_RC_CAD_H0
HT_RC_CPU_CAD_L0
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
K1
3
HT_CPU_RC_CLK_H1 13
HT_CPU_RC_CLK_L1 13
HT_CPU_RC_CLK_H0 13
HT_CPU_RC_CLK_L0 13
1
1
HT_CPU_RC_CTL_H0 13
HT_CPU_RC_CTL_L0 13
HT_CPU_RC_CAD_H15
HT_CPU_RC_CAD_L15
HT_CPU_RC_CAD_H14
HT_CPU_RC_CAD_L14
HT_CPU_RC_CAD_H13
HT_CPU_RC_CAD_L13
HT_CPU_RC_CAD_H12
HT_CPU_RC_CAD_L12
HT_CPU_RC_CAD_H11
HT_CPU_RC_CAD_L11
HT_CPU_RC_CAD_H10
HT_CPU_RC_CAD_L10
HT_CPU_RC_CAD_H9
HT_CPU_RC_CAD_L9
HT_CPU_RC_CAD_H8
HT_CPU_RC_CAD_L8
HT_CPU_RC_CAD_H7
HT_CPU_RC_CAD_L7
HT_CPU_RC_CAD_H6
HT_CPU_RC_CAD_L6
HT_CPU_RC_CAD_H5
HT_CPU_RC_CAD_L5
HT_CPU_RC_CAD_H4
HT_CPU_RC_CAD_L4
HT_CPU_RC_CAD_H3
HT_CPU_RC_CAD_L3
HT_CPU_RC_CAD_H2
HT_CPU_RC_CAD_L2
HT_CPU_RC_CAD_H1
HT_CPU_RC_CAD_L1
HT_CPU_RC_CAD_L0
TP14TP14
TP12TP12
HT_CPU_RC_CAD_H[15..0] 13
HT_CPU_RC_CAD_L[15..0] 13
2
1
Layout: Add stitching caps if crossing plane split
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
M2 HyperTransport
M2 HyperTransport
M2 HyperTransport
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
63 5 Friday, June 27, 2008
63 5 Friday, June 27, 2008
63 5 Friday, June 27, 2008
1
A C
A C
A C
of
of
of
5
MEMORY INTERFACE A
MEMORY INTERFACE A
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
AC25
AA24
AC28
AE20
AE19
AD27
AA25
AC27
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AH29
G19
H19
U27
U26
G20
G21
V27
W27
N25
Y27
L27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
D29
C29
C25
D25
E19
F19
F15
G15
AJ25
B29
E24
E18
H15
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MEM_MA0_CLK_H2 11,12
MEM_MA0_CLK_L2 11,12
MEM_MA0_CLK_H1 11,12
MEM_MA0_CLK_L1 11,12
MEM_MA0_CLK_H0 11,12
MEM_MA0_CLK_L0 11,12
MEM_MA0_CS_L1 11,12
MEM_MA0_CS_L0 11,12
D D
MEM_MA_ADD[15..0] 11,12
C C
MEM_MA_DQS_H[7..0] 11
MEM_MA_DQS_L[7..0] 11
MEM_MA0_ODT0 11,12
MEM_MA_CAS_L 11,12
MEM_MA_WE_L 11,12
MEM_MA_RAS_L 11,12
MEM_MA_BANK2 11,12
MEM_MA_BANK1 11,12
MEM_MA_BANK0 11,12
MEM_MA_CKE0 11,12
MEM_MA_DM[7..0] 11
4
U9B
U9B
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA_DQS_H8 11
MEM_MA_DQS_L8 11
MEM_MA_DM8 11
MEM_MA_DATA[63..0] 11
MEM_MA_CHECK[7..0] 11
3
2
1
B B
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
M2- 2 DDR -1
M2- 2 DDR -1
M2- 2 DDR -1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
73 5 Friday, June 27, 2008
73 5 Friday, June 27, 2008
73 5 Friday, June 27, 2008
1
A C
A C
A C
of
of
of
5
D D
C C
MEM_MB_ADD[15..0] 11,12
MEM_MB_DQS_H[7..0] 11
MEM_MB_DQS_L[7..0] 11
B B
MEM_MB_DM[7..0] 11
4
U9C
U9C
MEMORY INTERFACE B
MEMORY INTERFACE B
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AK19
AE30
AC31
AD29
AE29
AB31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AK17
AK23
AH17
AK29
AJ19
AL19
AL18
W29
W28
AJ13
AJ17
AL23
AL28
AL29
AJ14
AJ23
A18
A19
U31
U30
C19
D19
N31
M31
M29
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
MEM_MB0_CLK_H2 11,12
MEM_MB0_CLK_L2 11,12
MEM_MB0_CLK_H1 11,12
MEM_MB0_CLK_L1 11,12
MEM_MB0_CLK_H0 11,12
MEM_MB0_CLK_L0 11,12
MEM_MB0_CS_L1 11,12
MEM_MB0_CS_L0 11,12
MEM_MB0_ODT0 11,12
MEM_MB_CAS_L 11,12
MEM_MB_WE_L 11,12
MEM_MB_RAS_L 11,12
MEM_MB_BANK2 11,12
MEM_MB_BANK1 11,12
MEM_MB_BANK0 11,12
MEM_MB_CKE0 11,12
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
3
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB_DQS_H8 11
MEM_MB_DQS_L8 11
MEM_MB_DM8 11
MEM_MB_DATA[63..0] 11
MEM_MB_CHECK[7..0] 11
2
1
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
M2- 2 DDR -2
M2- 2 DDR -2
M2- 2 DDR -2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
83 5 Friday, June 27, 2008
83 5 Friday, June 27, 2008
83 5 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
Level translation buffers
Assuming system devices
Do not provide VDDIO
compatible voltage levels
D D
CPU_ALL_PWROK 13
CPU_LDTSTOP_L 13
CPU_HT_RESET_L 13
near CPU
U9E
U9E
INTERNAL MISC
INTERNAL MISC
L25
RSVD1
L26
RSVD2
L31
RSVD3
L30
RSVD4
C C
B B
5
6
7
8
9
10
11
12
1
2
13
14
15
A A
16
17
18
19
20
W26
RSVD5
W25
RSVD6
AE27
RSVD7
U24
RSVD8
V24
RSVD9
AE28
RSVD10
Y31
RSVD11
Y30
RSVD12
AG31
RSVD13
V31
RSVD14
W31
RSVD15
AF31
RSVD16
U9JU9J
MTG1
MTG1
MTG1
MTG1
MTG1
MTG1
MTG1
MTG1
EMI
EMI
MTG2
MTG2
MTG2
MTG2
MTG2
MTG2
MTG2
MTG2
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
MTG3
MTG3
MTG3
MTG3
MTG3
MTG3
MTG3
MTG3
MTG4
MTG4
MTG4
MTG4
MTG4
MTG4
MTG4
MTG4
E20
B19
AL4
AK4
AK3
F2
F3
G4
G3
G5
AD25
AE24
AE25
AJ18
AJ20
C18
C20
G24
G25
H25
V29
W30
21
22
23
24
25
26
27
28
3
EMI
4
EMI
29
30
31
32
33
34
35
36
+1.8V_SUS
RN24
RN24
*
*
135
300
300
+/-5%
+/-5%
C190
C190
0.22uF
0.22uF
*
*
Dummy
Dummy
4
+2.5V
*
*
Keep trace to resistor
less than 600mils from CPU pin and
trace to AC caps less than 1250mils
7 8
642
CPU_CLKIN_H 13
CPU_CLKIN_L 13
CPU_SIC 18
CPU_SID 18
modify 8/20
C199
C199
22uF
22uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
+1.8V_SUS
R164
R164
300
300
*
*
*
*
+/-5%
+/-5%
*
*
Dummy
Dummy
+1.8V_SUS
R179 39.2 +/-1%
R179 39.2 +/-1%
*
*
R180 39.2 +/-1%
R180 39.2 +/-1%
*
*
CPU_THERMDC 24
CPU_THERMDA 24
CPU_M_VREF_SUS
+1.8V_SUS
R172
R172
*
*
16.9 Ohm
16.9 Ohm
+/-1%
+/-1%
R171
R171
*
*
16.9 Ohm
16.9 Ohm
*
*
+/-1%
+/-1%
*
*
C191
C191
3.9nF
3.9nF
+/-10%
+/-10%
*
*
R154
R154
*
*
C188
C188
169 Ohm
169 Ohm
3.9nF
3.9nF
+/-1%
+/-1%
+/-10%
+/-10%
*
*
CPU_SIC
R162
R162
CPU_SID
300
300
+/-5%
+/-5%
R161
R161
300
300
+/-5%
+/-5%
CPU_VDD_RUN_FB_H 30
CPU_VDD_RUN_FB_L 30
TP26TP26
CPU_M_VREF_SUS
R168 300 +/-5%
R168 300 +/-5%
R167 300 +/-5%
R167 300 +/-5%
TP16TP16
TP15TP15
TP20TP20
TP13TP13
TP18TP18
CPU_M_VREF_SUS
C197
C197
*
*
100nF
100nF
C211
C211
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
CPU_CLKIN_SC_H
CPU_CLKIN_SC_L
CPU_ALL_PWROK
CPU_LDTSTOP_L
CPU_HT_RESET_L
CPU_PRESENT_L
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
1
M_ZN
M_ZP
*
*
*
*
CPU_TEST17
1
CPU_TEST16
1
CPU_TEST15
1
CPU_TEST14
1
CPU_TEST12
1
CPU_THERMDC
CPU_THERMDA CPU_TEST26
C196
C196
1nF
1nF
Layout: Place near CPU socket
C200
C200
3.3nF
3.3nF
+/-10%
+/-10%
CPU_TEST25_H
CPU_TEST25_L
*
*
CPU_VDDA_RUN
C201
C201
0.22uF
0.22uF
10V, X7R, +/-10%
10V, X7R, +/-10%
AL10
AJ10
AH10
AH11
AJ11
3
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AL9
A5
G2
G1
E12
F12
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
U9D
U9D
MISC
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
TDO
Required for compatibility
with future processors
CPU_VID5
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
CPU_THERMTRIP_L
CPU_PROCHOT_L_1.8
CPU_TDO
CPU_DBRDY
CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L
CPU_PSI_L CPU_VTT_SUS_SENSE
CPU_HTREF1
CPU_HTREF0
CPU_TEST29_H
CPU_TEST29_L
CPU_TEST23
CPU_TEST22
CPU_TEST21
1
2
+1.8V_SUS
R174
R174
R170
R170
300
300
+/-5%
+/-5%
TP7TP7
TP8TP8
1
R160 44.2Ohm +/-1%
R160 44.2Ohm +/-1%
R157 44.2Ohm +/-1%
R157 44.2Ohm +/-1%
TP17TP17
1
TP19TP19
1
CPU_DBREQ_L
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST_L
CPU_TDO
Erratum 133, Revision Guide for
AMD NPT 0Fh Processors
Erratum 133, Revision Guide for
AMD NPT 0Fh Processors
*
*
*
*
300
300
+/-5%
+/-5%
CPU_PROCHOT_L_1.8 13
R175
R175
*
*
300
300
+/-5%
+/-5%
*
*
*
*
R173
R173
*
*
80.6
80.6
+/-1%
+/-1%
CPU_DBREQ_L
CPU_TEST26
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
CPU_TEST21
CPU_TEST22
VREG_VID4 30
VREG_VID3 30
VREG_VID2 30
VREG_VID1 30
VREG_VID0 30
CPU_THERMTRIP* 13,21
+1.2V_HT
Keep trace to resistors
less than 1.5" from CPU pin
Route as 80-Ohm differential impedance
Keep trace to resistor less than 1" from CPU pin
+1.8V_SUS
HDT
HDT
HHS2X13JZO25H70
HHS2X13JZO25H70
112
2
3 4
5 6
7 8
9 10
111112
12
13 14
15 16
17 18
19 20
212122
22
23 24
26
0.050IN
0.050IN
DUMMY
DUMMY
Dummy
Dummy
R158 300 +/-5%
R158 300 +/-5%
R159 1K +/-5%
R159 1K +/-5%
R166 510 Ohm
R166 510 Ohm
R165 510 Ohm
R165 510 Ohm
R178 300 +/-5%
R178 300 +/-5%
Dummy
Dummy
CPU_HT_RESET_L
26
+1.8V_SUS
R177
R177
300
300
*
*
+/-5%
+/-5%
*
*
*
*
*
*
*
*
*
*
*
*
R176
R176
300
300
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
CPU_VDDA_RUN
CPU_CLKIN_H
CPU_CLKIN_L
CPU_VDD_RUN_FB_H
CPU_VDD_RUN_FB_L
CPU_TEST29_H
CPU_TEST29_L
CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L
CPU_ALL_PWROK
CPU_LDTSTOP_L
CPU_HT_RESET_L
CPU_THERMTRIP_L
1
TP21TP21
1
TP4TP4
1
TP3TP3
1
TP6TP6
1
TP5TP5
1
TP22TP22
1
TP25TP25
1
TP24TP24
1
TP23TP23
1
TP11TP11
1
TP10TP10
1
TP9TP9
1
TP27TP27
1
FOXCONN PCEG
FOXCONN PCEG
GND
5
4
3
2
Title
Title
Title
M2- 3 MISC
M2- 3 MISC
M2- 3 MISC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
A C
A C
93 5 Friday, June 27, 2008
93 5 Friday, June 27, 2008
93 5 Friday, June 27, 2008
A C
of
of
of
5
4
3
2
1
Processor Power & Ground
D D
VLDT_RUN_B is connected to the VLDT_RUN power
supply through the package or on the die. It is only connected
+V_CPU
C C
B B
AA10
AA12
AA14
AA16
AA18
AB11
AC10
AE10
U9F
U9F
VDD1
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
AB7
VDD9
AB9
VDD10
VDD11
AC4
VDD12
AC5
VDD13
AC8
VDD14
VDD15
AD2
VDD16
AD3
VDD17
AD7
VDD18
AD9
VDD19
VDD20
AF7
VDD21
AF9
VDD22
AG4
VDD23
AG5
VDD24
AG7
VDD25
AH2
VDD26
AH3
VDD27
B3
VDD28
B5
VDD29
B7
VDD30
C2
VDD31
C4
VDD32
C6
VDD33
C8
VDD34
D3
VDD35
D5
VDD36
D7
VDD37
D9
VDD38
E4
VDD39
E6
VDD40
E8
VDD41
E10
VDD42
F5
VDD43
F7
VDD44
F9
VDD45
F11
VDD46
G6
VDD47
G8
VDD48
G10
VDD49
G12
VDD50
H7
VDD51
H11
VDD52
H23
VDD53
J8
VDD54
J12
VDD55
J14
VDD56
J16
VDD57
J18
VDD58
J20
VDD59
J22
VDD60
J24
VDD61
K7
VDD62
K9
VDD63
K11
VDD64
K13
VDD65
K15
VDD66
K17
VDD67
K19
VDD68
K21
VDD69
K23
VDD70
L4
VDD71
L5
VDD72
L8
VDD73
L10
VDD74
L12
VDD75
Y17
VDD150
Y19
VDD151
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS240
VSS241
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
GND
+V_CPU
W10
W12
W14
W16
W18
W20
U9G
U9G
VDD2
VDD2
L14
VDD1
L16
VDD2
L18
VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7
M11
VDD8
M13
VDD9
M15
VDD10
M17
VDD11
M19
VDD12
N8
VDD13
N10
VDD14
N12
VDD15
N14
VDD16
N16
VDD17
N18
VDD18
P7
VDD19
P9
VDD20
P11
VDD21
P13
VDD22
P15
VDD23
P17
VDD24
P19
VDD25
R4
VDD26
R5
VDD27
R8
VDD28
R10
VDD29
R12
VDD30
R14
VDD31
R16
VDD32
R18
VDD33
R20
VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38
T11
VDD39
T13
VDD40
T15
VDD41
T17
VDD42
T19
VDD43
T21
VDD44
U8
VDD45
U10
VDD46
U12
VDD47
U14
VDD48
U16
VDD49
U18
VDD50
U20
VDD51
V9
VDD52
V11
VDD53
V13
VDD54
V15
VDD55
V17
VDD56
V19
VDD57
V21
VDD58
W4
VDD59
W5
VDD60
W8
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71
Y11
VDD72
Y13
VDD73
Y15
VDD74
Y21
VDD75
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
GND
+V_CPU
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
U9H
U9H
VDD3
VDD3
N17
VSS1
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
L20
VDD19
L22
VDD20
M21
VDD21
M23
VDD22
N20
VDD23
N22
VDD24
P21
VDD25
P23
VDD26
R22
VDD27
T23
VDD28
U22
VDD29
V23
VDD30
W22
VDD31
Y23
VDD32
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
GND
Place near processor on VLDT pour.
4
+1.2V_HT
*
*
C184
C184
4.7uF
4.7uF
C185
C185
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+80/-20%
+80/-20%
GND
A A
5
on the board to decoupling near the CPU package.
U9I
+1.2V_HT
VTT_DDR_SUS VTT_DDR_SUS
+1.8V_SUS
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
U9I
VDDIO
VDDIO
AJ4
VLDT_A1
AJ3
VLDT_A2
AJ2
VLDT_A3
AJ1
VLDT_A4
D12
VTT1
C12
VTT2
B12
VTT3
A12
VTT4
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO29
M24
VDDIO9
M26
VDDIO10
M28
VDDIO11
M30
VDDIO12
P24
VDDIO13
P26
VDDIO14
P28
VDDIO15
P30
VDDIO16
T24
VDDIO17
T26
VDDIO18
T28
VDDIO19
T30
VDDIO20
V25
VDDIO21
V26
VDDIO22
V28
VDDIO23
V30
VDDIO24
Y24
VDDIO25
Y26
VDDIO26
Y28
VDDIO27
Y29
VDDIO28
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
H6
H5
H2
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
GND
Decoupling Between Processor and DIMMs
Place as close to processor as possible.
+1.8V_SUS
C334
C334
C346
C346
C342
C342
C357
C357
4.7uF
*
*
VTT_DDR_SUS
*
*
VTT_DDR_SUS
*
*
3
4.7uF
4.7uF
C205
C205
4.7uF
4.7uF
C203
C203
4.7uF
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
C202
C202
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
C206
C206
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
0.22uF
0.22uF
0.22uF
0.22uF
*
*
*
*
+80/-20%
+80/-20%
GND
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
C222
C222
C218
C218
0.22uF
0.22uF
*
*
+80/-20%
+80/-20%
C217
C217
0.22uF
0.22uF
*
*
+80/-20%
+80/-20%
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
C208
C208
0.22uF
0.22uF
1nF
1nF
*
*
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
C220
C220
C207
C207
0.22uF
0.22uF
1nF
1nF
*
*
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
C404
C404
C416
C416
180pF
180pF
1nF
1nF
*
*
*
*
+/-5%
+/-5%
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
C400
C400
C209
C209
180pF
180pF
1nF
1nF
*
*
*
*
+/-5%
+/-5%
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
VLDT_RUN_B
*
*
GND
C401
C401
180pF
180pF
*
*
+/-5%
+/-5%
GND
C204
C204
180pF
180pF
*
*
+/-5%
+/-5%
GND
C173
C173
+80/-20%
+80/-20%
4.7uF
4.7uF
Bottomside Decoupling
+V_CPU
C490
C490
22uF
22uF
*
*
Dummy
Dummy
+V_CPU
C486
C486
0.22uF
0.22uF
*
*
Dummy
Dummy
+1.8V_SUS
C505
C505
10uF
10uF
*
*
+/-10%
+/-10%
C502
C502
10uF
10uF
*
*
+/-10%
+/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
Dummy
Dummy
C504
C504
0.22uF
0.22uF
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
modify 8/16
C506
C506
10uF
10uF
*
*
+/-10%
+/-10%
*
*
Dummy
Dummy
*
*
*
*
C492
C492
22uF
22uF
C493
C493
0.22uF
0.22uF
C509
C509
4.7uF
4.7uF
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
+80/-20%
+80/-20%
*
*
*
*
Dummy
Dummy
*
*
C491
C491
10uF
10uF
+/-10%
+/-10%
C133
C133
10nF
10nF
C508
C508
4.7uF
4.7uF
25V, X7R, +/-10%
25V, X7R, +/-10%
+80/-20%
+80/-20%
*
*
Dummy
Dummy
*
*
GND
*
*
C499
C499
22uF
22uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
Dummy
Dummy
C494
C494
180pF
180pF
50V, NPO, +/-5%
50V, NPO, +/-5%
C507
C507
0.22uF
0.22uF
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
modify 8/16
C498
C498
C497
C497
10uF
10uF
10uF
10uF
*
*
*
*
+/-10%
+/-10%
+/-10%
+/-10%
C511
C511
C510
C510
0.22uF
0.22uF
0.22uF
0.22uF
*
*
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
C496
C496
10uF
10uF
+/-10%
+/-10%
C513
C513
10nF
10nF
Decoupling Between Processor and DIMMs
2
C500
C500
C489
C489
C487
C487
10uF
10uF
*
*
+/-10%
+/-10%
C512
C512
180pF
180pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
GND
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
+1.8V_SUS
C347
C347
180pF
180pF
*
*
+/-5%
+/-5%
Title
Title
Title
M2- 4 Power
M2- 4 Power
M2- 4 Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
10uF
10uF
10uF
10uF
*
*
*
*
+/-10%
+/-10%
+/-10%
+/-10%
Dummy
Dummy
C317
C317
180pF
180pF
*
*
+/-5%
+/-5%
GND
C501
C501
C488
C488
22uF
22uF
22uF
22uF
*
*
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
Dummy
Dummy
Dummy
Dummy
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
*
*
Dummy
Dummy
C495
C495
10uF
10uF
+/-10%
+/-10%
*
*
GND
Dummy
Dummy
10 35 Friday, June 27, 2008
10 35 Friday, June 27, 2008
10 35 Friday, June 27, 2008
C503
C503
10uF
10uF
+/-10%
+/-10%
of
of
of
A C
A C
A C
5
4
3
SMB_MEM BUS ADDRESS
DIMM 0
DIMM 1
DIMM 2
DIMM 3
1010 000
1010 001
1010 010
1010 011
2
1
DIMMA0
D D
MEM_MA_DM[7..0] 7
MEM_MA_DQS_H8 7
MEM_MA_DQS_L8 7
MEM_MA_DQS_H[7..0] 7
MEM_MA_DQS_L[7..0] 7
C C
MEM_MA_ADD[15..0] 7,12
B B
MEM_MA_CHECK[7..0] 7
MEM_MA_DM8 7
GND
SMB_MEM_SDA 18
MEM_MA_BANK2 7,12
MEM_MA_BANK1 7,12
MEM_MA_BANK0 7,12
MEM_MA0_CLK_H0 7,12
MEM_MA0_CLK_L0 7,12
MEM_MA0_CLK_H1 7,12
MEM_MA0_CLK_L1 7,12
MEM_MA0_CLK_H2 7,12
MEM_MA0_CLK_L2 7,12
MEM_MA_CKE0 7,12
MEM_MA_RAS_L 7,12
MEM_MA_CAS_L 7,12
MEM_MA0_CS_L0 7,12
MEM_MA0_CS_L1 7,12
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA_CKE0
+1.8V_SUS
172
178
184
187
189
197
64
69
170
175
181
191
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
VDDQ1
VDDQ2
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VDDQ3
VDDQ4
194
VDDQ5
72
VDDQ651VDDQ756VDDQ862VDDQ9
+3.3V
78
VDDQ1075VDDQ11
ERR_OUT_L
VDDQ4
194
VDDQ5
72
VDDQ651VDDQ756VDDQ862VDDQ9
+3.3V
78
VDDQ1075VDDQ11
ERR_OUT_L
R254
R254
*
*
0
0
+/-5%
+/-5%
DIMM2 DIMM2
238
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
PAR_IN
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC1
MEM_MB_DATA63
236
MEM_MB_DATA62
235
MEM_MB_DATA61
230
MEM_MB_DATA60
229
MEM_MB_DATA59
117
MEM_MB_DATA58
116
MEM_MB_DATA57
111
MEM_MB_DATA56
110
MEM_MB_DATA55
227
MEM_MB_DATA54
226
MEM_MB_DATA53
218
MEM_MB_DATA52
217
MEM_MB_DATA51
108
MEM_MB_DATA50
107
MEM_MB_DATA49
99
MEM_MB_DATA48
98
MEM_MB_DATA47
215
MEM_MB_DATA46
214
MEM_MB_DATA45
209
MEM_MB_DATA44
208
MEM_MB_DATA43
96
MEM_MB_DATA42
95
MEM_MB_DATA41
90
MEM_MB_DATA40
89
MEM_MB_DATA39
206
MEM_MB_DATA38
205
MEM_MB_DATA37
200
MEM_MB_DATA36
199
MEM_MB_DATA35
87
MEM_MB_DATA34
86
MEM_MB_DATA33
81
MEM_MB_DATA32
80
MEM_MB_DATA31
159
MEM_MB_DATA30
158
MEM_MB_DATA29
153
MEM_MB_DATA28
152
MEM_MB_DATA27
40
MEM_MB_DATA26
39
MEM_MB_DATA25
34
MEM_MB_DATA24
33
MEM_MB_DATA23
150
MEM_MB_DATA22
149
MEM_MB_DATA21
144
MEM_MB_DATA20
143
MEM_MB_DATA19
31
MEM_MB_DATA18
30
MEM_MB_DATA17
25
MEM_MB_DATA16
24
MEM_MB_DATA15
141
MEM_MB_DATA14
140
MEM_MB_DATA13
132
MEM_MB_DATA12
131
MEM_MB_DATA11
22
MEM_MB_DATA10
21
MEM_MB_DATA9
13
MEM_MB_DATA8
12
MEM_MB_DATA7
129
MEM_MB_DATA6
128
MEM_MB_DATA5
123
MEM_MB_DATA4
122
MEM_MB_DATA3
10
MEM_MB_DATA2
9
MEM_MB_DATA1
4
MEM_MB_DATA0 MEM_MB_CHECK7
3
73
MEM_MB_WE_L 8,12
1
102
195
77
55
68
19
MEM_MB_DATA[63..0] 8
MEM_M_VREF_SUS
MEM_MB0_ODT0 8,12
GND
First Logical DDR2 DIMM
R253
R253
*
*
0
0
+/-5%
+/-5%
DIMM1 DIMM1
238
VDDSPD
MEM_MA_DATA63
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
PAR_IN
236
MEM_MA_DATA62
235
MEM_MA_DATA61
230
MEM_MA_DATA60
229
MEM_MA_DATA59
117
MEM_MA_DATA58
116
MEM_MA_DATA57
111
MEM_MA_DATA56
110
MEM_MA_DATA55
227
MEM_MA_DATA54
226
MEM_MA_DATA53
218
MEM_MA_DATA52
217
MEM_MA_DATA51
108
MEM_MA_DATA50
107
MEM_MA_DATA49
99
MEM_MA_DATA48
98
MEM_MA_DATA47
215
MEM_MA_DATA46
214
MEM_MA_DATA45
209
MEM_MA_DATA44
208
MEM_MA_DATA43
96
MEM_MA_DATA42
95
MEM_MA_DATA41
90
MEM_MA_DATA40
89
MEM_MA_DATA39
206
MEM_MA_DATA38
205
MEM_MA_DATA37
200
MEM_MA_DATA36
199
MEM_MA_DATA35
87
MEM_MA_DATA34
86
MEM_MA_DATA33
81
MEM_MA_DATA32
80
MEM_MA_DATA31
159
MEM_MA_DATA30
158
MEM_MA_DATA29
153
MEM_MA_DATA28
152
MEM_MA_DATA27
40
MEM_MA_DATA26
39
MEM_MA_DATA25
34
MEM_MA_DATA24
33
MEM_MA_DATA23
150
MEM_MA_DATA22
149
MEM_MA_DATA21
144
MEM_MA_DATA20
143
MEM_MA_DATA19
31
MEM_MA_DATA18
30
MEM_MA_DATA17
25
MEM_MA_DATA16
24
MEM_MA_DATA15
141
MEM_MA_DATA14
140
MEM_MA_DATA13
132
MEM_MA_DATA12
131
MEM_MA_DATA11
22
MEM_MA_DATA10
21
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA0 MEM_MA_CHECK7
3
DQ0
73
MEM_MA_WE_L 7,12
1
102
195
77
55
68
19
NC1
MEM_MA0_ODT0 7,12
GND
MEM_MA_DATA[63..0] 7
MEM_M_VREF_SUS
MEM_M_VREF_SUS
MEM_MB_DM[7..0] 8
MEM_MB_DQS_H8 8
MEM_MB_DQS_L8 8
MEM_MB_DQS_H[7..0] 8
MEM_MB_DQS_L[7..0] 8
MEM_MB_DM8 8
+3.3V
SMB_MEM_SCL 18 SMB_MEM_SCL 18
SMB_MEM_SDA 18
GND
MEM_MB_BANK2 8,12
MEM_MB_BANK1 8,12
MEM_MB_ADD[15..0] 8,12
MEM_MB_BANK0 8,12
MEM_MB_CHECK[7..0] 8
MEM_MB0_CLK_H0 8,12
MEM_MB0_CLK_L0 8,12
MEM_MB0_CLK_H1 8,12
MEM_MB0_CLK_L1 8,12
MEM_MB0_CLK_H2 8,12
MEM_MB0_CLK_L2 8,12
MEM_MB_CKE0 8,12
MEM_MB_RAS_L 8,12
MEM_MB_CAS_L 8,12
MEM_MB0_CS_L0 8,12
MEM_MB0_CS_L1 8,12
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
DIMMB0
+1.8V_SUS
172
178
184
187
189
197
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
64
VDD753VDD859VDD9
69
VDD1067VDD11
170
VDDQ1
175
181
191
VDDQ2
VDDQ3
+1.8V_SUS
R222
R222
C356
C356
*
*
59 Ohm
59 Ohm
*
*
+/-1%
*
*
+/-1%
R220
R220
59 Ohm
59 Ohm
+/-1%
+/-1%
*
*
A A
Layout: Place near DIMM sockets
5
4
3
100nF
100nF
100nF
100nF
C335
C335
MEM_M_VREF_SUS
C337
C337
1nF
1nF
*
*
GND
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
DDR SDRAM DIMM 1 - 2
DDR SDRAM DIMM 1 - 2
DDR SDRAM DIMM 1 - 2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
11 35 Friday, June 27, 2008
11 35 Friday, June 27, 2008
11 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
4
3
2
1
DDR2 Termination
D D
C C
MEM_MA_ADD[15..0] 7,11
MEM_MA_ADD[15..0]
RN39B
RN39B
3 4
*
RN40C
RN40C
RN42D
RN42D
RN37B
RN37B
RN38C
RN38C
RN32A
RN32A
RN38A
RN38A
RN37C
RN37C
RN37A
RN37A
RN36A
RN36A
RN36C
RN36C
RN35D
RN35D
RN34B
RN34B
RN33D
RN33D
RN33B
RN33B
RN32C
RN32C
RN43B
RN43B
RN44B
RN44B
RN31D
RN31D
RN39A
RN39A
RN32D
RN32D
RN31B
RN31B
RN40B
RN40B
RN40D
RN40D
RN45C
RN45C
RN43D
RN43D
RN45B
RN45B
RN42B
RN42B
C310 22pF *C310 22pF
C293 22pF *C293 22pF
C311 22pF *C311 22pF
C309 22pF *C309 22pF
C291 22pF *C291 22pF
C315 22pF *C315 22pF
C308 22pF *C308 22pF
C307 22pF *C307 22pF
C290 22pF *C290 22pF
C306 22pF *C306 22pF
C289 22pF *C289 22pF
C348 22pF *C348 22pF
C305 22pF *C305 22pF
C325 22pF *C325 22pF
C326 22pF *C326 22pF
C322 22pF *C322 22pF
C312 22pF *C312 22pF
C313 22pF *C313 22pF
C314 22pF *C314 22pF
C292 22pF *C292 22pF
C321 22pF *C321 22pF
C319 22pF *C319 22pF
*
5 6
*
*
7 8
*
*
3 4
*
*
5 6
*
*
1 2
*
*
1 2
*
*
5 6
*
*
1 2
*
*
1 2
*
*
5 6
*
*
7 8
*
*
3 4
*
*
7 8
*
*
3 4
*
*
5 6
*
*
3 4
*
*
3 4
*
*
7 8
*
*
1 2
*
*
7 8
*
*
3 4
*
*
3 4
*
*
7 8
*
*
5 6
*
*
7 8
*
*
3 4
*
*
3 4
*
*
MEM_MA_ADD15
MEM_MB_ADD9
MEM_MB_ADD12
MEM_MA_ADD0
MEM_MB_ADD14
MEM_MA_ADD7
MEM_MA_ADD11
MEM_MA_ADD8
MEM_MB_ADD8
MEM_MB_ADD4
MEM_MB_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD10
MEM_MB0_CS_L1 8,11
MEM_MA0_CS_L0 7,11
MEM_MA_RAS_L 7,11
MEM_MA_BANK2 7,11
MEM_MA_BANK1 7,11
MEM_MA_BANK0 7,11
MEM_MA_CKE0 7,11
MEM_MB0_CS_L0 8,11
MEM_MA_CAS_L 7,11
MEM_MB_RAS_L 8,11
MEM_MA0_CS_L1 7,11
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
VTT_DDR_SUS
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
+1.8V_SUS
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
Place near CPU
MEM_MA0_CLK_H2 7,11
MEM_MA0_CLK_L2 7,11
MEM_MA0_CLK_H1 7,11
MEM_MA0_CLK_L1 7,11
MEM_MA0_CLK_H0 7,11
MEM_MA0_CLK_L0 7,11
MEM_MB0_CLK_H2 8,11
MEM_MB0_CLK_L2 8,11
MEM_MB0_CLK_H1 8,11
MEM_MB0_CLK_L1 8,11
MEM_MB0_CLK_H0 8,11
MEM_MB0_CLK_L0 8,11
*
*
*
*
*
*
*
*
*
*
*
*
C233
C233
1.5pF
1.5pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
C234
C234
1.5pF
1.5pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
C266
C266
1.5pF
1.5pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
C226
C226
1.5pF
1.5pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
C228
C228
1.5pF
1.5pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
C275
C275
1.5pF
1.5pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
MEM_MB_ADD[15..0] 8,11
MEM_MB_BANK2 8,11
MEM_MB_ADD[15..0]
MEM_MB0_ODT0 8,11
MEM_MB_WE_L 8,11
MEM_MB_BANK1 8,11
MEM_MB_BANK0 8,11
MEM_MB_CKE0 8,11
MEM_MA_WE_L 7,11
MEM_MA0_ODT0 7,11
MEM_MB_CAS_L 8,11
MEM_MB_ADD15
MEM_MB_ADD11
MEM_MA_ADD6
MEM_MB_ADD10
MEM_MB_ADD7
MEM_MB_ADD5
MEM_MA_ADD9
MEM_MB_ADD3
MEM_MB_ADD6
MEM_MA_ADD5
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MA_ADD4
MEM_MB_ADD0
MEM_MB_ADD13
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
RN39D
RN39D
RN38B
RN38B
RN42C
RN42C
RN37D
RN37D
RN36D
RN36D
RN31C
RN31C
RN36B
RN36B
RN35C
RN35C
RN35B
RN35B
RN34A
RN34A
RN35A
RN35A
RN34C
RN34C
RN34D
RN34D
RN33C
RN33C
RN33A
RN33A
RN32B
RN32B
RN43A
RN43A
RN44C
RN44C
RN45D
RN45D
RN38D
RN38D
RN31A
RN31A
RN45A
RN45A
RN39C
RN39C
RN40A
RN40A
RN44D
RN44D
RN43C
RN43C
RN44A
RN44A
RN42A
RN42A
C355 22pF *C355 22pF
C332 22pF *C332 22pF
C318 22pF *C318 22pF
C354 22pF *C354 22pF
C330 22pF *C330 22pF
C323 22pF *C323 22pF
C353 22pF *C353 22pF
C352 22pF *C352 22pF
C329 22pF *C329 22pF
C351 22pF *C351 22pF
C328 22pF *C328 22pF
C327 22pF *C327 22pF
C350 22pF *C350 22pF
C304 22pF *C304 22pF
C349 22pF *C349 22pF
C324 22pF *C324 22pF
C320 22pF *C320 22pF
C344 22pF *C344 22pF
C343 22pF *C343 22pF
C331 22pF *C331 22pF
C345 22pF *C345 22pF
C316 22pF *C316 22pF
7 8
*
*
3 4
*
*
5 6
*
*
7 8
*
*
7 8
*
*
5 6
*
*
3 4
*
*
5 6
*
*
3 4
*
*
1 2
*
*
1 2
*
*
5 6
*
*
7 8
*
*
5 6
*
*
1 2
*
*
3 4
*
*
1 2
*
*
5 6
*
*
7 8
*
*
7 8
*
*
1 2
*
*
1 2
*
*
5 6
*
*
1 2
*
*
7 8
*
*
5 6
*
*
1 2
*
*
1 2
*
*
VTT_DDR_SUS
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
47 Ohm
+1.8V_SUS
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
B B
VTT_DDR_SUS
C411
C411
*
*
100nF
100nF
VTT_DDR_SUS
A A
5
C413
C413
*
*
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
C388
C388
C389
C389
*
*
*
*
100nF
100nF
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
4
Layout: Spread out on VTT pour
C420
C420
*
*
100nF
100nF
+80%~-20%
+80%~-20%
C392
C392
C391
C391
C406
C406
C390
C390
*
*
*
*
100nF
100nF
+80%~-20%
+80%~-20%
100nF
100nF
*
*
*
*
100nF
100nF
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
C419
C419
C415
C387
C402
*
*
*
*
100nF
100nF
+80%~-20%
+80%~-20%
C393
C393
*
*
*
*
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
100nF
100nF
C394
C394
100nF
100nF
*
*
*
*
100nF
100nF
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
GND
C396
C396
C395
C395
*
*
*
*
100nF
100nF
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
C403
C403
C412
C412
C414
C414
C402
C387
*
*
100nF
100nF
+80%~-20%
+80%~-20%
C398
C398
C397
C397
*
*
*
*
100nF
100nF
100nF
100nF
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
3
C415
*
*
*
*
100nF
100nF
100nF
100nF
GND
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
+1.8V_SUS
C443
C443
C399
C399
*
*
*
*
100nF
100nF
100nF
100nF
Dummy
Dummy
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
DDR II terminator
DDR II terminator
DDR II terminator
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
12 35 Friday, June 27, 2008
12 35 Friday, June 27, 2008
12 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
D D
HT_CPU_RC_CAD_H[15..0] 6
HT_CPU_RC_CAD_L[15..0] 6
C C
HT_CPU_RC_CLK_H0 6
HT_CPU_RC_CLK_L0 6
HT_CPU_RC_CLK_H1 6
HT_CPU_RC_CLK_L1 6
HT_CPU_RC_CTL_H0 6
HT_CPU_RC_CTL_L0 6
+1.2V_HT
*
*
R322
R322
150
150
+/-1%
+/-1%
+3.3V
L15
L15
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
B B
CPU_PROCHOT_L_1.8 9
*
*
CPU_THERMTRIP* 9,21
C366
C366
+80/-20%
+80/-20%
4.7uF
4.7uF
+3.3_PLL_CPU
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
*
*
R323
R323
150
150
+/-1%
+/-1%
C521
C521
0.1uF
0.1uF
HT_CPU_RC_CAD_H0
HT_CPU_RC_CAD_H1
HT_CPU_RC_CAD_H2
HT_CPU_RC_CAD_H3
HT_CPU_RC_CAD_H4
HT_CPU_RC_CAD_H5
HT_CPU_RC_CAD_H6
HT_CPU_RC_CAD_H7
HT_CPU_RC_CAD_H8
HT_CPU_RC_CAD_H9
HT_CPU_RC_CAD_H10
HT_CPU_RC_CAD_H11
HT_CPU_RC_CAD_H12
HT_CPU_RC_CAD_H13
HT_CPU_RC_CAD_H14
HT_CPU_RC_CAD_H15
HT_CPU_RC_CAD_L0
HT_CPU_RC_CAD_L1
HT_CPU_RC_CAD_L2
HT_CPU_RC_CAD_L3
HT_CPU_RC_CAD_L4
HT_CPU_RC_CAD_L5
HT_CPU_RC_CAD_L6
HT_CPU_RC_CAD_L7
HT_CPU_RC_CAD_L8
HT_CPU_RC_CAD_L9
HT_CPU_RC_CAD_L10
HT_CPU_RC_CAD_L11
HT_CPU_RC_CAD_L12
HT_CPU_RC_CAD_L13
HT_CPU_RC_CAD_L14
HT_CPU_RC_CAD_L15
HTCPUCAL_1P2V
HTCPUCAL_GND
CPU_THERMTRIP*
+1.2V
*
*
R321
R321
1
1
+/-1%
+/-1%
70mA
1.2V_PLLCPUHT
12mA
*
*
C519
C519
+80/-20%
+80/-20%
4.7uF
4.7uF
HTCPU_DWN0
HTCPU_DWN1
HTCPU_DWN2
HTCPU_DWN3
HTCPU_DWN4
HTCPU_DWN5
HTCPU_DWN6
HTCPU_DWN7
HTCPU_DWN8
HTCPU_DWN9
HTCPU_DWN10
HTCPU_DWN11
HTCPU_DWN12
HTCPU_DWN13
HTCPU_DWN14
HTCPU_DWN15
4
AG12
AG13
AK13
AB10
AD10
AF10
AC12
AB11
AB13
AF14
AE14
AH10
AH12
AH13
AH14
AC10
AE10
AG10
AD12
AC11
AB12
AG14
AD14
AH11
AE12
AF12
AH15
AB14
AC14
AC15
AB15
AG8
AG9
AK9
AJ10
AJ14
AH8
AH9
AJ9
AJ13
AJ11
AJ15
AB9
AB8
AD8
AE8
U15H
U15H
HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD8_P
HT_MCP_RXD9_P
HT_MCP_RXD10_P
HT_MCP_RXD11_P
HT_MCP_RXD12_P
HT_MCP_RXD13_P
HT_MCP_RXD14_P
HT_MCP_RXD15_P
HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RXD8_N
HT_MCP_RXD9_N
HT_MCP_RXD10_N
HT_MCP_RXD11_N
HT_MCP_RXD12_N
HT_MCP_RXD13_N
HT_MCP_RXD14_N
HT_MCP_RXD15_N
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL0_P
HT_MCP_RXCTL0_N
RESERVED
RESERVED
HT_MCP_COMP_VDD
HT_MCP_COMP_GND
PROCHOT*/GPIO20
THERMTRIP*/GPIO58
+1.2V_PLL_CPU_HT
+3.3V_PLL_CPU
?
?
SEC 1 OF 8
SEC 1 OF 8
MCP61
MCP61
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P
HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TXD8_N
HT_MCP_TXD9_N
HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL0_P
HT_MCP_TXCTL0_N
RESERVED
RESERVED
HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RST*
HT_MCP_PWRGD
CLKOUT_200MHZ_P
CLKOUT_200MHZ_N
CPU_SBVREF
CLKOUT_25MHZ
CLK200_TERM_GND
3
HT_RC_CPU_CAD_H0
AH23
HT_RC_CPU_CAD_H1
AH22
HT_RC_CPU_CAD_H2
AJ21
HT_RC_CPU_CAD_H3
AH21
HT_RC_CPU_CAD_H4
AH19
HT_RC_CPU_CAD_H5
AH18
HT_RC_CPU_CAD_H6
AJ17
HT_RC_CPU_CAD_H7
AH17
HT_RC_CPU_CAD_H8
AF22
HT_RC_CPU_CAD_H9
AB20
HT_RC_CPU_CAD_H10
AC20
HT_RC_CPU_CAD_H11
AE20
HT_RC_CPU_CAD_H12
AD18
HT_RC_CPU_CAD_H13
AF18
HT_RC_CPU_CAD_H14
AB17
HT_RC_CPU_CAD_H15
AC16
HT_RC_CPU_CAD_L0
AJ23
HT_RC_CPU_CAD_L1
AJ22
HT_RC_CPU_CAD_L2
AK21
HT_RC_CPU_CAD_L3
AG21
HT_RC_CPU_CAD_L4
AJ19
HT_RC_CPU_CAD_L5
AJ18
HT_RC_CPU_CAD_L6
AK17
HT_RC_CPU_CAD_L7
AG17
HT_RC_CPU_CAD_L8
AG22
HT_RC_CPU_CAD_L9
AB19
HT_RC_CPU_CAD_L10
AD20
HT_RC_CPU_CAD_L11
AF20
HT_RC_CPU_CAD_L12
AE18
HT_RC_CPU_CAD_L13
AG18
HT_RC_CPU_CAD_L14
AB16
HT_RC_CPU_CAD_L15
AD16
AH20
AG20
AC18
AB18
AH16
AG16
AE16
AF16
AH25
AH24
AG23
AG24
AK25
AJ25
+1.2V
AF24
AK26
AJ26
C272
C272
100nF
100nF
*
*
+80%~-20%
+80%~-20%
HTCPU_REQ*
5MIL TRACE
TP_CLKOUT25MHZ
HT_RC_CPU_CLK_H0 6
HT_RC_CPU_CLK_L0 6
HT_RC_CPU_CLK_H1 6
HT_RC_CPU_CLK_L1 6
HT_RC_CPU_CTL_H0 6
HT_RC_CPU_CTL_L0 6
CPU_LDTSTOP_L 9
CPU_HT_RESET_L 9
CPU_ALL_PWROK 9
CPU_CLKIN_H 9
CPU_CLKIN_L 9
R197
R197
*
*
2.37K Ohm
2.37K Ohm
+/-1%
+/-1%
HT_RC_CPU_CAD_H[15..0] 6
HT_RC_CPU_CAD_L[15..0] 6
*
*
+3.3V
R200
R200
*
*
10K
10K
+/-5%
+/-5%
C278
C278
+80/-20%
+80/-20%
4.7uF
4.7uF
2
1
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_HT
MCP61_HT
MCP61_HT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
13 35 Friday, June 27, 2008
13 35 Friday, June 27, 2008
13 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
U15A
U15A
?
H23
H25
K22
K24
K26
M22
M23
M26
P22
P26
P25
T23
T26
U23
V24
V27
H24
H26
K23
K25
K27
L22
M24
M25
P23
P27
P24
T24
T25
V23
V25
V26
B22
UNNAMED_19_MCP61_I99_PE0PRSNTX1
AF27
AF28
AE26
AF29
W22
Y22
U22
V22
?
PE0_RX0_P
PE0_RX1_P
PE0_RX2_P
PE0_RX3_P
PE0_RX4_P
PE0_RX5_P
PE0_RX6_P
PE0_RX7_P
PE0_RX8_P
PE0_RX9_P
PE0_RX10_P
PE0_RX11_P
PE0_RX12_P
PE0_RX13_P
PE0_RX14_P
PE0_RX15_P
PE0_RX0_N
PE0_RX1_N
PE0_RX2_N
PE0_RX3_N
PE0_RX4_N
PE0_RX5_N
PE0_RX6_N
PE0_RX7_N
PE0_RX8_N
PE0_RX9_N
PE0_RX10_N
PE0_RX11_N
PE0_RX12_N
PE0_RX13_N
PE0_RX14_N
PE0_RX15_N
PE_WAKE*/GPIO21
PE0_PRSNTX1*/SDVO_SCL
PE0_PRSNTX4*/SDVO_SDA
PE0_PRSNTX8*
PE0_PRSNTX16*
+1.2V_PLL_PE_SS
+1.2V_PLL_PE_SS
+1.2V_PLL_PE
+1.2V_PLL_PE
?
?
SEC 2 OF 8
SEC 2 OF 8
+1.2V
C255
C255
100nF
100nF
*
*
+80/-20%
+80/-20%
L19
L19
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
+80/-20%
+80/-20%
PE0_IN[15..0]
PE0_IN*[15..0]
*
*
1P2V_PLLPE
*
*
C265
C265
4.7uF
4.7uF
C517
C517
4.7uF
4.7uF
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
UNNAMED_19_MCP61_I99_PE0PRSNTX4
30mA
160mA
PE0_IN0
PE0_IN1
PE0_IN2
PE0_IN3
PE0_IN4
PE0_IN5
PE0_IN6
PE0_IN7
PE0_IN8
PE0_IN9
PE0_IN10
PE0_IN11
PE0_IN12
PE0_IN13
PE0_IN14
PE0_IN15
PE0_IN*0
PE0_IN*1
PE0_IN*2
PE0_IN*3
PE0_IN*4
PE0_IN*5
PE0_IN*6
PE0_IN*7
PE0_IN*8
PE0_IN*9
PE0_IN*10
PE0_IN*11
PE0_IN*12
PE0_IN*13
PE0_IN*14
PE0_IN*15
PE0_IN[15..0] 19
D D
PE0_IN*[15..0] 19
PE_WAKE* 19
PE0_PRSNTX1* 19
PE0_PRSNTX4* 19
PE0_PRSNTX8* 19
PE0_PRSNTX16* 19
C C
B B
A A
+80%~-20%
+80%~-20%
+1.2V
4
MCP61
MCP61
PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P
PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P
PE0_TX0_N
PE0_TX1_N
PE0_TX2_N
PE0_TX3_N
PE0_TX4_N
PE0_TX5_N
PE0_TX6_N
PE0_TX7_N
PE0_TX8_N
PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
PE_A_TSTCLK_N
PE_A_TSTCLK_P
PE_RESET*
PE_CLK_COMP
+3.3V_PLL_PE_SS
+3.3V_PLL_PE_SS
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
R240 0 +/-5% @8100C
R240 0 +/-5% @8100C
*
*
R332 0 +/-5% @8100C
R332 0 +/-5% @8100C
*
*
R333 0 +/-5% @8100C
R333 0 +/-5% @8100C
*
*
RN139
RN139
1
2
*
*
3
4
5
6
7 8
10K
@8100C
10K
@8100C
+/-5%
+/-5%
RN140
RN140
GMII_INTR*
1
2
*
*
3
4
5
6
7 8
10K
@8100C
10K
@8100C
+/-5%
+/-5%
G29
H27
J27
J30
K29
L29
M27
N27
N30
P29
R29
T27
U27
U30
V29
W29
G28
H28
J28
J29
K28
L28
M28
N28
N29
P28
R28
T28
U28
U29
V28
W28
Y24
Y23
AC24
AC25
AH29
AJ30
R22
T22
RX_ER
MII_COL
MII_CRS
RX_D1
RX_D3
RX_D0
RX_D2
RX_CLK
MDIO
RX_DV
PE0_REFCLK
PE0_REFCLK*
PECLK_TEST
PECLK_TEST*
PE_RESET*
PE_COMP
30mA
C514
C514
0.1uF
0.1uF
*
*
PE0_OUT[15..0]
PE0_OUT0
0
PE0_OUT1
1
PE0_OUT2
2
PE0_OUT3
3
PE0_OUT4
4
PE0_OUT5
5
PE0_OUT6
6
PE0_OUT7
7
PE0_OUT8
8
PE0_OUT9
9
PE0_OUT10
10
PE0_OUT11
11
PE0_OUT12
12
PE0_OUT13
13
PE0_OUT14
14
PE0_OUT15
15
PE0_OUT*[15..0]
PE0_OUT*0
0
PE0_OUT*1
1
PE0_OUT*2
2
PE0_OUT*3
3
PE0_OUT*4
4
PE0_OUT*5
5
PE0_OUT*6
6
PE0_OUT*7
7
PE0_OUT*8
8
PE0_OUT*9
9
PE0_OUT*10
10
PE0_OUT*11
11
PE0_OUT*12
12
PE0_OUT*13
13
PE0_OUT*14
14
PE0_OUT*15
15
R209 2.37K Ohm
R209 2.37K Ohm
*
*
+80/-20%
+80/-20%
PE0_REFCLK 19
PE0_REFCLK* 19
R320
R320
100
100
+/-5%
+/-5%
Dummy
Dummy
PE_RESET* 19
+/-1%
+/-1%
L20
L20
1 2
*
*
C518
C518
40 Ohm@100MHz
40 Ohm@100MHz
4.7uF
4.7uF
+3.3V_DUAL
DAC_RED 31
DAC_GREEN 31
DAC_BLUE 31
PLACE NEAR MCP61
+3.3V
PE0_OUT[15..0] 19
PE0_OUT*[15..0] 19
+3.3V
L16 40 Ohm@100MHz
L16 40 Ohm@100MHz
1 2
*
*
+80/-20%
+80/-20%
DAC_RED
DAC_GREEN
DAC_BLUE
R202
R202
150
150
+/-5%
+/-5%
L14 40 Ohm@100MHz
L14 40 Ohm@100MHz
1 2
*
*
+80/-20%
+80/-20%
3
U15B
U15B
?
?
Y28
PE1_IN 19
PE1_IN* 19
PE1_PRSNT* 19
R208
R208
100
100
+/-5%
+/-5%
RX_D0 26
RX_D1 26
RX_D2 26
RX_D3 26
RX_CLK 26
RX_DV 26
RX_ER 26
MII_COL 26
MII_CRS 26
TP28TP28
*
*
1
2
C280
C280
4.7uF
4.7uF
C370
C370
100nF
100nF
+80%~-20%
+80%~-20%
R207
R207
150
150
+/-5%
+/-5%
*
*
+80%~-20%
+80%~-20%
DAC_HSYNC 31
DAC_VSYNC 31
C284
C284
100nF
100nF
R199
R199
124
124
+/-1%
+/-1%
+3.3V_PLL_MAC_DUAL
+3.3V_DUAL
C381
C381
4.7uF
4.7uF
*
*
1
1
R203
R203
150
150
+/-5%
+/-5%
2
2
*
*
*
*
PE_B_TSTCLK_N
Dummy
Dummy
RX_ER
COL
CRS
DACRSET
C274
C274
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
3P3V_DAC
PE_B_TSTCLK_P
GMII_INTR*
1
R201
R201
MII_COMP_3P3V
R204
R204
*
*
+/-1%
+/-1%
49.9
49.9
*
*
+/-1%
+/-1%
DAC_HSYNC
DAC_VSYNC
AB29
AB28
AK29
AG28
AG30
AC27
AC26
AD27
AD28
AE30
AE29
AG29
AH30
49.9
49.9
AJ29
Y27
D26
E26
B26
B27
A26
C26
D24
E24
F23
G24
6mA
M9
B23
MII_COMP_GND
C23
D30
D29
C30
B30
C29
B29
A29
100mA
F28
PE1_RX_P
PE1_RX_N
PE2_RX_P
PE2_RX_N
PEA_CLKREQ*/GPIO51
PE1_PRSNT*
PE2_PRSNT*
PE_B_TSTCLK_P
PE_B_TSTCLK_N
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RGMII_RXD0/MII_RXD0
RGMII_RXD1/MII_RXD1
RGMII_RXD2/MII_RXD2
RGMII_RXD3/MII_RXD3
RGMII_RXC/MII_RXCLK
RGMII_RXCTL/MII_RXDV
MII_RXER/GPIO36
MII_COL/GPIO13/MI2C_DATA
MII_CRS/GPIO14/MI2C_CLK
RGMII/MII_INTR*/GPIO35
+3.3V_PLL_MAC_DUAL
MII_COMP_3P3V
MII_COMP_GND
DAC_RED
DAC_GREEN
DAC_BLUE
DAC_HSYNC
DAC_VSYNC
DAC_RSET
DAC_VREF
+3.3V_DAC
?
?
BYPASS CAPS
+5V_DUAL
C436
C436
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
C430
C430
100nF
100nF
+80%~-20%
+80%~-20%
MCP61
MCP61
SEC 3 OF 8
SEC 3 OF 8
2
PE1_REFCLK_P
PE1_REFCLK_N
PE2_REFCLK_P
PE2_REFCLK_N
RGMII_TXD0/MII_TXD0
RGMII_TXD1/MII_TXD1
RGMII_TXD2/MII_TXD2
RGMII_TXD3/MII_TXD3
RGMII_TXC/MII_TXCLK
RGMII_TXCTL/MII_TXEN
RGMII/MII_MDC
RGMII/MII_MDIO
RGMII/MII_PWRDWN*/GPIO37
MII_RESET*/GPIO12
DDC_CLK/GPIO17
DDC_DATA/GPIO19
PE1_TX_P
PE1_TX_N
PE2_TX_P
PE2_TX_N
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
BUF_25MHZ
MII_VREF
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST*
XTALIN
XTALOUT
XTALIN_RTC
XTALOUT_RTC
AA28
AA27
AA30
AA29
Y26
Y25
AB23
AA23
AC29
AC28
AE27
AE28
AB24
AB25
AB27
AB26
A28
B28
D28
E27
D27
R191 0
R191 0
E28
B25
A25
F24
C24
C25
4.7K +/-5%
4.7K +/-5%
C27
DDC_CLK
B6
A6
MCP61_TCK
M7
M5
M6
M8
TP_MCP61_TRST*
L9
XTALIN
K7
XTALOUT
K8
XTALIN_RTC
K6
XTALOUT_RTC
K5
RN26
RN26
*
*
1
3
5
7 8
*
*
@AC131
@AC131
@AC131
@AC131
MDC
MDIO
R219
R219
33
33
*
*
+/-5%
+/-5%
R205
R205
*
*
@AC131
@AC131
DDC_DATA
C438
C438
18pF
18pF
*
*
+/-5%
+/-5%
modify 9/13
X3_1
X3_1
Crystal Retainer
Crystal Retainer
PE1_OUT 19
PE1_OUT* 19
PE1_REFCLK 19
PE1_REFCLK* 19
TXD0
0 Ohm
0 Ohm
2
TXD1
+/-5%
+/-5%
4
TXD2
6
TXD3
+/-5%
+/-5%
LAN_X1 26
*
*
@AC131
@AC131
DDC_CLK 31
DDC_DATA 31
*
*
*
*
Dummy
Dummy
X3 XTAL-32.768kHz X3 XTAL-32.768kHz
1 2
C439
C439
3
4
*
*
C296
C296
100nF
100nF
+80%~-20%
+80%~-20%
R270
R270
10K
10K
+/-5%
+/-5%
R277
R277
10K
10K
+/-5%
+/-5%
18pF
18pF
+/-5%
+/-5%
+3.3V_DUAL
1
TX_D0 26
TX_D1 26
TX_D2 26
TX_D3 26
TX_CLK 26
TX_EN 26
MII_MDC 26
MII_MDIO 26
R196
R196
*
*
1.47K Ohm
1.47K Ohm
+/-1%
+/-1%
R190
R190
@AC131
@AC131
*
*
1.47K Ohm
1.47K Ohm
+/-1%
+/-1%
#R1000#R1001
#R1000#R1001
@8100C
@8100C
X2
X2
1 2
C442
C442
27pF
27pF
*
*
+/-5%
+/-5%
modify 9/19
Dummy
Dummy
R1000
R1000
*
*
10K
10K
+/-5%
+/-5%
r0402h4
r0402h4
+3.3V
C365
C365
100nF
100nF
*
*
+80%~-20%
+80%~-20%
R1001
R1001
*
*
1.47K Ohm
1.47K Ohm
+/-1%
+/-1%
r0402h4
r0402h4
@AC131
@AC131
XTAL-25MHz
XTAL-25MHz
*
*
C440
C440
27pF
27pF
+/-5%
+/-5%
TX_CLK
@8100C
@8100C
R392
R392
+/-5%
+/-5%
10K
10K
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_PCI-E_VGA
MCP61_PCI-E_VGA
MCP61_PCI-E_VGA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
14 35 Friday, June 27, 2008
14 35 Friday, June 27, 2008
14 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
U15F
U15F
?
+1.2V
7.008A
AK27
AH27
AJ27
AG26
AG25
AE22
AE23
D D
AB21
AC21
389mA
AB22
AE24
AD22
AA22
AC22
+3.3V
C C
P15
AK14
M15
U15G
U15G
MCP61
MCP61
GND
GND
GND
?
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
U18
+1.2V
+1.2V
+1.2V
V19
+1.2V
V18
+1.2V
U19
+1.2V
W19
+1.2V
W18
+1.2V
V15
+1.2V
U16
+1.2V
T14
+1.2V
W14
+1.2V
+1.2V
+1.2V
U14
+1.2V
T18
+1.2V
U15
+1.2V
R15
+1.2V
V17
+1.2V
V16
+1.2V
R17
+1.2V
T16
+1.2V
U17
+1.2V
R19
+1.2V
+1.2V_PED
+1.2V_PED
+1.2V_PED
+1.2V_PED
+1.2V_PED
H15
+3.3V
J15
+3.3V
AC6
+3.3V
AC5
+3.3V
?
?
M13
M14
P14
N14
N12
AC8
N19
?
?
GND
GND
GND
GND
GND
GND
GNDW6GND
SEC 7 OF 8
SEC 7 OF 8
D23
P12
GND
GNDN9GNDR9GNDU1GND
MCP61
MCP61
+1.2V_SP_D
+1.2V_SP_D
+1.2V_SP_D
+1.2V_SP_D
+1.2V_DUAL
+1.2V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_USB_DUAL
+3.3V_USB_DUAL
J21
F30
AB3
A30
AK30
GNDF7GNDN8GND
GNDK9GND
GND
GNDH7GND
GND
+1.2V_HT
W15
+1.2V_HT
W16
+1.2V_HT
W17
+1.2V_HT
AK28
+1.2V_PEA
AJ28
+1.2V_PEA
AH28
+1.2V_PEA
AG27
+1.2V_PEA
AF26
+1.2V_PEA
AE25
+1.2V_PEA
AD24
+1.2V_PEA
AC23
+1.2V_PEA
V13
W13
V14
W12
W9
+1.2V_SP_A
W8
+1.2V_SP_A
V8
+1.2V_SP_A
V9
+1.2V_SP_A
U9
+1.2V_SP_A
F26
F27
L4
J22
L3
L2
PLACE CAPS CLOSE TO 3.3V_USB_DUAL
ISSUES IN THE PAST
U25
W25
AA25
AD26
H21
K30
P30
V30
AB30
GND
GND
GND
GND
GND
GND
GND
GND
GNDK1GND
700mA
1.837A
97mA
320mA
+1.2V_DUAL
+3.3V_DUAL
J25
L25
R25
GND
GND
GND
286mA
200mA
350mA 827mA
L27
R27
N13
W27
GND
GND
GND
GND
+1.2V
L13
L13
+1.2V
L22
L22
40 Ohm@100MHz
40 Ohm@100MHz
*
*
1 2
W23
GND
2 1
AE9
GNDJ9GNDU8GND
FB 30Ohm
FB 30Ohm
F25
AG7
GND
GND
P18
GND
modify 8/20
1P2V_PEA
1P2V_SP_A
AK5
F29
F19
F21
GND
GND
GND
GND
4
3
2
1
MCP61 DECOUPLING
+1.2V
C303
C303
C301
C301
C520
C520
10uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C263
C263
C270
C270
10uF
10uF
10uF
10uF
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
1P2V_PEA
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
C523
*
C523
+80/-20%
+80/-20%
4.7uF
4.7uF
C380
C380
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
10uF
*
*
C250
C250
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C269
C269
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C379
C379
100nF
100nF
+80%~-20%
+80%~-20%
MODIFY 8/21
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
1P2V_SP_A
+3.3V_DUAL
C515
C515
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
AB4
AJ7
E29
AC17
AC19
H11
A27
AG4
AF1
AK10
AC13
T19
C28
AC4
GND
GND
GND
GND
GNDD1GND
GND
GNDR8GND
GND
GND
GND
GND
GND
GND
GNDW4GNDV3GNDR4GND
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
+1.2V
C288
C288
C277
C277
10uF
10uF
10uF
10uF
*
*
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C262
C262
C276
C276
10uF
10uF
10uF
10uF
*
*
*
*
Dummy
Dummy
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C525
C525
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C371
C371
100nF
100nF
*
*
+80%~-20%
+80%~-20%
100nF
100nF
+80%~-20%
+80%~-20%
C253
C282
C282
10uF
10uF
*
*
C302
C302
C281
C281
100nF
100nF
10uF
10uF
*
*
*
*
+80%~-20%
+80%~-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
+1.2V_HT
Reserved
Reserved
C373
C373
0.1uF
0.1uF
*
*
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C336
C336
C364
C364
100nF
100nF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
C253
100nF
100nF
+80%~-20%
+80%~-20%
C254
C254
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C516
C516
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
*
*
C297
*
*
C251
C251
1uF
1uF
C267
C267
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
*
C300
C300
100nF
100nF
+80%~-20%
+80%~-20%
C297
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C298
C298
100nF
100nF
*
*
C257
C257
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C287
C287
10uF
10uF
*
*
Dummy
Dummy
*
*
MODIFY 8/21 MODIFY 8/21
+3.3V
C368
C368
C339
C339
C418
*
*
C418
100nF
100nF
+80%~-20%
+80%~-20%
*
*
100nF
100nF
+80%~-20%
+80%~-20%
*
*
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C286
C286
10uF
10uF
*
*
C372
C372
100nF
100nF
+80%~-20%
+80%~-20%
*
*
+1.2V_DUAL
C264
C264
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C268
C268
C258
C258
100nF
100nF
10uF
10uF
*
*
+80%~-20%
+80%~-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
SEC 8 OF 8
SEC 8 OF 8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA1GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDU6GNDR6GNDN6GNDL6GNDJ6GND
GND
GND
GNDC4GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDF9GND
GND
GND
GND
GND
GND
GND
GND
GNDU2GND
GND
GND
GNDD7GND
GND
GND
GND
B B
J13
T15
P19
A A
P13
H19
AE11
N25
AB7
G26
G27
AC9
H13
D19
H17
D25
AA9
AE13
AE15
AE17
AE19
AE21
AH26
5
E30
D11
AA8
D15
AF30
AK18
AK22
AG15
AG19
J17
F11
F13
F15
F17
J23
P16
N18
R23
R13
N22
AK1
M18
M19
J11
L23
T17
T13
P17
R16
R18
N15
M17
4
T12
R12
R14
N23
N17
N16
M16
AC7
AG11
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_POWER
MCP61_POWER
MCP61_POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
15 35 Friday, June 27, 2008
15 35 Friday, June 27, 2008
15 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
D D
PCI_AD[31..0] 20,26
C C
PCI_C/BE*[3..0] 20,26
PCI_FRAME* 20,26
PCI_IRDY* 20,26
PCI_TRDY* 20,26
PCI_STOP* 20,26
PCI_DEVSEL* 20,26
PCI_PERR* 20,26
PCI_SERR* 20,26
RN2833
RN2833
+/-5%
PCIRST_SLOT1* 20
PCIRST_SLOT2* 20
PCIRST_SLOT3* 26
B B
PCIRST_IDE* 22
LPCRST_SIO* 21
PCIRST_SLOT1*
PCIRST_SLOT2*
PCIRST_IDE*
LPCRST_SIO*
+/-5%
*
*
1
3
5
R325
R325
7 8
33
33
+/-5%
+/-5%
PCI_C/BE*[3..0]
PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PAR 20,26
PCI_PERR*
PCI_SERR*
PCI_PME* 20,26
*
*
PCI_PME*
2
4
6
PCI_AD[31..0]
PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3
PCI_RESET1*
PCI_RESET2*
PCI_RESET3*
LPC_RESET*
4
PCI_AD0
0
PCI_AD1
1
PCI_AD2
2
PCI_AD3
3
PCI_AD4
4
PCI_AD5
5
PCI_AD6
6
PCI_AD7
7
PCI_AD8
8
PCI_AD9
9
PCI_AD10
10
PCI_AD11
11
PCI_AD12
12
PCI_AD13
13
PCI_AD14
14
PCI_AD15
15
PCI_AD16
16
PCI_AD17
17
PCI_AD18
18
PCI_AD19
19
PCI_AD20
20
PCI_AD21
21
PCI_AD22
22
PCI_AD23
23
PCI_AD24
24
PCI_AD25
25
PCI_AD26
26
PCI_AD27
27
PCI_AD28
28
PCI_AD29
29
PCI_AD30
30
PCI_AD31
31
D14
PCI_AD0
E14
PCI_AD1
A13
PCI_AD2
C14
PCI_AD3
A14
PCI_AD4
B14
PCI_AD5
C15
PCI_AD6
J16
PCI_AD7
G16
PCI_AD8
F16
PCI_AD9
E16
PCI_AD10
B15
PCI_AD11
D16
PCI_AD12
C16
PCI_AD13
D17
PCI_AD14
C17
PCI_AD15
J19
PCI_AD16
J20
PCI_AD17
H20
PCI_AD18
G20
PCI_AD19
F20
PCI_AD20
E20
PCI_AD21
B18
PCI_AD22
C19
PCI_AD23
D20
PCI_AD24
C20
PCI_AD25
D21
PCI_AD26
C21
PCI_AD27
B21
PCI_AD28
H22
PCI_AD29
G22
PCI_AD30
F22
PCI_AD31
H16
PCI_CBE0*
B17
PCI_CBE1*
A18
PCI_CBE2*
B19
PCI_CBE3*
C18
PCI_FRAME*
A17
PCI_IRDY*
D18
PCI_TRDY*
F18
PCI_STOP*
E18
PCI_DEVSEL*
J18
PCI_PAR
G18
PCI_PERR*/GPIO43/RS232_DCD*
H18
PCI_SERR*
E22
PCI_PME*/GPIO30
C13
PCI_RESET0*
G14
PCI_RESET1*
B11
PCI_RESET2*
F12
PCI_RESET3*
D9
LPC_RESET*
U15C
U15C
?
?
?
?
SEC 4 OF 8
SEC 4 OF 8
MCP61
MCP61
PCI_REQ0*
PCI_REQ2*/GPIO40/RS232_DSR*
PCI_REQ3*/GPIO38/RS232_CTS*
PCI_GNT2*/GPIO41/RS232_DTR*
PCI_GNT3*/GPIO39/RS232_RTS*
PCI_GNT4*/GPIO53/RS232_SOUT*
LPC_PWRDWN*/GPIO54/EXT_NMI*
PCI_REQ1*
PCI_REQ4*/GPIO52/RS232_SIN*
PCI_GNT0*
PCI_GNT1*
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME*
LPC_DRQ0*/GPIO50
LPC_DRQ1*/GPIO15/FANRPM1
LPC_SERIRQ
LPC_CLK0
LPC_CLK1
G12
A10
C11
H14
D13
A9
C10
B10
J14
C12
C22
D22
A22
A21
B13
F14
D12
E12
H12
J12
G10
F10
D10
E10
C8
H10
C9
B9
J10
E8
D8
3
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_CLK0
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
RN27
RN27
*
*
1
3
5
7 8
22 Ohm
22 Ohm
+/-5%
+/-5%
LPCPWRDWN*
LPCFRAME*
LPC_SERIRQ
LPC_CLK0
PCI_REQ*0 20
PCI_REQ*1 20
PCI_REQ*2 20
PCI_REQ*3 20
PCI_REQ*4 20,26
PCI_GNT*2 20
PCI_GNT*3 20
PCI_GNT*4 26
PCI_INTW* 20
PCI_INTX* 20
PCI_INTY* 20
PCI_INTZ* 20,26
2
4
6
R226
R226
TP35TP35
1
22
22
*
*
+/-5%
+/-5%
C363
C363
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
LPC_DRQ1*
*
*
LPC_AD0 21
LPC_AD1 21
LPC_AD2 21
LPC_AD3 21
1
R230
R230
33
33
*
*
+/-5%
+/-5%
C359
C359
22pF
22pF
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
TP32TP32
PCI_CLKSIO
+3.3V
Dummy
Dummy
*
*
LPC_DRQ0*
R228
R228
8.2K
8.2K
+/-5%
+/-5%
R221
R221
22
22
*
*
+/-5%
+/-5%
LPC_DRQ0* 21
LPC_SERIRQ 21
PCI_CLKSIO 21
PCI_CLK2
PCI_CLK0
PCI_CLK3
*
*
Dummy
Dummy
2
C556
C556
22pF
22pF
*
*
Dummy
Dummy
C554
C554
C555
C555
22pF
22pF
22pF
22pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
*
*
R225
R225
8.2K
8.2K
*
*
+/-5%
+/-5%
00 = LPC BIOS
01 = PCI BIOS
10 = SPI BIOS*
11 = RESERVED
RN51
RN51
1
2
3
4
5
6
7 8
22 Ohm
22 Ohm
+/-5%
+/-5%
LPC_FRAME* 21
STRAP
HDA_SDOUT
LPC_FRAME
DEFAULT*
PCI_CLKSLOT1
PCI_CLKSLOT2
PCI_CLK_LAN
PCI_CLKSLOT1 20
PCI_CLKSLOT2 20
PCI_CLK_LAN 26
1
near SB
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_PCI
MCP61_PCI
MCP61_PCI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
16 35 Friday, June 27, 2008
16 35 Friday, June 27, 2008
16 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
U15_1
U15_1
1
1
D D
2
Heatsink_NB
Heatsink_NB
C C
2
modify 8/16
SATA_1
SATA_1
CONN-SATA
CONN-SATA
SATA_2
SATA_2
CONN-SATA
CONN-SATA
SATA_3
SATA_3
CONN-SATA
CONN-SATA
SATA_4
SATA_4
CONN-SATA
CONN-SATA
8
9
8
9
8
9
8
9
PLACE CAPS AT CONN
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
4
*
*
SP_TX0P
C455
C455
SP_TX0M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX0M SP_RX0M_C
C477
C477
SP_RX0P SP_RX0P_C
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
PLACE CAPS AT CONN
*
*
SP_TX1P
C472
C472
SP_TX1M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX1M
C481
C481
SP_RX1P
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
PLACE CAPS AT CONN
*
*
SP_TX2P
C456
C456
SP_TX2M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX2M SP_RX2M_C
C473
C473
SP_RX2P SP_RX2P_C
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
PLACE CAPS AT CONN
*
*
SP_TX3P
C478
C478
SP_TX3M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX3M
C482
C482
SP_RX3P
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C467
C467
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C479
C479
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C474
C474
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C483
C483
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C468
C468
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C475
C475
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C480
C480
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C484
C484
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
SP_TX0P_C
*
*
SP_TX0M_C
*
*
SP_TX1P_C
*
*
SP_TX1M_C
SP_RX1M_C
*
*
SP_RX1P_C
SP_TX2P_C
*
*
SP_TX2M_C
*
*
SP_TX3P_C
*
*
SP_TX3M_C
SP_RX3M_C
*
*
SP_RX3P_C
AA4
AA3
AA2
AA1
AB1
AB2
V2
V1
W3
W2
Y8
Y7
Y5
Y6
Y4
Y3
U15D
U15D
?
?
SATA_A0_TX_P
SATA_A0_TX_N
SATA_A0_RX_N
SATA_A0_RX_P
SATA_A1_TX_P
SATA_A1_TX_N
SATA_A1_RX_N
SATA_A1_RX_P
SATA_B0_TX_P
SATA_B0_TX_N
SATA_B0_RX_N
SATA_B0_RX_P
SATA_B1_TX_P
SATA_B1_TX_N
SATA_B1_RX_N
SATA_B1_RX_P
3
SEC 5 OF 8
SEC 5 OF 8
MCP61
MCP61
CABLE_DET_P/GPIO63
IDE_DATA_P0
IDE_DATA_P1
IDE_DATA_P2
IDE_DATA_P3
IDE_DATA_P4
IDE_DATA_P5
IDE_DATA_P6
IDE_DATA_P7
IDE_DATA_P8
IDE_DATA_P9
IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15
IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2
IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_RDY_P
IDE_COMP_3P3
IDE_COMP_GND
AJ3
AJ2
AH3
AH1
AG2
AF2
AF4
AE6
AE5
AF5
AF3
AG1
AG3
AH2
AJ1
AK2
AG6
AJ5
AH6
AK6
AJ6
AG5
AH4
AH5
AK3
AJ4
AK4
AF6
AD5
AD6
IDE_PDD[15..0]
IDE_PDD0
0
IDE_PDD1
1
IDE_PDD2
2
IDE_PDD3
3
IDE_PDD4
4
IDE_PDD5
5
IDE_PDD6
6
IDE_PDD7
7
IDE_PDD8
8
IDE_PDD9
9
IDE_PDD10
10
IDE_PDD11
11
IDE_PDD12
12
IDE_PDD13
13
IDE_PDD14
14
IDE_PDD15
15
IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2
IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_PR*
IDE_IORDY_P
CBLE_DET_P
IDE_COMP_3P3V
IDE_COMP_GND
IDE_PDD[15..0] 22
IDE_ADDR_P0 22
IDE_ADDR_P1 22
IDE_ADDR_P2 22
IDE_CS1_P* 22
IDE_CS3_P* 22
IDE_DACK_P* 22
IDE_IOW_P* 22
IDE_INTR_P 22
IDE_DREQ_P 22
IDE_IORDY_P 22
CBLE_DET_P 22
*
*
*
*
R271 121 Ohm
R271 121 Ohm
R258 121 Ohm
R258 121 Ohm
+/-1%
+/-1%
+/-1%
+/-1%
2
+3.3V
R235
R235
IDE_IOR_P*
0
0
*
*
+/-5%
+/-5%
near SB
1
IDE_IOR_P* 22
AC3
RESERVED
AC2
RESERVED
AD4
RESERVED
AD3
+1.2V
*
*
AE4
AE3
AE1
AE2
Y9
7.5mA
U13
U12
V12
M12
C256
C256
100nF
100nF
+80%~-20%
+80%~-20%
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
+1.2V_PLL_SP_VDD
+1.2V_PLL_SP_SS
+3.3V_PLL_SP_SS
+3.3V_PLL_LEG
+3.3V_PLL_DISP
?
?
3
+1.2V
L23
L23
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
B B
A A
+3.3V
L21
L21
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
5
*
*
+3.3_PLL
C522
C522
+80/-20%
+80/-20%
4.7uF
4.7uF
+1.2V_PLL_SP_VDD
C524
C524
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
4
80mA
73mA
SATA_LED*/GPIO57
SATA_TSTCLK_P
SATA_TSTCLK_N
SATA_TERMP
A5
AA6
AB6
AB5
SATA_TSTCLK_P
SATA_TSTCLK_N
SATA_TERMP
SATA_HDLED* 27
R324
R324
100
100
+/-5%
+/-5%
Dummy
Dummy
R257
R257
*
*
2.49K
2.49K
+/-1%
+/-1%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_SATA_IDE
MCP61_SATA_IDE
MCP61_SATA_IDE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
17 35 Friday, June 27, 2008
17 35 Friday, June 27, 2008
17 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
STRAP
HDA_SDOUT
LPC_FRAME
DEFAULT*
00 = LPC BIOS
* = DEFAULT
SPDIF0
(SIO CLK)
1 = *24MHZ
+3.3V
*
*
AC_RST*
R236 22 +/-5%
R236 22 +/-5%
AC_SYNC
R239 22 +/-5%
R239 22 +/-5%
R238
R238
10K
10K
+/-5%
+/-5%
CLR_CMOS(2-3)
CLR_CMOS(2-3)
CLR_CMOS
CLR_CMOS
Header_1X3
Header_1X3
Jumper_2P_Blu
Jumper_2P_Blu
3
2
1
0 = 14.318MHZ
SPDIF0
R250
R250
10K
10K
+/-5%
+/-5%
3
2
1
D D
AC_RST*
1 = *RGMII
0 = MII
AC_RST* 32
AC_SYNC 32
*
*
+3.3V_DUAL
R334
R334
10K
10K
+/-5%
+/-5%
C C
B B
GPIO2_CHIPSET
*
*
R335
R335
Dummy
Dummy
10K
10K
+/-5%
+/-5%
01 = PCI BIOS
10 = SPI BIOS*
11 = RESERVED
AC_BITCLK 32
AC_SDOUT 32
AC_SDIN_0 32
C66
C66
*
*
22pF
22pF
Dummy
Dummy
*
*
*
*
+3.3V_DUAL
C75
C75
*
*
22pF
22pF
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
GPIO PIN: Board ID Select.
SPI CLK Frequency Select
GPIO_9/SPI_DO (MSB)
GPIO_11/SPI_CLK (LSB)
00 = 500 kHz
01 = 1.8 MHz
10 = 2.5 MHz
11 = 25 MHz
VBAT
R133
R133
*
*
51KOhm
51KOhm
+/-5%
+/-5%
R134
R134
*
*
0
0
+/-5%
+/-5%
+3.3V
R246
R246
*
*
10K
10K
+/-5%
+/-5%
R71 22
R71 22
+/-5%
modify 8/20
*
*
R245
R245
10K
10K
*
*
+/-5%
+/-5%
RTC_RST*
*
*
Dummy
Dummy
@VT1708B
@VT1708B
+/-5%
*
*
@ALC662
@ALC662
AC_SDOUT
R251 10K @AC131
R251 10K @AC131
SLP_S5* 28
All-PWROK 28
*
*
R241
R241
22
22
*
*
+/-5%
+/-5%
R331
R331
C73
C73
*
*
10K
10K
22pF
22pF
+/-5%
+/-5%
Dummy
Dummy
*
*
R256
R256
*
*
10K
10K
@8100C
@8100C
R244
R244
SPI_DI
10K
10K
SPI_DO
+/-5%
+/-5%
SPI_CS
SPI_CLK
5/5. Max length: 10 inches.
R234
R234
*
*
10K
10K
+/-5%
+/-5%
Dummy
Dummy
Dummy
Dummy
+3.3V_DUAL
CLEAR CMOS CONTROL
CLEAR CMOS 1-2
2-3* NORMAL
*DEFAULT
PULL BATT TO CLR TIME
R273
R273
1K
1K
*
*
+/-5%
+/-5%
*
*
TP33TP33
C72
C72
22pF
22pF
50V, NPO, +/-5%
50V, NPO, +/-5%
R249
R249
*
*
10K
10K
+/-5%
+/-5%
R247
R247
0
0
+/-5%
+/-5%
PKG_TEST
R231
R231
1K
1K
*
*
+/-5%
+/-5%
*
*
All-PWROK
HTVDD_EN
CPU_VLD
CPU_EN
TP_GP_REFCLK
1
AC_OUT
TP41TP41
C369
C369
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
GPIO2_CHIPSET
R248
R248
*
*
10K
10K
+/-5%
+/-5%
4
Dummy
Dummy
R237
R237
10K
10K
+/-5%
+/-5%
B7
B4
A3
A2
B1
1
B2
C3
B3
F2
F1
F6
J8
G3
G5
G6
D3
D4
E4
E3
D5
E5
K4
J3
H3
J4
J1
J2
L8
F8
U15E
U15E
?
?
GP_REFCLK
HDA_BCLK
HDA_SDATA_OUT0/GPIO45
HDA_SDATA_IN0/GPIO22
HDA_SDATA_IN1/GPIO23/MGPIO0
RESERVED
HDA_RESET*
HDA_SYNC/GPIO44
GPIO_1
GPIO_2/NMI*
GPIO_3/SMI*
GPIO_4/SCI_INTR*
GPIO_5/INIT*
GPIO_6/FERR*/SYS_FERR*
GPIO_7/NFERR*/SYS_PERR*
GPIO_8/SPI_DI
GPIO_9/SPI_DO
GPIO_10/SPI_CS
GPIO_11/SPI_CLK
RESERVED
RESERVED
RTC_RST*
MEM_VLD
MCPVDD/HT_VLD
MCPVDD/HT_EN
CPU_VLD
CPUVDD_EN
PKG_TEST
TEST_MODE_EN
?
?
SEC 6 OF 8
SEC 6 OF 8
MCP61
MCP61
USB0_P
USB0_N
USB1_P
USB1_N
USB2_P
USB2_N
USB3_P
USB3_N
USB4_P
USB4_N
USB5_P
USB5_N
USB6_P
USB6_N
USB7_P
USB7_N
USB8_P
USB8_N
USB9_P
USB9_N
USB_OC0*/GPIO25
USB_OC1*/GPIO26
USB_OC2*/GPIO27
USB_OC3*/GPIO28/MGPIO1
USB_OC4*/GPIO29
USB_RBIAS_GND
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
A20GATE/GPIO55
INTRUDER*
EXT_SMI*/GPIO32
RI*/GPIO33
PWRBTN*
SIO_PME*/GPIO31
KBRDRSTIN*/GPIO56
SMB_CLK0
SMB_DATA0
SMB_CLK1/MSMB_CLK
SMB_DATA1/MSMB_DATA
+3.3V_VBAT
BUF_SIO_CLK
SUS_CLK/GPIO34
THERM*/GPIO59
RSTBTN*
SLP_S5*
SLP_S3*
PWRGD_SB
PS_PWRGD
FANRPM0/GPIO60
FANCTL0/GPIO61
FANCTL1/GPIO62
THERM_SIC/GPIO48
THERM_SID/GPIO49
3
SPKR
M3
M4
N3
N4
N1
N2
P1
P2
R2
R3
P3
P4
T3
T4
U3
U4
T6
T5
T8
T7
P7
P8
P9
P5
P6
T9
H9
AE7
V5
V4
V7
V6
F5
K2
F3
H4
C7
G4
F4
A4
C2
C1
D2
E2
K3
B5
E1
C6
H5
H8
G8
H6
G2
E6
D6
C5
AH7
AF8
USB_0+
USB_0-
USB_1+
USB_1-
USB_2+
USB_2-
USB_3+
USB_3-
USB_4+
USB_4-
USB_5+
USB_5-
USB_6+
USB_6-
USB_7+
USB_7-
USB_8+
USB_8-
USB_9+
USB_9-
USB_RBIAS_GND
A20GATE
INTRUDER*
EXTSMI*
SPEAKER
PWRBTN#
IO_PME*
SIO_KBRST*
SMB_MEM_SCL
SMB_MEM_SDA
SMB_SCL
SMB_SDA
VBAT
CPU_THERM*
SLP_S5*
SLP_S3*
RSMRST#
RSMRST#
USB_0+ 25
USB_0- 25
USB_1+ 25
USB_1- 25
USB_2+ 25
USB_2- 25
USB_3+ 25
USB_3- 25
USB_4+ 25
USB_4- 25
USB_5+ 25
USB_5- 25
USB_6+ 25
USB_6- 25
USB_7+ 25
USB_7- 25
USB_OC0*
USB_OC1*
USB_OC2*
USB_OC3*
USB_OC4*
NV_A20GATE 21
Dummy
Dummy
EXTSMI* 21
SPEAKER 27
IO_PME* 21
NV_KBRST* 21
1
TP42TP42
FP_RESET* 27
SLP_S5* 28
SLP_S3* 21
RSMRST# 26,28
CPU_SIC 9
CPU_SID 9
R243
R243
100K
100K
*
*
+/-5%
+/-5%
R262
R262
1.24K
1.24K
*
*
+/-1%
+/-1%
R255
R255
4.7K
4.7K
*
*
+/-5%
+/-5%
PWRBTN# 21
USB_OC0* 25
USB_OC1* 25
USB_OC2* 25
USB_OC3* 25
+3.3V_DUAL
C367
C367
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
Dummy
Dummy
+3.3V_DUAL
RN41
RN41
2.7K
2.7K
+/-5%
+/-5%
R233
R233
22
22
*
*
+/-5%
+/-5%
R261
R261
0
0
+/-5%
+/-5%
*
*
R260
R260
0
0
+/-5%
+/-5%
*
*
2
+3.3V
642
135
7 8
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
VRM_EN
USB_0+
*
*
USB_0USB_5+
USB_5-
USB_2+
*
*
USB_2USB_1+
USB_1-
USB_4+
*
*
USB_4USB_3+
USB_3-
USB_7+
*
*
USB_7USB_6+
USB_6-
USB_8-
*
*
USB_8+
USB_9+
USB_9-
SMB_SCL 19,20,26,28
SMB_SDA 19,20,26,28
BUF_SIO_CLK BUF_SIO_CLK_R
C422
C422
C423
C423
0.1uF
0.1uF
4.7uF
4.7uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
VRM_EN 28,30
PWRGD_PS 27,28
RN49
RN49
15K
15K
1
2
+/-5%
+/-5%
3
4
5
6
7 8
RN50
RN50
15K
15K
1
2
+/-5%
+/-5%
3
4
5
6
7 8
RN29
RN29
15K
15K
1
2
+/-5%
+/-5%
3
4
5
6
7 8
RN46
RN46
15K
15K
1
2
+/-5%
+/-5%
3
4
5
6
7 8
RN30
RN30
1
2
3
4
5
6
7 8
15K
15K
+/-5%
+/-5%
VBAT
BUF_SIO_CLK 21
CPU_THERM* 21
R232
R232
4.7K
4.7K
+/-5%
+/-5%
*
*
+3.3V
Near Memory
+3.3V_DUAL
D21
D21
2 1
BAV99
BAV99
3
+3.3V_DUAL
USB_OC4*
D20
D20
2 1
BAV99
BAV99
3
SMB_MEM_SCL 11
SMB_MEM_SDA 11
*
*
+3.3V
*
*
Dummy
Dummy
C432
C432
C426
C426
100nF
100nF
100nF
100nF
*
*
Dummy
Dummy
For EMI
R263
R263
10K
10K
+/-5%
+/-5%
1
*
*
Dummy
Dummy
C408
C408
100nF
100nF
*
*
Dummy
Dummy
C434
C434
100nF
100nF
+3.3V_DUAL +3.3V_DUAL
R198
R198
*
*
4.7K
4.7K
+/-5%
+/-5%
SPI_SOCKET
SPI_CS
SPI_DI
SPI_WP 21
A A
VBAT
R269
R269
1M
1M
*
*
+/-5%
+/-5%
5
SPI_WP
BIOS_WP:programed by BIOS
INTRUDER*
SPI_SOCKET
1
CS
VCC
DO2HOLD
3
WP
CLK
4
DIO
GND
Socket
Socket
4
8
7
6
5
SPI_SOCKET_1
SPI_SOCKET_1
SPI ROM
SPI ROM
W25X80VDAIZ
W25X80VDAIZ
+3.3V_DUAL
SLP_S5*
SLP_S3*
*
*
SPI_CLK
SPI_DO
C279
C279
100nF
100nF
+80%~-20%
+80%~-20%
R229
R229
4.7K
4.7K
*
*
+/-5%
+/-5%
R192
R192
*
*
1K
1K
+/-5%
+/-5%
VBAT_SIO
R227
R227
4.7K
4.7K
*
*
+/-5%
+/-5%
3
NV suggest
D22
D22
C A
SD103AW
SD103AW
BAT
BAT
BATT_PWR_R
BATT_PWR_R
R148
R148
*
*
1K
1K
+/-1%
+/-1%
BATT_PWR
- +
Battery Holder
Battery Holder
+3.3V_DUAL
1
2
Q15
Q15
BAT54C
BAT54C
3
C161
C161
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
2
VBAT
C159
C159
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
VBAT
C166
C166
4.7uF
4.7uF
*
*
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_HDA_USB
MCP61_HDA_USB
MCP61_HDA_USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
18 35 Friday, June 27, 2008
18 35 Friday, June 27, 2008
18 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
SMB_SCL
SMB_SDA
PE_TRST*
PETP2
PETN2
PETP3
PETN3
PETP4
PETN4
PETP5
PETN5
PETP6
PETN6
PETP7
PETN7
PETP8
PETN8
PETP9
PETN9
PETP10
PETN10
PETP11
PETN11
PETP12
PETN12
PETP13
PETN13
PETP14
PETN14
PETP15
PETN15
PETP0
PETN0
PETP1
PETN1
SMB_SCL 18,20,26,28
PE0_OUT0
0
PE0_OUT*0
PE0_OUT1
1
PE0_OUT*1
PE0_OUT2
2
C160 0.1uF
C160 0.1uF
C162 0.1uF
C162 0.1uF
PE0_OUT3
3
C169 0.1uF
C169 0.1uF
C171 0.1uF
C171 0.1uF
PE0_OUT4
4
C174 0.1uF
C174 0.1uF
C177 0.1uF
C177 0.1uF
PE0_OUT5
5
C181 0.1uF
C181 0.1uF
C183 0.1uF
C183 0.1uF
PE0_OUT6
6
C187 0.1uF
C187 0.1uF
C189 0.1uF
C189 0.1uF
PE0_OUT7
7
C193 0.1uF
C193 0.1uF
C194 0.1uF
C194 0.1uF
PE0_OUT8
8
C210 0.1uF
C210 0.1uF
C216 0.1uF
C216 0.1uF
PE0_OUT9
9
C219 0.1uF
C219 0.1uF
C221 0.1uF
C221 0.1uF
PE0_OUT10
10
C223 0.1uF
C223 0.1uF
C225 0.1uF
C225 0.1uF
PE0_OUT11
11
C229 0.1uF
C229 0.1uF
C231 0.1uF
C231 0.1uF
PE0_OUT12
12
C232 0.1uF
C232 0.1uF
C235 0.1uF
C235 0.1uF
PE0_OUT13
13
C237 0.1uF
C237 0.1uF
C239 0.1uF
C239 0.1uF
PE0_OUT14
14
C242 0.1uF
C242 0.1uF
C241 0.1uF
C241 0.1uF
PE0_OUT15
15
C244 0.1uF
C244 0.1uF
C243 0.1uF
C243 0.1uF
PE_WAKE*
SMB_SDA 18,20,26,28
C140 0.1uF
C140 0.1uF
C144 0.1uF
C144 0.1uF
C149 0.1uF
C149 0.1uF
C150 0.1uF
C150 0.1uF
+3.3V
D D
PE0_OUT[15..0] 14
PE0_OUT*[15..0] 14
PE0_PRSNTX1* 14
PE0_PRSNTX4* 14
C C
PE0_PRSNTX8* 14
B B
PE0_OUT[15..0]
PE0_OUT*[15..0]
PE0_PRSNTX16* 14
+3.3V_DUAL
PE_WAKE* 14
0
1
PE0_O UT*2
2
PE0_O UT*3
3
PE0_O UT*4
4
PE0_O UT*5
5
PE0_OUT*6
6
PE0_OUT*7
7
PE0_OUT*8
8
PE0_O UT*9
9
PE0_OUT*10
10
PE0_O UT*11
11
PE0_O UT*12
12
PE0_OUT*13
13
PE0_O UT*14
14
PE0_OUT*15
15
+12V
4
PCI-E1_16X
PCI-E1_16X
B1
+12V
B2
+12V
B3
+12V
B4
GND
B5
SMCLK
B6
SMDAT
B7
GND
B8
+3.3V
B9
TRST*
B10
+3.3V_AUX
B11
WAKE*
B12
RSVD
B13
GND
B14
PETP0
B15
PETN0
B16
GND
B17
PRSNT2*
B18
GND
B19
PETP1
B20
PETN1
B21
GND
B22
GND
B23
PETP2
B24
PETN2
B25
GND
B26
GND
B27
PETP3
B28
PETN3
B29
GND
B30
RSVD
B31
PRSNT2*
B32
GND
B33
PETP4
B34
PETN4
B35
GND
B36
GND
B37
PETP5
B38
PETN5
B39
GND
B40
GND
B41
PETP6
B42
PETN6
B43
GND
B44
GND
B45
PETP7
B46
PETN7
B47
GND
B48
PRSNT2*
B49
GND
B50
PETP8
B51
PETN8
B52
GND
B53
GND
B54
PETP9
B55
PETN9
B56
GND
B57
GND
B58
PETP10
B59
PETN10
B60
GND
B61
GND
B62
PETP11
B63
PETN11
B64
GND
B65
GND
B66
PETP12
B67
PETN12
B68
GND
B69
GND
B70
PETP13
B71
PETN13
B72
GND
B73
GND
B74
PETP14
B75
PETN14
B76
GND
B77
GND
B78
PETP15
B79
PETN15
B80
GND
B81
PRSNT2*
B82
RSVD
<PATH>
<PATH>
<PART_NAME>
<PART_NAME>
X1 CONNECTOR
X1 CONNECTOR
X4 CONNECTOR
X4 CONNECTOR
X8 CONNECTOR
X8 CONNECTOR
X16 CONNECTOR
X16 CONNECTOR
PRSNT1*
PERST*
REFCLK+
REFCLK-
PERP0
PERN0
RSVD
PERP1
PERN1
PERP2
PERN2
PERP3
PERN3
RSVD
RSVD
PERP4
PERN4
PERP5
PERN5
PERP6
PERN6
PERP7
PERN7
RSVD
PERP8
PERN8
PERP9
PERN9
PERP10
PERN10
PERP11
PERN11
PERP12
PERN12
PERP13
PERN13
PERP14
PERN14
PERP15
PERN15
+12V
+12V
GND
+3.3V
+3.3V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TCK
TDO
TMS
+12V
A1
A2
A3
A4
A5
A6
TDI
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
PE0_IN1
A21
A22
A23
A24
PE0_IN2
A25
A26
A27
A28
PE0_IN3
A29
A30
A31
A32
A33
A34
PE0_IN4
A35
A36
A37
A38
PE0_IN5
A39
A40
A41
A42
PE0_IN6
A43
A44
A45
A46
PE0_IN7
A47
A48
A49
A50
A51
PE0_IN8
A52
A53
A54
A55
PE0_IN9
A56
A57
A58
A59
PE0_IN10
A60
A61
A62
A63
PE0_IN11
A64
A65
A66
A67
PE0_IN12
A68
A69
A70
A71
PE0_IN13
A72
A73
A74
A75
PE0_IN14
A76
A77
A78
A79
PE0_IN15
A80
A81
A82
PE_TCK
PE_TDI
PE_TMS
PE0_IN0
PE0_IN*0
3
2
4
6
PE1_PRSNT* 14
+3.3V
SMB_SCL
SMB_SDA
C139 0.1uF
C139 0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
C142 0.1uF
C142 0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
PE_WAKE*
RN19
RN19
10K Ohm
10K Ohm
+/-5%
+/-5%
*
*
PE_TRST*
+3.3V
PE_RESET*
PE0_REFCLK_V
PE0_REFCLK*_V
PE0_IN[15..0]
0
PE0_IN*[15..0]
0
1
PE0_IN*1
1
2
PE0 _IN*2
2
3
PE0_IN*3
3
4
PE0 _IN*4
4
5
PE0_IN*5
5
6
PE0 _IN*6
6
7
PE0_IN*7
7
8
PE0 _IN*8
8
9
PE0 _IN*9
9
10
PE0_IN*10
10
11
PE0_IN*11
11
12
PE0_I N*12
12
13
PE0_IN*13
13
14
PE0_I N*14
14
15
PE0_IN*15
15
1
3
5
7 8
PE_RESET* 14
PE0_REFCLK 14
PE0_REFCLK* 14
PE0_IN[15..0] 14
PE0_IN*[15..0] 14
PE1_OUT 14
PE1_OUT* 14
+3.3V +3.3V_DUAL +12V
PE_TRST_1
PE1_PETP0
PE1_PETN0
2
+12V
PCI-E1_1X
PCI-E1_1X
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
12V
12V
RSVD
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
RSVD_B12
GND
HSOP0
HSON0
GND
PRSNT2#
GND
Slot-PCIE-1X
Slot-PCIE-1X
PE_TMS_1
PE_TRST_1
PE_TDI_1
PE_TCK_1
KEY
KEY
*
*
RN18
RN18
10K Ohm
10K Ohm
+/-5%
+/-5%
1
3
5
7 8
2
4
6
PRSNT1#
JTAG2
JTAG3
JTAG4
JTAG5
PWRGD
REFCLK+
REFCLK-
HSIP0
HSIN0
A1
A2
12V
A3
12V
A4
GND
3.3V
3.3V
GND
GND
GND
+3.3V
PE_TCK_1
A5
PE_TDI_1
A6
A7
PE_TMS_1
A8
A9
A10
PE_RESET*
A11
A12
A13
A14
A15
A16
A17
A18
1
PE1_REFCLK 14
PE1_REFCLK* 14
PE1_IN 14
PE1_IN* 14
+3.3V
PLACE CAPS NEAR PEX CONNECTORS
+12V
C103
C103
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
+3.3V
C155
*
*
Dummy
Dummy
C178
C178
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C155
100nF
100nF
+80%~-20%
+80%~-20%
C212
C212
100nF
100nF
*
*
+80%~-20%
A A
5
+80%~-20%
*
*
Dummy
Dummy
*
*
C101
C101
100nF
100nF
+80%~-20%
+80%~-20%
C123
C123
100nF
100nF
+80%~-20%
+80%~-20%
4
*
*
C106
C106
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
*
C195
C195
100nF
100nF
+80%~-20%
+80%~-20%
C126
C126
100nF
100nF
+80%~-20%
+80%~-20%
C154
C154
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
*
*
C97
C97
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
*
C186
C186
4.7uF
4.7uF
+80/-20%
+80/-20%
modify 8/18
C114
C114
C102
C102
1uF
1uF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C170
C170
1uF
1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
modify 8/18
*
*
C125
C125
+80/-20%
+80/-20%
4.7uF
4.7uF
+3.3V_DUAL
EC29
EC29
470uF
470uF
*
*
16V, +/-20%
16V, +/-20%
modify 8/16
3
*
*
C127
C127
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C116
C116
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C421
C421
100nF
100nF
+80%~-20%
+80%~-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PCI Express Slot x16 & X1
PCI Express Slot x16 & X1
PCI Express Slot x16 & X1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
19 35 Friday, June 27, 2008
19 35 Friday, June 27, 2008
19 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
4
3
2
1
SLOT 2
PCI2
PCI2
I135
PCI_AD[31..0] 16,26
D D
PCI_AD23 16,26
PCI_C/BE*[3..0] 16,26
C C
PCIRST_SLOT1* 16
PCI_AD[31..0]
R147
R147
300
300
*
*
+/-5%
+/-5%
PCI_C/BE*[3..0]
PCI_INTW* 16
PCI_INTX* 16
PCI_INTY* 16
PCI_INTZ* 16,26
PCI_REQ*2 16
PCI_GNT*2 16
PCI_PME* 16,26
PCI_FRAME* 16,26
PCI_TRDY* 16,26
PCI_STOP* 16,26
PCI_IRDY* 16,26
PCI_DEVSEL* 16,26
PCI_PERR* 16,26
PCI_SERR* 16,26
PCI_PAR 16,26
SMB_SDA 18,19,26,28
SMB_SCL 18,19,26,28
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_REQ*2
PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCIRST_SLOT1*
SMB_SCL
PCI_REQ64A*
PCI_ACK64*
PCI_CLKSLOT1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
IDSEL23
0
1
2
3
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3
I135
PCI124
PCI124
V2.2
V2.2
5V 32BIT
AD0
AD0
AD2
AD2
AD3
AD3
AD4
AD4
AD5
AD5
AD6
AD6
AD7
AD7
AD8
AD8
AD9
AD9
AD10
AD10
AD11
AD11
AD12
AD12
AD13
AD13
AD14
AD14
AD15
AD15
AD16
AD16
AD17
AD17
AD18
AD18
AD19
AD19
AD20
AD20
AD21
AD21
AD22
AD22
AD23
AD23
AD24
AD24
AD25
AD25
AD26
AD26
AD27
AD27
AD28
AD28
AD29
AD29
AD30
AD30
AD31
AD31
IDSEL
IDSEL
CBE0*
CBE0*
CBE1*
CBE1*
CBE2*
CBE2*
CBE3*
CBE3*
INTA*
INTA*
INTB*
INTB*
INTC*
INTC*
INTD*
INTD*
REQ*
REQ*
GNT*
GNT*
PME*
PME*
FRAME*
FRAME*
STOP*
STOP*
IRDY*
IRDY*
DEVSEL*
DEVSEL*
LOCK*
LOCK*
PERR*
PERR*
SERR*
SERR*
PAR
PAR
SBO*
SBO*
RESET*
RESET*
SDONE
SDONE
REQ64*
REQ64*
ACK64*
ACK64*
CLOCK
CLOCK
KEY<A50>
KEY<A50>
KEY<A51>
KEY<A51>
KEY<B50>
KEY<B50>
KEY<B51>
KEY<B51>
5V 32BIT
A58
B58
A57
B56
A55
B55
A54
B53
B52
A49
B48
A47
B47
A46
B45
A44
A32
B32
A31
B30
A29
B29
A28
B27
A25
B24
A23
B23
A22
B21
A20
B20
A26
A52
B44
B33
B26
A6
B7
A7
B8
B18
A17
A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40
A60
B60
B16
3.3VAUX
3.3VAUX
PRSNT1*
PRSNT1*
PRSNT2*
PRSNT2*
RSVD1
RSVD1
RSVD2
RSVD2
RSVD3
RSVD3
RSVD5
RSVD5
TRST*
TRST*
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V_DUAL
A14
B4
TDO AD1
TDO AD1
B9
B11
A9
B10
A11
B14
B2
TCK
TCK
A1
A3
TMS
TMS
A4
TDI
TDI
+12V
-12V
A2
+12V
+12V
B1
-12V
-12V
B5
+5V
+5V
B6
+5V
+5V
A5
+5V
+5V
A8
+5V
+5V
A10
+5V
+5V
B61
+5V
+5V
A16
+5V
+5V
B62
+5V
+5V
A59
+5V
+5V
+5V
B59
+5V
+5V
A61
+5V
+5V
B19
+5V
+5V
A62
+5V
+5V
A21
A27
A33
A39
A45
B43
B41
B36
+3.3V +3.3V
B31
B25
B54
A53
A12
GND
GND
A13
GND TRDY*
GND TRDY*
A18
GND
GND
A24
GND
GND
A30
GND
GND
A35
GND
GND
A37
GND
GND
A42
GND
GND
A48
GND
GND
A56
GND
GND
B3
GND
GND
B12
GND
GND
B13
GND
GND
B15
GND
GND
B17
GND
GND
B22
GND
GND
B28
GND
GND
B34
GND
GND
B38
GND
GND
B46
GND
GND
B49
GND
GND
B57
GND
GND
PCI_AD[31..0]
PCI_AD24
PCI_C/BE*[3..0]
PCI_REQ*3 16
PCI_GNT*3 16
PCIRST_SLOT2* 16
PCI_CLKSLOT2 16 PCI_CLKSLOT1 16
R144
R144
300
300
*
*
+/-5%
+/-5%
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_INTW*
PCI_REQ*3
PCI_GNT*3 PCI_GNT*2
PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCIRST_SLOT2*
SMB_SCL
PCI_REQ64B*
PCI_ACK64*
PCI_CLKSLOT2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
IDSEL24
0
1
2
3
PCI_AD0
A58
PCI_AD1
B58
PCI_AD2
A57
PCI_AD3
B56
PCI_AD4
A55
PCI_AD5
B55
PCI_AD6
A54
PCI_AD7
B53
PCI_AD8
B52
PCI_AD9
A49
PCI_AD10
B48
PCI_AD11
A47
PCI_AD12
B47
PCI_AD13
A46
PCI_AD14
B45
PCI_AD15
A44
PCI_AD16
A32
PCI_AD17
B32
PCI_AD18
A31
PCI_AD19
B30
PCI_AD20
A29
PCI_AD21
B29
PCI_AD22 PCI_AD22
A28
PCI_AD23
B27
PCI_AD24
A25
PCI_AD25
B24
PCI_AD26
A23
PCI_AD27 PCI_AD27
B23
PCI_AD28
A22
PCI_AD29
B21
PCI_AD30
A20
PCI_AD31
B20
A26
PCI_C/BE*0
A52
PCI_C/BE*1
B44
PCI_C/BE*2
B33
PCI_C/BE*3
B26
A6
B7
A7
B8
B18
A17
A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40
A60
B60
B16
PCI1
PCI1
I136
I136
AD0
AD0
AD2
AD2
AD3
AD3
AD4
AD4
AD5
AD5
AD6
AD6
AD7
AD7
AD8
AD8
AD9
AD9
AD10
AD10
AD11
AD11
AD12
AD12
AD13
AD13
AD14
AD14
AD15
AD15
AD16
AD16
AD17
AD17
AD18
AD18
AD19
AD19
AD20
AD20
AD21
AD21
AD22
AD22
AD23
AD23
AD24
AD24
AD25
AD25
AD26
AD26
AD27
AD27
AD28
AD28
AD29
AD29
AD30
AD30
AD31
AD31
IDSEL
IDSEL
CBE0*
CBE0*
CBE1*
CBE1*
CBE2*
CBE2*
CBE3*
CBE3*
INTA*
INTA*
INTB*
INTB*
INTC*
INTC*
INTD*
INTD*
REQ*
REQ*
GNT*
GNT*
PME*
PME*
FRAME*
FRAME*
STOP*
STOP*
IRDY*
IRDY*
DEVSEL*
DEVSEL*
LOCK*
LOCK*
PERR*
PERR*
SERR*
SERR*
PAR
PAR
SBO*
SBO*
RESET*
RESET*
SDONE
SDONE
REQ64*
REQ64*
ACK64*
ACK64*
CLOCK
CLOCK
KEY<A50>
KEY<A50>
KEY<A51>
KEY<A51>
KEY<B50>
KEY<B50>
KEY<B51>
KEY<B51>
SLOT 1
IDSEL24 IDSEL23
PCI124
PCI124
V2.2
V2.2
5V 32BIT
5V 32BIT
3.3VAUX
3.3VAUX
PRSNT1*
PRSNT1*
PRSNT2*
PRSNT2*
RSVD1
RSVD1
RSVD2
RSVD2
RSVD3
RSVD3
RSVD5
RSVD5
TRST*
TRST*
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V_DUAL
A14
B4
TDO AD1
TDO AD1
B9
B11
A9
B10
A11
B14
B2
TCK
TCK
A1
A3
TMS
TMS
A4
TDI
TDI
+12V
-12V
A2
+12V
+12V
B1
-12V
-12V
B5
+5V
+5V
B6
+5V
+5V
A5
+5V
+5V
A8
+5V
+5V
A10
+5V
+5V
B61
+5V
+5V
A16
+5V
+5V
B62
+5V
+5V
A59
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
GND
GND
GND TRDY*
GND TRDY*
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V
B59
A61
B19
A62
A21
A27
A33
A39
A45
B43
B41
B36
B31
B25
B54
A53
A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57
PCI1 IDSEL= A23 , PCI_REQ#=2 , Routin=W/X/Y/Z PCI2 IDSEL= A24 , PCI_REQ#=3 , Routin=X/Y/Z/W
B B
+3.3V
PCI_REQ64A*
R184 8.2K +/-5%
R184 8.2K +/-5%
*
PCI_ACK64*
PCI_REQ64B*
PCI_REQ*4 16,26
PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_DEVSEL*
PCI_STOP*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
A A
PCI_SERR* 16,26
PCI_DEVSEL* 16,26
PCI_IRDY* 16,26
PCI_PERR* 16,26
PCI_TRDY* 16,26
PCI_STOP* 16,26 PCI_PME* 16,26
*
R183 8.2K +/-5%
R183 8.2K +/-5%
*
*
R182 8.2K +/-5%
R182 8.2K +/-5%
*
*
R181 8.2K +/-5%
R181 8.2K +/-5%
*
*
RN23
RN23
*
*
1
3
5
7 8
8.2K
8.2K
+/-5%
+/-5%
RN25
RN25
*
*
1
3
5
7 8
8.2K
8.2K
+/-5%
+/-5%
PCI_SERR*
PCI_DEVSEL*
PCI_IRDY*
PCI_PERR*
PCI_TRDY*
PCI_STOP*
5
2
4
6
2
4
6
PCI_INTZ* 16,26
PCI_INTX* 16
PCI_INTY* 16
PCI_INTW* 16
Dummy
Dummy
modify 8/16
place between PCIE 1X
+3.3V
RN21
RN21
*
+12V
*
*
470uF
470uF
EC26
EC26
*
1
2
3
4
5
6
7 8
8.2K
8.2K
+/-5%
+/-5%
RN17
RN17
*
*
1
2
3
4
5
6
7 8
8.2K
8.2K
+/-5%
+/-5%
*
*
*
*
Dummy
Dummy
R38
R38
8.2K
8.2K
*
*
+/-5%
+/-5%
4
EC28
EC28
1000uF
1000uF
+/-20%
+/-20%
EC42
EC42
1000uF
1000uF
+/-20%
+/-20%
+5V
+3.3V_DUAL
C180
C180
PCI_REQ*1 16
PCI_REQ*3 16
PCI_REQ*0 16
PCI_REQ*2 16
PCI_INTZ*
PCI_INTX*
PCI_INTY*
PCI_INTW*
16V, +/-20%
16V, +/-20%
EC24
EC24
470uF
470uF
*
*
16V, +/-20%
16V, +/-20%
PCI_PME*
+3.3V +5V
EC39
EC39
1000uF
1000uF
*
*
+/-20%
+/-20%
C192
C192
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C245
C245
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C213
C213
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+3.3V
EC38
EC38
*
*
470uF
470uF
16V, +/-20%
16V, +/-20%
C230
C230
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C214
C214
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C172
C172
100nF
100nF
*
*
+80%~-20%
+80%~-20%
1uF
1uF
*
*
Dummy
Dummy
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C236
C236
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C238
C238
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C383
C383
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C60
C60
100nF
100nF
*
*
+80%~-20%
+80%~-20%
PCI SLOT DECOUPLING
+5V
C360
C360
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C104
C104
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C285
C285
100nF
100nF
*
*
+80%~-20%
+80%~-20%
3
*
*
Dummy
Dummy
C165
C165
100nF
100nF
+80%~-20%
+80%~-20%
FOR EMI
+5V
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PCI Slot 12
PCI Slot 12
PCI Slot 12
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
20 35 Friday, June 27, 2008
20 35 Friday, June 27, 2008
20 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
Power On Strapping Options
Flashseg1_EN
JP1
JP2
SerFlh_SO_SEL
JP3 --
CHIP_SEL
D D
C C
B B
A A
BUF_SEL
JP4
JP5
FAN_CTL_SEL
VID_ISEL
JP6
Note:
If 75232 is connected, please use 680 ohm to
be the pull down resistor value. Since
powered by 12V, 75232 has a very strong
internal pull-up. It is hard to be pulled low.
(Please see specification for detail of power
on strapping setting)
5
Disabled.
1
Flash I/F Address Segment 1 (FFFE_0000h~FFFF_FFFFh,
0
000F_0000h~000F_FFFFh) is enabled
1
FLH_SO1 is selected as the Serial Flash I/F SO pin.
0
FLH_SO2 is selected as the Serial Flash I/F SO pin.
Description Symbol value
Chip selection in configuration.
The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, PCIRST4# and
1
PCIRST5# are open-drain.
0
The output buffers are push-pull.
1
The default value of EC Index 15h / 16h / 17h is 00h
0
The default value of EC Index 15h / 16h / 17h is 40h
The threshold voltage of VID is 2.0 / 0.8V
1
0
The threshold voltage of VID is 0.8 / 0.4V
R102
R102
2.2K
2.2K
*
*
+/-5%
+/-5%
Dummy
DCD1J
CTS1J
DTR1J
RTS1J
DSR1J
RXD1
DCD2J
CTS2J
DTR2J
RTS2J
DSR2J
RXD2
Dummy
RI1J
TXD1
RI2J
TXD2
CPU_THERM_R
RN20
RN20
*
*
1
3
5
7 8
680
680
+/-5%
+/-5%
CPU_THERM*
2
4
6
R89
R89
0
0
Dummy
Dummy
*
*
+/-5%
+/-5%
modify 8/16
DENSELJ
INDEXJ
MOTEAJ
DRVBJ
DRVAJ
MOTEBJ
DIRJ
STEPJ
WDATAJ
WGATEJ
TK00J
WPTJ
RDATAJ
SIDE1J
DSKCHGJ
LPCRST_SIO*
LPC_DRQ0*
LPC_SERIRQ
LPC_FRAME*
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
PCI_CLKSIO
R74
R74
*
*
4.7K
4.7K
+/-5%
+/-5%
B
R75
R75
4.7K
4.7K
+/-5%
+/-5%
E C
B
*
*
+3.3V
Q2
Q2
MMBT3904-7-F
MMBT3904-7-F
Detect
BUF_SIO_CLK
IO_PME*
KDAT
KCLK
MDAT
MCLK
Q1
Q1
MMBT3904-7-F
MMBT3904-7-F
R73
R73
4.7K
4.7K
+/-5%
+/-5%
NV_KBRST*
NV_A20GATE
A20GATE
SIO_KBRST*
+5V
*
*
5
R76
R76
4.7K
4.7K
+/-5%
+/-5%
24MHz
+5V
E C
*
*
+3.3V
+5V
DCD1J
RI1J
CTS1J
DTR1J
RTS1J
DSR1J
TXD1
RXD1
DCD2J
RI2J
CTS2J
DTR2J
RTS2J
DSR2J
TXD2
RXD2
DENSELJ
INDEXJ
MOTEAJ
DRVBJ
DRVAJ
MOTEBJ
DIRJ
STEPJ
WDATAJ
WGATEJ
TK00J
WPTJ
RDATAJ
SIDE1J
DSKCHGJ
LRESETJ
LPC_DRQ0*
SERIRQ
LPC_FRAME*
LAD0
LAD1
LAD2
LAD3
PCI_CLKSIO
BUF_SIO_CLK
IO_PME*
SIO_KBRST*
A20GATE
KDAT
KCLK
MDAT
MCLK
4
118
DCD1#
119
RI1#
120
CTS1#
121
DTR1#/JP1
122
RTS1#/JP2
123
DSR1#
124
SOUT1/JP3
125
SIN1
126
DCD2#/GP67
127
RI2#/GP66
128
CTS2#/GP65
1
DTR2#/JP4
2
RTS2#/JP5
3
DSR2#/GP64
5
SOUT2/JP6
6
SIN2/GP63
29
MIDI_IN/GP16/SO2
25
JSAB1/GP22/SCK
24
JSAB2/GP23/SI
20
FAN_CTL4/JSBB2/GP27
21
FAN_CTL5/JSBB1/GP26
26
JSACY/GP21
27
JSACX/GP20
28
MIDI_OUT/GP17
51
DENSEL#
63
INDEX#
52
MTRA#
55
ETS_CLK/DRVB#
54
DRVA#
53
ETS_DAT/MTRB#
57
DIR#
58
STEP#
56
WDATA#
60
WGATE#
62
TRK0#
64
WPT#
61
RDATA#
59
HDSEL#
65
DSKCHG#
37
LRESET#
38
LDRQ#
39
SERIRQ
40
LFRAME#
41
LAD0
42
LAD1
43
LAD2
44
LAD3
47
PCICLK
48
PCIRST5#/GP50
49
CLKIN
73
PME#/GP54
45
KRST#/GP62
46
GA20
80
KDAT/GP61
81
KCLK/GP60
82
MDAT/GP57
83
MCLK/GP56
4
+5V
4
35
VCC
VCC
GNDD
15
L10
L10
*
*
80 Ohm@100MHz
80 Ohm@100MHz
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
HMGND
99
AVCC
Serial Port 1/2
Serial Port 1/2
IT8716F-S/FX-L
IT8716F-S/FX-L
SPI
SPI
Floppy I/F
Floppy I/F
LPC I/F KB/MS
LPC I/F KB/MS
GNDD
GNDD
GNDD
50
74
117
L6
L6
0805h11
0805h11
FB L0805 100 Ohm
FB L0805 100 Ohm
dummy
dummy
CP3
CP3
1 2
dummy
dummy
+5V_STBY +5V
C130
C130
10uF
10uF
*
*
67
VCCH
Parallel Port
Parallel Port
Power-on
Control
Power-on
Control
PWROK2/GP41
SUSC#/GP53
PSON#/GP42
PANSWH#/GP43
PWRON#GP44
SUSB#/GP45
RESETCON#/CIRTX/GP15/CE_N
MISC.
MISC.
RSMRST#/CIRRX/GP55
IRTX/GP47
IRRX/GP46
COPEN#
3VSBSW#/GP40
SCR I/F
SCR I/F
PCIRST4#/SCRPSNT#/GP10
PCIRST3#/SCRCLK/GP11
PCIRST2#/SCRIO/GP12
PWROK1/SCRPFET#/GP13
PCIRST1#/SCRRST/GP14
VIN3/ATXPG
Hardware Monitoring
Hardware Monitoring
VIN7/PCIRSTIN#
TMPIN1
TMPIN2
TMPIN3/SO1
FAN_TAC5/JSBCX/GP24
FAN_TAC4/JSBCY/GP25
FAN_CTL3/GP36
FAN_TAC3/GP37
FAN_CTL2/GP51
FAN_TAC2/GP52
FAN_CTL1
FAN_TAC1
GP30/VID0
GP31/VID1
GP32/VID2
GP33/VID3
GP34/VID4
GP35/VID5
VIDVCC
GNDA
86
2 1
HMGND
C87
C87
100nF
100nF
+80%~-20%
+80%~-20%
U12
U12
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#
ERR#
INIT#
SLIN#
ACK#
BUSY
PE
SLCT
VIN0
VIN1
VIN2
VIN4
VIN5
VIN6
VREF
VBAT
C119
C119
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C89
C89
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
78
GPIO_WP
77
76
75
72
71
30
85
66
70
68
79
84
34
33
32
31
98
97
96
95
94
93
92
91
90
89
88
87
23
22
12
11
10
9
8
7
19
18
17
16
14
13
69
36
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STBJ
AFDJ
ERRJ
INITJ
SLINJ
ACKJ
BUSY
PE
SLCT
PWRBTN#
CIRTX
CIRRX
IRTX
IRRX
COPENJ
EXTSMI*
GP13
VIN0
VIN1
VIN2
VIN3
VIN4
VREF
TMPIN2
FAN_CTL3
FAN_TAC3
SIO_BEEP
FAN_CTL1
FAN_TAC1
VBAT
+5V
*
*
+3.3V
3
C115
C115
C91
C91
100nF
100nF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
PD[0..7]
PD[0..7]
STBJ
AFDJ
ERRJ
INITJ
SLINJ
ACKJ
BUSY
PE
SLCT
+3.3V_DUAL
R91
R91
R90
R90
4.7K
4.7K
*
*
10
10
+/-5%
+/-5%
*
*
+/-5%
+/-5%
C96
C96
1uF
1uF
*
*
SLP_S3*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
Dummy
Dummy
EXTSMI*
GP13
VIN0
VIN1
VIN2
VIN3
VIN4
TMPIN1
TMPIN2
FAN_CTL3
FAN_TAC3
SIO_BEEP
FAN_CTL1
FAN_TAC1
VBAT_SIO
C92
C92
1uF
1uF
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
Near IO
Power button input
3
PS_ON#
R79 10M
R79 10M
PANSWHJ
+3.3V_DUAL
+/-5%
+/-5%
*
*
VBAT
+5V
R87
R87
4.7K
4.7K
+/-5%
+/-5%
*
*
R103
R103
4.7K
4.7K
+/-5%
+/-5%
PWRBTN#
CPU_THERMTRIP*
GPIO_WP
PWRBTN#
output to SB
INTR
INTR
2
1
Header_1X2
Header_1X2
Near CPU
C108
C108
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
HMGND
VREF
POWER ON SCHEME
PWBTN#
PWRON#
(72)
IT8716F
PANSWH#
(75) (76)
2
modify 8/16
CPU_THERMTRIP*
R336
R336
1K
1K
B
+-5%
+-5%
Dummy
Dummy
R88
R88
10
10
*
*
+/-5%
+/-5%
*
*
MCP61
SLP_S3#
SLP_S5#
PSIN
(71)
PSON#
2
SPI_WP
Q25
Q25
MMBT3904-7-F
MMBT3904-7-F
E C
Dummy
Dummy
Power Bottom in
PANSWHJ
Near SIO (U22)
C99
C99
100nF
100nF
+80%~-20%
+80%~-20%
CIRTX
SPI_WP
W83304
PS_ON_IN#
(6)
B
*
*
+1.8V_SUS
+5V
R83
R83
10K
10K
*
*
+/-5%
+/-5%
+5V
IRRX
IRTX
PS_ON_OUT#
(7)
1
+3.3V
R96
R96
*
*
4.7K
4.7K
+/-5%
+/-5%
E C
Q3
Q3
MMBT3904-7-F
MMBT3904-7-F
R78
R78
750
750
+/-1%
+/-1%
CPU_THERM_R
IR Connector
+5V
IRRX
IRTX
+5V_STBY
IR/CIR
IR/CIR
2
1
X
X
5
7
9
Header_2X5_K3K10
Header_2X5_K3K10
Dummy
Dummy
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
4
6
8
X
X
ATX
Power
Supply
PSON#
SIO IT8716F
SIO IT8716F
SIO IT8716F
CIRRX
CIRTX
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
IR
IR
1
1
3
3
4
4
5
5
Header_1X5_K2
Header_1X5_K2
21 35 Friday, June 27, 2008
21 35 Friday, June 27, 2008
1
21 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
SLOT_IDERST#
IDE_PDD[15..0]
IDE_DREQ_P
IDE_IOW_P*
IDE_IOR_P*
IDE_IORDY_P
IDE_DACK_P*
IDE_INTR_P
IDE_ADDR_P1
IDE_ADDR_P0
IDE_CS1_P*
P_HDLED*
IDE_CS3_P*
IDE_ADDR_P2
+3.3V +3.3V
*
*
IDE_PDD[15..0] 17
+5V
D D
R319
R319
4.7K
4.7K
+/-5%
+/-5%
*
*
P_HDLED*
E C
PCIRST_IDE* 16
+3.3V
C C
P_HDLED* 27
Q29
Q29
MMBT3904-7-F
MMBT3904-7-F
B
Dummy
Dummy
+3.3V
*
*
R316
R316
10K
10K
+/-5%
+/-5%
R318
R318
*
*
1K
1K
+/-5%
+/-5%
C485
C485
IDE_DREQ_P 17
33pF
33pF
IDE_IOW_P* 17
*
*
+/-5%
+/-5%
IDE_IOR_P* 17
IDE_IORDY_P 17
IDE_DACK_P* 17
IDE_INTR_P 17
IDE_ADDR_P1 17
IDE_ADDR_P0 17
IDE_CS1_P* 17
P_HDLED* 27
IDE_CS3_P* 17
IDE_ADDR_P2 17
R312
R312
4.7K
4.7K
+/-5%
+/-5%
4
Dummy
Dummy
R311
R311
5.6K
5.6K
*
*
+/-5%
+/-5%
3
PIDE
PIDE
IDE_HDR
R317
R317
IDE_PDD7
10K
10K
*
*
+/-5%
+/-5%
R314
R314
8.2K
8.2K
*
*
+/-5%
+/-5%
R313
R313
10K
10K
*
*
+/-5%
+/-5%
IDE_HDR
IDE_PDD7
7 7 8
3 4
DD7
DD7
IDE_PDD6
6
5 6
DD6
DD6
IDE_PDD5
5
7 8
DD5
DD5
IDE_PDD4
4
9 10
DD4
DD4
IDE_PDD3
3
11 12
DD3
DD3
IDE_PDD2
2
13 14
DD2
DD2
IDE_PDD1
11 4
15 16
DD1
DD1
IDE_PDD0
0
17 18
DD0
DD0
1
RESET*
RESET*
21
DMARQ
DMARQ
23
DIOW*
DIOW*
25
27
29
31
33
35
37
39
32
IORDY
IORDY
DMACK*
DMACK*
INTRQ
INTRQ
DA1
DA1
DA0
DA0
CS0*
CS0*
DASP*
DASP*
NC GND
NC GND
I267
I267
PDIAG* DIOR*
PDIAG* DIOR*
IDE_PDD8
DD8
DD8
IDE_PDD9
9
DD9
DD9
IDE_PDD10
10
DD10
DD10
IDE_PDD11
11
DD11
DD11
IDE_PDD12
12
DD12
DD12
IDE_PDD13
13
DD13
DD13
IDE_PDD14
DD14
DD14
IDE_PDD15
15
DD15
DD15
28
CSEL
CSEL
34
36
DA2
DA2
38
CS1*
CS1*
2
GND
GND
19
GND
GND
22
GND
GND
24
GND
GND
26
GND
GND
30
GND
GND
40
CBLE_DET_P
R315
R315
15K
15K
*
*
+/-5%
+/-5%
CBLE_DET_P 17
2
MH4
MH4
1
2
(NPTH)
(NPTH)
3
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
MH6
MH6
1
2
(NPTH)
(NPTH)
3
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
MH2
MH2
1
2
(NPTH)
(NPTH)
3
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
1
MH3
MH3
1
5
2
6
(NPTH)
(NPTH)
3
7
MH
MH
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
MH5
MH5
1
5
6
7
MH
MH
5
6
7
MH
MH
MH1
MH1
5
6
7
MH
MH
1
2
3
A A
MH40x80_8
MH40x80_8
dummy
dummy
5
2
6
(NPTH)
(NPTH)
3
7
MH
MH
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
5
6
(NPTH)
(NPTH)
7
MH
MH
4
8
9
+5V
+5V_DUAL
F1
B B
A A
F1
KEYBRD_PWR1
*
*
Fuse 1.5A
Fuse 1.5A
KDAT 21
SIO_KBCLOCK
KCLK 21
SIO_MSDATA
MDAT 21
SIO_MSCLOCK
MCLK 21
5
L1
FB 30OhmL1FB 30Ohm
135
642
RN16
RN16
R77
R77
1K
1K
*
*
1K
1K
+/-5%
+/-5%
+/-5%
+/-5%
*
*
7 8
FLOPPY
FLOPPY
FLOPPY
1
2
1
2
4
4
5
6
5
6
7
8
7
8
9
10
9
10
11
12
11
12
13
14
13
14
15
16
15
16
17
18
17
18
19
20
19
20
21
22
21
22
23
24
23
24
25
26
25
26
27
28
27
28
29
30
29
30
31
32
31
32
33
34
33
34
Header_2X17_K3
Header_2X17_K3
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
IDE / Floppy / PS2
IDE / Floppy / PS2
IDE / Floppy / PS2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
22 35 Friday, June 27, 2008
22 35 Friday, June 27, 2008
22 35 Friday, June 27, 2008
of
of
of
A C
A C
A C
R57
R57
0
0
+/-5%
+/-5%
R55
R55
0
0
+/-5%
+/-5%
KEYBRD_PWR2
*
*
*
*
*
*
C28
C28
100nF
100nF
*
*
+80%~-20%
+80%~-20%
SIO_KBDATA_FB SIO_KBDATA
SIO_KBCLOCK_FB
SIO_MSDATA_FB
SIO_MSCLOCK_FB
CN3
CN3
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
PS2 KB / MS
KB/MS
KB/MS
KEYBOARD (PURPLE)
KEYBOARD (PURPLE)
1
DATA
DATA
2
NC
NC
4653
I55
I55
PS2
PS2
4653
GND
GND
PWR
PWR
CLK
CLK
NC
NC
13
SHLD
14
SHLD
15
SHLD
SHLD
SHLD
16
MOUSE (GREEN)
MOUSE (GREEN)
17
DATA
DATA
12
12
NC
NC
10
10
GND
GND
PWR
PWR
CLK
CLK
NC
NC
3
3
4
5
6
7
8
9
10
11
12
SIO_FDD_DRVDEN0
DENSELJ 21
SIO_FDD_INDEX*
INDEXJ 21
SIO_FDD_MTR0*
MOTEAJ 21
DRVBJ 21
SIO_FDD_DS0*
DRVAJ 21
21
21
11
11
9
9
8
7
8
7
MOTEBJ
MOTEBJ 21
SIO_FDD_DIR*
DIRJ 21
SIO_FDD_STEP*
STEPJ 21
SIO_FDD_WDATA*
WDATAJ 21
SIO_FDD_WGATE*
WGATEJ 21
SIO_FDD_TRK0*
TK00J 21
SIO_FDD_WRTPRT*
WPTJ 21
SIO_FDD_RDATA*
RDATAJ 21
SIO_FDD_HDSEL*
SIDE1J 21
SIO_FDD_DSKCHG*
DSKCHGJ 21
2
2 1
RN12
RN12
642
135
7 8
*
*
2.7K
2.7K
+/-5%
+/-5%
R56
R56
0
0
+/-5%
+/-5%
R54
R54
0
0
+/-5%
+/-5%
*
*
*
*
4
5
D D
C C
+12V
D7
LS4148-FD7LS4148-F
C95
C95
100nF
100nF
C A
+80%~-20%
+80%~-20%
+5V
*
*
U7
U7
GD75232
GD75232
VDD+
+12V_COM
1
*
*
C67
C67
100nF
100nF
+80%~-20%
+80%~-20%
19
18
17
16
15
14
13
12
20
DCD1J 21
DSR1J 21
RXD1 21
RTS1J 21
TXD1 21
CTS1J 21
B B
DTR1J 21
RI1J 21
VDDRY1*
RY2*
RY3*
DY1*
DA1
DY2*
DA2
RY4*
DY3*
DA3
RY5*
GND
VCC
I76
I76
-12V
C A
LS4148-F
LS4148-F
D13
D13
-12V_COM
10
RA1
RA2
RA3
RA4
RA5
DCD1
2
DSR1
3
RXD1*
4
RTS1
5
TXD1*
6
CTS1
7
DTR1
8
RI1
9
11
*
*
C36
C36
100nF
100nF
+80%~-20%
+80%~-20%
4
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
3
RN5
RN14
RN14
2.2K
2.2K
+/-5%
+/-5%
*
*
135
642
7 8
RN5
*
*
1
3
5
7 8
22
22
+/-5%
+/-5%
RN8
RN8
7 8
5
3
*
*
1
22
22
+/-5%
+/-5%
R50
R50
*
*
2.2K
2.2K
+/-5%
+/-5%
SIO_LPT_ERR
PRN_VDD
2
4
6
6
4
2
PRN_VDD
RN4
RN4
642
*
*
135
7 8
2.2K
2.2K
+/-5%
+/-5%
SIO_LPT_ALF* SIO_LPT_ALF_R*
SIO_LPT_STROBE* SIO_LPT_STROBE_R*
SIO_LPT_INIT* SIO_LPT_INIT_R*
SIO_LPT_SLCTIN* SIO_LPT_SLCTIN_R*
PD[0..7] 21
SIO_LPT_STROBE*
STBJ 21
SIO_LPT_ALF*
AFDJ 21
SIO_LPT_ERR*
ERRJ 21
SIO_LPT_INIT*
INITJ 21
SIO_LPT_SLCTIN*
SLINJ 21
SIO_LPT_ACK*
*
ACKJ 21
BUSY 21
PE 21
SLCT 21
SIO_LPT_BUSY
SIO_LPT_PE
SIO_LPT_SLCT
*
RN3
RN3
22
22
+/-5%
+/-5%
1
3
5
7 8
0
PD3
1
PD2
2
PD1
3
PD0
RN6
4
5
6
7
2
4
6
RN6
PD4
*
*
1
3
5
7 8
22
22
+/-5%
+/-5%
2
4
6
PD5
PD6
PD7
R48
R48
22
22
*
*
+/-5%
+/-5%
2
SIO_LPT_PD0_R
SIO_LPT_PD1_R
SIO_LPT_PD2_R
SIO_LPT_PD3_R
SIO_LPT_PD4_R
SIO_LPT_PD5_R
SIO_LPT_PD6_R
SIO_LPT_PD7_R
SIO_LPT_STROBE_R*
SIO_LPT_ALF_R*
SIO_LPT_INIT_R*
SIO_LPT_SLCTIN_R*
1
+5V
D12
D12
LS4148-F
LS4148-F
PRN_VDD
RN13
RN13
642
*
*
135
7 8
2.2K
2.2K
+/-5%
+/-5%
3
*
*
*
*
RN7
RN7
2.2K
2.2K
+/-5%
+/-5%
2
C A
642
*
*
135
7 8
Ver2 fix
0
1
*
*
*
*
PARALLEL PORT
PRT
PRT
1
14
2
15
3
16
4
17
5
18
6
19
7
28
20
27
8
26
21
9
22
10
23
11
24
12
25
13
CONN - PrinterPort
CONN - PrinterPort
C34
C34
*
*
220pF
220pF
SERIAL PORT
CN6220pF
CN5 220pF
COM1
COM1
11
1
6
2
7
3
8
4
9
5
10
CONN-COM PORT
CN2
CN2
*
*
CN1
CN1
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
*
*
CONN-COM PORT
CN5 220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
CN7 220pF
CN7 220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
50V, NPO, +/-10%
50V, NPO, +/-10%
CN6220pF
CN4 220pF
CN4 220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
C39
C39
100nF
100nF
+80%~-20%
+5V
DCD2J 21
DSR2J 21
RXD2 21
RTS2J 21
TXD2 21
CTS2J 21
DTR2J 21
RI2J 21
*
A A
*
@COM2
@COM2
5
+80%~-20%
*
*
U11
U11
@COM2
@COM2
GD75232
GD75232
VDD+
+12V_COM -12V_COM
1
19
18
17
16
15
14
13
12
20
C68
C68
100nF
100nF
+80%~-20%
+80%~-20%
@COM2
@COM2
VDD-
10
RA1
RY1*
RY2*
RY3*
DA1
DA2
RY4*
DA3
RY5*
VCC
I76
I76
2
RA2
3
RA3
4
DY1*
5
DY2*
6
RA4
7
DY3*
8
RA5
9
GND
11
@COM2
@COM2
DCD2
DSR2
RXD2*
RTS2
TXD2*
CTS2
DTR2
RI2
C94
C94
100nF
100nF
+80%~-20%
+80%~-20%
*
*
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
SERIAL PORT
COM2
COM2
DCD2
RTS2
RI2
CN9
CN9
*
*
@COM2
@COM2
@COM2
@COM2
CN8
CN8
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
*
*
1 2
3
5 6
7
9
modify 8/20
4
3
4
8
Header_2X5_K10
Header_2X5_K10
@COM2
@COM2
RXD2*
DTR2 TXD2*
DSR2
CTS2
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Parallel / Gamr Port
Parallel / Gamr Port
Parallel / Gamr Port
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
23 35 Friday, June 27, 2008
23 35 Friday, June 27, 2008
23 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
4
3
2
1
*
*
*
*
Dummy
Dummy
R104
R104
6.8K
6.8K
+/-1%
+/-1%
R107
R107
*
*
10K
10K
+/-1%
+/-1%
C118
C118
100nF
100nF
+80%~-20%
+80%~-20%
1 2
CPU_THERMDA 9
1 2
CPU_THERMDC 9
+12V +5V
*
*
R101
R101
*
*
30K
30K
+/-1%
+/-1%
C117
C117
100nF
100nF
+80%~-20%
+80%~-20%
New FAN Header Definition
C358
C358
4.7uF
4.7uF
*
*
*
*
16V, Y5V , +80%/-20%
16V, Y5V , +80%/-20%
Dummy
Dummy
pin1. GND
pin2. +12V
pin3. Sense
pin4. Control
+12V
C A
LS4148-F
LS4148-F
D17
D17
C340
C340
C299
C299
100nF
100nF
470pF
470pF
*
*
+80%~-20%
+80%~-20%
50V, X7R, +/-10%
50V, X7R, +/-10%
+12V
C341
C341
100nF
100nF
*
*
*
R216
R216
27KOhm
27KOhm
+/-5%
+/-5%
*
+80%~-20%
+80%~-20%
FAN_TAC1 21
1
R213
R213
22K
22K
+/-5%
+/-5%
2
R218
R218
4.7K
4.7K
*
*
+/-5%
+/-5%
+5V
R206
R206
*
*
4.7K
4.7K
+/-5%
+/-5%
CPU FAN
R214
R214
100
100
+/-5%
+/-5%
Header_1X4 FAN4P
Header_1X4 FAN4P
CMD
TACH
+12V
GND
CPU_FAN
CPU_FAN
4
CPUFAN-P3
3
CPUFAN-P2
2
1
R105
R105
*
*
10K
10K
+/-1%
+/-1%
FAN_CTL1 21
SYSTEM
4
SYSFAN-P3
3
SYSFAN-P2
2
1
FAN
*
*
Dummy
Dummy
+12V
C131
C131
4.7uF
4.7uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C A
LS4148-F
LS4148-F
D15
D15
C141
C141
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
+12V
C98
C98
100nF
100nF
*
*
+80%~-20%
R115
R115
4.7K
4.7K
*
*
+/-5%
+/-5%
R118
R118
27KOhm
27KOhm
*
*
+/-5%
+/-5%
+80%~-20%
FAN_TAC3 21
1
R120
R120
22K
22K
+/-5%
+/-5%
2
+5V
R122
R122
*
*
4.7K
4.7K
+/-5%
+/-5%
R125
R125
100
FAN_CTL3 21
100
+/-5%
+/-5%
Header_1X4 FAN4P
Header_1X4 FAN4P
CMD
TACH
+12V
GND
SYS_FAN
SYS_FAN
+V_CPU +3.3V +1.8V_SUS
R117
R117
*
Voltage Monitor
VIN0 21
D D
VIN1 21
VIN2 21
VIN3 21
VIN4 21
*
*
*
Dummy
Dummy
10K
10K
+/-1%
+/-1%
C128
C128
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
*
Dummy
Dummy
R108
R108
R106
R106
*
*
49.9
49.9
10K
10K
+/-1%
+/-1%
+/-1%
+/-1%
*
*
HMGND HMGND HMGND
C120
C120
C124
C124
100nF
100nF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
Dummy
Dummy
HMGND
R111
R111
10K
10K
+/-1%
+/-1%
Dummy
Dummy
Thermal Controller
C C
B B
VREF 21
VREF 21
TMPIN2 21
C107
C107
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
C109
C109
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
HMGND
*
*
HMGND
R100
R100
*
*
30K
30K
+/-1%
+/-1%
Dummy
Dummy
C113
TMPIN1 21
*
*
C113
3.3nF
3.3nF
*
*
+/-10%
+/-10%
HMGND
R95
R95
*
*
10K
10K
+/-1%
+/-1%
RT1
RT1
T
T
10KOhm
10KOhm
+/-1%
+/-1%
CP5 dummyCP5 dummy
CP6 dummyCP6 dummy
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Hardware Monitor / Over Volt
Hardware Monitor / Over Volt
Need to check GPIO default
value at power-on .
5
4
3
2
Hardware Monitor / Over Volt
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
24 35 Friday, June 27, 2008
24 35 Friday, June 27, 2008
24 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
BACK PANEL LAN/USB -> Near Connector
+/-5%
+/-5%
0
0
RN15
RN15
USB_6_FB+
1
*
*
USB_6_FB-
3
USB_1_FB+
5
USB_1_FB-
7 8
USB_6_FB+ 26
USB_6_FB- 26
USB_1_FB+ 26
USB_1_FB- 26
USB_6+
USB_6USB_1+
USB_1-
2
4
6
D D
USB_6+ 18
USB_6- 18
USB_1+ 18
USB_1- 18
4
3
2
1
Connect to rear LAN/USB port
PLACE NEAR CONN
5V_DUAL_USB_1
C C
B B
A A
modify 9/14
5V_DUAL_USB
*
*
f_usb1
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
USB_2+ 18
USB_2- 18
USB_4+ 18
USB_4- 18
F3
F3
*
*
Fuse 2.6A
Fuse 2.6A
Header_1X3
Header_1X3
3
2
1
USB_PWR2
USB_PWR2
F4
F4
Fuse 2.6A
Fuse 2.6A
USBPWR_FNTPNL
C378
C378
10uF
10uF
*
*
Dummy
Dummy
USB_2+
USB_2USB_4+
USB_4-
3
+5V_STBY
2
5V_DUAL_USB_1
1
+5V
FRONT PANEL USB
C386
C386
100nF
100nF
*
*
+80%~-20%
+80%~-20%
USB_FP_4USB_FP_4+
+/-5%
+/-5%
0
0
2
4
6
RN47
RN47
5
REAR_PWR
*
*
*
*
1000uF
1000uF
USB_0+ 18
USB_0- 18
USB_7+ 18
USB_7- 18
EC48
EC48
1000uF
1000uF
+/-20%
+/-20%
F_USB1
F_USB1
1 2
3 4
5 6
7 8
Header_2X5_K9
Header_2X5_K9
modify 9/13
1
3
5
7 8
USB_PWR2(1-2)
USB_PWR2(1-2)
Jumper_2P_Blu
Jumper_2P_Blu
X
X
REAR_PWR 26
PLACE NEAR CONN
EC18
EC18
C32
C32
100nF
100nF
*
*
*
*
EMI CAPS
USBP0P-1394
USBP0N-1394
USBP1P-1394
USBP1N-1394
R274
R274
5.1KOhm
5.1KOhm
+/-1%
+/-1%
R275
R275
*
*
10K
10K
+/-5%
+/-5%
USB_FP_2USB_FP_2+
10
USB_FP_2+
USB_FP_2USB_FP_4+
USB_FP_4-
R39
R39
5.1KOhm
5.1KOhm
+/-1%
1
3
5
7 8
USB_OC1*
USB_OC1* 18
USB_OC2* 18
USB_FP_4-
USB_FP_2-
modify 9/13
+/-1%
USB_0_FB+
USB_7_FB+
1
2
C21
C21
100nF
100nF
*
*
Dummy
Dummy
+/-5%
+/-5%
0
0
2
*
*
4
6
RN1
RN1
USB_OC2*
R40
R40
*
*
10K
10K
+/-5%
+/-5%
U18
U18
I/O1
REF1
I/O23I/O3
IP4220CZ6
IP4220CZ6
PWR SHOULD BE 75MIL MIN
USB_OC0*
USB_OC3*
U2
U2
1
I/O1
2
REF1
I/O23I/O3
IP4220CZ6
IP4220CZ6
USB_0_FB+
USB_0_FB-
USB_7_FB+
USB_7_FB-
6
I/O4
USBPWR_FNTPNL
5
REF2
4
Dummy
Dummy
4
USB_OC0* 18
USB_OC3* 18
I/O4
REF2
USB_FP_4+
USB_FP_2+
6
5
4
Dummy
Dummy
USB_0_FBREAR_PWR
USB_7_FB-
Header_1X3
Header_1X3
3
3
2
2
1
1
USB_PWR1
USB_PWR1
REAR_PWR
+5V_STBY
5V_DUAL_USB
+5V
REAR_PWR
USB_PWR1(1-2)
USB_PWR1(1-2)
Jumper_2P_Blu
Jumper_2P_Blu
C25
*
*
C25
100nF
100nF
+80%~-20%
+80%~-20%
Dummy
Dummy
USB_3- 18
USB_3+ 18
USB_5- 18
USB_5+ 18
f_usb2
USB_FP_5-
USB_FP_3-
USBPWR_FNTPNL
C407
C407
10uF
10uF
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
1
2
USB_3-
USB_3+
USB_5-
USB_5+
USB_FP_5+
U19
U19
I/O1
REF1
REF2
I/O23I/O3
IP4220CZ6
IP4220CZ6
I/O4
*
*
Dummy
Dummy
6
5
4
+/-5%
+/-5%
0
0
2
4
6
RN48
RN48
2
C417
C417
100nF
100nF
+80%~-20%
+80%~-20%
Dummy
Dummy
F_USB2
F_USB2
1 2
3 4
5 6
7 8
X
X
Header_2X5_K9
Header_2X5_K9
USB_FP_5+
USBPWR_FNTPNL
USB_FP_3+
1
*
*
3
5
7 8
USB_FP_3- USB_FP_5USB_FP_3+
10
modify 9/13
modify 9/13
USB_FP_3USB_FP_3+
USB_FP_5USB_FP_5+
Title
Title
Title
USB Connector
USB Connector
USB Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
25 35 Friday, June 27, 2008
25 35 Friday, June 27, 2008
25 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
C29
C29
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
11
10
USB
USB
8
7
6
5
4
3
2
BOTTOM TOP
BOTTOM TOP
1
CONN-USBx2
CONN-USBx2
9
12
3
5
PWR_LAN
D D
+3.3V_DUAL
TX_D0 14
TX_D1 14
TX_D2 14
TX_D3 14
MII_COL 14
MII_CRS 14
AVDD_FE
C C
B B
+3.3V_DUAL
A A
C14
C14
2.2uF
2.2uF
*
*
@AC131
@AC131
+3.3V_DUAL
R390
R390
*
*
0
0
+/-5%
+/-5%
@AC131
@AC131
C42
C42
470pF
470pF
*
*
*
*
@AC131
@AC131
@AC131
@AC131
R67 330 +/-5%
R67 330 +/-5%
*
*
USB_6_FB-
USB_1_FB-
PWR_LAN
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
*
*
LAN_X1 14
C64
C64
100nF
100nF
1
2
EC59
EC59
100uF
100uF
+/-20%
+/-20%
TXD0
TXD1
TXD2
TXD3
COL
CRS
C17
C17
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@AC131
@AC131
L_X1
*
*
C65
C65
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
@AC131
@AC131
LAN_LINK_UP
U10
U10
I/O1
I/O4
REF1
REF2
I/O23I/O3
IP4220CZ6
IP4220CZ6
PWR_LAN
*
*
@AC131
@AC131
place near XTAL
R24
R24
*
*
0
0
+/-5%
+/-5%
+3.3V_DUAL
R62
R62
*
*
330
330
+/-5%
+/-5%
LINK_100_C
MX0+
MX0MX1+
MX1-
*
*
6
5
4
Dummy
Dummy
5
C13
C13
100nF
100nF
+80%~-20%
+80%~-20%
R59
R59
330
330
+/-5%
+/-5%
LINK_1000
C526
C526
C527
C527
100nF
100nF
100nF
100nF
*
*
Dummy
Dummy
Dummy
Dummy
U1
U1
25
26
27
28
29
30
31
32
@AC131
@AC131
L_X1
LAN_X2
MX0+
MX0MX1-
MX1+
*
*
Dummy
Dummy
R68
R68
0
0
*
*
+/-5%
+/-5%
USB_6_FB+
REAR_PWR
USB_1_FB+
TXD0
TXD1
TXD2
TXD3
COL/ENGYDET
CRS/STANDBY
REGIN
REGOUT
C7
C7
Dummy
Dummy
1 2
XTAL-25MHz
XTAL-25MHz
33pF
33pF
+/-5%
+/-5%
NIC_USB
NIC_USB
22
21
9
10
11
12
13
14
15
16
17
18
20
19
#NIC_USB1#NIC_USB2
#NIC_USB1#NIC_USB2
TX_EN
*
*
TXC
@AC131
@AC131
23
24
TXEN
XTALI1XTALO2TD+3TD-4RD-5RD+6AVDD7RDAC
LXO
LXI
R25
R25
470KOhm
470KOhm
*
*
+/-1%
+/-1%
X1
X1
*
*
Dummy
Dummy
GRN_LED
GRN_LED
GRN_LED
GRN_LED
@AC131
@AC131
R46
R46
0
0
+/-5%
+/-5%
RXCLK_U
RX_ER
20
22
21
TXC
RXER
OVDD2
AC131KMLG
AC131KMLG
MX0+
MX1-
MX0-
Dummy
Dummy
C8
C8
33pF
33pF
+/-5%
+/-5%
YLW_LED
YLW_LED
CONN-USBx2_RJ45
CONN-USBx2_RJ45
NIC_USB1
NIC_USB1
@AC131
@AC131
C19
C19
100nF
100nF
+80%~-20%
+80%~-20%
*
*
RXDV_U
19
RXC
RXDV
MX1+
RJ45-MJ2
RJ45-MJ2
RX0
RX1
17
18
RXD0/PHY0
RXD2/F100
RXD3/ISOLATE
8
@AC131
@AC131
C5
C5
2.2uF
2.2uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
*
*
@AC131
@AC131
USB-2
USB-2
NIC_USB2
NIC_USB2
@8100C
@8100C
RXD1/ANEN
RESET
OVDD1
R23
R23
1.24K
1.24K
+/-1%
+/-1%
USB-1
USB-1
GND
MDC
MDIO
LED1
LED2
*
*
@AC131
@AC131
LINK_1000
LAN_LINK_UP LAN_X2
LINK_100_C
+3.3V_DUAL
TX_EN 14
TX_CLK 14
RX_ER 14
33
16
15
14
13
12
11
10
9
C6
C6
100nF
100nF
+80%~-20%
+80%~-20%
27
28
29
30
1
5
USB_6_FB-
2
USB_1_FB-
6
USB_6_FB+
3
USB_1_FB+
7
4
8
23
24
25
26
4
RSMRST# 18,28
C40
C40
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@AC131
@AC131
SHORT1short pad
SHORT1short pad
C62
C62
100nF
100nF
*
*
*
*
Dummy
Dummy
Dummy
Dummy
REALUSB_PWR
4
Dummy
Dummy
*
*
FB2
FB2
@AC131
@AC131
1 2
Dummy
Dummy
C63
C63
100nF
100nF
*
*
*
*
*
*
RX2
RX3
MDC
MDIO
LINK_100_C
LAN_LINK_UP
PHY_RST
C31
C31
2.2uF
2.2uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
AVDD_FE
*
*
FB 600 Ohm
FB 600 Ohm
Dummy
Dummy
C56
C56
100nF
100nF
Dummy
Dummy
REAR_PWR 25
USB_6_FB- 25
USB_1_FB- 25
USB_6_FB+ 25
USB_1_FB+ 25
R27
R27
0
@AC131
0
@AC131
+/-5%
+/-5%
R28
R28
100K
100K
+/-5%
+/-5%
*
*
RX0
RX1
RX2
RX3
RXDV_U
RXCLK_U
MII_MDC 14
MII_MDIO 14
PWR_LAN
PHY_RST
C15
C15
C18
C18
100nF
100nF
10uF
10uF
*
*
+80%~-20%
+80%~-20%
Dum my
Dummy
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
Dummy
Dummy
+3.3V_DUAL
MDIO
@AC131
@AC131
RN2
RN2
*
*
1
2
3
4
5
6
7 8
R45
R45
R44 0 +/-5%
R44 0 +/-5%
*
*
0
0
*
*
@AC131
@AC131
+/-5%
+/-5%
@AC131
@AC131
C41
C41
10pF
10pF
@AC131
@AC131
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
3
R35
R35
*
*
1.5K
1.5K
+/-5%
+/-5%
+/-5%
+/-5%
RX_D0 14
0 Ohm
0 Ohm
RX_D1 14
RX_D2 14
RX_D3 14
RX_DV 14
RX_CLK 14
TXC
C551
C551
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
AD[31..0]
CBEJ[3..0]
C549
C549
10nF
10nF
25V, X7R, +/-10%@AC131
25V, X7R, +/-10%@AC131
*
*
C548
C548
10nF
10nF
25V, X7R, +/-10%
25V, X7R, +/-10%
*
*
1- MDIO+ & MDIO- pairs should be
100-ohm differential impedance.
Route equal length and
symmetrically. Separate every
pairs.
U20
MX0- MX0MX0+
MX1MX1+
1
2
3
C550
C550
*
*
10nF
10nF
25V, X7R, +/-10%
25V, X7R, +/-10%
@8100C
@8100C
U20
1
2
3
445
dummy
dummy
R389 49.9 +/-1% @8100C
R389 49.9 +/-1% @8100C
R330 49.9 +/-1% @8100C
R330 49.9 +/-1% @8100C
Place near Lan connector
3
VDD33
VDD33
+5V
R355
R355
*
*
1K
1K
+/-5%
+/-5%
LAN_ISO
@8100C
@8100C
R348
R348
15K
15K
*
*
+/-5%
+/-5%
@8100C
@8100C
PCI_INTZ* 16,20
PCIRST_SLOT3* 16
PCI_CLK_LAN 16
PCI_GNT*4 16
PCI_REQ*4 16,20
PCI_PME* 16,20
PCI_AD[31..0] 16,20
PCI_C/BE*[3..0] 16,20
R328 49.9 +/-1% @AC131
R328 49.9 +/-1% @AC131
*
*
R326 49.9 +/-1% @AC131
R326 49.9 +/-1% @AC131
*
*
R329 49.9 +/-1%
R329 49.9 +/-1%
*
*
R327 49.9 +/-1%
R327 49.9 +/-1%
*
*
8
8
MX0+
7
7
MX1-
6
6
MX1+
5
SLVU2.8-4.TBT
SLVU2.8-4.TBT
*
*
*
*
MX0+
MX0-
+3.3V_DUAL
MX0+
MX0-
MX1+
MX1-
CTRL25
V_12P
LAN_ISO
AD31
AD30
AD29
AD28
MX0+
MX0MX1+
MX1-
*
*
@8100C
@8100C
R352
R352
5.6K
5.6K
+/-1%
+/-1%
AVDDL
PCI_AD25
2
L_X1
LAN_X2
LAN_RSET
LINK_100_C
LAN_LINK_UP
U24
U24
128
127
GND
1
TX+
2
TX-
3
AVDD33
4
GND
5
RX+
6
RX-
7
AVDD33
8
CTRL25
9
NC1
10
NC2
11
NC3
12
AVDD25
13
NC4
14
NC5
15
NC6
16
NC7
17
GND
18
NC8
19
NC9
20
AVDD33(REG)
21
GND
22
NC10
23
ISOLATEB
24
NC11
25
INTAB
26
VDD33
27
PCIRSTB
28
PCICLK
29
GNTB
30
REQB
31
PMEB
32
VDD25
33
AD31
34
AD30
35
GND
36
AD29
37
AD28
38
GND
AD2739AD2640VDD3341AD2542AD2443CBEB344NC1245IDSEL46AD2347NC1348AD2249AD2150GND51GND52AD2053VDD2554AD1955VDD3356AD1857AD1758AD1659CBEB260FRAMEB61NC1462IRDYB63NC15
@8100C
@8100C
AD26
AD27
R354
R354
100
100
+/-5%
+/-5%
*
*
@8100C
@8100C
126
NC26
RSET
AD25
LAN_IDSEL
CTRL25
119
123
124
121
122
115
117
116
118
120
125
GND
GND
GND
LED0
NC23
NC24
NC25
NC27
XTAL1
XTAL2
RTL8100C-LF
RTL8100C-LF
AD21
AD22
AD23
AD24
CBEJ3
VDD33
E C
Q30
Q30
B
BCP69T1G
BCP69T1G
4
@8100C
@8100C
+/-20%
+/-20%
C530
C530
100uF
100uF
*
*
10uF
10uF
*
*
EC63
EC63
@8100C
@8100C
@8100C
@8100C
2
R288 stuff 10K for 93C56
Dummy
Dummy
108
114
110
112
113
111
109
LED2
LED1
NC20
NC21
NC22
EESK
EEDO
AUX/EEDI
AD18
AD16
AD19
AD17
AD20
CBEJ2
C532
C532
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
*
*
107
VDD33
LAN EEPROM
R350
R350
10K
10K
+/-5%
+/-5%
LAN_EECS
LAN_EESK
LAN_EEDI
LAN_EEDO
105
106
EECS
LWAKE
AD0
104
DEVSELB
CLKRUNB
AD0
AD1
103
64
DVDD
AD1
VDD25
VDD33
CBEB0
NC19
AD10
AD11
AD12
VDD33
AD13
AD14
AD15
VDD25
CBEB1
SERRB
NC18
NC17
NC16
VDD33
PERRB
STOPB
TRDYB
U25
U25
1
CS
VCC
SK2NC
3
DI
ORG
4
GND
DO
AT93C46DN-SH-T
AT93C46DN-SH-T
VDD33
R349
R349
3.6K
3.6K
*
*
DVDD
+/-1%
+/-1%
@8100C
@8100C
102
AD2
101
GND
100
GND
99
98
AD3
97
AD4
96
AD5
95
AD6
94
93
AD7
92
91
GND
90
AD8
89
AD9
88
87
86
85
84
83
82
81
GND
80
GND
79
78
77
76
PAR
75
74
73
72
71
70
69
68
67
66
GND
65
CBEJ0
Dummy
Dummy
Dummy
Dummy
PCI_IRDY* 16,20
PCI_FRAME* 16,20
*
*
*
*
Place at pin 24,32,45,54,64,78,99,110,116
C168
*
*
@8100C
@8100C
C529
C529
100nF
100nF
+80%~-20%
+80%~-20%
*
*
@8100C
@8100C
C168
100nF
100nF
+80%~-20%
+80%~-20%
*
*
@8100C
@8100C
C454
C454
100nF
100nF
+80%~-20%
+80%~-20%
Place at pin 3,7,16,20
C539
C539
C541
C541
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
10uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10uF
@8100C
@8100C
@8100C
@8100C
VDD33
Place at pin 26,41,56,71,84,94,107
C537
C537
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
@8100C
@8100C
Title
Title
Title
LAN
LAN
LAN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
VDD33
C553
C553
8
100nF
100nF
7
*
*
+80%~-20%
+80%~-20%
6
5
@8100C
@8100C
@8100C
@8100C
R177 use 3.6k for 3.3v Voltage. 5.6k for 5v voltage
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
CBEJ1
PCI_PAR 16,20
R351
R351
PCI_SERR* 16,20
0
0
SMB_SDA 18,19,20,28
R353
R353
+/-5%
+/-5%
0
0
SMB_SCL 18,19,20,28
+/-5%
+/-5%
PCI_PERR* 16,20
PCI_STOP* 16,20
PCI_DEVSEL* 16,20
PCI_TRDY* 16,20
V_12P
C531
C531
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
C105
C105
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
*
*
@8100C
@8100C
C545
C545
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
C546
C546
100nF
100nF
+80%~-20%
+80%~-20%
C547
C547
100nF
100nF
+80%~-20%
+80%~-20%
C33
C33
C528
C528
100nF
100nF
100nF
100nF
*
*
*
@8100C
@8100C
*
*
@8100C
@8100C
C535
C535
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
1
+80%~-20%
+80%~-20%
C543
C543
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
C538
C538
100nF
100nF
+80%~-20%
+80%~-20%
*
@8100C
@8100C
C534
C534
100nF
100nF
+80%~-20%
+80%~-20%
*
*
@8100C
@8100C
C533
C533
100nF
100nF
+80%~-20%
+80%~-20%
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
C536
C536
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
*
*
@8100C
@8100C
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
C445
C445
100nF
100nF
+80%~-20%
+80%~-20%
*
*
@8100C
@8100C
26 35 Friday, June 27, 2008
26 35 Friday, June 27, 2008
26 35 Friday, June 27, 2008
C100
C100
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
VDD33 AVDDL
C542
C542
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
of
of
of
C540
C540
100nF
100nF
*
*
+80%~-20%
+80%~-20%
@8100C
@8100C
C544
C544
1uF
1uF
16V, Y5V, +80/-20%
16V, Y5V, +80/-20%
A C
A C
A C
5
4
3
2
1
+3.3V1
+3.3V2
GND1
+5V1
GND2
+5V2
GND3
+12V_1
+12V_2
+3.3V4
Dummy
Dummy
+3.3V_DUAL
*
*
E C
+3.3V
1
2
3
4
5
6
7
8
9
10
11
12
*
*
R211
R211
*
*
10K
10K
+/-5%
+/-5%
FP_RESET*_FP
C295
C295
100nF
100nF
+80%~-20%
+80%~-20%
Q14
Q14
MMBT3904-7-F
MMBT3904-7-F
R123
R123
2.2K
2.2K
*
*
+/-5%
+/-5%
+3.3V +3.3V -12V +5V +5V +12V +5V_STBY
P1
C249
C249
470pF
470pF
50V, X7R, +/-10%
50V, X7R, +/-10%
+5V
*
*
Dummy
Dummy
B
E C
+5V +3.3V
R296
R296
*
*
10K
10K
+/-5%
+/-5%
E C
C461
C461
100nF
100nF
*
*
+80%~-20%
+80%~-20%
R139
R139
100
100
+/-5%
+/-5%
Q13
Q13
MMBT3904-7-F
MMBT3904-7-F
*
*
*
*
C460
C460
100nF
100nF
+80%~-20%
+80%~-20%
RN22
RN22
1
3
5
7 8
100 Ohm
100 Ohm
+/-5%
+/-5%
2
4
6
B
*
*
+3.3V
+5V +3.3V
Dummy
Dummy
R188 330
R188 330
+-5%
+-5%
P1
+5V
+
-
SPEAK
C152
C152
1nF
1nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
Dummy
Dummy
Q24
Q24
MMBT3904-7-F
MMBT3904-7-F
R279
R279
10K
10K
+/-5%
+/-5%
R187
R187
+-5%
+-5%
FP_1
FP_RESET*_FP
BUZ
BUZ
Dummy
Dummy
BUZZER
BUZZER
Buzzer
Buzzer
+5V
SWITCH_ON*
330
330
1
3
4
*
*
+5V_STBY
*
*
*
*
Dummy
Dummy
1 2
3
596
7 8
SPEAKER
SPEAKER
1
3
4
Header_1X4_K2
Header_1X4_K2
R284
R284
*
*
10K
10K
+/-5%
+/-5%
PWRGD_PS
C448
C448
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
GP13 21
R210
R210
10K
10K
+/-5%
+/-5%
C294
C294
100nF
100nF
+80%~-20%
+80%~-20%
R266
R266
*
*
300
300
+/-5%
+/-5%
FP1
FP1
4
X
X
Header_2X5_K10
Header_2X5_K10
+5V_STBY
R189
R189
330
330
+-5%
+-5%
PWRGD_PS 18,28
Dummy
Dummy
R212
R212
*
*
390 Ohm
390 Ohm
+/-5%
+/-5%
SLED
PLED
SWITCH_ON*
*
*
R289
R289
0
0
+/-5%
+/-5%
Dummy
Dummy
PWRGD_PS GP13
PANSWHJ 21
SLED 28
PLED 28
BAT1_1
BAT1_1
LITHIUM BATT
LITHIUM BATT
CR2032
CR2032
Battery
Battery
+5V_STBY
1
R300
R300
22K
22K
+/-5%
+/-5%
R302
R302
0
0
*
C462
C462
100nF
100nF
+80%~-20%
+80%~-20%
-12V
C457
C457
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
Dummy
Dummy
+/-5%
+/-5%
R301
R301
0
0
+/-5%
+/-5%
D D
C C
+5V +3.3V +12V
C376
C376
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C458
C458
100nF
100nF
*
B B
*
*
*
*
*
+80%~-20%
+80%~-20%
C463
C463
100nF
100nF
+80%~-20%
+80%~-20%
C459
C459
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
*
EC56
EC56
1000uF
1000uF
+/-20%
+/-20%
C224
C224
100nF
100nF
+80%~-20%
+80%~-20%
PS_OUT# 28
PS_ON# 21,28
EC25
EC25
*
*
470uF
470uF
16V, +/-20%
16V, +/-20%
Dummy
Dummy
*
*
*
*
2
C453
C453
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+5V
*
SATA_HDLED*
P_HDLED*
FP_RESET* 18
SIO_BEEP 21
SPEAKER
*
Dummy
Dummy
SATA_HDLED*
SATA_HDLED* 17
P_HDLED* 22
SPEAKER 18
R186
R186
10K
10K
+/-5%
+/-5%
Q19
Q19
2
1
Dummy
Dummy
PWR1
PWR1
Header_2x12
Header_2x12
13
+3.3V3
14
-12V
15
GND4
16
PSON
17
GND5
18
GND6
19
GND7
20
PWR0K
RSVD
21
+5V_AUX
+5V3
22
+5V4
23
+5V5
24
GND8
BAT54A
BAT54A
3
R217
R217
33
33
*
*
+/-5%
+/-5%
R130
R130
2.2K
2.2K
B
*
*
+/-5%
+/-5%
Dummy
Dummy
R132 10K
R132 10K
*
*
+/-5%
+/-5%
R127 10K
R127 10K
*
*
+/-5%
+/-5%
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PWR Connector / Front Panel / VBAT
PWR Connector / Front Panel / VBAT
PWR Connector / Front Panel / VBAT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
27 35 Friday, June 27, 2008
27 35 Friday, June 27, 2008
27 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
4
3
2
1
+5V_STBY
R242
R242
2.2
C374
C374
4.7uF
4.7uF
+80/-20%
+80/-20%
LR2_SEN
VDUAL3V_SEN
VDUAL3V_DRV
VCCGATE
USBGATE
DUALGATE
GND
RSMRST#
PWOK
VCC3V
TURBO1#
FAULT#/TURBO2#
R306
R306
PWRGD_PS
4.7K
4.7K
+/-5%
+/-5%
*
*
PLED 27
SLED 27
2.2
+/-5%
+/-5%
D18
D18
C384
C384
100nF
100nF
*
*
+80%~-20%
+80%~-20%
SD103AW
SD103AW
C382
C382
C A
1uF
1uF
*
*
LR2_DRV
LR1_SEN
31
33
29
34
36
30
32
C2
C1
GND
VSB5V
LR1_SEN
LR1_DRV35LR2_DRV
TIGER ONE
TIGER ONE
PWOKIN1PS_ONIN#2PS_ONOUT#3S5#4SCLK5SDATA6PLED7SLED8GND9VREF10VCORE_EN11VCORE_GD
R307
R307
4.7K
4.7K
+/-5%
+/-5%
PLED
SLED
PWRGD_PS
VDDA_DRV
VDDA_SEN
*
*
VDDA
VCC_PWM
*
*
VLDT_SEN
VLDT_DRV
VDDA_DRV
VDDA_SEN
28
26
27
25
CP
VLDT_SEN
VLDT_DRV
VDDA_SEN
VDDA_DRV
VTT_OPS
VRAM_UGATE
VRAM_LGATE
VCC_PWM
VRAM_OPS
VRAM_FB
VTT_PWM
12
C471
C471
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
R194
R194
215 Ohm
215 Ohm
*
*
+/-1%
+/-1%
R193
R193
100 Ohm
100 Ohm
C248
C248
+/-1%
+/-1%
10uF
10uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
D19
D19
LS4148-F
LS4148-F
C A
C424
C424
1uF
1uF
SS
GND
COMP
VTT_FB
VSB5V
R195
R195
2.2
2.2
+/-5%
+/-5%
1
C252
C252
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
24
23
22
21
20
19
18
17
16
15
14
13
+3.3V
*
*
*
*
*
*
2 3
VCC_PWM
C470
C470
100nF
100nF
+80%~-20%
+80%~-20%
R310
R310
0
0
+/-5%
+/-5%
Q21
Q21
APM2054N
APM2054N
*
*
Dummy
Dummy
+9V_SB
C409
C409
100nF
100nF
+80%~-20%
+80%~-20%
*
*
VTT_OPS 29
VRAM_UGATE 29
VRAM_LGATE 29
VRAM_OPS 29
VRAM_FB 29
COMP 29
VTT_FB 29
VTT_PWM 29
R305
R305
2.2
2.2
+/-5%
+/-5%
PWM_GD 30
VRM_EN 18,30
C283
C283
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
+2.5V
C271
C271
22uF
22uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
*
*
*
+5V_STBY
C261
C261
100nF
100nF
+80%~-20%
+80%~-20%
C428
C428
100nF
100nF
+80%~-20%
+80%~-20%
DUAL5V_GATE
+5V_STBY
D S
G
+5V_DUAL
*
*
Dummy
Dummy
*
*
Q28
Q28
P3055LDG
P3055LDG
C465
C465
C466
C466
100nF
100nF
10nF
10nF
*
*
+80%~-20%
+80%~-20%
25V, X7R, +/-10%
25V, X7R, +/-10%
Dummy
Dummy
C476
C476
*
*
4.7uF
4.7uF
Dummy
Dummy
Reserved
Reserved
EC58
EC58
1000uF
1000uF
+/-20%
+/-20%
*
*
Dummy
Dummy
EC55
EC55
1000uF
1000uF
+/-20%
+/-20%
+3.3V
*
*
R252
R252
*
*
4.7K
4.7K
+/-5%
+/-5%
D D
R278
R278
Dummy
Dummy
DUALGATE
0
0
+/-5%
DUAL5V_GATE
RSMRST# 18,26
+12V
C C
+5V_STBY
VDUAL3V_DRV
1
VDUAL3V_SEN
B B
+3.3V_DUAL
R276 0
R276 0
*
*
2 3
Q31
Q31
APM2054N
APM2054N
All-PWROK 18
*
*
C447
C447
4.7uF
4.7uF
+80/-20%
+80/-20%
EC40
EC40
470uF
470uF
16V, +/-20%
16V, +/-20%
Dummy
Dummy
+/-5%
+/-5%
+/-5%
+3.3V
*
*
+80%~-20%
+80%~-20%
SMB_SCL 18,19,20,26
SMB_SDA 18,19,20,26
R291
R291
10K
10K
+/-5%
+/-5%
C451
C451
100nF
100nF
+3.3V
USBGATE
*
*
D S
*
*
*
*
*
*
Q18
Q18
P3055LDG
P3055LDG
G
*
*
+3.3V_DUAL
R288
R288
0
0
*
*
+/-5%
+/-5%
*
*
+3.3V
R286
R286
3.9KOhm
3.9KOhm
+/-5%
+/-5%
R308
R308
4.7K
4.7K
+/-5%
+/-5%
C240
C240
100nF
100nF
+80%~-20%
+80%~-20%
VCCGATE
+3.3V_DUAL
C215
C215
100nF
100nF
+80%~-20%
+80%~-20%
R283
R283
*
*
4.7K
4.7K
+/-5%
+/-5%
All-PWROK
R280
R280
4.7K
4.7K
+/-5%
+/-5%
+3.3V
+3.3V_DUAL
R309
R309
*
*
4.7K
4.7K
+/-5%
+/-5%
LR1_SEN
LR2_SEN
VDUAL3V_SEN
VDUAL3V_DRV
VCCGATE
USBGATE
DUALGATE
R298
R298
4.7K
4.7K
*
*
+/-5%
+/-5%
R299
R299
4.7K
4.7K
*
*
+/-5%
+/-5%
+3.3V
+5V_STBY
PS_ON# 21,27
PS_OUT# 27
SLP_S5* 18
U17
U17
37
38
39
40
41
42
43
44
45
46
47
48
*
*
PWRGD_PS 18,27
+5V +5V_STBY
C375
C375
100nF
100nF
*
*
+80%~-20%
+80%~-20%
*
*
Dummy
Dummy
+5V
Q27
Q27
P3055LDG
P3055LDG
VCCGATE
G
D S
+5V_DUAL
EC57
EC57
1000uF
1000uF
*
*
+/-20%
+/-20%
Dummy
Dummy
C43
C43
100nF
100nF
+80%~-20%
+80%~-20%
+5V_DUAL
*
*
*
*
Dummy
Dummy
C450
C450
100nF
100nF
*
*
+80%~-2 0%
+80%~-2 0%
Dummy
Dummy
C24
C24
100nF
100nF
+80%~-20%
+80%~-20%
FD1
FD1
Optics
Optics
dummy
dummy
C444
C444
100nF
100nF
+80%~-20%
+80%~-20%
*
*
Dummy
Dummy
C23
C23
100nF
100nF
+80%~-20%
+80%~-20%
FD3
FD3
Optics
Optics
dummy
dummy
+3.3V +3.3V +12V
*
*
Dummy
Dummy
+3.3V_DUAL
EC36
EC36
470uF
470uF
16V, +/-20%
16V, +/-20%
modify 8/16
C121
C121
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
FD4
FD4
Optics
Optics
dummy
dummy
FD5
FD5
Optics
Optics
dummy
dummy
*
*
C12
C12
100nF
100nF
+80%~-20%
+80%~-20%
FD6
FD6
Optics
Optics
dummy
dummy
*
*
Dummy
Dummy
C227
C227
100nF
100nF
+80%~-20%
+80%~-20%
C122
C122
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
Optics
Optics
FD8
FD8
dummy
dummy
R185
R185
2.2
2.2
+/-5%
+/-5%
1
R264
R264
121 Ohm
121 Ohm
*
*
C259
C259
+/-1%
+/-1%
10uF
10uF
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
+3.3V_DUAL
2 3
Q20
Q20
APM2054N
APM2054N
*
*
C246
C246
100nF
100nF
*
*
+80%~-20%
+80%~-20%
*
*
+80/-20%
+80/-20%
4.7uF
4.7uF
EC45
EC45
*
*
100uF
100uF
+/-20%
+/-20%
Dummy
Dummy
Modify 23/8
C247
C247
C273
C273
100nF
100nF
+80%~-20%
+80%~-20%
Dummy
Dummy
+1.2V_DUAL
2
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
ACPI
ACPI
ACPI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
28 35 Friday, June 27, 2008
28 35 Friday, June 27, 2008
28 35 Friday, June 27, 2008
of
of
of
A C
A C
A C
LR2_DRV
LR2_SEN
R268
R268
*
*
240 Ohm
240 Ohm
+/-1%
+/-1%
+1.2V_DUAL
3
*
*
R215
R215
2.2
2.2
+/-5%
+/-5%
R265
R265
121 Ohm
121 Ohm
+/-1%
+/-1%
+3.3V
C338
C338
4.7uF
EC46
EC46
1000uF
1000uF
+/-20%
+/-20%
Q22
Q22
P3055LDG
P3055LDG
4.7uF
*
*
+80/-20%
+80/-20%
+1.2V_HT
C260
C260
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
Dummy
Dummy
D S
G
*
*
VLDT_DRV
A A
VLDT_SEN
*
*
R267
R267
240 Ohm
240 Ohm
+/-1%
+/-1%
VLDT
5
4
5
4
+5V_DUAL
C441
L17
L17
1uH@1KHz
1uH@1KHz
C441
4.7uF
4.7uF
*
*
*
*
+80/-20%
+80/-20%
modify 8/18
3
2
1
modify 8/16
C446
C446
EC49
D D
R259
R259
2.2
VRAM_UGATE 28
VRAM_OPS 28
VRAM_LGATE 28
VRAM_FB 28
+/-5%
+/-5%
R282
R282
20K
20K
*
*
+/-5%
+/-5%
R294 0
R294 0
*
*
2.2
R272 10K
R272 10K
+/-5%
+/-5%
*
*
D S
Q23
Q23
P3055LDG
P3055LDG
G
D S
Q26
Q26
P3055LDG
P3055LDG
G
R281
R281
*
*
24K
24K
+/-1%
+/-1%
C437 1nF
C437 1nF
*
*
R287
R287
33KOhm
33KOhm
*
*
+/-1%
+/-1%
50V, X7R, +/-10%
50V, X7R, +/-10%
*
*
Dummy
Dummy
*
*
L18 2.5uH@100KHz
L18 2.5uH@100KHz
R303
R303
*
*
2.2
2.2
+/-5%
+/-5%
C469
C469
4.7nF
4.7nF
50V, X7R, +/-10%
50V, X7R, +/-10%
Dummy
Dummy
EC49
4.7uF
4.7uF
470uF
470uF
*
*
+80/-20%
+80/-20%
6.3V, +/-20%
6.3V, +/-20%
*
*
R292
R292
220 Ohm
220 Ohm
*
*
+/-1%
+/-1%
*
*
C333
C333
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C435
C435
100nF
100nF
+80%~-20%
+80%~-20%
*
*
EC52
EC52
1000uF
1000uF
+/-20%
+/-20%
*
*
EC50
EC50
1000uF
1000uF
+/-20%
+/-20%
Dummy
Dummy
+1.8V_SUS
EC47
EC47
EC53
EC53
1000uF
1000uF
1000uF
1000uF
*
*
*
*
+/-20%
+/-20%
+/-20%
+/-20%
C C
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
R153 2.2
R153 2.2
+/-5%
+/-5%
U14
U14
UGATE1PHASE
2
VTT_OPS 28
BOOT
PWM3VCC
GND4LGATE
ISL6612ACBZA-T
ISL6612ACBZA-T
VTT_PWM 28
B B
C175
C175
1uF
1uF
*
*
C182 0.1uF
C182 0.1uF
*
*
PVCC
+5V
R151
R151
2.2
2.2
+/-5%
+/-5%
8
7
6
5
R163
R163
20K
20K
*
*
+/-5%
+/-5%
R155 10K
R155 10K
C176
C176
1uF
1uF
*
*
COMP 28
+1.22V
R290
R290
*
*
1K
1K
+/-1%
+/-1%
A A
5
*
*
R285
R285
1K
1K
+/-1%
+/-1%
C433
C433
*
*
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
R156
R156
+/-5%
+/-5%
2.2
2.2
*
*
COMP
4
G
+/-5%
+/-5%
R152
R152
0
0
G
+/-5%
+/-5%
VTT_FB 28
+1.8V_SUS
C137
C137
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C427
C427
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+12V
*
*
D S
Q17
Q17
D S
Q16
Q16
C449 1.5nF
C449 1.5nF
R293
R293
11K
11K
*
*
+/-1%
+/-1%
L11
L11
1uH@1KHz
1uH@1KHz
C153
C153
1uF
1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Dummy
Dummy
P3055LDG
P3055LDG
P3055LDG
P3055LDG
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
C452 47nF
C452 47nF
*
*
+/-10%
+/-10%
*
*
modify 8/16
modify 8/18
*
*
L12 2.5uH@100KHz
L12 2.5uH@100KHz
R169
R169
*
*
2.2
2.2
+/-5%
+/-5%
C198
C198
4.7nF
4.7nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
*
*
1
2
3
4
RT9173CPSP
RT9173CPSP
C425
C425
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
EC37
EC37
330uF
330uF
16V, +/-20%
16V, +/-20%
*
*
R295
R295
3KOhm
3KOhm
+/-1%
+/-1%
U16
U16
VIN
GND
REFEN
VOUT
*
*
C151
C151
+80/-20%
+80/-20%
4.7uF
4.7uF
C464 1nF
C464 1nF
*
*
NC3
NC2
VCNTL
NC1
PADDLE
9
EC54
EC54
1000uF
1000uF
*
*
+/-20%
+/-20%
EC43
EC43
1000uF
1000uF
*
*
+/-20%
+/-20%
R304
R304
1.5KOhm
1.5KOhm
*
*
+/-1%
+/-1%
50V, X7R, +/-10%
50V, X7R, +/-10%
Dummy
Dummy
8
7
6
5
EC41
EC41
1000uF
1000uF
*
*
+/-20%
+/-20%
+3.3V_DUAL
C431
C431
22uF
22uF
*
*
Dummy
Dummy
*
*
Dummy
Dummy
3
*
*
EC51
EC51
1000uF
1000uF
+/-20%
+/-20%
Dummy
Dummy
R297
R297
220 Ohm
220 Ohm
+/-1%
+/-1%
C429
C429
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
Dummy
Dummy
*
*
C385
C385
+80/-20%
+80/-20%
4.7uF
4.7uF
EC44
EC44
1000uF
1000uF
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
C410
*
C410
+80/-20%
+80/-20%
Dummy
Dummy
4.7uF
4.7uF
+1.2V
+/-20%
+/-20%
modify 8/16
VTT_DDR_SUS
C405
C405
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP CORE +1.2V
MCP CORE +1.2V
MCP CORE +1.2V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
29 35 Friday, June 27, 2008
29 35 Friday, June 27, 2008
29 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
L5
L5
*
*
1.2uH@100KHz
1.2uH@100KHz
*
*
C129
C129
+80/-20%
+80/-20%
4.7uF
4.7uF
D D
HIGH(>1.24V)
ENABLE VRM
PWM_GD 28
VRM_EN 18,28
VRM_EN > 0.6V ENABLE
modify 8/16
+V_CPU
*
C C
CPU_VDD_RUN_FB_H 9
CPU_VDD_RUN_FB_L 9
B B
*
*
*
*
*
+3.3V
+3.3V
R141
R141
*
*
1K
1K
*
*
+/-5%
+/-5%
R116
R116
49.9
49.9
+/-1%
+/-1%
R119
R119
49.9
49.9
*
*
+/-1%
+/-1%
Dummy
Dummy
modify 8/16
*
*
EC23
EC23
1000uF
1000uF
+/-20%
+/-20%
R146
R146
10K
10K
+/-5%
+/-5%
C167
C167
100nF
100nF
+80%~-20%
+80%~-20%
C132
C132
1nF
1nF
*
*
*
*
VREG_VID4 9
VREG_VID3 9
VREG_VID2 9
VREG_VID1 9
VREG_VID0 9
C136
C136
1nF
1nF
Dummy
Dummy
EC21
EC21
1000uF
1000uF
+/-20%
+/-20%
+5V
EC20
EC20
1000uF
1000uF
*
*
+/-20%
+/-20%
Dummy
Dummy
R126
R126
10K
10K
*
*
+/-5%
+/-5%
C143 220pF
C143 220pF
Orig 2K
Dummy
Dummy
+10mV
OFFSET
R143
R143
*
*
120KOhm
120KOhm
+/-5%
+/-5%
R113 820
R113 820
*
*
Orig 33K
Orig 47nF Y5V
+/-1%
+/-1%
*
*
*
*
*
*
*
*
*
*
R124
R124
1K
1K
+/-1%
+/-1%
R131
R131
150K
150K
+/-5%
+/-5%
R112
R112
13.3KOhm
13.3KOhm
+/-1%
+/-1%
EC22
EC22
1000uF
1000uF
*
*
C82
C82
+/-20%
+/-20%
+80/-20%
+80/-20%
4.7uF
4.7uF
C146 5.6nF
C146 5.6nF
*
*
R136
R136
*
*
51KOhm
51KOhm
+/-5%
+/-5%
C157
C157
10nF
10nF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
ICOMP
C134
C134
100nF
100nF
+80%~-20%
+80%~-20%
C135
C135
47nF
47nF
+/-10%
+/-10%
*
*
*
*
ISUM
*
*
Dummy
Dummy
32PIN 5x5QFN
U13
U13
38
VID4
39
VID3
40
VID2
1
VID1
2
VID0
3
VID12.5
35
PGOOD
37
ENLL
C163
C163
100nF
100nF
+80%~-20%
+80%~-20%
8
COMP
9
FB
10
VDIFF
12
VSEN
11
RGND
6
OFS
36
FS
5
REF
4
VRM10
13
OCSET
14
ICOMP
15
ISUM
16
IREF
4
C570
C570
10uF
10uF
+/-10%
+/-10%
Orig 33K
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
R114
R114
24K
24K
*
*
+/-1%
R110
R110
+/-1%
24K
24K
*
*
R109
R109
+/-1%
+/-1%
24K
24K
*
*
+/-1%
+/-1%
C80
C80
100nF
100nF
*
*
+5V
D16
D16
B120-13-F
B120-13-F
C A
*
*
7
VCC
UGATE1
PHASE1
LGATE1
UGATE2
PHASE2
LGATE2
UGATE3
PHASE3
LGATE3
GND
ISL6566CRZA-TR5184
ISL6566CRZA-TR5184
41
PVCC1
BOOT1
PVCC2
BOOT2
PVCC3
BOOT3
emi
C79
C79
C83
C83
100nF
100nF
100nF
100nF
*
*
Dummy
Dummy
+80%~-20%Dummy
+80%~-20%Dummy
C148
C148
4.7uF
4.7uF
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
33
R140 2.2 R140 2.2
30
C158
C158
0.1uF
0.1uF
UGATE1
31
PHASE1
29
ISEN1
32
ISEN1
LGATE1
34
24
R135 2.2 R135 2.2
26
UGATE2
27
PHASE2
28
ISEN2
25
ISEN2
LGATE2
23
18
R121 2.2 R121 2.2
21
UGATE3
20
PHASE3
22
ISEN3
19
ISEN3
LGATE3
17
BOTTOM PAD CONNECT TO
GND THROUGH 10vias
C156
C156
0.1uF
0.1uF
*
*
C138
C138
0.1uF
0.1uF
*
*
*
*
*
*
+80%~-20%
+80%~-20%
12V_VIN
*
*
R142
R142
1.8KOhm
1.8KOhm
+/-1%
+/-1%
12V_VIN
R138
R138
*
*
R129
R129
1.8KOhm
1.8KOhm
+/-1%
+/-1%
12V_VIN
*
*
*
*
R137
R137
1.8KOhm
1.8KOhm
*
*
+/-1%
+/-1%
R145
R145
2.2
2.2
+/-5%
+/-5%
C164
C164
1uF
1uF
R92 1 +/-5%R92 1 +/-5%
modify 8/16
2.2
2.2
+/-5%
+/-5%
C145
C145
1uF
1uF
R93 1 +/-5%R93 1 +/-5%
R128
R128
modify 8/16
2.2
2.2
+/-5%
+/-5%
C147
C147
1uF
1uF
R94 1 +/-5%R94 1 +/-5%
modify 8/16
3
12V_VIN 12V_VIN 12V_VRM
2
4
PWR2
Orig 2.2R 0603
D S
Q4
AOD472Q4AOD472
*
*
Orig 2.2R 0603
D S
Q6
AOD472Q6AOD472
*
*
Orig 2.2R 0603
D S
Q9
AOD472Q9AOD472
*
*
R98
R98
2.2
2.2
+/-5%
+/-5%
C112
C112
1nF
1nF
R97
R97
2.2
2.2
+/-5%
+/-5%
C110
C110
1nF
1nF
R99
R99
2.2
2.2
+/-5%
+/-5%
C111
C111
1nF
1nF
PWR2
1
3
Header_2X2
Header_2X2
L7
L7
*
*
600nH@100KHz
600nH@100KHz
L8
L8
*
*
600nH@100KHz
600nH@100KHz
L9
L9
*
*
600nH@100KHz
600nH@100KHz
*
*
*
*
Dummy
Dummy
*
*
EC34
EC34
1800uF
1800uF
6.3V, +/-20%
6.3V, +/-20%
EC27
EC27
1800uF
1800uF
6.3V, +/-20%
6.3V, +/-20%
C93
C93
10nF
10nF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
12V_VRM
C85
C85
*
R84
R84
*
*
10K
10K
+/-5%
+/-5%
G
G
R86
R86
*
*
10K
10K
+/-5%
+/-5%
G
G
R85
R85
*
*
10K
10K
+/-5%
+/-5%
G
G
D S
D S
Q5
AOD472Q5AOD472
12V_VRM
D S
D S
AOD472Q7AOD472
12V_VRM
D S
D S
Q8
AOD472Q8AOD472
Q12
Q12
AOD452
AOD452
Q11
Q11
AOD452
AOD452
Q7
Q10
Q10
AOD452
AOD452
*
1uF
1uF
G
C84
C84
*
*
1uF
1uF
G
C81
C81
*
*
1uF
1uF
G
EC35
EC35
1800uF
1800uF
6.3V, +/-20%
6.3V, +/-20%
2
EC30
EC30
1800uF6.3V, +/-20%
1800uF6.3V, +/-20%
*
*
Dummy
Dummy
EC32
EC32
1800uF
1800uF
*
*
6.3V, +/-20%
6.3V, +/-20%
*
*
EC33
EC33
1800uF
1800uF
6.3V, +/-20%
6.3V, +/-20%
*
*
+V_CPU
EC31
EC31
1800uF
1800uF
6.3V, +/-20%
6.3V, +/-20%
1
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
VRM
VRM
VRM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
30 35 Friday, June 27, 2008
30 35 Friday, June 27, 2008
30 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
1
A A
2
3
4
5
6
7
8
+5V +3.3V
2 1
D9
C26
C26
BAV99D9BAV99
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
B B
C C
DAC_RED 14
DAC_GREEN 14
DAC_BLUE 14
DDC_DATA 14
DAC_HSYNC 14
DAC_VSYNC 14
DDC_DATA
DDC_CLK
DDC_CLK 14
DAC_HSYNC
DAC_VSYNC
+5V
*
*
5
3
5
3
C57
C57
100nF
100nF
+80%~-20%
+80%~-20%
1
U6
U6
V
V
4 2
G
G
NC7SZ125M5X
NC7SZ125M5X
1
U8
U8
V
V
4 2
G
G
NC7SZ125M5X
NC7SZ125M5X
R63
R63
22
22
*
*
+/-5%
+/-5%
R65
R65
22
22
*
*
+/-5%
+/-5%
10pF
10pF
50V, NPO, +/-5%
50V, NPO, +/-5%
2 1
D10
D10
BAV99
BAV99
3
3
R9
R9
150
150
+/-5%
+/-5%
1
1
R11
R11
R10
R10
150
150
150
150
+/-5%
+/-5%
+/-5%
+/-5%
2
2
1
C55
C55
C58
C58
10pF
10pF
*
*
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
2
*
*
C10
C10
C9
C9
5.6pF
5.6pF
5.6pF
5.6pF
*
*
*
+/-0.25pF
+/-0.25pF
+/-0.25pF
+/-0.25pF
*
*
*
2 1
3
BAV99D1BAV99
*
*
2 1
D1
BAV99D4BAV99
C3
C3
10pF
10pF
50V, NPO, +/-5%
50V, NPO, +/-5%
D4
3
*
*
D2
C179
C179
BAV99D2BAV99
100nF
100nF
+80%~-20%
+80%~-20%
FB1 68nH@100MHz
FB1 68nH@100MHz
*
*
FB3 68nH@100MHz
FB3 68nH@100MHz
*
*
FB4 68nH@100MHz
FB4 68nH@100MHz
*
*
L2 27nH@100MHz
L2 27nH@100MHz
1 2
*
*
L3 27nH@100MHz
L3 27nH@100MHz
1 2
*
*
C11
C11
5.6pF
5.6pF
+/-0.25pF
+/-0.25pF
2 1
3
C2
C2
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C1
C1
10pF
10pF
50V, NPO, +/-5%
50V, NPO, +/-5%
Place near VGA-Connector <0.5"
+5V
*
*
F2
F2
FUSE_1.1A
FUSE_1.1A
C35
C35
100nF
100nF
*
*
+80%~-20%
+80%~-20%
VGA
VGA
VGA
VGA
SCL
SCL
GND
9
8
7
6
GND
GND
VSYNC
VSYNC
NC
NC
HSYNC
HSYNC
GND
GND
SDA
SDA
GND
GND
ID1
ID1
GND
GND
GND
5
ID0
ID0
4
B
B
LBLUE
3
G
G
LGREEN
2
R
R
LRED
1
CONN-VGA
CONN-VGA
16
17
5VCLK
VSYNC
HSYNC
5VSDA
15
10
14
13
12
11
+5V +5V +5V +5V
2 1
2 1
BAV99D5BAV99
D5
D11
D11
BAV99
BAV99
3
3
R51
R51
33
33
*
*
R52
R52
+/-5%
+/-5%
33
33
*
*
+/-5%
+/-5%
R42
R42
*
*
2.2K
2.2K
+/-5%
+/-5%
*
*
*
*
C37
C37
470pF
470pF
Dummy
Dummy
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
*
*
R43
R43
2.2K
2.2K
+/-5%
+/-5%
C38
C38
470pF
470pF
Dummy
Dummy
LRED
LGREEN
LBLUE
5VSDA
5VCLK
HSYNC
VSYNC
D D
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
VGA
VGA
VGA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
31 35 Friday, June 27, 2008
31 35 Friday, June 27, 2008
31 35 Friday, June 27, 2008
8
A C
A C
A C
of
of
of
Standby Mode:
For Power ON/OFF POP Noise
+5VA
EC16
EC16
100uF
100uF
*
*
+/-20%
+/-20%
close to Codec as possible
+5VA
C20
C20
100nF
100nF
*
*
+80%~-20%
+80%~-20%
R41
R41
5.1KOhm
5.1KOhm
+/-1%
+/-1%
#R1004#R1005
#R1004#R1005
+3.3V
L4
L4
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
For EMI
CD_L
CD_GND
CD_R
R1006
R1006
*
*
1K
1K
+/-5%
+/-5%
@ALC662
@ALC662
R1009
R1009
*
*
330
330
+/-5%
+/-5%
@VT1708B
@VT1708B
VC R520 4.99K
MIC2-JD
LINE2-JD
Close to the Codec
R1004
R1004
R1005
R1005
*
*
20K
20K
5.1KOhm
5.1KOhm
+/-1%
+/-1%
+/-1%
+/-1%
@ALC662
@ALC662
@VT1708B
@VT1708B
*
*
C74
C74
+80/-20%
+80/-20%
4.7uF
4.7uF
CP1 COPPER
CP1 COPPER
1 2
dummy
dummy
CP2
CP2
1 2
dummy
dummy
CP4 COPPER
CP4 COPPER
1 2
dummy
dummy
C4 100nF +80%~-20%
C4 100nF +80%~-20%
Dummy
Dummy
*
*
C78 100nF +80%~-20%
C78 100nF +80%~-20%
Dummy
Dummy
*
*
C86
C86
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C88
C88
*
*
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C90
C90
*
*
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
*
*
Close to Chip
R1007
R1007
*
*
1K
1K
+/-5%
+/-5%
@ALC662
@ALC662
R1011
R1011
*
*
0
0
+/-5%
+/-5%
@VT1708B
@VT1708B
+5V_STBY
*
*
*
*
Dummy
Dummy
D3
SD103AWD3SD103AW
C A
C76
C76
100nF
100nF
+80%~-20%
+80%~-20%
C69
C69
100nF
100nF
+80%~-20%
+80%~-20%
C30
C30
100nF
100nF
*
*
+80%~-20%
+80%~-20%
R33
R33
20K
20K
*
*
+/-1%
+/-1%
R26
R26
39.2K
39.2K
*
*
+/-1%
+/-1%
SPDIF_OUT
C77
C77
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
modify 9/13
CD-IN
PLACE near to connector
R80
R80
330
#R1006#R1009
330
#R1006#R1009
*
*
+/-5%
+/-5%
R81
R81
0
#R1007#R1011
0
#R1007#R1011
*
*
+/-5%
+/-5%
R82
R82
330
#R1008#R1010
330
#R1008#R1010
*
*
+/-5%
+/-5%
C361
C361
*
*
3.3nF
R1008
R1008
*
*
1K
1K
+/-5%
+/-5%
@ALC662
@ALC662
R1010
R1010
*
*
330
330
+/-5%
+/-5%
@VT1708B
@VT1708B
3.3nF
+/-10%
+/-10%
@VT1708B
@VT1708B
U4 H78L05AA U4 H78L05AA
1
Sense_B
FRONT-L
FRONT-R
37
NC5
38
AVDD2
39
SURR_L
40
JDREF/NC
41
SURR_R
42
AVSS2
43
CEN
44
LFE
45
SIDESURR_L
46
SIDESURR_R
47
NC6
48
SPDIF_OUT
R223
R223
C362
C362
*
*
*
*
100K
100K
3.3nF
3.3nF
+/-5%
+/-5%
+/-10%
+/-10%
@VT1708B
@VT1708B
@VT1708B
@VT1708B
OUT
GND
2
33
34
32
36
35
NC4
SENSE B
FRONT_L
FRONT_R
DVDD11NC12NC23DVSS14SDATA_OUT5BIT_CLK6DVSS27SDATA_IN8DVDD29SYNC10RESET#11PCBEEP
1
2
3
4
R224
R224
*
*
100K
100K
+/-5%
+/-5%
@VT1708B
@VT1708B
+12V
3
IN
C59
C59
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
MIC1-VREFO-R
C45 10uF
C45 10uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
*
C44 100nF +80%~-20%
C44 100nF +80%~-20%
@VT1708B
@VT1708B
*
*
C16 10uF
C16 10uF
C22 100nF +80%~-20%
C22 100nF +80%~-20%
29
26
30
25
27
31
28
NC3
VREF
AVSS1
AVDD1
LINE1_R
MIC_VREFO
LINE1_L
LINE2_VREFO
MIC1_VREFO_L
MIC1_VREFO_R
CD_IN
CD_IN
Header_1X4
Header_1X4
MIC1_R
MIC1_L
CD_GND_REF
MIC2_R
MIC2_L
LINE2_R
LINE2_L
SENSE A
12
D8
LS4148-FD8LS4148-F
C A
R60
R60
*
*
10
10
+/-5%
+/-5%
EC19
EC19
100uF
100uF
16V, +/-20%
16V, +/-20%
Dummy
Dummy
CD_R
CD_L
@VT1708B
@VT1708B
LINE2-VREFO
MIC2-VREFO
LINE1-VREFO-L
MIC1-VREFO-L1
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
*
*
*
U5
U5
VT1708B G
VT1708B G
#U50#U51
#U50#U51
24
23
22
21
20
19
18
17
16
15
14
13
C552
C552
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
SPDIF_OUT
SPDIF_OUT
Header_1X4_K2
Header_1X4_K2
+5VA
*
*
*
*
C569
C569
10uF
10uF
@VT1708B
@VT1708B
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
LINE1-R
LINE1-L
MIC1-R
MIC1-L
CD_R
CD_GND
CD_L
MIC2-R
MIC2-L
LINE2-R
LINE2-L
AC_RST* 18
R72
R72
22
22
*
*
+/-5%
+/-5%
AC_SYNC 18
AC_SDIN_0 18
AC_BITCLK 18
AC_SDOUT 18
SPDIF Header
1
+5V
1
3
3
4
4
SPDIF_OUT
*
*
Dummy
Dummy
C27
C27
100nF
100nF
+80%~-20%
+80%~-20%
@ALC662
@ALC662
ALC662-GR
ALC662-GR
R64
R64
5.1KOhm
5.1KOhm
+/-1%
+/-1%
R53
R53
10K
10K
*
*
+/-1%
+/-1%
R61
R61
20K
20K
*
*
+/-1%
+/-1%
Arrangement of Jack Detection Pin:
Sense A for jacks at back panel
Sense B for jacks at front panel
SPDIF_OUT
C61
C61
470pF
470pF
+/-5%
+/-5%
@VT1708B
@VT1708B
VT1708B G
VT1708B G
U50
U50
FRONT-JD Sense_A
LINE1-JD
MIC1-JD
R1021
R1016
*
*
*
*
75
75
75
75
+/-5%
+/-5%
+/-5%
+/-5%
r0402h4
r0402h4
r0402h4
r0402h4
@ALC662
@ALC662
@ALC662
@ALC662
MIC2-VREFO
LINE2-VREFO
FRONT-R
FRONT-L
MIC2-L
MIC2-R
LINE2-L
R1013
R1013
*
*
2.2K
2.2K
+/-5%
+/-5%
@ALC662
@ALC662
R1014
R1014
*
*
3.3K
3.3K
+/-5%
+/-5%
@VT1708B
@VT1708B
R1012
R1012
*
*
2.2K
2.2K
+/-5%
+/-5%
@ALC662
@ALC662
*
*
@VT1708B
@VT1708B
R1015
R1015
3.3K
3.3K
+/-5%
+/-5%
Close to Chip
U51
U51
MIC1-R
MIC1-L
MIC1-VREFO-L1
C70 10uF +/-10%
C70 10uF +/-10%
*
*
C54 10uF +/-10%
C54 10uF +/-10%
*
*
Close to Chip
LINE1-VREFO-L
LINE1-R
C377 10uF +/-10%
C377 10uF +/-10%
LINE1-L
C71 10uF +/-10%
C71 10uF +/-10%
R1019
R1019
*
*
*
*
75
75
75
75
+/-5%
+/-5%
+/-5%
+/-5%
r0402h4
r0402h4
r0402h4
r0402h4
@ALC662
@ALC662
@ALC662
@ALC662
C52 10uF +/-10%
C52 10uF +/-10%
*
*
C53 10uF +/-10%
C53 10uF +/-10%
*
*
EC17 100uF +/-20%
EC17 100uF +/-20%
*
*
EC14 100uF +/-20%
EC14 100uF +/-20%
*
*
D14
D14
R18 3.3K
R18 3.3K
2
3
R8 3.3K
R8 3.3K
1
BAT54A
BAT54A
D6
D6
R14 2.2K +/-5% @ALC662
R14 2.2K +/-5% @ALC662
2
3
*
*
*
*
BAT54A
BAT54A
@ALC662
@ALC662
EC4
EC4
100uF
100uF
+/-20%
+/-20%
EC10
EC10
100uF
100uF
+/-20%
+/-20%
*
*
*
*
1
3
@VT1708B
@VT1708B
R12 2.2K +/-5% @ALC662
R12 2.2K +/-5% @ALC662
*
*
D23
D23
*
*
*
*
3
*
*
*
*
R58
R58
0
0
+/-5%@ALC662
+/-5%@ALC662
BAT54A
BAT54A
R17
R17
75
75
+/-5%
+/-5%
R47
R47
75
75
+/-5%
+/-5%
D24
D24
BAT54A
BAT54A
@VT1708B
@VT1708B
R1018
R1018
R1017
R1017
R1016
Close to Chip
LINE1_L2
LINE1-JD
LINE1_R5
LINE_OUT_L2
FRONT-JD
LINE_OUT_R5
MIC1_L2
MIC1-JD
MIC1_R5
R1020
R1020
*
*
0
0
+/-5%
+/-5%
r0402h4
r0402h4
@VT1708B
@VT1708B
*
*
+/-5%
+/-5%
*
*
+/-5%
+/-5%
*
*
*
*
R3
R3
75
75
+/-5%
+/-5%
R21
R21
75
75
+/-5%
+/-5%
2
1
2
1
*
*
*
*
32
33
34
35
22
23
24
25
2
3
4
5
1
*
*
@VT1708B
@VT1708B
#R1013#R1014
#R1013#R1014
#R1012#R1015
#R1012#R1015
MIC1-VREFO-L MIC1-VREFO-L1
MIC1-VREFO-L
MIC1-VREFO-R
#R1025#R1026
#R1025#R1026
R13
R13
75
75
+/-5%
+/-5%
R16
R16
75
75
+/-5%
+/-5%
AUDIO
AUDIO
CONN-JACK
CONN-JACK
R1021
R1022
R1022
*
*
*
*
0
0
33
33
+/-5%
+/-5%
+/-5%
+/-5%
r0402h4
r0402h4
r0402h4
r0402h4
@VT1708B
@VT1708B
@VT1708B
@VT1708B
R4 0 +/-5% #R1016#R1020
R4 0 +/-5% #R1016#R1020
*
*
R5 0 +/-5% #R1017#R1021
R5 0 +/-5% #R1017#R1021
*
*
R6 33 +/-5% #R1018#R1022
R6 33 +/-5% #R1018#R1022
*
*
R7 33 +/-5% #R1019#R1023
R7 33 +/-5% #R1019#R1023
*
*
1
1
R19
R19
R15
R15
22K
22K
22K
22K
+/-5%
+/-5%
+/-5%
+/-5%
2
2
@ALC662
@ALC662
@ALC662
@ALC662
R29
R29
R30
R30
*
*
*
*
3.3K
3.3K
3.3K
3.3K
+/-5%
+/-5%
+/-5%
+/-5%
#R1024#R1027
#R1024#R1027
1
1
R20
R20
R49
R49
22K
22K
22K
22K
+/-5%
+/-5%
+/-5%
+/-5%
2
2
@ALC662
@ALC662
@ALC662
@ALC662
R31
R31
R32
R32
*
*
*
*
3.3K
3.3K
3.3K
3.3K
+/-5%
+/-5%
+/-5%
@VT1708B
@VT1708B
@ALC662
@ALC662
+/-5%
@VT1708B
@VT1708B
1
1
R22
R22
R34
R34
22K
22K
22K
22K
+/-5%
+/-5%
+/-5%
+/-5%
2
2
@ALC662
@ALC662
Light Blue
INSULATOR
INSULATOR
36
Lime
37
38
39
Pink
R1023
R1023
33
33
FRONT AUDIO HEADER
+/-5%
+/-5%
r0402h4
r0402h4
FB15 FB 600 Ohm
FB15 FB 600 Ohm
FB11 FB 600 Ohm
FB11 FB 600 Ohm
R1025
R1025
*
*
2.2K
2.2K
+/-5%
+/-5%
@ALC662
@ALC662
R1026
R1026
*
*
3.3K
3.3K
+/-5%
+/-5%
@VT1708B
@VT1708B
FB14 FB 600 Ohm
FB14 FB 600 Ohm
*
*
FB13 FB 600 Ohm
FB13 FB 600 Ohm
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
Place near AUDIO header
*
*
RN11
RN11
135
7 8
22K
22K
+/-5%
+/-5%
642
@ALC662
@ALC662
*
*
*
*
C46
C46
*
*
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
#C557#C559
#C557#C559
R1024
R1024
*
*
2.2K
2.2K
+/-5%
+/-5%
@ALC662
@ALC662
R1027
R1027
*
*
3.3K
3.3K
+/-5%
+/-5%
@VT1708B
@VT1708B
C48
C48
*
*
*
*
1nF
1nF
#C562#C564
#C562#C564
FB16 FB 600 Ohm
FB16 FB 600 Ohm
*
*
FB12 FB 600 Ohm
FB12 FB 600 Ohm
*
*
C47
C47
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
#C566#C568
#C566#C568
LINE_OUT_R5
LINE_OUT_L2
C50
C50
*
*
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
#C558#C560
#C558#C560
MIC1_R5
MIC1_L2
C49
C49
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
#C563#C561
#C563#C561
*
*
*
*
F_AUDIO
F_AUDIO
1 2
3
5106
7
9
C51
C51
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
#C567#C565
#C567#C565
Audio Jack
LINE IN
C
(UAJ)
LINE OUT
B
(UAJ)
MIC IN
A
(UAJ)
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
ALC888/ALC662
ALC888/ALC662
ALC888/ALC662
MCP61M05
MCP61M05
MCP61M05
4
X
X
Header_2X5_8
Header_2X5_8
LINE1_R5
LINE1_L2
MIC2-JD LINE2-R
LINE2-JD
*
*
@ALC662
@ALC662
*
*
@VT1708B
@VT1708B
C562
C562
100pF
100pF
*
*
c0402h6
c0402h6
@ALC662
@ALC662
C564
C564
1nF
1nF
*
*
c0402h6
c0402h6
@VT1708B
@VT1708B
*
*
@ALC662
@ALC662
*
*
@VT1708B
@VT1708B
+3.3V
Detect 21
C557
C557
C558
C558
100pF
100pF
100pF
100pF
c0402h6
c0402h6
c0402h6
c0402h6
C559
C559
1nF
1nF
c0402h6
c0402h6
C563
C563
100pF
100pF
c0402h6
c0402h6
@ALC662
@ALC662
*
*
@VT1708B
@VT1708B
C566
C566
100pF
100pF
100pF
100pF
c0402h6
c0402h6
c0402h6
c0402h6
C568
C568
1nF
1nF
c0402h6
c0402h6
32 35 Friday, June 27, 2008
32 35 Friday, June 27, 2008
32 35 Friday, June 27, 2008
R66
R66
100K
100K
*
*
+/-5%
+/-5%
Detect
Digital
*
*
@ALC662
@ALC662
C560
C560
1nF
1nF
*
*
c0402h6
c0402h6
@VT1708B
@VT1708B
*
*
C561
C561
1nF
1nF
c0402h6
c0402h6
C567
C567
*
*
@ALC662
@ALC662
*
*
@VT1708B
@VT1708B
of
of
of
C565
C565
1nF
1nF
c0402h6
c0402h6
A C
A C
A C
5
4
3
2
1
D D
+12V
3-Phase
Switcher
Tiger One
+2.5V_VDDA
+12V
ATX PowerSupply
+5V
C C
SLP_S3#
SLP_S5#
MOS FET
Controller
Tiger One
PROCESSOR
Vccp (CPU Vcore)
Voltage=0.8375-1.6V
Icc(Max)=89A
3-Phase Swithing
CPU PLL
Imax=105mA(S0/S1)
+5V_SB
+5v_DUAL
USB 8 Pprts
+5v_DUAL=500mA(S0/S1)
+5v_DUAL=500mA(S3)
+5v_DUAL=500mA(S4/S5)
PS/2
+5v DUAL=300mA(S0/S1)
+5v_DUAL=300mA(S3)
+5v_DUAL=300mA(S4/S5)
SWITCHER
Q30
+5V_STBY to 3.3SB
Icc(Max)=1.5A
+5V_SB
MOS FET
Integrated
Switcher
+3.3V
+1.8V_SUS
+0.9V_SUS
Switch
+3.3V
B B
DDR2
Imax=14A(S0/S1)
Imax=300mA(S3)
I DDR_Vtt=1.2A
(S0/S1)
(S3)
I DDR_Vtt=50mA
Q32
+1.2V_CORE
Total I=10A
1.2V_DUAL
Total 250mA
MCP61
+1.2V (Core Power)
+1.2V_PEA
+1.2V_PED
+1.2V_SP_A
+1.2V_SP_D
+1.2V_PLL_SP_SS
+1.2V_PLL_SP_VDD
+1.2V_PLL_PE
+1.2V_PLL_PE_SS
+1.2V_PLL_CPU_HT
+3.3V
+1.2V_DUAL
MCP61
+5V
VBAT
RTC Battery
MCP61
+3.3V
+3.3V_DAC
VCC5
+5VSB
+12V
+3.3VSB
+3.3V
+12V
+3.3VSB
+3.3V
+5V
+3.3V
+12V
+3.3VSB
+1.5V
Super I/O
5V Icc(Max)=50mA
5VSB Icc(Max)=50mA(S0)
5VSB Icc(Max)=38mA(S3)
PCI Express
X16 Slot(1)
+12V=5.5 A
3.3VSB
Icc(Max)=0.375A(Wake)
Icc(Max)=0.02A(NoWake)
+3.3V=3A
PCI Express
X1 Slot(1)
+12V=0.5 A
3.3VSB
Icc(Max)=0.375A(Wake)
Icc(Max)=0.02A(NoWake)
+3.3V=3A
PCI Per Slot (2)
+5V Icc(Max)=5A
-12V Icc(Max)=0.1A
+3.3V Icc(Max)=6A
+12V Icc(Max)=0.5A
+3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(NoWake)
RTL8100C/8110SC
-12V
1.8V
MCP61
Linear
+1.2VHT
HT Link
1.2VHT=1A(S0,S1)
J4
J4
1
2
Header_1X2
A A
5
4
Header_1X2
T1
T1
dummy
dummy
1
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
J2
J2
J3
J3
1
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
3
1
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
J1
J1
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Power Map
Power Map
Power Map
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
33 35 Friday, June 27, 2008
33 35 Friday, June 27, 2008
33 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
6/18 : 1,USB: 0 ohm R change to 0 ohm RN, 4pin Bead change to 8pin
Bead; 2, BIOS,LPC change to SPI . 3, LAN change to AC131 + PCI
LAN :RTL8100C/8110SC,
6/20 : 1,LAN_CLK
2,R623,R624 16.9 ohm 改為15 ohm ; 3,USB Fuse 2.6A 替代2個1.5A
;4,
F_Audio 75 ohm /22k ohm
6/21 : 1,LAN 49.9 ohm
2,R388
D D
去掉,
,
Dummy C332,C301,C310,C300,C320,C290,C347.
3
6/22 : 1,去掉R355,R829,R830,R832; 2, dummy C572
3, ADD C2136 0.1uF to GMII_RXCLK, R57 change to 330K;
6/29: 1, Add 75 ohm damping resistance for Audio ; 2,F_Audio
detect pin connect to sense_B pin of CODEC; 3, ADD prtection Diode
to COM port .
SIO
走南橋,
部分有串接
Dummy
外部晶振
電阻閤並成排阻
電阻閤並成排阻
10ohm
, Remove AC131 PHY LAN;
49.9 ohm
電阻;
;
;
4
3
2
1
7/2 : 1,remove L99,L100,L102; Change heatsink with foxconn log; 2, Remove RN122 .
7/3: 1, ADD C 956( 4.7uF/805) to 3.3v_Dual ; 2, dummy EC83 (5V_SB);
3, Remove C412, C352,C354;
7/5: 1, change C374,C378 to 0.1uF/0603; 2, dummy
C157,C244,C267,C193,C286,C645,C199,C247,C312,C315,C325,C327,C328; 3,
Remove C385,C386,C407,C865,C387,C866;
7/7: 1, Change D6,D7,D8,D17,D20,D23,D47 footprint to so80h16; 2, change
RN45,RN46 from 8p4r0603 to 8p4r0402 ; 3, add EC106 100uF to
+1.2V_dual, dummy EC105 ; 4, Q129,Q131 change to AP15N03GH;
7/9: 1, GPIO PIN: Board ID Select. add R363,R364,R365; Default add R363;
2, Remove C808,C809,C810,C811,C821,C89,C806,C807,C156,C268,C970,
C C
C52,C74,C49,C976,C61,C83,C73,C76,C72,EC66 ; 3, add EC50, dummy EC14;
7/11 : 1, add EC107 to aduio 12 V power, C733 change to 10uF, add L28 to audio power DVDD ;
2, ADD EC60 to 3.3V_DUAL for LAN Power ,default dumy ; 3, add R368, R371 to modify the SPI
clock; 4, Remove C7,C8,C11,R517,R530,R536 ( Audio ).
8/16 : 1 .L12/L20 change to 1uH/1kHz
2 .EC39/38 change to 680uF
3 . add R501/502 for CD-IN
4 .PCI SLOT IDSEL
5 .add EC103 (1.2V OUTPUT)
6 .EC35/37 change to 470uF
7 . add EC104/105
8 .C392/396 change to 22p
B B
9 .Retention Module for CPU change HH P/N
10 .PEA POWER del copper,FB
11 .R83 dummy,and add thermal trip to SIO through level shift
12 .C238 change to 220pF
13 .R163 change to 680R
14 .SATA2,SATA3 change each other
15 .Del R77/72/133
16 .R262 change to 1.1k
17 .C495 change to 10uF and reserved
18 .C496 reserved
9/12 : 1 .USB_OC add R550/R51/R552/R553 for 3.3V
2 .Exchange usb3/4;
A A
2 .change C385/C391/C392/C396 from 0603 to 0402
9/19 : 1 .change c392/c396 22pf to 24pf
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Modify list
Modify list
Modify list
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
34 35 Friday, June 27, 2008
34 35 Friday, June 27, 2008
34 35 Friday, June 27, 2008
A C
A C
A C
of
of
of
5
D D
C C
4
3
2
1
U9_1
U9_1
HEATSINK_SOCKET_940_M2
HEATSINK_SOCKET_940_M2
modify 8/16
B B
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
CHANGE LIST
CHANGE LIST
CHANGE LIST
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M05
MCP61M05
MCP61M05
1
35 35 Friday, June 27, 2008
35 35 Friday, June 27, 2008
35 35 Friday, June 27, 2008
A C
A C
A C
of
of
of