Foxconn 945P01 Schematics

5

4

3

2

1

D D

C C

B B

Page Title of Schematic :
Title

Index Page
Topology
Reset Map
Clock Distribution
Power Delivery Map
Power Sequence
GPIO / IRQ / IDSEL Map
LGA775 -1
LGA775 -2
ICS954128 Clock Gen
ACPI Voltage Regulator
Lakeport -GMCH -1
Lakeport -GMCH -2
Lakeport -GMCH -3
DDR2 Channel A DIMM1
DDR2 Channel B DIMM2
PCI & PCI-E x16 Slot
ICH7 -1_DIM,PCI-E,USB,MISC
ICH7 -2_IDE,SATA,CPU,FWH
ICH7 -3_PCI,Power/ Gnd,FWH
MARVELL 88E8052 LAN
ALC880 Azalia Audio-1
ALC880 Azalia Audio-2
Power / MISC Connectors
SMSC 47M182 SIO KB/MS/FAN
VGA & Serial / Parallel Con
TI TSB43AB22 1394
1394 & Rear-LANUSB Conn
VRD10.1 Intersil ISL6561
Modify List

Page

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Remark

"Dummy" -> No Stuff

Fab A:

945G
ICH7

945P01

Intel (R) Lakeport-G + ICH7 Chipset
Intel LGA775 Processor

Form Factor

CPU
System Chipset

On Board Chipset

Main Memory
Expansion Slots

(Connector)

PWM

SKU1(8EKS)

SKU1(8KS)

Pico BTX

Intel LGA775
Intel Lakeport-G (North Bridge)

Intel ICH7 (South Bridge)
BIOS -- FWH EEPROM

Codec -- ALC880
LPC Super I/O -- ITE8712F/IX
LAN --Marvell 88E8052
CLOCK --ICS954128
1394--TI TSB43AB22

2 DIMM,Dual-Channel DDR2
PCI Slot * 1

PCI-E X16 Slot * 1
IDE Slot * 1
SATA Connector * 2 (Two Master)
USB Connector * 8 (4 ports on board and 4 ports on Rear I/O)
1394 Connector (1 port on board and 1 port on Rear I/O)
Front Panel, Front Audio, SPDIF-Out, TPM, CD_IN, IrDA, Recovery,
Case-Open, WOL, AUX_IN,
FAN Connector (CPUFAN1, CPUFAN2)

For CPU VCORE Controller--ISL6561+ISL6614A+ISL6612
For 1D5V_CORE Controller--RT9214PS

Front I/O connector---

Rear I/O connectors--

Front I/O connector---

Rear I/O connectors--1 PS/2 keyboard port, 1 PS/2 mouse port

Rev : 0B

3 USB ports

1 headphone out
1 microphone in

1 PS/2 keyboard port, 1 PS/2 mouse port
1 VGA, 1 Parallel port, 1 Serial port
2 USB ports + RJ45 port
6 audio jacks (7.1 HD audio jack)6 audio jacks (7.1 HD audio jack)

IEEE 1394 port
4 USB ports

1 headphone out
1 microphone in

1 VGA, 1 Parallel port, 1 Serial port
2 USB ports + RJ45 port
6 audio jacks (7.1 HD audio jack)

4 USB ports

A A

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Title

Title

Title

Index Page

Index Page

Index Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

FOXCONN PCEG

945P01

945P01

945P01

1

130Wednesday, July 20, 2005

130Wednesday, July 20, 2005

130Wednesday, July 20, 2005

AC

AC

AC

of

of

of

5

4

3

2

1

Prescott, Smithfield &
Cedar Mill

VRD 10.1

D D

4 Phase PWM

For Intel 2005A & Intel 2004B

LGA775 Processor

Socket T

1066/800/533 FSB

CK-410 Clock

PCI Express x 16
External Graphics
Card

PCI Express x16 Port

DDR2 533/667

Channel A DDR2

DIMM1

DIMM2

VGA Connector

C C

Back Panel

USB2.0 Port 1

USB2.0 Port 2

USB2.0 Port 3

Direct Media Interface (DMI)

Lakeport

4 Lanes

GMCH

DDR2 533/667

PCI Express x1 Interface

Channel B DDR2

DIMM2

LAN

MARVELL 88E8052

USB2.0 Port 4

PCI Slot 1

ICH7RW

Front Panel

USB2.0 Port 5

B B

USB2.0 Port 6

Header

USB2.0 Port 7

USB2.0 Port 8

ATA100

IDE CONN 1

LPC I/F

TI TSB43AB22 1394

Serial ATA

SATA Connector 1

AHCI, RAID0,1,5,10

SATA Connector 2

Super I/O

IT8712F

LPC I/F

Intel HD Audio

Realtek ALC880
8 Channels W/ SPDIF-Out

Firmware HUB

4Mb or 8Mb

PS2

A A

5

Keyboard / Mouse

4

Parallel
Serial

TPM HEADER

3

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Topology

Topology

Topology

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FOXCONN PCEG

945P01

945P01

945P01

1

230Monday, June 13, 2005

230Monday, June 13, 2005

230Monday, June 13, 2005

AC

AC

AC

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4

3

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1

CPU (Tejas / Prescott)

D D

ATX

Power

PWRGD_PS PWROK

PS_ON#

SIO

Translation

PWRGD_3V

Circuitry

LGA775 processor

CPURST#

GMCH

CPURST#

CPU_PWRGD

PCI Slost

Lakeport

C C

RSTIN#

TI 1394

ICH7RW

ICH_PWRGD

PCIRST#

PLTRST#

Front Panel

FR_RST

B B

SW_ON

PWROK

SYS_RESET#

PWRBTN#

SLP_S3#

AC_RST#

RCIN#

RSMRST#

RST#

SIO

Buffer

FWH

Marvell LAN

PCI Express x16

ATA100
IDE CONN 1

RST#

Audio

RST#

TPM

RST#

Power on/off
circuit

KBRST
RSMRST#

Super IO

SLP_S3#

A A

5

4

3

PSIN

PSOUT#

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Title

Reset Map

Reset Map

Reset Map

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945P01

945P01

945P01

1

330Monday, June 13, 2005

330Monday, June 13, 2005

330Monday, June 13, 2005

AC

AC

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14.318MHz

4

3

2

1

CPU

D D

CPU 133/200/266 MHz Diff Pair

XDP

XDP 133/200 MHz Diff Pair
MCH 133/200 MHz Diff Pair

DDR2 2 Slots 12 Diff CLKs

PCI Express 100 MHz Diff Pair

DOT 96 MHz Diff Pair

C C

CK-410

PCI Express/DMI 100 MHz Diff Pair

PCI Express/DMI 100 MHz Diff Pair

USB/SIO 48 MHz

ICH 33 MHz

REF 14 MHz

FWH 33 MHz

PCI Express x16 Gfx

FWH

GMCH

Lakeport

ICH7RW

Channel A DDR2

DIMM1

DIMM2

Channel B DDR2

DIMM2

PCI 33 MHz

B B

PCI 33 MHz

PCI Express 100 Mhz Diff Pair

PCI Slot 1

IEEE 1394

MARVELL

32.768KHz

88E8052 LAN

SIO 14 MHz

Super I/O

Azalia Bit Clock

HD Audio

SATA 100 MHz Diff Pair

A A

5

TPM 33 MHz

TPM

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Title

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Title

CLOCK Distribution

CLOCK Distribution

CLOCK Distribution

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945P01

945P01

945P01

1

430Monday, June 13, 2005

430Monday, June 13, 2005

430Monday, June 13, 2005

AC

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Voltage Distribution

12V : 12V_SYS

5V : 5V_SYS

3.3V : 3D3V_SYS
5VSB : 5V_SB_SYS

-12V : -12V_SYS

for CPU : VCCP

D D

1.5V for ICH and GMCH core : 1D5V_CORE

1.8V for DDR-II : 1_8VSTR

0.9VTT for DDR-II : VTT_DDR

3.3VSB : 3D3V_SB

1.8VSB : VCC1_8SB

5V_DUAL : 5V_DUAL

2.5V for MCH : 2D5V_MCH

ATX P/S

CK410

Vdd (Core)

3.3V
Ivdd(Max)=560mA

12V
5VSB

3.3V
5V

-12V

4

3

2

1

Super I/O

VRD 10.1
Switching
Four Phase

Linear 1.5V
to 1.2V

6.2A

Proceessor

Vccp (CPU Vcore)
Voltage=0.8375~1.6V
Icc(Max)=125A
4-Phases Swithing

1.2V FSB
Vtt-5.3A

Lakeport GMCH

FSB_Vtt

1.2V FSB Vtt
Icc(Max)=0.9A

1.8V DDR2 I/O=4A(S0,S1)

1.8V DDR2 I/O= tbd mA(S3)

3.3V

3.3V

3.3V
Icc(Max)=50mA

3.3SBV
Icc(Max)=50mA(S0)

3.3SBV
Icc(Max)=38mA(S3)

USB 8 Ports

+5V DUAL=4A(S0, S1)
+5V DUAL=20mA(S3)

PS2

+5V DUAL=345mA(S0, S1)
+5V DUAL=2mA(S3)

FWH

3.3V=107mA(S0, S1)

PCI Express

Vcore (Core Logic)

1.5V

C C

DDR2 Channel A/B

Vdd (Core)=1.8V
Ivdd(S0,S1Max)=9.4A(4
channel)
Ivdd(S3)=400mA(4
channel)

Vtt (Core)

0.9V
Ivterm(Max)=200mA
(per channel)

B B

Single Phase Switch
5V to 1.8V
Ivdd(Max)=14A
Ivdd(Max)=425mA(S3)
LDO

1.8V to 0.9V
Ivterm(Max)=1.2A

5VDUAL
Icc(Max)=

4.345A(S0,S1)
22mA(S3)

Vin=12V
V_1p5_core

1.5V
Switching=17A

2.5V DAC
regulator
V_2p5_DAC
100mA

HDA Codec

Vcc
5V
Icc(Max)=tbdA

Vcc

3.3V
Icc(Max)=tbdA

LDO
12V
to 5V

1.5V- 1.05V
LDO

3.3V

Icc(Max)=13.8A(Integrated)
Icc(Max)=8.9A(Discrete)
*1.5V PCIe & DMI 1.5A

*2.5V DAC=0.07A

2.5V HV=25mA

ICH7RW

1.2V VCC_CPU-14mA

1.05V Core=1.31A

1.5V_A-0.97A

1.5V_B-0.74A

3.3V=0.58A

3.3V VccSus
Icc(Max)=0.7A

3.3V

3.3V

3.3V

5VRef=6mA

5VrefSus=10mA

LDO
5V_dual to 3.3SB
Icc(Max)=1.5A

A A

RTC
Battery

RTC=tbduA

1.0V
Lan Core
V_1p2_ctrl

1.8V
Lan Phy
V_2p5_ctrl

*Power derived through filter

5

4

3

2

X16 slot (1)

+12V=5.5A

3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)

+3.3V=3A

PCI Express
X1 slot (1)

+12V=0.5A

3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)

+3.3V=3A

PCI Per Slot (2)

-12V
Icc(Max)=0.1A

5V
Icc(Max)=5A

3.3V
Icc(Max)=7.6A

12V
Icc(Max)=0.5A

3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(no wake)

Tekoa GbE Lan

+1.2V=tbdA

+2.5V=tbdA

FOXCONN PCEG

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Title

Title

Title

Power Delivery Map

Power Delivery Map

Power Delivery Map

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945P01

945P01

945P01

1

530Monday, June 13, 2005

530Monday, June 13, 2005

530Monday, June 13, 2005

-12V

BJT

BJT

AC

AC

AC

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4

3

2

1

S5->S0

D D

+5V_DUAL

+3D3V_DUAL

+12V_SYS

+5V_SYS

+3D3V_SYS

+1D8V_STR

VTT_DDR

VTT_VR

Vcc

1ms to 10ms

Vcc_PWRGD
VRM_OUTEN

C C

PS_ONJ

S0->S3

+12V_SYS

VIDPWRGD

S0->S5

+12V_SYS

+5V_SYS

+3D3V_SYS
+1D8V_STR

VTT_DDR

VTT_VR

Vcc

Vcc_PWRGD
VRM_OUTEN
VIDPWRGD

S3->S0

+5V_DUAL

+3D3V_DUAL

PS_ONJ

+12V_SYS

+5V_SYS

B B

+3D3V_SYS

VTT_DDR

VTT_VR

Vcc

Vcc_PWRGD
VRM_OUTEN
VIDPWRGD

A A

5

4

+5V_DUAL

+3D3V_DUAL

PS_ONJ

+5V_DUAL

+3D3V_DUAL

+5V_SYS

+3D3V_SYS

+1D8V_STR+1D8V_STR+1D8V_STR +1D8V_STR

VTT_DDR

VTT_VR

Vcc

1ms to 10ms

Vcc_PWRGD
VRM_OUTEN

PS_ONJ

Title

Title

Title

Power Sequence

Power Sequence

Power Sequence

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2

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VIDPWRGD

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945P01

945P01

945P01

1

630Monday, June 13, 2005

630Monday, June 13, 2005

630Monday, June 13, 2005

AC

AC

AC

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4

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ICH7 GPIO Summary

Name

GPIO0
GPIO1
GPIO2

D D

GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

C C

GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29

GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40

B B

GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO48
GPIO49

Power Well

Vcc3_3
V5REF
V5REF
V5REF
V5REF
V5REF
Vcc3_3
Vcc3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3 I/O
Vcc3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
Vcc3_3
N/A N/A

N/A
N/A
N/A
N/A
N/A
N/A
Vcc3_3

DescriptionType

Pull-up through 10K resistor(Unused)

I/O
I/O

PREQ5J

I/OD

INTEJ

I/OD

INTFJ

I/OD

INTGJ

I/OD

INTHJ

I/O

Pull-up through 10K resistor(Unused)

I/O

FWH_WPJ

I/O

LPC PME#

I/O

S1_LED
S3_LED

I/O

RECOVERY

I/O
I/O

TPM_RSV0

I/O

TPM_RSV1

I/O

TPM_RSV2

I/O

EXTSMI_L (Chassis Intruder)
(Unused)

I/O

(Unused)

I/O
I/O

(Unused)

I/O

Pull-up through 10K resistor(Unused)

I/O

GPIO_LAN_DISABLEJ

I/O

Pull-up through 10K resistor(Unused)
PREQ4J
Pull-up through 10K resistor(Unused)_Dummy

I/O
I/O

(Unused)
(Unused)

I/O

(Unused)

I/O

(Unused)

I/O

(Unused)

I/O
I/O

USB_OCJ_FRONT

I/O

USB_OCJ_FRONTGPIO30

I/O

USB_OCJ_FRONT
TURBOJ

I/O

(Unused)

I/O

(Unused)

I/O
I/O

(Unused)

I/O

Pull-up through 10K resistor(Unused)

I/O

Pull-up through 10K resistor(Unused)
FWH_TBLJ

I/O

Pull-up through 10K resistor(Unused)

I/O

Not Implemented

N/AN/A

Not Implemented

N/A

Not Implemented
Not Implemented

N/A

Not Implemented

N/A
N/A

Not Implemented

N/A

Not Implemented

N/A

Not Implemented

I/O

(Unused)

I/O

CPU_PWRGDV_CPU_IO

Pull-up through 10K resistor(Unused)
Pull-up through 10K resistor(Unused)
Pull-up through 10K resistor(Unused)

FWH GPIO Summary

Name
FGPI0
FGPI1
FGPI2
FGPI3
FGPI4

Power Plane

Vcc3_3
Vcc3_3
VccSus3_3
VccSus3_3
Vcc3_3

Type

Description

IDE1 Cable Detection(33 or 66/100)

I

Pull-up through 10K resistor(Unused)

I

Pull-up through 10K resistor(Unused)

I

Pull-up through 10K resistor(Unused)

I

Pull-up through 10K resistor(Unused)

I

PCI Routing Summary

INTAJ
INTBJ
INTCJ
INTDJ
INTEJ
INTFJ
INTGJ
INTHJ
REG#/GNT#
IDSEL

PCI1

DDR2 DIMM Config.

ADDRESSDEVICE

A0HDIMM 1

DIMM 2

A4H

Jumper Setting Summary

FWH TBL#

CLR_CMOS

Lock

Unlock

Normal

Clear

1394

B

F
C
D
A

1

0

19

17

CLOCK

CK_M_200M_P_DDR0_A
CK_M_200M_P_DDR1_A
CK_M_200M_P_DDR2_A
CK_M_200M_P_DDR0_B
CK_M_200M_P_DDR1_B
CK_M_200M_P_DDR2_B

JBLOCK1(1-2)

JBLOCK1(2-3)

JCMOS1(1-2)

JCMOS1(2-3)

Default

Default

Super I/O GPIO Summary

Name
GPIO23
GPIO22
GPIO21
GPIO20

A A

Power Plane

VccSus3_3
VccSus3_3
VccSus3_3
VccSus3_3

5

Type

Description

DDCA_CLK

I/O
I/O

DDCA_DATA

I/O

DDCSCL_5V

I/O DDCSDA_5V

FOXCONN PCEG

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Title

Title

Title

GPIO / IRQ / IDSEL Map

GPIO / IRQ / IDSEL Map

GPIO / IRQ / IDSEL Map

Size Document Number Rev

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4

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Date: Sheet

FOXCONN PCEG

945P01

945P01

945P01

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730Monday, June 13, 2005

730Monday, June 13, 2005

730Monday, June 13, 2005

AC

AC

AC

of

of

of

5

HDJ[63..0]

2 OF 7

2 OF 7

U10B

HDJ0
HDJ1
HDJ2
HDJ3
HDJ4

D D

C C

B B

HDJ5
HDJ6
HDJ7
HDJ8
HDJ9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15

HDBIJ012
HDSTBNJ012
HDSTBPJ012

HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31

HDBIJ112
HDSTBNJ112
HDSTBPJ112

VTT_OUT_LEFT

Place at CPU end of route

R238 62 R0603 +/-5%R238 62 R0603 +/-5%

Place at CPU end of route

R272 100 R0603 +/-5% DummyR272 100 R0603 +/-5% Dummy

R239 62 R0603 +/-5%R239 62 R0603 +/-5%
R249 62 R0603 +/-5%R249 62 R0603 +/-5%
R244 62 R0603 +/-5%R244 62 R0603 +/-5%
R273 62 R0603 +/-5%R273 62 R0603 +/-5%
R293 62 R0603 +/-5%R293 62 R0603 +/-5%
R270 62 R0603 +/-5%R270 62 R0603 +/-5%

R265 60.4 R0603 +/-1%R265 60.4 R0603 +/-1%
R277 60.4 R0603 +/-1%R277 60.4 R0603 +/-1%

R240 60.4 R0603 +/-1%R240 60.4 R0603 +/-1%
R275 60.4 R0603 +/-1%R275 60.4 R0603 +/-1%

HDBIJ0

HDBIJ1 HDBIJ3

Intel reply 60.4 Ohm is corrected

R188 60.4 R0603 +/-1%R188 60.4 R0603 +/-1%
R281 60.4 R0603 +/-1%R281 60.4 R0603 +/-1%

A A

U10B

B4

D00#

C5

D01#

A4

D02#

C6

D03#

A5

D04#

B6

D05#

B7

D06#

A7

D07#

A10

D08#

A11

D09#

B10

D10#

C11

D11#

D8

D12#

B12

D13#

C12

D14#

D11

D15#

A8

DBI0#

C8

DSTBN0#

B9

DSTBP0#

G9

D16#

F8

D17#

F9

D18#

E9

D19#

D7

D20#

E10

D21#

D10

D22#

F11

D23#

F12

D24#

D13

D25#

E13

D26#

G13

D27#

F14

D28#

G14

D29#

F15

D30#

G15

D31#

G11

DBI1#

G12

DSTBN1#

E12

DSTBP1#

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

design guide 1.0

HCOMP2
HCOMP3

15 mils width
7 mils spacing
max. 1200mils

15 mils width
7 mils spacing
max. 1200mils

5

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#

DBI2#
DSTBN2#
DSTBP2#

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DBI3#
DSTBN3#
DSTBP3#

HBR0J

CPU_PWRG

TESTHI_8
TESTHI_9
TESTHI_10
TESTHI_11
TESTHI_12 ICH_SYS_RSTJ
TESTHI_13

HCOMP4
HCOMP5

15 mils width

7 mils spacing

max. 1200mils

HCOMP0
HCOMP1

E15
E16
G18
G17
F17
F18
E18
E19
F20
E21
F21
G21
E22
D22
G22
D19
G20
G19

D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17

R299

R299
62

62

+/-5%

+/-5%

R0603

R0603

HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47

HDBIJ2

HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63

HDBIJ2 12
HDSTBNJ2 12
HDSTBPJ2 12

HDBIJ3 12
HDSTBNJ3 12
HDSTBPJ3 12

VTT_OUT_RIGHT

VTT_OUT_RIGHT

C284

C284

12

0.1uF

0.1uF

*

*

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

C0603

C0603

VTT_OUT_LEFT

R241 62 R0603 +/-5% DummyR241 62 R0603 +/-5% Dummy

FSB_VTT

R142 62 R0603 +/-5%R142 62 R0603 +/-5%

R145 62 R0603 +/-5%R145 62 R0603 +/-5%

VTT_OUT_RIGHT

R276 62 R0603 +/-5%R276 62 R0603 +/-5%

R306

R306

R296

R296

62

62

62

62

+/-5%

+/-5%

+/-5%

+/-5%

R0603

R0603

R0603

R0603

R292 62 R0603 +/-5%R292 62 R0603 +/-5%

R148 62 R0603 +/-5%R148 62 R0603 +/-5%

R279 130 R0603 +/-5%R279 130 R0603 +/-5%

R313

R313
62

62

+/-5%

+/-5%

R0603

R0603

HDJ32

G16

4

HDJ[63..0] 12

HAJ[31..3]

HAJ[31..3]12

HIERRJ

Place at CPU end of route

R302

R302
62

62

+/-5%

+/-5%

R0603

R0603

Dummy

Dummy

HTDO

HTDI
HTMS
HTCK
HTRSTJ

HCPURSTJ

PROCHOTJ

RSVD_G6

TESTHI_0

TESTHI_2_7

TESTHI_1

VTT_OUT_RIGHT

C283

C283

12

0.1uF

0.1uF

*

*

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

C0603

C0603

place TDO termination near XDP connector

place TCK/TDI/TMS terminations near
CPU within 1.5 inch

place TRSTJ termination anywhere on route

4

HAJ[31..3]12

HREQJ[4..0]12

C268

C268

12

0.1uF

0.1uF

*

*

16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

C0603

C0603

HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31

TP22TP22
TP23TP23
TP21TP21
TP20TP20

HAJ[31..3]

HADSTBJ112

HADSTBJ012

TP_LAG775_PIN_AH4

1

TP_LAG775_PIN_AH5

1

TP_LAG775_PIN_AJ5

1

TP_LAG775_PIN_AJ6

1

VTT_OUT_RIGHT

3

U10A

HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8

HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16

HREQJ0
HREQJ1
HREQJ2
HREQJ3
HREQJ4

VTT_OUT_LEFT

R288 62 R0603 +/-5%R288 62 R0603 +/-5%
R294 62 R0603 +/-5%R294 62 R0603 +/-5%
R291 62 R0603 +/-5%R291 62 R0603 +/-5%
R301 62 R0603 +/-5%R301 62 R0603 +/-5%
R283 62 R0603 +/-5%R283 62 R0603 +/-5%
R295 62 R0603 +/-5%R295 62 R0603 +/-5%

U10A

L5

A03#

P6

A04#

M5

A05#

L4

A06#

M4

A07#

R4

A08#

T5

A09#

U6

A10#

T4

A11#

U5

A12#

U4

A13#

V5

A14#

V4

A15#

W5

A16#

N4

RSVD1

P5

RSVD2

K4

REQ0#

J5

REQ1#

M6

REQ2#

K6

REQ3#

J6

REQ4#

R6

ADSTB0#

G5

PCREQ#

AB6

A17#

W6

A18#

Y6

A19#

Y4

A20#

AA4

A21#

AD6

A22#

AA5

A23#

AB5

A24#

AC5

A25#

AB4

A26#

AF5

A27#

AF4

A28#

AG6

A29#

AG4

A30#

AG5

A31#

AH4

A32#

AH5

A33#

AJ5

A34#

AJ6

A35#

AC4

RSVD3

AE4

RSVD4

AD5

ADSTB1#

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

GTLREF voltage should be 0.63*VTT
12 mils width, 15 mils spacing
divider should be within 1.5" of the GTLREF pin

R300

R300

0.22nF caps should be placed near CPU pin

124

124

place series resistor as close to divider

+/-1%

+/-1%

R0603

R0603

R303

R303

C281

C281

210

210

12

1uF

1uF

+/-1%

+/-1%

*

*

10V, Y5V, +80%/-20%

10V, Y5V, +80%/-20%

R0603

R0603

C0603

C0603

HBPM5J
HBPM4J
HBPM3J
HBPM2J
HBPM1J
HBPM0J

Place BPM termination near CPU

GTLREF voltage should be 0.63*VTT
12 mils width, 15 mils spacing

VTT_OUT_LEFT

divider should be within 1.5" of the GTLREF pin

0.22nF caps should be placed near CPU pin
place series resistor as close to divider

R269

R269
124

124

+/-1%

+/-1%

R0603

R0603

R266 10

R266 10

R0603 +/-5%

R0603 +/-5%

R261

R261

C256

C256

210

210

12

1uF

1uF

+/-1%

+/-1%

*

*

10V, Y5V, +80%/-20%

10V, Y5V, +80%/-20%

R0603

R0603

C0603

C0603

3

ADS#
BNR#

RSP#

BPRI#
DBSY#
DRDY#

HITM#

IERR#

INIT#
LOCK#
TRDY#
BINIT#

DEFER#
EDRDY#

MCERR#

AP0#

AP1#

BR0#

TESTHI08
TESTHI09
TESTHI10

DP0#

DP1#

DP2#

DP3#

GTLREF1
GTLREF0

CS_GTLREF

RESET#

RS0#

RS1#

RS2#

1 OF 7

1 OF 7

D2
C2
D4

HIT#

H4
G8
B2
C1
E4

HIERRJ

AB2
P3
C3
E3
AD3
G7
F2
AB3

U2
U3

HBR0J

F3

TESTHI_8

G3

TESTHI_9

G4

TESTHI_10

H5

TP_DPJ0

J16

TP_DPJ1

H15

TP_DPJ2

H16

TP_DPJ3

J17

HGTLREF_1

H2

HGTLREF_0

H1

CPU_MCH_GTLREF

E24

G23
B3

F5
A3

HADSJ 12

HBNRJ 12

HITJ 12
HBPRIJ 12

HDBSYJ 12
HDRDYJ 12
HITMJ 12

INITJ 19
HLOCKJ 12
HTRDYJ 12

HDEFERJ 12

HBR0J 12

TP11TP11

1

TP12TP12

1

TP8TP8

1

TP9TP9

1

MCH_GTLREF_CPU 12

HCPURSTJ 12
HRSJ0 12

HRSJ1 12
HRSJ2 12

THERMDA/THERMDC

1. width=10 mils, spacing=10 mils.

2. route the lines in parallel

R286 62R0603 +/-5%R286 62R0603 +/-5%

FSB routing guidelines: If under 5" OK (pin to pin)

HTCK
HTDI

R260

R260

10

10

R0603

R0603

+/-5%

+/-5%

*

*

C260

C260

12

220pF

220pF

*

*

50V, X7R, +/-10%

50V, X7R, +/-10%

C0603

C0603

Dummy

Dummy

C255

C255

12

220pF

220pF

50V, X7R, +/-10%

50V, X7R, +/-10%

C0603

C0603

Dummy

Dummy

HGTLREF_0

HGTLREF_1

ICH_SYS_RSTJ10,18,24

FSBSEL010,12
FSBSEL110,12
FSBSEL210,12

HTDO
HTMS
HTRSTJ

HBPM0J
HBPM1J
HBPM2J
HBPM3J
HBPM4J
HBPM5J

FSBSEL0
FSBSEL1
FSBSEL2

2

CK_200M_P_CPU10
CK_200M_N_CPU10

C267

C267

12

4.7uF

4.7uF

*

*

10V, Y5V, +80%/-20%

10V, Y5V, +80%/-20%

C0805

C0805

Dummy

Dummy

AE1
AD1
AF1
AC1
AG1

AJ2
AJ1
AD2
AG2
AF2
AG3

AC2
AK3

AJ3
G29

H30
G30

2

SMIJ19
A20MJ19
FERRJ19
INTR19

NMI19
IGNNEJ19
STPCLKJ19

HVCCA9

HVSSA9

TP_VCCPLL

TP3TP3

1

HVCCIOPLL9

VID029
VID129
VID229
VID329
VID429
VID529

TP24TP24

SKTOCC_L25

THERMDA25
THERMDC25

VCC_SENSE29
VSS_SENSE29

U10D

U10D

TCK
TDI
TDO
TMS
TRST#

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

DBR#
ITPCLKOUT0

ITPCLKOUT1
BSEL0

BSEL1
BSEL2

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

VID0
VID1
VID2
VID3
VID4
VID5

TP_VID6

1

VID_SELECT

AN3

AN4

4 OF 7

4 OF 7

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8

VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24

VTTPWRGD

VTT_OUT1
VTT_OUT2

VTT_SEL

AN3
AN4

A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6

AA1
J1
F27

P2
K3

R3

K1

L1
N2
M3

A23
B23
D23
C23

AM2

AL5

AM3

AL6

AK4

AL4
AM5
AM7
AN7

F28
G28

AE8

AL1
AK1

AN3
AN4
AN5
AN6

F29

TPEV_VCCFUSEPRG
TPEV_VIDFUSEPRG

VTT_OUT_RIGHT
VTT_OUT_LEFT

1

3 OF 7

3 OF 7

U10C

U10C

SMI#
A20M#
FERR#/PBE#
LINT0
LINT1
IGNNE#
STPCLK#

VCCA
VSSA
RSVD5
VCCIOPLL

VID0
VID1
VID2
VID3
VID4
VID5
FC11
FC12
FC16
BCLK0
BCLK1

SKTOCC#

THERMDA
THERMDC

VCCSENSE
VSSSENSE
VCC_MB_REG
VSS_MB_REG

Changed pin name

Changed pin name
from RSV

from RSV

RSVD9

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

TESTHI00
TESTHI01
TESTHI11
TESTHI12
TESTHI02
TESTHI03
TESTHI04
TESTHI05
TESTHI06
TESTHI07

FORCEPH

TESTHI13

PWRGOOD
PROCHOT#

THERMTRIP#

BOOTSELECT

RSVD11

RSVD12

COMP0
COMP1
COMP2
COMP3
COMP4
COMP5

RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD21
RSVD24

MSID1
MSID0

LL_ID0
LL_ID1

F26
W3
P1
W2
F25
G25
G27
G26
G24
F24
AK6
G6

L2
AH2
N1
AL2
M2

A13
T1
G2
R1
J2
T2

N5
AE6
C9
G10
D16
A20
E23
F23
J3

V1
W1

Y1
V2
AA2

TESTHI_0
TESTHI_1
TESTHI_11
TESTHI_12

RSVD_G6
TESTHI_13

PROCHOTJ

HCOMP0
HCOMP1
HCOMP2
HCOMP3
HCOMP4
HCOMP5

LL_ID1

TESTHI_2_7

MS_ID1
MS_ID0

LL_ID1

CPU_PWRG 18
THERMTRIPJ 19

R297

R297
0

0

R0603

R0603

+/-5%

+/-5%

Dummy

Dummy

Loadline ID for Cedar Mill support

FSB_VTT

VTT_OUT_RIGHT

VTTPWRGD 29

3D3V_SYS

R139

R139
1K

1K

+/-5%

+/-5%

R0603

R0603

Dummy

Dummy

VTT_OUT_LEFT

MS_ID0

MS_ID1

MSID0: VTT = 2005 Mainstream FMB
Vss = 2005 Performance FMB
MSID1: NC = PSC only
Vss = Cedar Mill

VTT_OUT_LEFT

R290

R290
62

62

R0603

R0603

+/-5%

+/-5%

Dummy

Dummy

R280 62R0603 +/-5%R280 62R0603 +/-5%

R287 62R0603 +/-5%R287 62R0603 +/-5%

Intel recommend pull down to VSS

FOXCONN PCEG

FOXCONN PCEG

Title

Title

Title

LGA775 -1

LGA775 -1

LGA775 -1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

FOXCONN PCEG

945P01

945P01

945P01

1

830Saturday, August 20, 2005

830Saturday, August 20, 2005

830Saturday, August 20, 2005

of

of

of

AC

AC

AC

5

4

3

2

1

VCCP VCCPVCCP

D D

C C

B B

U10E

U10E

AG22

VCCP1

K29

VCCP2

AM26

VCCP3

AL8

VCCP4

AE12

VCCP5

AE11

VCCP6

W23

VCCP7

W24

VCCP8

W25

VCCP9

T25

VCCP10

Y28

VCCP11

AL18

VCCP12

AC25

VCCP13

W30

VCCP14

Y30

VCCP15

AN14

VCCP16

AD28

VCCP17

Y26

VCCP18

AC29

VCCP19

M29

VCCP20

U24

VCCP21

J23

VCCP22

AC27

VCCP23

AM18

VCCP24

AM19

VCCP25

AB8

VCCP26

AC26

VCCP27

J8

VCCP28

J28

VCCP29

T30

VCCP30

AM9

VCCP31

AF15

VCCP32

AC8

VCCP33

AE14

VCCP34

N23

VCCP35

W29

VCCP36

U29

VCCP37

AC24

VCCP38

AC23

VCCP39

Y23

VCCP40

AN26

VCCP41

AN25

VCCP42

AN11

VCCP43

AN18

VCCP44

Y27

VCCP45

Y25

VCCP46

AD24

VCCP47

AE23

VCCP48

AE22

VCCP49

AN19

VCCP50

V8

VCCP51

K8

VCCP52

AE21

VCCP53

AM30

VCCP54

AE19

VCCP55

AC30

VCCP56

AE15

VCCP57

M30

VCCP58

K27

VCCP59

M24

VCCP60

AN21

VCCP61

T8

VCCP62

AC28

VCCP63

N25

VCCP64

AE18

VCCP65

W26

VCCP66

AD25

VCCP67

M8

VCCP68

N30

VCCP69

AD26

VCCP70

AJ26

VCCP71

AM29

VCCP72

M25

VCCP73

M26

VCCP74

L8

VCCP75

U25

VCCP76

Y8

VCCP77

AJ12

VCCP78

AD27

VCCP79

U23

VCCP80

M23

VCCP81

AG29

VCCP82

N27

VCCP83

AM22

VCCP84

U28

VCCP85

K28

VCCP86

U8

VCCP87

AK18

VCCP88

AD8

VCCP89

K24

VCCP90

AH28

VCCP91

AH21

VCCP92

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

5 OF 7

5 OF 7

VCCP93
VCCP94
VCCP95
VCCP96
VCCP97
VCCP98

VCCP99
VCCP100
VCCP101
VCCP102
VCCP103
VCCP104
VCCP105
VCCP106
VCCP107
VCCP108
VCCP109
VCCP110
VCCP111
VCCP112
VCCP113
VCCP114
VCCP115
VCCP116
VCCP117
VCCP118
VCCP119
VCCP120
VCCP121
VCCP122
VCCP123
VCCP124
VCCP125
VCCP126
VCCP127
VCCP128
VCCP129
VCCP130
VCCP131
VCCP132
VCCP133
VCCP134
VCCP135
VCCP136
VCCP137
VCCP138
VCCP139
VCCP140
VCCP141
VCCP142
VCCP143
VCCP144
VCCP145
VCCP146
VCCP147
VCCP148
VCCP149
VCCP150
VCCP151
VCCP152
VCCP153
VCCP154
VCCP155
VCCP156
VCCP157
VCCP158
VCCP159
VCCP160
VCCP161
VCCP162
VCCP163
VCCP164
VCCP165
VCCP166
VCCP167
VCCP168
VCCP169
VCCP170
VCCP171
VCCP172
VCCP173
VCCP174
VCCP175
VCCP176
VCCP177
VCCP178
VCCP179
VCCP180
VCCP181
VCCP182
VCCP183
VCCP184

AK12
AH22
T29
AM14
AM25
AE9
Y29
AK25
AK19
AG15
J22
T24
AG21
AM21
J25
U30
AL21
AG25
AJ18
J19
AH30
J15
AG12
AJ22
J20
AH18
AH26
W27
AL25
AN8
AH14
U27
T23
R8
AK22
AN29
AG11
AK26
J10
AJ15
AG26
AN9
AH15
AF18
AL15
J26
J18
J21
AG27
AK15
AF11
AD23
AM15
AF8
AK21
AG30
AJ21
AM11
AL11
AJ11
K30
AL14
AN30
AH25
AL12
AJ9
AK11
AG14
N29
AL30
AJ25
AH9
J29
J11
K25
P8
K23
AL19
AM8
T26
N28
AH12
AL22
AN15
AJ8
U26
AJ19
T27
AK8
AN12
AG9
N26

U10F

U10F

AF9

VCCP185

AF22

VCCP186

AH11

VCCP187

AJ14

VCCP188

AH19

VCCP189

AH29

VCCP190

AH27

VCCP191

AG28

VCCP192

AL26

VCCP193

AM12

VCCP194

J24

VCCP195

J13

VCCP196

T28

VCCP197

W28

VCCP198

J12

VCCP199

J27

VCCP200

AG19

VCCP201

AL9

VCCP202

AD30

VCCP203

AF21

VCCP204

Y24

VCCP205

AK14

VCCP206

J9

VCCP207

M27

VCCP208

AF14

VCCP209

J30

VCCP210

AG18

VCCP211

AA8

VCCP212

AG8

VCCP213

AL29

VCCP214

AD29

VCCP215

W8

VCCP216

AH8

VCCP217

N24

VCCP218

AN22

VCCP219

J14

VCCP220

K26

VCCP221

AF19

VCCP222

N8

VCCP223

AF12

VCCP224

M28

VCCP225

AK9

VCCP226

C10

VSS1

D12

VSS2

C24

VSS4

K2

VSS5

C22

VSS6

AN1

VSS7

B14

VSS8

K7

VSS9

AE16

VSS10

B11

VSS11

AL10

VSS12

AK23

VSS13

H12

VSS14

AF7

VSS15

AK7

VSS16

H7

VSS17

E14

VSS18

L28

VSS19

Y5

VSS20

E11

VSS21

AL16

VSS22

AL24

VSS23

AK13

VSS24

AL3

VSS25

D21

VSS26

AL20

VSS27

D18

VSS28

AN2

VSS29

AK16

VSS30

AK20

VSS31

AM27

VSS32

AM1

VSS33

AL13

VSS34

AL17

VSS35

C19

VSS36

E28

VSS37

AH7

VSS38

AK30

VSS39

D24

VSS40

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125

6 OF 7

6 OF 7

AL23
A12
L25
J7
AE28
AE29
K5
J4
AE30
AN20
AF10
AE24
AM24
AN23
H9
H8
H13
AC6
AC7
AH6
C16
AM16
AE25
AE27
AJ28
AJ7
F19
AH13
AD7
AH16
AK17
E17
AH17
AH20
AE5
AH23
AE7
AM13
AH24
AJ30
AJ10
AF3
AK5
AJ16
AF6
AK29
AJ17
F22
AH3
AK10
AM10
F16
AJ23
F13
AG7
F10
L26
AD4
H11
L24
L23
AM23
A15
AH10
H29

GTLREF_SEL

B24
L3
H27
A21
AE2
AJ29
A24
AK27
AK28
B20
AM20
H26
B17
H25
H24
AA3
AA7
H23
AA6
H10

U10G

U10G

H22

VSS126

H21

VSS127

H20

VSS128

H19

VSS129

H18

VSS130

AB7

VSS131

H17

VSS132

AJ24

VSS133

AM17

VSS134

AC3

VSS135

H14

VSS136

P28

VSS137

V6

VSS138

AK2

VSS139

P27

VSS140

P26

VSS141

AM28

VSS142

AJ13

VSS143

W4

VSS144

P25

VSS145

AJ20

VSS146

W7

VSS147

P23

VSS148

AG13

VSS149

AG16

VSS150

AG17

VSS151

C7

VSS152

Y2

VSS153

L30

VSS154

L29

VSS155

D15

VSS156

AL27

VSS157

Y7

VSS158

L27

VSS159

AA29

VSS160

N6

VSS161

N7

VSS162

AA28

VSS163

AN13

VSS164

AA27

VSS165

AA26

VSS166

P4

VSS167

AA25

VSS168

AA24

VSS169

P7

VSS170

E26

VSS171

V30

VSS172

R2

VSS173

V29

VSS174

V28

VSS175

R5

VSS176

V27

VSS177

R7

VSS178

E20

VSS179

AN10

VSS180

V25

VSS181

T3

VSS182

V24

VSS183

V23

VSS184

T6

VSS185

AL7

VSS186

E25

VSS187

U1

VSS188

R29

VSS189

R28

VSS190

R27

VSS191

R26

VSS192

R25

VSS193

U7

VSS194

R24

VSS195

R23

VSS196

P30

VSS197

V3

VSS198

P29

VSS199

AF16

VSS200

AE10

VSS201

AF13

VSS202

H6

VSS203

A18

VSS204

A2

VSS205

E2

VSS206

D9

VSS207

C4

VSS208

A6

VSS209

D6

VSS210

CPU_Prescott_Rev1.0_LGA775

CPU_Prescott_Rev1.0_LGA775

cpu_lga775h600_945u02

cpu_lga775h600_945u02

7 OF 7

7 OF 7

VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261

VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276

RSVD26
RSVD28

RSVD29
RSVD31

RSVD32
RSVD33
RSVD34
RSVD35
RSVD36

D5
A9
D3
B1
B5
B8
AJ4
AE26
AH1
E29
V7
C13
AK24
AB30
L6
L7
AB29
M1
AB28
E8
AG20
AN17
AB27
AB26
AN16
M7
AB25
AB24
AB23
N3
AA30
F4
AG10
AE13
AF30
H28
F7
AF29
AF28
G1
AF27
AF26
AF25
AN28
AN27
AF24
AF23
AG24
AF17
AN24
H3

P24
AE20
AE17
E27
T7
R30
AJ27
AB1
AM4
V26
AA23
AL28
AF20
AG23

F6
Y3

AE3
E7

B13
D14
E6
D1
E5

IMPSEL

HCOMP6
HCOMP7

SRF: >=30MHz
Rated I: >=120mA
DCR: <=0.36 ohm

HVCCIOPLL8

HVCCA8

HVSSA8

HS1

HS1
MTG-HOLE-8_0

MTG-HOLE-8_0

5

6

7
8
9

1

LKPT_HS_ATX

LKPT_HS_ATX

HVCCIOPLL

HVCCA

HVSSA

4
3
2

FSB_VTT

PLL Supply Filter

L6

L0805 10uHL6L0805 10uH

2 1

EC10

EC10

ESL <= 9 nH, ESR < 0.3 ohm

33uF

33uF

*

*

35V, +/-20%

35V, +/-20%

CE20D50H110

CE20D50H110

Notes:

1. Cap. should be within 1.5" mils of the VCCA and VSSA pins

2. VCCA route should be parallel and next to VSSA route to minimize loop area

3. VCCIOPLL route should be parallel and next to VSSA route to minimize loop area

3. Min. 12 mils trace from the filter to the processor pins

4. The inductors should be close to the cap.

L7

L0805 10uHL7L0805 10uH

2 1

SRF: >=30MHz
Rated I: >=120mA
DCR: <=0.36 ohm

VTT_OUT_RIGHT

R285 60.4 R0603 +/-1%R285 60.4 R0603 +/-1%
R298 60.4 R0603 +/-1%R298 60.4 R0603 +/-1%

15 mils width
7 mils spacing
max. 1200mils

check component requirements

HCOMP6
HCOMP7

vccp

TC3 CTD100uF

TC3 CTD100uF

2V, +/-20%

2V, +/-20%

*

*

TC4 CTD100uF

TC4 CTD100uF

2V, +/-20%

2V, +/-20%

*

*

Place caps within socket
cavity solder side

VCCP VCCP

C187

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C182

C182

22uF

22uF

C187

12

22uF

22uF

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

*

*

C1206

C1206

Dummy

Dummy

C214

C214

C202

C202

12

22uF

22uF

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

C216

C216

12

12

22uF

22uF

22uF

22uF

*

*

*

*

C1206

C1206

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C196

C196

22uF

22uF

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C189

C189

22uF

22uF

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C205

C205

22uF

22uF

C204

C204

C220

C220

22uF

22uF

A A

C208

C208

12

12

22uF

22uF

22uF

22uF

*

*

*

*

C1206

C1206

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

5

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C215

C215

22uF

22uF

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

4

C179

C179

22uF

22uF

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C197

C197

22uF

22uF

C210

C210

C217

C217

12

12

22uF

22uF

22uF

22uF

*

*

*

*

C1206

C1206

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C201

C201

C207

C207

12

22uF

22uF

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

12

*

*

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

C496

C496

12

12

22uF

22uF

22uF

22uF

*

*

*

*

C1206

C1206

C1206

C1206

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

6.3V, X5R, +/-20%

Dummy

Dummy

Dummy

Dummy

Put under CPU Heat-Sink

0.8V~1.55V/ 119A

EC23

EC23

EC11

EC11

560uF

560uF

560uF

560uF

*

*

*

*

Dummy

Dummy

CE35D80H200

CE35D80H200

CE35D80H200

CE35D80H200

4V, +/-20%

4V, +/-20%

4V, +/-20%

4V, +/-20%

3

EC26

EC26

EC28

EC28

EC27

EC30

EC30

EC22

EC31

EC31

560uF

560uF

*

*

Dummy

Dummy

CE35D80H200

CE35D80H200

4V, +/-20%

4V, +/-20%

EC22

EC13

EC13

EC16

EC16

560uF

560uF

560uF

560uF

560uF

560uF

*

*

*

*

CE35D80H200

CE35D80H200

4V, +/-20%

4V, +/-20%

560uF

*

*

*

*

CE35D80H200

CE35D80H200

CE35D80H200

CE35D80H200

4V, +/-20%

4V, +/-20%

4V, +/-20%

4V, +/-20%

560uF

560uF

560uF

*

*

Dummy

Dummy

CE35D80H200

CE35D80H200

CE35D80H200

CE35D80H200

4V, +/-20%

4V, +/-20%

4V, +/-20%

4V, +/-20%

2

EC27

560uF

560uF

560uF

560uF

*

*

*

*

CE35D80H200

CE35D80H200

CE35D80H200

CE35D80H200

4V, +/-20%

4V, +/-20%

4V, +/-20%

4V, +/-20%

FOXCONN PCEG

FOXCONN PCEG

Title

Title

Title

LGA775 -2

LGA775 -2

LGA775 -2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

FOXCONN PCEG

945P01

945P01

945P01

1

930Saturday, July 16, 2005

930Saturday, July 16, 2005

930Saturday, July 16, 2005

AC

AC

AC

of

of

of