Fluke 9132A Service Manual

9132A

752857

November

1989 John Fluke

©

1989

Service

inc.,

Mfg.

Co.,

rights

all

reserved.

Litho in U.S.A.

Manual

=

Lu)

K

f=

COVERAGE

Fluke

warrants normal

under

not

cover

headers,

clips,

not

does

conditions of

Fluke's

authorized Service

an

defective.

of

operation, or

cost.

repair

use

parts

apply

operation.

obligations

¥

we

9132A

the

and

that

connect

and

Sync

to

any

under

determine

if

the

service for

Center

warranty

SERVICE

failure

a

i

the

difficulty. Repairs

Fluke

assumes

occurs,

send the

will

NO risk for

DISCLAIMER

THE FOREGOING

EXPRESS OR

MERCHANTABILITY, FLUKE SHALL NOT DAMAGES,

IMPLIED,

WHETHER

WARRANTY IS

FITNESS,

GETTING ANSWERS

To

enhance

Address

WASHINGTON

use

your

all

correspondence

98206-9090,

of this

Interface

Memory

a periodofona (1)

to

directly

Adapter

assemblies).

that has

product

this

warranty within

the

failure

that the

has

period

product,

be madeorthe

BE LIABLE FOR

IN

postage

in

transit.

damage

INCLUDING BUT

OR

CONTRACT, TORT,

AND

ADVICE

Fluke

Pod,

JOHN

to:

ATTN:

Sales

WARRANTY

free from

Podtobe

year

Unit Under Test

the

This

warranty

misused, altered,

been

limited

is

to

repair

period,

warranty

caused

has been

product replaced,

EXCLUSIVE AND

ADEQUACY

will

Department,

expired, we

prepaid,

NOT LIMITED TO

ANY

SPECIAL,

OTHERWISE.

OR

to

be

happy

FLUKE MFG.

will

to

the closest

FOR

answer

from

the date

(flying

extends

or

replacement

provided

misuse,

by

repair

it will

and

IN

LIEU

ANY

you

CO.

in

material

defects

of

shipment.

lead

microprocessor

sets,

to

the

original

only

has been

or

that

Pod

the

Service

be

PARTICULAR

INCIDENTAL,

questions

INC,

subjected

of

product

a

determine

we alteration,

or

bill

and

you

Center

returned, transportation prepaid.

ALL

OF

OTHER WARRANTIES,

ANY IMPLIED

OR

about

P.O. BOX

PURPOSE OR

and

workmanship

The

warranty

sockets,

purchaser

abnormal

to

is returned

that

the

product

abnormal conditions

for

reasonable

the

with

description

a

WARRANTY

CONSEQUENTIAL

8080,

and

EVERETT,

applications

does

USE.

use.

and

to

is

of

OF

’

JOHN FLUKE

MFG.

CO.,

P.O.

BOX

9090, EVERETT,

WASHINGTON

88206-9090

CHANGE/ERRATA

NO:

ISSUE

INFORMATION

1

3/92

This

change/errata

the

following

the

following

1.

2.Norevision

manual.

conditions

The

revision

than

higher

change/exrata.

MANUAL

Title:

Date:

Print

Date: m=

Rev.-

contains information

Enter the

letter

that

given

letter

corrections in

exist:

stamped

with

indicated

is

9132A

service

November 1989

on

each

necessary

indicated

the

change.

the

at

to

manual

the

PCB

beginning

PAGE

C/E

Page

WN

=

ensure

is

of

No.

the

accuracy

if

either

to

equal

the

EFFECTIVITY

Date

Print

3/92 3/92

one

or

of

9132a

CHANGE#1~

Rev.

On

©

CHANGE

On

CHANGE

Ver.

On

CHANGE#4~

On

CHANGE#5~

The

On

39582

A3

-E,

Sync

4-14,

page

DELETE:

CHANGE:

TO:.

DELETE:

CHANGE: MP5{TOP COVER

TO:

FROM: TO:

FROM:

TO:

DELETE:

page

2.0

page

©

#2

#3

.

ds

r,:39648

4-5,

-

~

4-10,

J2|HEADER,Z

J2|[HEADER,2

J2|HEADER,2

NOTE

MPS|TOP

40220,41073

U32

U89 UB9,

US0{*PROGRAMMED

42111

4-5,

page

CHANGE:

MP12|LABEL,

MP12

TO:

448795

9132FT-4002

4-5,

page

FROM:

MP14|CASE

TO:

MP14|CASE

FROM:

MP16|DECAL,

MP16{DECAL,

TO:

FROM:

W4|SYNC

W4

TO:

|

PCA

Module

Table

1 =

Table

|

*PROGRAMMED

|

*PROGRAMMED

|

*PROGRAMMED

90

Table

NAMEPLATE,

A3

Table

SYNC MODULE CABLE

make

4-4,

ROW,

ROW, ROW,

500447

P/N’s

form

to

4-1,

ASSY/SELFTEST

COVER

ASSY/SELFTEST

make

4-2,

|

*PROGRAMMED PROM

4-1,

VINYL,

SERIAL

Module

Sync

make

4-1,

SYNC

TOP,

SYNC

TOP,

SYNC

MODULE

SYNC

MODULE CABLE

(9132A-4002A)

the

following

.100CTR,RT ANG,20

.100CTR,RT .100CTR,RT

757443

and

one .34-pin

the

following

PAL

V2.0

PAL,

LO BYTE

PROM,

SET,

PROM,HI

MODULE|881424189536{891424|1

BYTE

.3,1.5,BAR CODE|844712/89536184471211

REAR

is

replacing

the

following

MODULE,PAD

PAD

MODULE,

{844139189536184413911

ASSY{785584(89536{785584]1

ASSY(|891429189536189142941

changes:

PIN|500447/00779{1~87230-0}1}1

ANG,14

PIN|757443100779187230~-7

34

ANG,

PIN|876214100779{1~87230-7{1

mounted

are

connector (J2).

DOOR,PAINTED{792846189536]792846(1

PAINTED

DOOR,

next to

|886049{89536(886049(1

changes:

1857495189536185749511 1879916189536187991611

1857487189536(85748711

V2.01889779189536188977911

1857482(895361857482{1

PANEL|472795185480(472795]1

9%132A-4002,

the

changes:

TRANSFER{8553791{895361855379{1

TRANSFER|894642{89536)89464211

each

{141

other

_—

3/92

-1-

REFERENCE

DESIGHATOR

UM

1

A

<

1-6,

<

17,

Cc

7-13,

< 40

C

41-45

CRY,

CR

10,

CR

20,

CR

2,

CR

11,

CR

23

CR

3,

CR

12

2,

t

1

J

2

J

Qe

i,

7

Q

2,

1

R

2

R

3,

R

4

R

é

R

7,

9

R

R16, R20,

R

11-13

R24

R17

R21

R22 R27

RTi,2

T®

i,

1

u u

2,

4

u

5

u

Ww

4

6

»

z

1,

On

22-36

4,

13-

21

5

17-

3,

16, 18- 23-

6

3

4

8

2

3

2

page

'14=

37-

7,

16,

8,

13,

9,

6,

5

26

.

€

*

=

*

©

*

«

*

An

4-14,

replace

HYBRID

CAP, CER,

CAP, TA, 10UF, +~20%, 16V,

CAP, CER, 47BF, +=10%, 50V,

DIODE,

DICQDE,

HEADER,

HEADER,2ROW,

TRANSISTOR,

TRANSISTOR, RES, RES,CERM, RES, RES,

RES,CERM, RES, RES,CERM, 10X,

RES, RES,CERM, RES, RES, RES, RES,CERM, THERMISTOR, DISC,

TERM,

*

1C,CMOS,QUAD

+

1C,

*

IC,

¢

IC,

SYNC MODULE

SYNC ADAPTER

RES,

*

in

ASSY,

0.1UF,

S$I,30

:

BV=70.0V,

$I,

BV=~70.0V, IO=$0MA,

$I,

QVERDRIVE

CABLE

2

ROW,

SI,

ST, PNP,

CERM,

18, 31,

CERM,

133K,

CERM,

1.8K,

RES,CERM,

7K, +~5%, .125W,

4,

3.3K,

CERM,

1,21K,

CERM,

2K,

825,

CERM,

33, +~5%, ,125W,

CERM,

100K,

CERM,

5.1K, +-54,

620, +~5%,

UNINSUL,

CMOS,

0CTAL

CMOS,

HEX INVERTER W/SCHT

COMPARATOR,

CERM,

SOIC,16

‘S* column

TESTED

+~108,25V,X7R,

£1IV,1.1

,050CTR,50PIN

.100CTR,

NPN,

+-5%, +~5%, IW,

+-1%,

+~5%, (125W, 2000PH,

+~5%,

+-5¢,

4-54,

+-1%,.125W, 100PPH,

+~5%,

WIRE

2

INPUT

BUFFER/LINE

QUAD,

CABLE

CABLE ASSY

indicates

Table

4-4.

127"

6032

C0G,

SCHOTTKY

AMP,

DUAL,

10=50MA,

DUAL,

ASSY

RT

ANG,

SMALL

SIGNAL,

SMALL

SIGNAL,

IW, 200PPH,

200PPN,

1002PN,

.125W,

200PPN,

(125W,

200PPM,

+-1%,.125W,100PPN,

200PPN,

125W,

,125W, 200PPN,

200PPM,

2008PM,

125,

,

.125W, 200PPN,

125W, 200PPM,

.

25¢C

4.98,

FORM,

TEST POINT

XOR

GATE,

DRVR,

14

PIN,S0IC

ASSY

8

PIN,

RRS,

a

4-4 with

Al

Sync

(Sas

Flgure 4-4)

1206

*

1206

$0723

§0T23

34

S0T~23

$OT-23 2512 2512

1206 1206 1206 1206

1206

1206 1206

1206

SOIC

TRIG, SOIC

36,

42%

static-sensitive

the

Module

FLUKE

STOCK

weRQum

847293 747287 147287 867572 867572 747352 782573 782873 782573 742320 742320 742320 742544

42548

847012 838565 876214 742031 742031

742023

853783

838045

201423

746453

740522

746529

#67109

746610

745610

746461

$11455

746248

740548

746560

745984

838102

181237

833391

853676

876813

T4156

£91429

761684

ss7088

following:

MFRS

seLy

“CODE

89536 04222

$6289

04222 53993

A233

8A233

89536 00779 00779

A233

T3445 56637

3vezs

91637 91637 91637 91637 91637 91637

1637

91637 91627 91637 91632 91637

part.

MANUFACTURERS

PART NUMBER

GENERIC

-OR

947293 12065C104RATMA

293D106X0016C2T

17065A070KATOSOD

TARE

100030

Jeb

BAVSS

BAWSS

847012

104068-3 1-87230-7

BCXISTRL

BCX1TTRL

MC2512-180HM-SAT

MC2512-330KM-54T

CRON1206~1331F8 CRCW1206+180108 CRCW1206~4701J8 CRCWL206-330108 CRCW1206-1211FD

CRECW1206-100209

CRCW1206~200178 CRCW1206-8250FB CRCWY206-33R058

CRCW1206+-100308

CRCW1206~510108

CRCW1206-$20008

CDTAACT240M9€

761684 S0MC~1603~560G

:

TYPEw-wen

ORW9

9132A

N

0

TOT

T

QTY~

~E-

1

a5

SF

Fags

10

-

a

an

LL

EE

fT

3/92

ww

91i32a

On

pages

schematic

4-15 and

and

reference

5-21/5-22,

designator

B

RE

ee

Figure

cm

anc

9132FT-1602

Uke

4-4

and

drawings

i

Figure

with

the

5-3,

replace

following:

the

~3-

80AR0

kan

10

mun

HHT

9132a

P—

.

POINTE

TEST

SHOW

TOWECTION

SHIELD

}

12

Sd

EY

Pe

oh

ow

owoaon

a

en

E52

[8

pava3

wy

te

0

3/92

wre “®omoa

alfa

a

oe

on

a

2

,

acess

wom

[een

3

aetrts

-4-

fr]

28258

wceeolis

wr

om

[nsExvw

ow

ail

__€8

201

FR

no

PM

s

o-

n

et

8132FT-1002

rr

ue

to

Agser

av

ec

Y

ovespazve

eon

5.8

wt

IMPORTANT

NOTE

of

Use

Mainframe

9132A Interface Pod

the

have software

installed

requires

thatisversion

that the 9100-Series

or

4.0

later.

9132A Service

SECTION

1

INTRODUCTION

1-1.

INTRODUCTION

1-2.

SPECIFICATIONS

2

THEORY

2-1.

GENERAL

2-2.

THEORY

2-3. 2-4. 2-5. 2-6. 2-7. 2-8. 2-9.

2-10. 2-11. 2-12. 2-13. 2-14. 2-15. 2-16.

3 MAINTENANCE

3-1.

INTRODUCTION

3-2.

WARRANTY

3-3.

INSPECTINGASHIPMENT

3-4.

SHIPPING THE

3-5.

MAINTENANCE

3-6. 3-7. 3-8. 3-9.

INSTALLING 3-10. 3-11. 3-12. 3-13. 3-14. 3-15.

CONNECTING 3-16.

USING THE

AND

OF

OPERATION

THEORY

OF

Main

Board

Main

Board

Main

Board Emulation

Main

Board

Main

Board

Main

Board

Main

Board ROM

Module

Sync

ROM

Modules

ROM

Plug

Self

Test

Assembly

RAM

Module Personality Sync Adapters

REPAIR

FOR

Cleaning Changing Changing

Installing Installing Installing Installing Closing

the Fusesonthe the Fuseonthe ROM

the the the ROM the RAM

the

Table

of

Contents

TITLE

SPECIFICATIONS

OF

OPERATION.

OPERATION.......c..ccoevrmemenn.

Kernel

Generation

Sync

Emulation Input/Output

Address RAM

Module

(24-, 28-,

Adapters

Emulation

or

Module

AND FACTORY

POD

OR ADJUSTMENT...

PROCEDURES.

THE PLUG-IN MODULES .3-3 Personality

Module

Sync

Pod Case

THE POD TO THE MAINFRAME

POD SELF TEST............

Timing.....c...ceeovrvererenresniennnn.

RAM

Connectors

RAM

Control

Devices.........

and

COnnections........c.emmseemsessssresrsnsens

32-Pin

and

RAM.....

.......ccccrumirvinnnne

TO

FLUKE

Sync

Module

........

Module(s)

Module(s)...........

..covuecemeeecrneemrorenssnsmenens

...

Module Interface.

Sync

Assemblies)

SERVICE

...

......

Module......

Module

......

and Self

vase

.

Test.

.....c.ooeureirennes

PAGE

1-1

1-1 1-1

2-1

212

2-12

2-13

2-14 2-15 2-15 2-15 2-16

3-1

32

ee

3-2

wis

3-2

3-3

.3-4

3-5

.3-5

3-6

ee

3-7

3-2

3-3

3-7 3-7

9132A Service

TABLE OF

CONTENTS,

continued

SECTION

7.

TROUBLESHOOTING PROCEDURES.......

8.

Preparation

9.

-20.

DISASSEMBLY

1.

2. 3-23. 3-24.

LISTOFREPLACEABLE PARTS

4

4-1.

INTRODUCTION

4-2.

HOW TO OBTAIN

4-3.

MANUAL STATUS

4-4.

ADDITIONAL INFORMATION

4-5.

NEWER INSTRUMENTS

Running

Removing Removing Removing Removing

the

5 SCHEMATIC DIAGRAMS

for

Troubleshooting

9132A

Main

the

Self Test ROM Module

the the

Sync

TITLE

Pod.

Service

PCA..........

Module PCA............

PARTS......ccoeorvnrrnnee

INFORMATION

the

Test

.....cvuvweeen.

PCA...

PCA.

..ccovvvevernmssmrarasmcnssenssnncsnnmnssosasase

......

PAGE

4-1

5-1

List

9132A Service

of Tables

TABLE

2-1.

3-1. 3-2.

4-1. 4-2, 4-3. A2

4.4,

4-5, 4-6.

4-7. 4-8. 4-9.

State

Definitions for the

Pod Self

Test Failure

Test

Required 9132A Final

Main

PCA

Al

Self

Test

A3

Module PCA

Sync

A4

RAM

Module

ROM

Module

AS

ROM

Module PCA

A6

ROM

Plug

Manual Status

Equipment

Assembly

Sync

Codes.

TITLE

State

for Pod

Machine........cooevecevsinnrenssnesesens

Troubleshooting

.........ccvcecrvvnresrsrnens

PAGE

PCA

Final

Assembly..........

Adapters

Information 4-24

2-12

3-10

3-12

4-5 4-10 4-13 4-14 4-16 4-18 4-20 4-22

iiifiv

9132A Service

FEY

FIGURE

9132A

Generation

Sync

Opening Installing

hABRRUAGARON

§

bw

DEUS

Connection Connecting

Connection of Connecting Connecting

Service Test 9132A Final

Main PCA

Al

A2 Self A3

Sync

A4

RAM

ROM Module Final

AS

ROM

A6 ROM

Main PCA

Al

A2 Self

A3

Sync

A4 RAM

A5

ROM Module

AG

ROM

PRPRREEREDE

bE

Bp

BB

A

Lh

simiam

Gh

5-6.

Interface

Memory

the

Back

the

Personality of the the RAM

the Interface Podtothe the ROM the Test

Program Assembly

PCA

Test

Module

Module PCA Plug

Adapters

PCA

Test

Module

Module PCA

Adapter

Plug

TITLE

Pod Block

Panel of the Pod

Module...

External Module

Modules........ccorerermruenrsirocnee

and

Sync

Equipment

Menu

PCA 4-15

PCA

ASSembly

PCA

Diagram..........cevueionnnererseerrirones

Mainframe.

Modulestothe

.....cccowmiccreveinncresiicinisimisnisessssessnons

List

Self Test

of

PCA

Figures

PAGE

.3-5 .3-6

3-7

..............

3-13

3-14

4-12 4-13

4-17 4-19

4-21

anim

4-23

5-19

5-21 5-23

5-25 5-27

2-2 2-4 3-4

3-9

4-6

5-3

-4

scons

vivi

9132A

Service

==.

INTRODUCTION

This

manual Pod. Included performance and

schematic Processor serviceable

SPECIFICATIONS

The

microprocessor-specific Manual for the 80386 68020

Introduction and

service information

presents

tests,

diagrams.

Support

parts.

specifications

processor,

are a

troubleshooting

Packages.

etc).

theory

for

processor,

This

the

user’s

of

operation,

information,

manual does

The Processor

9132A

manual

9132A-68020 User's

the

Section

Specifications

for

the 9132A

general

not

Support Packages

be

can

(i.e.,

Memory

maintenance

list of

a

replacement

information

include

foundinthe

the 9132A-80386 User's

Manual

1-1.

Interface

procedures,

parts,

on

contain

1-2.

individual

for

the

1

no

111-2

9132A Service

GENERAL

THEORY

THEORY OF

The

9132A Mainframe the UUT. The 9132 UUT’s commands.Todo sockets, for To take command code that the Pod.

The Pod timing

microprocessor. Mainframe

signal functionally return of operation the

(referred to

to

Mainframe

a

memory

effectively

controlling

byte

microprocessor

the UUT

originally

This

code then

also monitors

control

(either status

or

user

is

for

returning

writes

occurs,

OF OPERATION

block

A

diagram

section

major designators

Section

such

5.

OPERATION

unit

under

and

processes

is

a

memory

and

uses

the Pod

this,

replacing

is

control of

or

came

executes

some microprocessor

Basically,

at

a

from

data

to

an

the

sync

data bus into

of

each

is

described “Uxx”

as

Theory

hereafter

as

test

(UUT).

the

commands

emulation

the

processor

plugs

the

memory

ability

the

from

UUT boot

the user's instructions.

control

or

lines

these

required

access

data.

Eight UUT’s

the

address called

(generated

pulse

latch,

a

Pod

major

in the

and

signal names

of

Operation

the

intoorattachestothe

drive

to

UUT,

lines)

data

which

section

interfaces the 9100-Series

Pod)

Pod

The

receives

so

they can

it

that

Pod,

form

microprocessor a

following paragraphs.

is,

the

UUT

on

in

them. The other feature

overdrive

or

the Pod

ROMs

time.

resets

replaced

is

lines

directly.

monitor

“sync” signal

a

The other

lines

are

“transfer address”.

the

from

is

be

can

presented

refer

Pod)

readbythe

schematic

to

Section

commands

be

executedonthe

takes control of the

to execute

the

also to

in

the Pod’s

UUT Boot ROM

reset

the

UUT the code from

by

Eight

the

of

state

usedbythe

the

of

use

monitored and

Pod

the

by

When

loads the

Pod.

2-1.

Figure

Component

diagrams

required

and the

lines

the UUT

means

data

2-1.

from

line.

UUT

sync

2-2.

Each

2

for

this

at

in

Main

Board Kernel

Signal names Signal names active

Main

The

schematic

state

Board

(Figure

at

appear

that

low

kernel

5-1).

end

voltage.

circuitry

NOTE

as

in

the

in

schematic

“-”

(e.g.,

BERR-)

diagrams.

indicate

an

2-3.

1

is

shown

on

page

of the

Main Board

9132A

Service

am

mr

sr

i

om

oe

i

Sn

nt

SS

oe

St

Sm

CHYOS

So.

mn

3OVIHIINI

Tt

So

Lr

AHOWSW

rt

TENGEN

re

en

ee

TENE

i

Si

tt

St

aod

ni

rr

rome

nm

Of

i

st

god

re

en

2d

id

YHZANY

wv

NOLLYINWI

we

MOOD

FAD

snd

HOV

Yivg

LL

Wod

L

|

ve

ot

S1HOd

!

!|I

Nn

I

ONAS

ir]

1

|

i

|

!

snd]

A

i

Figure

:

|

1

v

|

L1Z4N

__

OHINOD

|

FNLAHIAC

€

SAIICHINO

TANNVHO

FINO

ATTN

ZN

ONAS]

1

|

EI]

bel

HOLVYENID

L

I

;

|

{

i

|

a

1

[

!

i

2-1.

9132A

Memory

Interface

id

mas

me

|

sim

st

ren

re

mn

gr

me

INHAHANO

Pod

1

-

i

!

|

wou

!

Pe

a

mm

i

tn

mm

fr

|

4

EEE

rd

I

[Ed]

]

EEE

SSH

2:

|

=)

re

El

Po

Femme

n3Lsas

sag

1353

I

1

|

tm

300930

ssauaay

NEE

Jom,

fi

fo

i

inn

me

|

C3ZINOUHONAS

3804d

Block

Diagram

2-2

9132A Service

Main

The heart reset

by

line

from

and

BR-, (IPLx)

are

(U91)

clocks

The main

the

address

the

segments

the line

begins

kernel

ROM

PMROMSEL-

as

such

dress,

such

tion, output

port

The

port

output

port

input

port

and

bytes,

be

selectedatthe

can

The

outputs

U73

from

is

provided

are gated

active

during

forces both data

the

same

ERAMSEL- ERAMBSEL- emulation RAMisselected

The

kernel ROM consists

The kernel RAM

Self

test

that

access counted

(ST-LE), enable

(ST-OE-)

access

only

Board

Sync

The Main Board Main

Board schematic

block

diagram

16-bit

A

various

(The

labeled

ROM

boot

the

of

Pod

the

RESET-

the

Mainframe

BG-

signals

all

tied

the

processor.

address

space

begins

with

select

ARAM-SEL

as

ERAMSEL-

as

select

(QUTPORTSEL-)

selects from

decoders,

selects.

be

can

from

correspond

from the UDS-

write

to

write

a

strobes

time.

on

through

RAM

(ERAM).

(A15

consists of

is

enable

is

not self

as a

the

output

the self

Generation

sync

is

shown

address

signals

ROM1IPIN28

coming

is

68000

a

line.

or

are

high through

decoding

several

into

with

“K”,

kernel RAM

or

or Personality

U40

andU3is

Each

written

same

U83

correspond

the

to

lower

cycle

11

of

U28.

low

determined

an

interrupt

test

access.

of

U16

occurs.

test

ports

microprocessor

This line

the

by

power-up

used

not

4.7K-ohm

is

achieved 64K

segments.

a specific

such

as

KROMSEL-,

Module ROM

address RAM

or

emulation

or

and

divided

are

an

input

output

port

either

to

as

timeoreither

to

low data

and

LDS-

and

(WL-)

if LDS-

which in

active,

is

further broken down into

U40

These

The

state

A15

bank

=

A,

32K

of

two

32Kx8 static

two

A23 and

by

acknowledge occurs

These

13.

These

signals

A23

when

Timing

generation timing circuitry

5-1).

(Figure

2-2.

in

Figure

comparator

looksatthe address lines

onto

coming

ROMIPIN3.)

or

from

ROM

the

is

produced

during

by

letter

select.

RAM

input

by

port

selectisdivided into

a

byte

the

lines. Extra

lines

write

and

signals

of

high

x

accesses

If

the

high.

is

A

Main

main

the

These

Module.

(U92).

either

RC

reset

operation.

resistors. An 8-MHz

HCT138

an

Each of

that identifies its

K

the

“P”

refers

select.

select

port

three

ACT138s

decoder)

word

or a

be selected

one

can

data

high

decoding

the

from

(WU-).

upper

UDS-

are

activates

tum

the bank selects

are

AlS5

determines

bank

=

B).

8

CMOS ROMs

RAMs

(U95

interrupt

while

pulse

is

a

access

all

disable

is

shown

Board

Pod board

the address lines

are

Other

types

The

processor

the

PODRESET-

by

network.

U40 also

lines,

active.Aword write

The

interrupt

U40 divides

(U40).

the

lines that

destination.

refers

to

kernel,

to

personality,

“A”

refers

“E”

refers

has lines

INPORTSEL-).

and U73

(U83

into the

output port high U83 and U73

(i.e.,

individually).

and the

for U83

microprocessor,

and

WL-

and

WL-

ERAMASEL-

which

(U90

and

U88).

acknowledge.

is

A23

self

latch

test

self

read,

internal

a

test

accesses

BERR-,

oscillator

select

as

to

emula-

to

and

outputs

and

which

WU-

for

bank

and

U89).

If

high,

enable output

lines

such

ad-

are

low

U73

and

any

it

and

2-4.

2

sync

on

generation

ROM

of

are,

of

of the

page

timing

Module

for

example,

of

inputs entering

for

are

the

is

If

in

or

at

of

is

1.

2-3

9132A

Service

REFERENCE

Em)

F<

ADDRESS

rooness

[SINC

the

comparator

existing pin

ROMIPIN28DC-

ROMIPIN28.

The

output

Two

other

1,

reports

ROMIDC-

into

U29

8),

active

goes

The

output

is

©

explained

clock

to

U21B,

the OR

gate

13.

The

the

ROM

BCYCLECLK-

BER

is

This

of

pins

that

is

a

active,

are

low.

of

the

in

(U37C)

comparator

Modules.

COMPARATOR

Figure

are,

high

is

type

the

comparator

are

input

the

output

don’t

comparator

more

AC74

an

is

active,

for

or

low,

care

the

detail

until

MEMORY EMULATION POD

COUBRRE.

EQUAL

femme]

As

AE

CLOCK

CYCLE

VALID

ADDRESS

DATASYNC-CLK

2-2.

Sync

example,

for

low

the

comparator

of architecture

is

summed

U29.

to

ROMISEL-,

and

enable

for

signal

of

output

is

sampled

further

Flip-Flop.

forcedtoclear

signal

COMPAREQ-

When

COMPAREQ-

the clock latch

VALID-COMPARE

©

a

meri

I

ol

COUNTER

OR

A

Generation

ROMIPIN28POL,

compare,

the

on

Once

does

is

used

by

enableonthe

chip

the

ROM1SEL-

comparator,

by

in

this

the latch

by a

output

and

not

throughout

U29,

an

BCYCLECLK-

section).

reset

recognizes events

is

goes

COUNT-ENABLE

pa

bel

:

SOUT

>

which

ROMIPIN28DC-.

output

true.

choosesifthe

about the

care

the

comparator.

an

8-input

from ROM Module

module

line.

When

COMPAREQ-

(BCYCLECLK-

BCYCLECLK-

is

it

set,

stays

or rearm signal

received

at

[sYNCPULSE

uLsE,

state

NAND

are

all

the

(U29

set

occurring

U21 and

When

gate.

active.

pins

using

U21

at

of

is

a

at

9132A Service

In

some

is

(U13

the low

U13

true,

U13

allow

A

small (OVDRV-RESET) (REQRESET),

ABORT,

ABORT),

Main

Board

the

UUT. If the

(OVDRV-RESET)

EN-ABORT

the

Mainframe breakpoint)

CLKLATCH

reset)

up

The bank switch lines from U4

banks

two Podtoswitch

timing

problems.

Two

signals (FRCBANKB) FRCBANKB FRCBANKA

the Pod

to

of

one

the

but

force bank

Using problems the

PLZACCBNKA/-B

cycled.

The

AND/OR

enters

in

is

set

banks. When

the

counter

mode.

first clock and U27A bank

was

clock

cycle,

occurs.

BCYCLECLK- after the

swap.

the

two

the

modes

shown

eight

is

the

circuit

a

or by

of emulation RAM. The

the banks other bank

with the

allows

one

output) This

‘This

This

flip-flops

CLKLATCH

5

of

on

page

addresses from ROM

latched and the lower 4 bits of

Pod

to

composed

line

a

line

that

line from

schematics).

REQRESET

line

the

or

be used

can

is cleared

the

output

cleanly

called force bank

enter

are

output port

and

FRCBANKB

and,

consequently,

is

to

gate

two

mode,

is

type

and is then

neither bank

is

not,

availabletothe

when

swap

prevents

(U27)

the Main

receive

status

of U9

signal.

thatiswritten

comes

an

output

This

line

line forces

the circuit is

to

clock

latch

overdrive

to

either

port

between

the bank

the

forced,

available

switch

banks

UUT

processor.

is

line

(U19)

different

ways

the

has

swap

and

set

ROM

BCYCLECLK-

regardless

occurs

first bank

metastable

could

that

from U21B clocks the

output

Board

schematics).

Module1.When CLKLATCH

information from

The

from the

port circuit

from

the Podtooverdrive the

from

by

a

signal

and

banks of RAM without

switch

bits

are

not

forced bank

the ROM

to

used

that

to

true

swap

two accesses.

ready.

is

produce

UUT ROM

and

U28D

creates

this

to

inputs

on

the

RESET-

REARM.

ERAM

A

controlledbythe Pod

true,

available

is

to

the

initiate

BCYCLECLK-

select

available

Module

clocks

is

conditions

controlled

to

or Mainframe, U86

(UB6

allows three methods

the

Pod

goes

either the ABORT line from the

active,

U21B

(presetasa

UUT.

(from

U24 allow

nonsynchronous

To make

is

(At

of

swapped

the

bank

(FRCBANKA)

circuitatUl6.

both banks

the ROM

to

is available

Modules.

clean

a

switch

banks

select

swap

a

swap.

the

other

in

the

when

U27B

that

time,

the

to

is still

3

mode

which

that

caused

indeterminate

an

This

address latched into

the UUT.

the overdrive

circuit

are

by

and enable

is

shown of

the overdrive

high,

of the UUT.

reset

comparator

the

Mainframe

Pod

to

switch

circuitry

causing

and

(FRCBANKA

processor.)

of ERAM

Modules. the

to

and

can cause

swap

BCYCLECLK-

when

(SWAP-SELECT) When

clocks

that

mode,

Pod

goes

gets

U27B

when

Pod

processor.

available.)

of

U27A,

selected;

was

actually

the

by

output

latch

Ul3

latch

receives

goes

reset

request

the

processor,

abort

(EN-

of

5

the

page

of

overdriving

reset

for

or

power-

switch

between

allows the

metastable

bank

force

Pod

between

available

are

processor,

and

If

both

If

only

runtime

banks,

is

U27B

(the

RUNUUT

is

swapped

Whichever

On the

the

state.

line

swaps

sync

on

itisthe

bank

between

SWAP-SELECT

SC11

into

swapped

the actual

causes

delay

If

a

or

B

the

2-5

9132A

Service

Main

The

outputs (ROMBANKSEL) BANKBAVAIL,

is

available

and

Module,

RUNUUT These lines boot ROMs

RUNUUT

flip-flop.

2)

(pin

pin The

flip-flop

line

goes processor

allowaread

dynamically

occur,

for

bus

one

(because

sync

active,

goes

with the

mode the ROM lets the UUT

Emulation

Board

Main Board

The

shown

on

113,

J12,

ROM

each

into

plugged into

these

The emulation RAM

out.

The self board. Self

all

write, When

self

allowing end

of self

until

change

data

The

which

are

Pod

data

self

read).

test

One

of the

when

power

switch

K3)

Module.

and

30,

SLFTST-CNTL-32)

of

the

and

the Pod

to

which bank has

1,

and

2, 3,

control

chip

in the

located

the

and

sync

is

swapped

true. (In

be

to

not

a

the

from

switching

This

cycle.

this is

bus

one

ROM-TST-EN

Modules switch

processor

RAM

Emulation

3

of the

page

and J15

J14,

test

other

the

path

noninverting

bus

The

connectedtothe

Module

sockets. Each RAM Module

these

connectors

board

connector

is

test

address

latch

test

addresses

the

test,

the

self

when

self

on

pins

plugged

to

power

self

test

U27

flip-flops

available

bank

BANKBAVAIL-).

processor,

readable

4

are

separate

enable

(CE)

socket

ZIF

This

flip-flop

counter

output

when

the

hardware

some

timer

true

the

cycle

read

signal)

ROM

boot

ROM

the

switching occurs

time that

only

is clocked

bit

emulation

the

the data that

Connectors

RAM

Main

Board

the

sockets

are

bank

Modules

is

when A23 is

lines

to

go

(ST-LE)

to

straight

go

that

access.

test

self

test

data buffers.

test

output

ROM

Module

the self

appropriate

control lines

choose

enable,

are

attached

board

are

accessed

enable

addresses

the

into

the

ANDed

are

(BANKAAVAIL,

These

which bank

bits.

to

outputs

and

output

ROM

of the

is

RUNUUTREQ

set by

(SC11)

Pod is in

plugged

set.

modes,

The

Module

data

Pod

to

When

RAMs

is

RUNUUT

AND/OR

into

only

is

located

sync

and Self

connectors

schematic

the

which

(Figure

the

emulation RAM Modules.

for

Pod,

corresponding

a

and address

explained

by

a

high.

address

is

true,

the different self

to

latched remain stable

are

connector

Whatever

is

enable

(ST-OE)

24,

(pin

socket. Three

test

pin,

depending on

(SLFTST-CNTL-28,

of

the

for

five

lines select

available

is

Modules

ROM

enable

Modules.

the

clock

to

SC11

can

gates

the

UUT

in and

out

if

sync

Once

valid).

if the

clocked

the

and

out

in

UUT

the

Test

self

and

5-1).

has

two and data

further

on

ribbon cable

During

latches

U104, U23,

these latches

to

goes

the

on

is

true

28,

32) must

or

relays

activated.

relays

is

bank select

ROM

BANKAAVAIL-,

which

the

to

3,

1,

2,

the

for

(OE)

U21A

the data

to

input

and

mode

Pod

the

pins

the

be

forced

and

U4C

ROM Module

RUNUUT

of

is

set

SYNC

the

in

is

data

bus

cycle

ROM

in,

ROM.

test

circuitry are

RAM Module

banks.

The lines

lines in

in

section.

this

the self

to

self

test

and U76.

are

transparent,

test

pins.

and

U100

and

is

gated

(i.e.,

during

have

(K1,

the

of

type

SLFTST-CNTL-

and

is

(pin

by

U37D

to

occurs,

which

read

At the

do

U103, to

K2,

ROM

bank

ROM

UUT

the

input

SC11

the

mode

data line

sync

2-5.

For

and

test

not

the

any

+5V

and

4.

3).

to

is

or

2-6

9132A

Service

Main

Board

Emulation

The Main Main Board

The

emulation processor

bank

(BANKAAVAIL

muxes state the used

Two mux

12

some

and A12.

the

Two other U65 A12ENABLE- the

is

Two hold

latches allow

the Pod until latches latches. Once the BCYCLECLK- last address until

Main

Board

The Main Board Board schematic

Two data the latched

All received. The

ports

The

Board Emulation RAM control

Pod

processor

RAM

can

is

being

(U65,

of

BANKAAVAIL

Pod

processor

the emulation

by

of the bank

(as

opposedtotwo-to-one

and

emulation RAM

ROMs,

The

placement

and U74. Since

RAM

Module

not

driving

latches

time for

BCYCLECLK-.

holds

the

Input/Output

buffers

output

output ports.

output ports

Each

etc.).

the selected mode

cleared

are

ROMIPINXPOL

of the ROM Module1address

polarity

RAM

Control

schematic

on

and

read

used

and

U72, U69, U81,

or

available

suchasthe

positions

A11

of

called

lines,

and A11ENABLE- disable address

and

them.

and

(U68

address

The address

delayed clocking

the addressesonthe

ROM

transparent

the

5-1).

(Figure

switch

can

the

RAM

write

to

the ROM

by

BANKBAVAIL)

and

BANKBAVAIL,

the ROM

RAM.

muxes

address

2364,

of

RAM address

and

A12

on

AI2ENABLE-

some

hold

them

U93)

traces.

is

access.

Any

and

control of

Module(s).

bank

one

Modules.

U74, U71, U78,

Module

ICs

(U65

the

by

11

require

switch

ROM.

the

ROM

in

stable

a

the

delay

The

latched

at

of the

time the

the addresses

goes

Devices

device

U101)

buffer

data

be

as

power-up

from

is

circuitry

pass

outputs

bus

an

output

written eitheraword

reset

U85,

input/output

(Figure

(U102

data bus. The

the

on

clocking signal

the

of

ports

(selected

on

reset

a

outputs

5-1).

and

output

can

or

is

circuitry

read

of

select

1

others).

pin 12 and

and

types

ROM address

lines

the

address outputs

high,

the

drive

are

to

U54,

bus

shown

and

write

In

normal

emulation

and

A11ENABLE-,

condition

BCYCLECLK- is active

U68

latched when

port

as

and

RAM

The bank

the

mode of the

and

U80).

either the

address bus

U74)

perform a

Emulation

the

four-to-one

numbersofaddress lines

11

allow

use

only

lines

All

while ROM Module

lines,

latched

are

end of the

is

signals

cycle

RAM

with

DELAY

(i.e,

straight through

pass

U93 latch and

and

shown

on

from

data

the

inputs

select

(i.e.,

a pair or singly,

and

or byte

all the

outputs

that

write).

12

4

on

to

mode,

Depending

address lines from

(ROMADDR)

software

are

10

no penalty

of

page

either bank of

the

while the

other

available lines

different

on

four-to-one

RAM

address

because

mux

control

also

sent to

address

lines,

A12

and

from

allowing

more

active

by

an held. The

and

since

ROMADDR)

low,

hold the

Main

5

of the

page

data

all

of

the

clock

proper

depending on

Most

low.

go

control

allowed

bus

Pod’s

OUT4-,

of

to

the

to

the

of U86

are

Pod

OUT2-,

2-6.

Pod

All

2-7.

pass

the

are

the the

of

1

to

is

the

27

9132A Service

the

through earlier in

UB6

the

Arm Arm don’t Main REARM (RUNUUTREQ) signal the but is

The counter and

K3)

The

comparator

All Modules. active the

U43,

U84

(PODDATAQUT)

in

the

Pod data Mainframe.

Reset driven overdrive. pulse. Swap

swaps (FRCBANKA) PLZACCBNKA/-B

(PWRFAIL/PRSENT) (high). considers

ARAM-SEL-0 banks

to

dynamically channel UUT lines

arms

first

this

section).

controls

Pod

Mainframe

that

of

pins.

various

abort

to

(ARMSEL)

(ARMEN)

(ROMIDC-)

schematics

arms

latched.

(in

to

sent

sync

circuitry.

supply

power

on

page

is

bit

outputs

These

enable

and Z1

PODSTAT-

cable

to

(PODDATAQ

(RESETPOL)

low.

or Force

select

(either

the

If

power

the Pod

and

switch in

3

(OVDRVCH3)

(such

address

either from

the

control lines

to

lines

are

the

and

not

as a

RAMtoallow

select enable

care

Board

is

not

Pod

SLFTST-CNTL-28)

ROM1PINXDC-

the

chip

H1,

controls

Pod

polarity

high

of address

the

line of

Exclusive

of

types

COMPAREQ-

selects

enables

goes

to

the

CLKLATCH

the Pod

requests

enable

Sync

where

cases Mainframe).

Self

control

test

U57

on

the

ROM

to

lines

on

2

the

of

be

passed or

U59

of

(PIN29EN-,

tell

the

(CE)

or

output

used

for

debug

and

is

enable

an

the

Mainframe.

through

on

The

reset

(FRCSYNC)

sync

(SWAP-SELECT)

BCYCLECLK-

bank

requests

informs

is in

fail line

present.

ARAM-SEL-1

RAM.

ROM

and

allows

HOLD

OR

gates

Enable

outputs.

the

to

determine if

(SYNCEN)

a

(PSYNCCTL1-4)

Modules.

U75,

Main

ignored.

ROM

PODINT-

to

PODDATA7)

US5

request

the timed

the

test

out

the

line)

it

to

or

mode of

arming

entire

sync

the

address

comparator

ROMISEL-

circuitry.

into

to

go

controls

signal must

sync

(SLFTST-CNTL-32,

control the self

U67

and

,

Board

schematics

PIN29POL-,

Module

enable

(OE),

and

purposes

the

to

the

data

buffer that

on

controls whether

(REQRESET)

is

used

chooses the modetoclock

or

B

(FRCBANKB)

bank

Mainframe whether there

invalidortri-state

an

U56 select

on

enable

RUNUUT

Sync

during

capture

sync

the address

(ROM-TST-EN)

Moduletooverdrive

of

in

the

comparator

abort

(EN-ABORT)

from

the

counter

RUNUUT

the

be

U57

on

test

relays

US7

12

and

etc.)

which

pins

and

designate

not

are

normally

Mainframe.

drives

U22 is

the UUT line

internally

SCl1).

force bank

swap.

level,

of the four different

one

on

a

sync

counter

activity.

trace.

(explained

counter

page

output

(K1,

to

the

ABORT.

ROM

2

ignored.

request

internally

K2,

the

address

the ROM

polarity

allows

of the

line

if

ROM

Mainframe

sync circuitry.

on

istobe

RUNUUT

mode when

sync

generated

control the

SLFTST-CNTL-30,

go

determine

go

of

installed.

Pod

data

the

data

the

data

to

sent

line

reset

enables the

force the

to

the bank

Force bank

pulse.

swaps.

Power

present

is

a

power

the Mainframe

the

allows

Overdrive

of

one

ARAM-EN

latch,

sync

lines

:

reset

sync

this

and

are

out

fail

Pod

1

to

the

of

the

is

A

the

Fa

All

input

U98 sor (INPORTSEL-)

The (U45). determine Module

ROMA4SEL-, only.

ROM monitored

ROMIPRESENT-, SENT- PM-PRESENT- set shows

(CLK-FAIL) that is

a

poses

The DELAY ROM

MAINSTAT lines ROM fuse Sync

Pod data 0

The ROM plugged PRSNT-)

socket. BANKAAVAIL

ERAM bank

Main

Board Address

The Main

shown

The

divided

analyzer,”

16

bits

can access

The

the

to

the

signals

port

and

U46

are

lines.

data

inputs

ROMISEL-,

latch

detects

non-clock

here).

Module

and

from

PROMTYPEI,

the

type

designate

ROM3SEL-,

1

Module

U45

at

U12

indicate

on

indicates

(RESET-LAT)

the module

comes

activity

output

ROMADDR

addresses.

and ABORTonU48

the

from

sense

and ROM

chip to

These addresses

Mainframe.

through

ROMxPWRFAIL

Modules. Self

into

the

line

indicates that

swaps.

RAM

Board Address

6 of

on

page

RAMs

address

into banks of 2K

latch

to

time.

at

a

the

results

address

delayed

ARAM-DATA bus.

output

bit ARAM-EN

port

(IDO

through

data

buffers

These

a

the ROM

of

the size

an

determine if

ROM2PRESENT-,

has

from

on

(ROMxFUSESENSE)

7

on

self

and

the

a

Once the address

between

are

ports

read.

Modules

and 3

2,

ROM

Module.

of

the

ROM

and

ROM2SEL-

from ROM

output

and

selects

how

seen

the

from

Modules

U11

lines show whether

test

Main Board

(ARAM),

stream

using

(DELAY ROMADDR)

output

an

many

whether

is

an

output

reset

a

circuit

a

UUT clock

the

address

lines

on

return status

Sync

are

input

are

test (SFTST-)

socket. The

Sync

a

and

BANKBAVAIL monitor

Module

Sync

RAM and

U61

16.

x

of addresses from

either

byte-wide

When

at

U56),

ID15)

can

the

input

enabled

through

pass

signals

are

Headers contained

Module

enables

exists.

error

ROM3PRESENT-,

ROM

Modules

the

Personality

from

the

UUT

at

6

on

page

line.

comparator

Ul3

are

active

are

fuse

sense

indicate whether

good.

Pod data

power

indicates that

self

Module is

Interface

Sync

schematic

and

U62,

The ARAM

stream

or

the

address both

be

readbythe

ports

during

from

(ie.,

used

are

1,

indicating

are

Module is

the

Personality

microprocessor.

of

the Main

Compare equal

the

delayed

certain

during

versions of the handshake

high

(SYNCFUSESENSE)

from

the

has

test

sync

plugged

Module interface

(Figure

are

is

ROM Module1and

is

latched,

word-wide reads.

can

pass

RAM

U87

and

the

an

input

a

non-inverting

ROM

Module

24-,

28-,

for

self

active.

and ROM4PRE-

connected

Board schematics

(COMPAREQ-)

for

(used

versions of

accesses.

the

Mainframe.

failedonthe

ROM Module

a

present

into

the

progress

5-1).

8

8K

x

used

as

the Pod

through

is

armed

U97

are

Pod

9132A

processor.

microproces-

select

port

buffer

1

the

ROM

on

or

32-pin).

modes

test

that all of

ROMISEL-

the

to

present.

Module that

Clack fail

self

test

fusesonthe

indicated

(STSYNC-

the self

of

circuitry are

static RAMs

“mini

a

store

processor

U87

and

enabling

(by

turned

always

Service

that

the

Pod.

Re-

pur-

the

and

test

the

2-8.

logic

U97

is

it

9132A

Service

and

addresses

the

on,

bus.

When

ARAM data

the

and

U97

US0,

U39,

address

the These

counters

U63,

U82, lines

to

U50,

(U39,

setting

and

U49

where

see

completion),

from

pulse

Al12

to (when ROM). address

edge

one

clocks the

edge

write

The

various AND

by

enable (ARAM-CLK)

Address RAM read/write

The

Sync

and

UUT connector

other lines microprocessor-specific

another

is

U38 passed

the

U44

to the

sync

processor, the Pod

U31

and U44

accurately

The

non-latched

Overdrive

(OVDRV3LO)

U4D pin high

(DRV-RST-HI)

the

polarity

Pod

the

is

87

used when

are

U77

and

sent to

are

preloaded

and

U79

ARAM.

the

and

U77)

enable

ARAM

of

Ul4

are

address

the

and

SSO

the

sync

ARAM

the

is

Pod

the

When

clock

RAM

ARAM-CLK

of

data

signals

(ARAM-EN).

an

through

and

from

select

control the

pulses

Module

drives the

(J3).

Eight

are

microprocessor-specific status

the UUT

always

buffer

input

U38,

U31

latch.

These

pulse.

which

then

is self

testing,

to

appear

readbythe

linestothe

channel

are

line

and timed

13)

the

of

these

chips

on

processor

through

passed

the

4-bit

are

ARAM

the

are

addresses

The

from

or

(ARAM-EN).

of

a

pair

stopped

SS1

(two

counter.

is

controlled

in the

address

is

Pod

(ARAM-CLK)

increments

ARAM.

the

into

and

(WU-

OR

gates,

If

controls the

U32

(ARAM-SEL-)

output

is

basically a

signals

the lines

of

lines

microprocessor

for the

they

are

and U44 latch

latches

determines whattodo with the information.

the SYNC line

transparent,

Pod

processor.

3

high

controlled

and overdrive

signal

reset

go

accesses

U94

Pod is

physically

counters

the

when

and

to

zero

address

muxes. come

Pod

the

ports

input

ARAM-EN

if

sync

operating

WL-)

depending

state

by

RAM

received

is

and

the

enables.

buffer

the

50-pin

up

are

is

always

high speed timing

the

to

sent

the

then

can

which allows

Module

Sync

(OVDRV3HI)

the

overdrive

by

the

by

Personality

reset

to

sent

through

straight

the

ARAM,

and

U99

to

capturing

of

total

(for

a

is

Pod

capturing

until

count

up

These

from

either

processor

in

controls

can

the UUT

address, depending

monitor

that

address

counter

machine indicators),

ARAM-SEL-0

mode,

ie.,

address

the

from

address

counter,

enable

output

the

on

is

the

true,

write

pulses

the

monitors

that

cable

ribbon

data

(used

and

control

the

processor

reset.

lines.

Personality

condition of these

be

read

as an

be

set

high, forcing

all

connector

and

overdrive channel3low

channel

Module. The

low

(DRV-RST-LO)

reset

ARAM-EN

the

ROM

12

full.

ICs

the

RAM

the

generic

(OE-)

mode

address

and

chip

several lines

to

for data

Once the

Module

input

the latched linestobe

control

line.

the

to

ARAM

is

Pod

processor

addresses.

that

bits)

control

address

and

clock

ROM

the

address

stopped

and

ARAM-SEL-1

is

Pod

mode

PAL

and

the

are

of address

RAM clock

chip

any

enables,

the

Sync

capture).

lines.

(BCLOCK-);

connector

linesatthe

port

generate

addresses.

counter

the

accessing

controlled

One

lines

by

the

overdrives.

the

3

(OVDRVCH3 at

overdrive

lines control

Overdrive

data

and

off

bus.

address

counters

the

on

before

sync

and

(U32),

opposite

RAM

enables,

the

and

the

on

Module

The

of the

have

and

end

the Pod

When

lines

reset

(fo

an

of

to

2-10

9132A Service

(OVDRV-RESET)

(RESETPOL)

determine

The Personality

the lines

PMROMSEL), code executed. the ROM must

The other This Other control lines PAL

sync

UUT. either the reset

PSYNCCTLx for

(BCYCLECLK-).

set

Personality

The

bar

Moduleisinstalled. PM-PRESENT-

U20

FAIL)

time

receiveaclock

FAIL)

U4D

(880).

pulse

since

pulseisgenerated.

The

RAM

In

signal

(ARMSEL)

The

These

the

processor-specific

Module

Personality

0

through

is

uploaded

(The

Module is

be

word wide

device

PAL

uses

lines

decodes

(DATASYNC),

Another

the

act

of

timing

is

detected,

the

generic

the

same

Module).

last

line

(PM-PRESENT-).

and U30A make

signal.

active clock

an

signal.

monitors overdrive channel

U4D

is

generated.

the

Personality

generic

counter

the

first

is

input

SCNT-EN-

counters

processor.

gated

is

to

polarity

Module is connected

the data in

code

in

the clock

going

(PSYNCCTLx), these

signal

same

the

control

PAL in

This

the ROM Module

as

going

U20

edge

twrns

PAL

timing.

method,

to

are

true,

signal

were

When the SCNT-EN-

through

determine

the

of

reset

Personality

contains

two devices,

7.

When

the ROM is

Pod

at

power-on

is

executed

not

byte

only

to use.)

the

Personality

and

PAL

the

to

lines

and

outputs

a

timing signal

is

called

the data

as

address

pulses.

is

and

cleared

lines.

RESET-LAT

some

signal

the

to

Personality

This

circuit that

a

up

is

timer

a

is received from

edge

within five

off overdrive

This reduces the

Module

controls

(U32)

There

are

ARM

is used

the

PAL

the

PAL

enables

previously

when

seven

can

signal

and

USB and

the

signal.

Module

to

the

personality

to directly

wide,

Moduleisthe

channel reset

are

overdrive

four

sync

or

sync

RESET-LAT

REQRESET

by

modes.

be

set

1

is

is monitored

that

continuously

E

clocks,

3

(OVDRVCH3)

3

(OVDRV3)

amount

no

longer

all

the

methods of

two

as

arm

outputs

set

a

set

signal

USC

overdrive is

into

plugs

and

ROM

a

lines

address

ROM

the data

on

placed

the

main

from

and

Pod

processor

Personality

inputs

request

channel

One

signals.

that

shows data bus

clock

(SYNCCLK-),

be

set

can

latches

in

is

used

as an

The last

signal

the

as

same

select

(an

input

Module is called

grounded

generates

the

of to

the

U20

needs

sync

arm

enable

is

sync

counters

a

enabled,

whenever the

at

input

the

resets

UUT.Ifthe

generates

immediately

of

time

OVDRV3

counter

arming

for

the

(ARMEN)

count

specific

with

along

Pod RAM the ROM

from the

(REQRESET),

to

and

channel3is

reset

requested

connector

PAL.

a

1

through

is

3

signal

another timetoshow

clear

initialization

data

to

port

UUT

timing

the

PAL. When

enable

(U41,

valuebythe

the

J2.

The ROM

16

selected

bus.

All

where it

Module

instruction data

Module

Sync

(OVDRV3).

is

called data

accesses

line that

a

whenaUUT

true

mode

or by

is bus

cycle

oritcan

sync,

the

PALinthe

personality

Personality

U12

fail

clock

itself

to

zero

circuit

clock fail

a

machine

state

after the SYNC

overdriven,

the

once

the address

and

PAL.

and

arm

(SCNT-EN-).

U42,

SYNCCLK-

polarity

and

(using

Module.

the

at

or

present

6.

(CLK-

does

(CLK-

SYNC

the

and

also

The

data

ROM

since

PAL.

sync

The

the

can

arm

clock

each

zero

arm

select

U2).

Pod

signal

on

is

the

be

not

2-11

9132A Service

from

reaches its maximum SYNCCLK-

goes

inactive.

In

arms PAL

The

of (DATASYNC).

ARM- until data

the

signals

When

ARAM-CLK

CLK

SSO

signal

The

SYNC

OFF

IDL

WAIT

DONE

Main

Board

The Board

J1

connect accesses the card).

Module

Sync

The

The UUT andtodrive through a

the

Personality

after

On the

true.

the second

ARM-

U26A

the PAL.

is

armed,

signal

and

method,

the

U9D.

is issued

sync

ROM1

chip

are

present

ARMSEL

and

and ARAM-CLK-

SS1

and

on

of

state.

sync

state,

type

FRC-SYNC lineonthe

Table 2-1.

State

STATE

connects

same

$51

0 0

0

1

ROM

Module

Main

Board ROM Module connections

schematic

to

the Pod cable from the 9100

in

pairs

the

raw found

as

Module

Sync

Module

Sync

microprocessor

the

protection

Moduleisusedasthe

value,

SC11 is

set,

second

rising edge

the

RESET-LAT

this

For

method

events

same

to

If

data

immediately.

goes

select

before

on

ARAM-CLK-

the

the condition

Definitions for

occur

the

generic

Clock

latch

is

sync

This method eliminates

true.

and

the data

the

sync

PALisselected

the

backtotheir

toggle

PAL

are

PAL

is

DEFINITION

SS0

Disabled,

1

Enabled,

condition.

1

Enabled

0

Finished,

Connections

5-1).

(Figure

ROM

Modules

to

Pod

processor

the Mainframe

on

schematic

cable. The

is

basically

hybrid

(eight

diagram

a

data

inputs

(Al),

SC11 is

the

SYNC

to

work,

as

PAL

(U32)

(CLKLATCH)

already

If data

counter

toggle.

the

sync

SSO

of

used

the

Sync

ARMEN

waiting

and

SC11

1

address

is

buffer

lines,

from the UUT

buffer

a

counter

On

set.

signal

of

SYNCCLK-,

from

signal

ARMSEL

occurred

using

createdinthe

is

when

valid

is

not valid,

sync

clock,

sync

clock

begins counting.

BCCLK-

and

AC-11

When

original

state

signals.

and

SS1,

for self

test.

Machine

State

IS

FALSE.

for

first

armed,

waiting

while armed.

seen

shown

are

Series

4.

through

and

data

main

board

in

found

Figure

monitor several of

to

and

eight

(U2,

U3),

clock. When the first

PAL

the

on

the SYNC

the

Personality

be

must

ARM

the

ANDed

clock latch

ARM-

conditions between

race

and

guarantees

(pin

goes

Table

and

definitionofthe

a

SC11.

for

on

page

The

test connector

bus.

This

for

(i.e.,

5-3.

and

status

come through

resistor

a

circuit

is

values.

clocked armed

Mainframe. J4

the

counter

rising edge

(U32

signal

Module

low.

Once

signal.

made

with data

goes

is

delayed

that

10)

goes

ARAM-

high,

2-1

shows the

7

of

the

through

connector

the

test access

the

lines

control

J2,

(Z1, 72)

pack

goes

sync

high,

both

true,

2-9.

Main

(J16)

2-10.

to

lines)

pass

J11

of

15)

the

up

is

the

2-12

9132A Service

for

buffering,

line

is an

to

prevent

other line

AC These

of

the

DC

ground

the DC

fuse

overdrive line

two

and

C10)

short

time

too

the back-to-back

network of

high or

is

connected

small

CR7,

overdrive

turning

(24-,

and

28-,

with

and

out

on

inverting

in

leads

return

fuse

pulses

much

OR

capacitors

purposes.

and

high

connect to

Ul.

for the

(U3)

reinverted helps

Every “mostly”

resistor. none

One

2

ne.

Another reset

The

(FUSESENSE)

C9,

overdrive a cause protect

The overdrive driven either

exclusive shifting (either high

Overdrive lowisconnectedto-5V

The speed-up reverse voltage protection

CR6,

the

overdrive from

ROM

Modules

24-,

loaded ROM Module schematic

J3 and J4 ribbon cables 9132A Main Board

(A1)

ROM select enable

switching

and

out

buffer.

the Pod.

(the

high

on

28-,

parts

to

The double

width

pulse

the J2

on

ground.

and

32-pin

to

(ROMSEL-)

Each

AC

circuits

be

can

directly

exists

on

for channel

path

DC

return

hole

at

circuits

line.

The

used for AC

are

the

occur,

fuses alone

voltage drop).

capacitors.

circuits

(overdrive reset

low.

or

(U1A,

gates

diodes,

The transistors

low).

+12V

to

in

the overdrive

The diodes

CR14

compensate

protection

output

overdrive low

and

the

at

same

32-Pin

and

ROM Modules

that determine

diagram

the

the ROM

through

go

data linesonthe UUT

the

the Pod isinRUNUUT

When

UUT ROM

J1

the

Pod. The

to

The

distortion.

connector

AC

ensure

shorted

J2 called

path

E2.

Reset

ORed

are

large bypass

AC

capacitors

have about25ohms

The diodes

The

overdrive

U1B, UIC,

and

throughacurrent-limiting

for transistors

time.

that

signals

inversion

is

a ground

line

coupled

that,

when

another

to

2

fuse

ground

3

(J2

(FUSE1-GND)are

overdrive

togethertocreate

capacitors

coupling

limit the

and

highs

and

then

turn

are

through a

circuit

CR1,

CR2, CR3,

Q1,

the

for

voltage drop

circuit.

drive transistors

Assemblies)

the

use

the desired

5-5)

(Figure

buffer

the

ROM

the

to

assembly.

(U1)

microprocessor.

the

ribbon cables

Module header

a

from

occurs,

buffer

the

on

through

pass

reduces

propagation

line

contains

the

flying

lead.

(FUSE2-GND).

the

24),

Sync

available for

(OVDRV1)

across

when

overdriving.

voltage

resistance,

(CR10,

CR11, CR12,

overdrive channel

and

lows

U1D),

are

the

on

voltage

appropriate

all

current-limiting

C2,

(C1,

and

Q2,

Q3,

from

and

CR15

prevent

circuit

bare

same

ROM

component

for details.

J1

and J2

Pod.

The data lines

and

protection

a

PAL

Module

mode

PAL disables

control

buffer

delay

most

cases,

setisused,

This line

the

E3.

hole

(C7,

When short

volts for

zero

which

and

3)

can

to

a voltage-

transistor

(R11).

C4)

are

used

are Diodes level shift of

transistors

the

lines

and

bleed

UUT

sense

C8,

would

CR13)

set

(R10).

CRS,

status

this

in

or,

a

1-megobm

lead

Module overdrive

is

at

the fuse

the fuses

to

are

gatedbya

output

followers. Overdrive

resistor

and

C3,

CR4

Q4.

the

CR16 between

2-11.

but

board,

See

size.

to

connect

from

network

hybrid

controls

(U2)

when

ROM

dynamic

select,

and

or

are

for

the

the the

a

be

of

as

are the

the

2-13

9132A

Service

the select

enables where the ZIF

socket,

J1

lines

to

All

signals

ZIF

socket,

enable

or

The address lines

A2)

(Al

or

through a

9132A

the

ROM

The

is

ROM

is

active

Al

(protected

formsaROM select

enables active. This

ZIF

socket.

Other

inputs

RUNUUT

The and enable the

PWRFAIL,

The PWRFAIL lineonthe PALisderived called

RAWPWRFAIL.

ROM

plug

adapter).

12,

pin through resistor

is called

PWRFAIL.

ed

When

the fuse

PWRFAIL.

tied

is

to

ZIF

socket,

be

can

pulled

fuse

sense

Three

lines

ROMTYPE3). Module

and

the

table

ROM

Plug

Adapters

The ROM

The

various ROM

Module)

and

ROM

UUT

lines from the

data

J2.

and

from the

except

enable,

output

from the

buffer

and

a

back-terminating

Board.

Main

Module PAL

an

output

low.

high or

signals

the PAL

to

signal

ROM

disables

adapter (e.g.,

The

VCC

through a

goes the

protection hybrid

PROTPWRFAIL. This

sense

side of

(One

all

the

grounds

is

which

high,

line is

identical

J1

on

These lines either

are

the ROM

on

plug

adapter

the

adapt

end of

for

enable

the

From there

the

determine

enable

chip

is

plugged

UUT

22

pins

depending

UUT

(U3,

resistor,

(U2)

or

PAL

The

from the

output

determines

also

include

the

tells select

ROM Module

RAWPWRFAIL is connected

or

power

resistor

line

becomes

the fuse is tied

on

also tied

is

fuse

UUT

to

are

grounded

Module

schematic

plug

adapters

the

on

in.

When these

ROM

boot

24.

and

the

on

pass

U4, U5).

and then

determines

select,

chip

also

inputs

UUT

ROM).

makes

that

the

RUNUUT,

PALtodisable

to

outputs

by

24

of J3

to

the

on

divider

The

Al.

the

signal

active,

lines

the

+5V

to

throughapull-up

and

blown,

ground.)

ROM

type

connected

left

or

schematic for

diagrams

(connected

micro ribbon

in

These ROM

through one

the ZIF

to

open

24

22

and

two

socket

the

socket

are

pins

type

in

The

output

J3

out

whether

any

and

whether

PROTPIN22,

With these

all

the

for

outputs

PWRFAIL,

the

pins.

all

tri-stating

from

a signal

2

of J2onthe

UUT

enters consisting signal coming

signal

the

to

goes

it

performs

the

Pod

to the UUT and the

the fuse

sense

(ROMTYPEI, ROMTYPE2,

to

pull-up

the

on

the

decoding

shown

are

to

cables

of the pins are

connected

usually

the

of

of the

and

given the

chip

pins

ERAM

The

the

to

the ROM

RS

of

out

goes

PAL and

the

ground.

resistors

ROM

for

in

Figure

J1

and

the

to

ZIF

enabled

are

placed

directly

used

socket.

ZIF

protection

buffer

J4

to

polarity

28,

24,

signals,

enables

22 and 24

PFUSESENSE.

and

data buffer

power

outputs.

the UUT

from

VCC

24-pin

ModuleatJ2

and

R3,

the

of

through

out

same

The

ground resistor. If line

goes

in

plug adapter.

ROM

5-6.

J2 of

correct

socket

on

the data

on

to

for

hybrids

drives

then

Pod

the

on

the

of

29 from

and

the

and

output

of the

fail

through

ROM

and

protection

U3 and is

I3tothe

function

other

from the

this line

high.

the ROM

type.

2-12.

the ROM

pins

on

(J5),

chip

and

UUT

PAL

(U1)

line,

cable

plug

then

side

The

and

See

the

as

Self

Test

RAM

Module

Personality

24-,

28-,

from

the

appropriate

Assembly

The

Self

Test

The

latched

hybrids

(Al,

assemblies

Module

Sync the

ROM

and

are

passed

Emulation

or

The

RAM

The

RAM

emulation

has

RAM

communicate

ROM

Modules.

The

data

lines

U4),

or

so

sends

data

bank

passes terminating data bus ROM

data

Module

The

Personality

The

Personality

and

one

processor, used

for the delays,

thereby

allow

for

the

wired

to

Jumpers either

high

(OVDRVCH?3)

the

OVDRV-OUT

The

inputs Module, either

highorlow),

ROMISEL

The

outputs

or

32-pin

particular

lineonJ2

Assembly

address

and

A2,

J1

on

(a

Connector).

Modules

readable data

to

Module

schematic

Module

RAM

A,

a

separate

with

from

that

whichever

through

data

throughapair

resistor

through

goes

lines.

Module contains

Module is

PAL. ‘Some

have

extra

clock

avoiding timing

swapping

board for

W3 and

low

or

request.

signal

the

to

reset

request

(which

from

ROM

Modules.

ROM

Module

the

for

schematic

lines

from

and

A3)

ZIF

32-pin

The

received

are

RAM

contains

and U6

set

the

Pod

the banks

the

selected buffer

package

the

buffers

processor

Personality

inverters for

and

line,

between

27C256

a

W4

determine the

upon

'W3

is

processor

PAL include

(REQRESET),

the

sync

is

active

the

PAL

the

(i.e., 24-,

fail

power

diagram

the Pod

drive

socket),

lines

at

lines.

diagram

two

separate

is

emulation

of

address

processor

of RAM

bank is

of

and

(Z1),

on

no

others

skew

27C256

a

ROM).

the timed

is installed

the

control

bus

the

are

The

adapters

28-,

line.

detector

is

shown

processor

various

pins

J2

(a

are

sockets,

is shown

RAM

lines.

while

to

go

back

muxes

to

the

ROM

output

RAM

one

to

the

40-pin

in

the

(U7

ROM

Module

that

these

communicating

user-serviceable

dependent,

Modules,

such

the

of

some

usedonother

were

problems). Jumpers

27C512 ROM

a

or

for

polarity

of

receipt

overdrive

to

dependent.

seven

input

overdrive channel

lines

(PSYNCCTL1,

clock from the ROM

cycle

clock

sync

(which

also take

in

Figure

pass either

ZIF

from

the

through

pass

5-4.

(US

Each bank

allows

bank

of

pair

with the

Pod data

US),

Module data

and

5-2.

through

the

socket),

Sync

and

data buffers

lines.

through a

out to

or 32-pin)

on

Figure

chips

B.

This other

of

a

and

parts.

but

as

input

always

the

lines

one

has

inputs

(normally

channel

driving

the

overdrive channel

low.

channels from the

3

depends

9132A Service

the

power

it

run

protection

ROM Module

J4

or

Module

the

hybrids,

U6).

emulation

of

bank

one

is used

by

Pod

processor

The

bus.

the UUT

PROM

one

for the

inverter

(one

to

W1

and W2

W2

3

The

polarity

overdrive

(to

and

2,

3),

Modules).

the

on

the

to

2-13.

(the

2-14.

US

the

(U3

other

back-

This

2-15.

80286

match

(CH3)

Sync

and

sync

or

is

to

is

3

of

2-15

9132A Service

Sync

mode, is

always acknowledges data

sync

(PM-PRSNT-)

Adapters

The

Sync

UUT dependent.

i.e,

can data

or

Adapter

processor

be

sync), reset

a

processor

ROM

is

a

straight

and

either data

Module

board

connects

the

to

reset),

1

ground.

UUT

sync latch

and bus

select).

to

processor

address

or

is

(which

cycle

The

Personality

the cable from

socket.

sync),

latched

a

clock

the This board is

DATA-SYNC

output

(which

can

Module

present

Moduletothe

Sync

(which

that

be

either

line

2-16.

processor

2-16

®)

static

John

awareness

A

Fluke

Message

Mfg.

From

Co.,

Inc.

|

\I/

(EE

The

Static Sensitive

The

MINIMIZE HANDLING

1

{S.S.)

following

(17

devices

practices

are

shouid

identified

be

in

the

“@-

followed

Some

semiconductors

by

damaged

handling. minimize

Knowing

wm

Learning

Using

bench

Fluke

to

DISCHARGE

3. HANDLING DEVICES. USE A HIGH

TANCE

This

the

techniques

technical

minimize

electrostatic

notice

chances

that there the

guidelines

procedures,

manual

damage

PERSONAL

GROUNDING

of

and

custom

explains

destroying

is

a

problem. for

that

list with

parts

S.S.

to

WRIST

discharge

how

handling

and

packaging

recommended.

are

devices.

STATIC

STRAP.

IC's

you

such

them.

the

symbot

BEFORE

RESIS-

can

during

can

devices

and

be

2.

KEEP PARTSINORIGINAL

READY FOR USE.

UNTIL

"

CONTAINERS

4. HANDLE

S.S.

DEVICES

BY

THE BODY

Page

1

2

of

5.

6.

STATIC

USE

HANDLING

DO NOT

ANY

AND

SLIDE

SURFACE

>

SHIELDING

TRANSPORT

5.8.

CONTAINERS

DEVICES

OVER

FOR

WHEN REMOVING

HANDLE ONLY BY

AND

EDGES CONNECTOR

WORK STATION.

ON EDGE

STRIPS PROTECT

©

HANDLE

STATIC-FREE

ONLY

ANTI-STATIC

.

SUCKERS SHOULD

ONLY

GROUNDED

IRONS SHOULD

NEVER TOUCH

EXCEPT

INSTALLED

S.S.

DEVICES

WORK

PLUG-IN

ASSEMBLIES,

NON-CONDUCTIVE

OPEN EDGE

AT

STATIC-FREE

PLACING

SHORTING

CONNECTOR

BE

DEVICES.

SS

ONLY

STATION

TYPE BE

USED.

TiP

SOLDERING

USED.

HELPS

AT

SOLDER-

TO

A

7.

*

Page

Dow

AVOID

IN

WORK

PORTIONS

WITH

AND

Chemical

2

2 of

PLASTIC,

AREA

REPRINTED

PERMISSION

GENERAL

VINYL

FROM

DYNAMICS,

AND

STYROFOAM®

TEKTRONIX, INC.

POMONA

DIV.

A

sories

Telephone 800-526-4731

complete

is

line

of

static

available

JOHN

PARTS

9028

EVERETT,

JOO89D-07UU8604/SE EN

shielding

from

Fluke

or

FLUKE

DEPT.

EVERGREEN

WA

write

M/S

MFG.

98204

bags

Parts

to:

86

CO,

WAY

and

acces-

Department,

INC.

in

Litho

1

Rev.

MAR

USA.

86

9132A

Service

SERVICING

TO

SERVICE

SHOCK,

UNLESS

INTRODUCTION

This

section

tion

for Some be

performed

the

use

sembly

The built-in

microprocessor-specific (Table failure self

test

should

you

covered under Fluke,

described below.

continue

BE

YOU

provides

the

Pod and

of

these

procedures

by

of

the

9132A

instructions

Pod

3-1

in

this section contains

codes.)

or

error,

make

the

send

the Pod

to

“Troubleshooting

WARNING

DESCRIBED

PERFORMED

PERSONNEL.

DO

NOT

ARE

QUALIFIED

maintenance

includes

do

the

operator.

Service

in

found

this section.

self

test (described users

Whenever

the

whenever the Pod

of the

note

a

Warranty, or

to

a

If

plan

you

Maintenance

IN

THIS

SECTION

BY

ONLY

AVOID

TO

PERFORM

procedures

repair

precautions

not

require

Troubleshooting

Test

Kit,

manual)

list that

a

Mainframe

appears

message

if

you

Technical Service Center

Fluke

troubleshoot and

to

Procedures” furtheronin

ANY

DO

TO

access

may

in

Section2of

detects

displays

or

want

QUALIFIED

ELECTRICAL

SERVICING

SO.

and

to

require

explains

be

to symptoms.

to

IS

troubleshooting

disassembly

the instrument

procedures,

reference

Pod

most

various

the

a

message

defective

If

Pod

have the

the Pod

repair

this

section.

Section

3-1.

informa-

procedures.

and

which

the

or inoperative,

the Podisstill

for

can

require

the disas-

to

appropriate

malfunctions.

self

test

indicating

repaired

repair

yourself,

3

a

by

as

CAUTION

The Pod

semblies) parts.

flow

place soldering damage

and

module

use

Replacement

soldering technology. Attempting

surface-mounted

ironorother

PCA.

the

PCAs

numerous

of

these

conventional

components

(Printed

Circuit

surface-mounted

requires

parts

means

to

using

As-

a re-

re-

will

a

3-1

9132A

Service

WARRANTY AND

Troubleshooting

Fluke

Technical Service

this

manual

warranty,

Fluke Technical Service

Service

After

the

if

attempted troubleshooting

Pod

to requested, performed.

INSPECTING

A

If

receive

you

immediately

«

If

are responsible

you

nearest

«Check

Fluke will

immediately.

SHIPPING THE

the PodtoFluke

Ship (Air

Freight

packing

and

rigid

and

paper

MAINTENANCE

Cleaning

FACTORY SERVICE

for

send the

Centers.

warranty

Fluke

a

and

detailsofthe

Technical

free

cost

repair

Pod,

period,

estimate

Center.

along

Center.

if

during

(See

warranty.)

with

Section4contains

do

you

fails

Service Center for

will

SHIPMENT

an

upon

is

the Pod

to

want

Fluke Technical Service Center for

all

materialinthe

not

POD TO

from outside

or,

carton,

of

adequate

surround

delivery

original

for

arrival

damage

in

damaged

for

have

FLUKE

if

it

withatleast four inches

negotiations

shipping

be

responsible

FOR

prepaid

that

size.

any

container

REPAIR OR

by

North

is

not available,

If

you

PROCEDURES

the

not

reveal

to

be

of this

and

way,

damage

the

and

period

warranty the

If the Pod is

description

want to

provided

missing

fileaclaim with the carrier.

against

for

statement at

warranty

a

service

the

Pod

fault,

repairata

before

Pod,

thoroughly

items.

final

claims with the carrier.

repaired

quotation.

a

the enclosed

shortages

ADJUSTMENT 3-4.

a package delivery

America).

substitute

a

use

the

Ship

suitable container

use a

container,

of

shock-absorbing

3-2.

be

should

still

covered

the

of

symptoms

list of Fluke Technical

Pod

the

you may

reasonable

repair

any

by

done

front

the

under the

to

yourself, or

ship

cost.

work

3-3.

the

inspect

You

Fluke,

by

unless

serviceor“Best

Pod

you

in

wrap

contact

packing

notify

its

the Pod in

material.

Way”

original

that

3-5.

3-6.

the

Pod

the

list.

a

of

a

If

is

If

us

y

is

Do

not

use

oline

or cleaning. usedinthe

Do

not

use

PCA.

aromatic

other

They

instrument.

detergent

fuels)

may

CAUTION

hydrocarbons

chlorinated

or

damage

of

any

plastic

kind for

(such

as

solvents for

materials

cleaning

gas-

the

9132A Service

Changing

Clean

The deionized

the

If

the problem occur

the

UUT.

Before disconnect

1.

Use

2.

3.

4.

the

If

the problem occur

UUT.

Before

disconnect

1.

2.

3.

4.

and

the

Pod

and

water

Fuses

Mainframe

may

the

replacing

the

following

the fuse

the

Fuse

on

Mainframe

may

when the

replacing

the

module

andasoft

on

be

Sync

fuse

cable.

cap

the

be

ROM

fuse

cap

the

Pod

when

Locate the Module

the

Press

Pull

Replace

Locate the fuse holderonthe Module cable.

Press the

Pull

Replace

instrument

module

pcas may

brush.

the

that

the

three

holder

and

open

that

the

and

open

Module

Sync

displays

a

2

Sync

Module

ground

determine

fuse,

Module from

holders

on

steps

in;

cap

fuse

straight

fuse with

ROM

Module

displays

a

the ROM Module fuse has

Module

determine the incorrect

fuse,

from

Module

holder

fuse

cap

straight

in;

fuse with

INSTALLING THE PLUG-IN MODULES

Before

installingorchanging

the

following

the

panel

of

1.

Check

2.

Open side

counterclockwise,

(see

Figure

that

the

Pod:

steps

the

back

3-1).

to

gain

Mainframe

panel

the

access

of

and

cases

be

washed

with

clean

Dry

“2001”

failure

Module

fuse

(GND

the

incorrect

the

UUT

the side

of

the

both of

then,

rotate

out.

Separate

0.25A,

a new

“2001” failure

(GND)

ground

the

UUT

side

of the ROM

then,

rotate

out.

Separate

0.25A,

new

a

internal

or

the

to

OFF.

power

is

Pod

the

by

then

pulling

with

mild

a

with

air

dry

code

during

has

opened.

is

lead)

ground

and

replace

the

Sync

fuses.

it

counterclockwise.

the

cap

fast

250V

code

during

opened.

is

incorrectly

ground

and

replace

counterclockwise.

it

the

cap

250V fast

external

module

connectors

the thumbscrews

turning

the

panel

and

detergent

low

pressure.

the self

This

connection.

fuse

as

alcohol

problem connected

follows:

near

isopropyl

at

incorrectly

the

Module,

and fuse.

blow fuse.

the self

This

problem can

connected

connection.

the fuseasfollows:

Module,

near

fuse.

and

blow fuse.

modules

the

in

inside the back

from the

out

water,

test,

the

test,

the

Pod,

on

3-7.

Then

Sync

3-8.

to

Then

ROM

each case

the

can

the

3-9.

use

or

to

3-3

9132A Service

Installing

the

To

configure

Module

procedure

1.

Carefully side of the

PERSONALITY

Figure

Personality

the

be

must

for

installing

plug

Figure

3-1.

installed

main

MODULE

Opening

Module

Pod

the

printed

3-2.

for

a

in

the

Personality

circuit

installing

Back Panel of

the

particular

the

Pod. The

Module in

assembly

the

Personality

processor,

Module:

the Pod

following

the

(pca) as

Module

the

connector

shown

FASTENERS

correct

steps

on

in

describe

the

Figure

3-10.

Personality

left-hand

3-2.

the

SE

Installing

2.

Push snap.

“Configured

the

Sync

The

following

into

the

1.

Plug

the back twist

2.

After secure

of

ROM

the

The

following

Module(s)

1.

Plug pea

ROM Module must two

“ROM1”for

number

1

ROMA

[

1

ROM3

[

1

ROM2

[~

7

ROM1

down

it

Module

Pod:

the

or

plugging

the

the Pod.

Module(s)

into

the

(as

be

ROM

the

fasteners

on

into

place.

for”

slot

describe

steps

Module

Sync

of the main

kink

the

Sync

in

the

cables

by

describe

steps

Pod:

the

ROM

Module(s)

shown

in

Figure

cables. If

into

plugged

Modules,

ROM Module number

2.

on

The

processor

in

the

back

the

cable

(as

pca

Module

Sync

tightening

the

into

3-3),

you

the

sockets marked

the modules

the

panel.

procedure

into

the

shown

cable.

the

cable

procedure

the

making sure

using one

are

back

type

for

connector

in

Figure

(and

one

numbered

must

1

and

¥

\

!

of the

Personality

should

installing

labeled

3-3),

or

more

tie

located

for

installing

connectors

to

not

ROM

Module,

1.”

“ROM

be

plugged

“ROM2”for

a

Module

show

through

the

Sync

“SYNC”

making sure

ROM

the back

on

the

on

twist

or that module

If

you

into the sockets

ROM Module

1

CABLE

9132A

3-11.

Module

near

not

Modules),

panel

3-12.

ROM

main

the

kink the

are using

TIE

Service

to

the

to

I

SYNC

le

REAR PANEL

"ol

3-3.

Figure

Connectionofthe

External Modules

Pod

Interface

the

to

9132A

Service

To

prevent

each

of

them into

insert

the numbered

of

back

of

confusion

ROM

the

the UUT

after

Modules

ROM

the

labels

connector

NOTE

the

back

should

Module

{provided

plug.

the

of

numbered

be

connectors.

the

with

Pod

Pod)

is

Stick

closed, as

you one

on

the

Installing

2.

After the Pod.

RAM

the

each

For number

operates

the

Plug

(as

pea install

one

have been connectors.

all

in

the RAM

cables

tightening

by

in

plugging

Module(s)

Module

ROM

Modules

RAM

of

correctlyifmore

RAM

Module(s)

in

shown

RAM

installed,

If

four

connectors.

RAM

Figure

Module

install RAM

ROM Modules

MODULE

ROM

the

that has

must

RAM

into

3-4).

in

SOCKETS

Module(s)

cable

the

also

Modules

the

If

only

“RAM

the

Modules into

tie

installed

been

be

installed.

than

connectors

one

1”

been

have

BANS

RAMS

RAD

RAM

(and

located

ROM

on

Module

ROM

connector.

the

installed,

the

Sync

back

the

on

in

the

Pod,anequivalent

convenience,

(For

Modules

the

right

has

If

two

1”

“RAM

install

Module), secure

panel

of the

3-13.

Pod

the

installed.)

are

main

of the

side

installed,

been

Modules

ROM

“RAM 2”

and

Modules

RAM

REAR PANEL

3-4.

Figure

3-6

Connecting

the

RAM

Modules

the

Closing

After the Sync panel.

CONNECTING

Before connect

1.

2.

Pod

installing

back

Module

Tighten

THE

performing

the

Check

Connect location collar,

Case

panel

Pod

that the

cables

the

POD

the

shown

or

to

back

the

changing

the

into

Pod

inserted

are

thumbscrews

TO

Pod Self Test

a

the

Mainframe

Pods

THE

MAINFRAME

Mainframe

round

in

Figure

by

is

1

internal

case.

properly

pressing

or follows:

as

OFF.

shielded

3-5.

or

using

Secure

external

Make

into

them

the Pod

cable

the

modules

sure

the

and

in

to

the

to

connector

the

ROM

slot

on

turning

troubleshoot

Mainframe

using

in

the

Module

the

top

clockwise.

the

9132A

Pod,

3-14.

of

3-15.

UUT,

a

at

sliding

push

and

the

Service

USING

POD SELF TEST

3-5.

Figure

The built-in Pod self of the Pod’s

further isolate

failure code

test

circuit block.

A

68020, performing self

when

Connectionofthe

circuitry

the

standard

etc.)

the Test

be

can

test

be

failing.

may

of the failure. Perform

cause

shown in

(as

NOTE

test.

be

Pod

Module installed

Module is

Personality

must

Personality

Interface

used

Table

self test

Pod

as

guide

a The 9132A

3-2)

(such

in

does

installed.

the

to

the

isolate the

to

as

the

Pod

not function

Mainframe

determine

Service

self

the

80386,

test

before

which section

Test

can

and

use

probable

3-16.

the

failing

then

self

3-7

9132A

Service

To

1.

the built-in

perform

Make

sure

that the Mainframe keypad.

ROM

If the Module cables from the from the ROM Module

You

must

Module

indicate

may

If the

Sync

from the

the self

Open

Insert the

(as

pea

the

to

reset leadtothe Module Reset UUT

during

The

Sync

Adapter

Insert the ROM Module1cable

self

(ZIF)

a.

Open position.

b.

Insert the socket.

Module,

using

inserted into

1

for a

is

plug

Module cable determine an error

self

that the Podisconnected

power

Modules

sockets

for

self test

the

remove

an error

Moduleisconnected

UUT.

socket drawer

test

Sync

Adapter

in

shown

Figure

line

test connector

line

ground

self

otherwise

test,

Module

assembly (Fluke

socket

test

Self

(as

cable

the ZIF socket

pins

If

you

insert

the

40-pin

socket.

Ensure that

24-pin, 28-pin,

indicatedonthe

is

plug

ROM

if

a

message.

the

test

on

is ON.

are UUT’s ROM

sockets.

connected

Pod,

use

the

properly

Press RESET

to

a

sockets.

NOTE

UUT

the

UUT

if

cable

3-6).

test connector

line

flying

to

on

assembly

Connect

an error

from

work

properly. Self

ROMs

and the UUT Reset

to

the

lead

are

UUT,

a

right-hand

the

on

must

will

not

disconnect

into

UUT

the

occur.)

ROMs

boot

NOTE

the

requires

part

in

by

ROM Module cable

plug

Module,

ZIF

use

number

761684).

into

plug

3-6):

Figure

the

moving

the

24-pin, 28-pin, or 32-pin

the

into

insert the

1

ROM Module

of the

the

for

socket

of

are

1

Test

shown

cable

ROM

of

the

using

the

NOTE

and

32-pin

inserted

Moduleisconnected and

ROM Module cable

32-pin

socket.

ZIF

incorrectly, self test cannot

following

steps:

the

Mainframe

to

the

on

release

UUT,

the

Remove

the ROM

test

removed.

the

Sync

Pod.

of the

side

the

socketonthe

line

Reset

ground

self

test

be

of

latch

32-pin

If

pca.

disconnected from the

the

Sync

the

Zero-Insertion

levertothe

into the

plug

socket.

cable

plug

corresponding

the

cable

ROM

displays

Mainframe

the ROM

ROMs

UUT

Module

self

flying

line

flying

(The

vertical

If

you

into the

plug

size.

and

test

lead

Sync

Force

ZIF

ROM

are

40-

is

3-8

3-6.

Figure

7.

8.

9.

Table the Pod Self Test to

Connecting

Secure

¢.

latch

the Pod

Begin obtain the

When the Pod indicating message

an

explanation

Remove the

Repeat Pod.

3-1

contains

the

of failure

type

of the functional indicated.

SYNC

the

ROM Module cable

the

lever.

self

display

passes

the Pod

indicating

of the

ROM

6

through

steps

a

fails. The

tests

ADAPTER

ROM

and

Press

test.

“MAIN:

the

is

functioning

the

Pod

failure codes.

Module from

8

of failure codes

list

numbers

described

should

CABLE ASSEMBLY

ROM MODULE PLUG

Modules

Sync

pluginplace

the

Main

test,

correctly.

has failed

the

Seif

all

the

displayed

table. Table

the

used

to

POD”. Press

the

ROM

displayed

troubleshoot

SELFTEST

self

for

in

be

to

Menu

Mainframe

If

the

self

Socket.

Test

Modules

by

the

key

the

test,

by

3-1

Self

Test

by

pushing

the Mainframe

on

ENTER

the

displays a

Mainframe

see

connected

Mainframe

the

Mainframe

describes

also

the Pod

9132A Service

PCA

down

key.

displays

Table

correspond

in

the

message

3-1

the

to

when

which

areas

for

to

a

9132A

Service

FAILURE

CODE

1001

1002

1003

1004 1005

1006

1007

to

1028

1029

1030 1031 1032 1033 1034

1035

1036 Cannot

1037 Bad

1038 1039 1040

1041

1042 1043 1044 1045 1046 1047 1048 1049 1050

1051

1052 1053 1054 1055 1056 1057 1058 1059 1060

1061

1062 1063 1064

ROM

RAM

Cannot

Comparator

on

Comparator

on

ROM

ARAM

RAM

RAM RAM

RAM

ROM

inputs

Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync

Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync Sync

Table 3-1.

DESCRIPTION

Module power

Module

in

not

fault.

sense

fault.

the

arm

comparator.

would

1

not

22.

24.

fault.

Module-forceAand Module-forceAfauit. Module

forceBfault.

-

Module

-

swap

Module

-

swap

Module

address

d

address

set

Module

Module Module Module

Module Module

Medule Module Module Module Module Module Module Module Module Module Module Module Module Module Module Module Module Module Module Module Module

ROM

ine

comparator output

don’t

to

care.

line

data

fine

data

line

data

line

data

line

data

line

data

line

data

fine

data

chan.

sync

chan.1tied

sync

chan.

sync

chan.

sync

chan. 4

sync

chan. 5 tied

sync

chan.

sync

chan. 7

sync

fine 0

data

line

data

line

data

line

data

line

fine

data

line

data

line

data

chan.

sync

chan.

sync

chan,

sync

Pod

selftest

fire from clock

from clock

fire

fault.

A

fault.

B

fault,

data

or

plug

fied

0

1

tied

2

tied tied

3 4 tied 5 tied

tied

6

7

tied

0

2

3

6 tied

tied

1

tied

2

tied 3 tied 4 tied 5

tied 6 tied 7

tied

0

1

2

socket.

B

fault.

low. low.

low.

tied

tied tied tied

tied

high. high. high. high. high. high. high.

high. tied tied tied

Self

path

size.

low.

with

low. low.

low. low. low. low.

low.

high. high. high.

Test

fault.

Fallure

Codes

1

(2,

3,

1

(2,

Test

1

(2,

Ckt.

Test

1

(2,

3,

Test

Module Test

TEST

4)

3,

4)

3,

4)

Test

4)

Test

FUNCTIONAL

ROM

Module

RAM

Emulation

Comparator

ROM

Module1Test

RAM

Address

RAM

Emulation Bank

Swap

ROM

Module

alt

Comparator

Personality

Module Test

Sync

3-10

FAILURE

CODE

1065 1066 1067 1068 1069 1070

1071

1072

1073

1074

1075

1076

1077

1078

2001

2002 2003

2004

2005 Pod 2008 Pod

2009 Pod

Table

3-1.

Pod Self

DESCRIPTION

Module

Sync

Module

Sync

Module

Sync

Module

Sync

Module

Sync

Module

Sync

Microprocessor reset detector

Bad

address

Module.

Bad

data

Module.

Reset

overdrive

jow.

drive

Reset

overdrive failed

drive

high.

Channel

Sync

it

when

should

Channel

Sync

when

on

Bad

Personality

ROM

or Sync

If

socket.

blown

fuse

Unexpected

No

powerfail

Pod

does

ABORT

reports responds

fault

setting

fails SYNC

sync sync sync sync sync

data

sync

clock from

sync

3

have

3 overdrive failed

it

should

Module

in

self

test

in

ROM

powertail.

when

not

report

is

asserted.

ABORT

unexpectedly

mask.

chan.

chan. chan. chan.

chan.

and/or

clock

in

failed

in

overdrive

been

have.

Module

not

socket,

or

Sync

expected.

ABORT

unexpectedly.

test/select.

3 tied 4 tied

5 6 7

from

attempting

ROM.

in

Test

high. high.

tied

high.

tied

high.

tied

high.

lines

sync

fault.

Personality

Personaiity

attempting

turned

off.

self check

Module.

when

on

to turn

test

for

Failure

tied.

to

Codes

Personality

Sync

ROM

Sync

ROM

Mainframe Port

State

Personality Mainframe

(cont)

FUNCTIONAL

Module

Module Test

Module

Machine Test

Module

Test

1

(2,

3,

1

(2,

3,

Test

Module Test

Test

Port

9132A

TEST

4)

Service

Test

TROUBLESHOOTING

Troubleshooting

microprocessor-based

You should

diagrams outlined

in Section

in

the

PROCEDURES 3-17.

the Pod

the

use

following paragraphs.

and

UUT,

TheoryofOperation

5

to

augment

is

requires

10

similar

the

troubleshooting

the

equipment

in

Section

troubleshooting procedures

any

in

Table

listed

2

and the schematic

that

other

3-2.

are

3-11

9132A Service

EQUIPMENT

Mainframe

Interface Pod

Extender

Power

Supply

Test

Personality

ROM,

Test

ROM,

Service

Test

*

of

Part

the

Preparation

Beginbyconnecting following

1.

Table 3-2.

Board,

28-pin*

24-pin

Disk

9132A Service

for

the Modules

Required

TYPE

9100A-7651

the

(for

§132A)

*

Module

*

Test

Troubleshooting

The 9132A

the equal, partially

Set

and the monitor. with the Pod UUT

power

Place back counterclockwise. reaches the drawer board shield of the

Remove the main board the main

to

Sync

Adapter

installed,

numberofinstalled

the

extra

tested.

describe this

steps

9100A

the

up

the Mainframe

to

the 9132A panel

case.

PCA.

Test

REQUIRED

Fluke 9100A

Monitor

Software Version

At

Fluke

Fluke P/N 755637

Fluke

Power

Fluke

Fluke P/N 857482

Fluke

Fluke P/N

Fluke

Kit,

be

tested

cable,

and

RAM

the

(or

Connect

be

to

the

of

Slide

release the

to

Equipment

least

9000A-68000

9100

supply

P/N

the Pod

NOTE

must

oneormore

one or

RAM

or

test

procedure:

9105A)

the

cable

and the

tested

Pod

out

stop,

press

shield

TYPE

(or 9105A)

Video

(and

3

megabytes

Series or

with

822973

818187

873943

859744.

have

more

and

ROM

equipment

Mainframe,

9000A-68000

in

the

monitor.

the

so

by

turning

the

downonthe

safety

by

for

Pod

Troubleshooting

Digital

Controller)

4.1

above

or

of RAM

Fluke 9000 Series

or

+5V,

and +12V

-5V,

the

Module

Sync

Emulation

ROM

Modules.

ROM

Modules

Module

can

the

to

and

Pod

Pod’s self

panel

rear

the

thumbscrews

board.

main

and

detent,

unsnapping

Test

System

only

9132A

connect

cable

test

is

accessible.

When center pull

the shield

with:

Mainframe

regulated

with

RAM

If

is

not

be

being

the

to

socket.

the main

back of the

main board

the

outputs

tested.

logic

the

Mainframe

Tum

Open

each

on

standoffs

3-18.

probe

on

board

The

the

side

main

free

from

3-12

9132A

Service

$100

MAINFRAME

Running

4,

5.

the Pod

Open sideways completely).

Remove the Personality

6.

Make

sure

Module(s).

7.

SERIES

8.

9.

onto

The Service

the

Plug

board

main

bey extender

socket.

Connect the 9132A

down the

Tape

9132A

the

Before

running

Mainframe hard

the

userdisk

(see

Once the Mainframe name.

monitor on

ENTER/YES, automatically runs

test

keypad.

Press ENTER/YES.

screen.

Mainframe

the

self

test

allow

to

Module.

Extender

Figure

enough

regular Personality

ROMs

no

Board into

shown

(as

and

board,

B000A-68000

3-7.

Connecting

Pod

interlock

power

Service Test

the 9132A

disk

Series

9100

the

softwareisloaded

Test

or

Enter

program

select

To

select

the

9132A

keypad

the number

Sync

drawer

are

plugged

in

Figure

the

plug

cable

to

Service

(or

Technical

as

(showninFigure

menu

of the

any

to

highlight

Module

(if

necessary,

cable

length

Module,

into

the

test

connector

3-7).

UUT

cable

TEST ADAPTER CARD

the Test

the

power

switch

on

Test,

you

EDISK),

User’s

the

onto

the UUT

tests,

of the

Test).

for

and

the

Install the

from

Equipment

supply.

the 9132A

must

set

or

Manual

system,

name

either

use

the

test

to

test

the

slide

the

drawer

it with

replace

ZIF socket

up

3-8)

be

on

the

on

rear

test

jumper

the 68000 Pod into

POWER

{or

UUT

9132A

board.

main

the

load

the

floppy

for

details).

EXEC

press

and

TST

as

is

displayed

the

or

up

be

to

run

(i.e.,

run

main

to

the Test

the ROM

of the Pod

(J4)

SUPPLY

9010

9100)

or

software

test

disk

on

the

program

down

and

pressing

board

open

the

3-19.

the

as

the

on arrows

press

“4”

on

3-13

9132A

Service

Figure

The

tests

prompt

you

for

or

the Mainframe

on

most

Test

program

paragraphs

that

tests

Board Full

test.

Full

Bus

Test Kemel ROM Kernel RAM Emulation Personality State Machine

Module

Sync Bank

Swap Address ROM

Module

RUN

UUT Address Clock

Fail

Cal

Test

Mainframe

ROM

Module

operator

likely

Comparator

RAM

Point

necessary, failureisfound. To

ENTER/YES.

press

Wheneverafailure is message

failure

that has occurred

failure

can

Service

found.

The

following

functional

1.

Main

The Main functional Main Board

+»

0

4

es

eo

4

0

6

+

4

0

©

3-8.

for informationonthe

return

located,

should

associated

are

Functional

The

function

Service

steps.

and

be

describe

following

display.

found.

test:

Test

The Service Test

the

to

the Service Test

the

be

run

each

with

Test

functional

RAM

Module

Circuit

Port

and

4

3,

2,

Program

main

menu

The

error

general area

the failure has

Once

to

again

of the

part

them:

test

sub-functional

Menu

Pod

configuration

stops

after the

and

stops

indicates the

message

in

which the

other failure

if

see

any

Service Test and the

selection

menu

tests

whenever the

has

test

shows

cause

been

corrected,

runs

are

during

run

whenever

first

stopped,

an

error

type

the

of

the

can

sub-

full

the

of

be

3-14

2.

RAM

Module#1Test

The RAM The RAM position

3.

ROM Module

The ROM Module number

4.

5. Sub

‘When

menu

1.

WN

Module

Sync

The

Sync

Module

main

9132A

Functional Test

The sub-functional Service

the sub-functional

selections

Bus Test

Kernel ROM

RAM Tests

Personality

State

Machine

RNR

Sync

Bank

Module Test

Swap

Comparator

©

ROM Module

RUN UUT CKT Test

Ow

Address RAM Test

Mainframe

Clock Fail Circuit

mY

Cal

Test Point

#1

Module

Moduletobe tested

1.

number

#1

Test

#1

Module

be

tested

to

1.

Test

Module

test

be

tested

to

board.

to

displayed:

are

test

be

run

test

Test

/

Module

Test

Ckt

Test

Tests

/

Port Test

checks

test

is

checks

test

is

plugged

checks

is

plugged

menu

independently.

is

selected

separate

plugged

separate

into the

a

separate

into the

allows

from

emulation RAM Modules.

into the 9132A main board

ROM

9132A

Sync

each

the main

Modules. The ROM

main

Module. The

Sync

Module

individual

board

menu,

in

socketonthe

subtest

the

Service

9132A

position

Sync

the

of

following

in

Service

9132A

DISASSEMBLY

Removing

When

following

1.

Kernel

2

Address RAM

3

Emulation RAM

4.

Emulation

5

Emulation RAM

6.

Emulation RAM

When the the

following

ROM

L

2.

ROM

3.

ROM Mod

4.

ROM

Main

the

Use

1.

Check

2.

Open side reaches shieldtorelease

Remove (opposite

Remove from PCA

Remove the back the

Remove the

Remove Phillips

the

sub-functional

RAM

Test

RAM

sub-functional

ROM

Module

1

Mod

Tests

2

Mod

Tests

3

Tests

Mod4Tests

PCA

following

steps

that

power

the back

counterclockwise.

the

stop.

the

flat self

the

rear panel).

RAM

any

the Main

the

to

panel).

Personality

of the module.

PCA.

Main

the shield

standoffs

press-fit

the

three

from

screw

menu

(ROM

gain

to

the

to

panel

Press down

the

safety

Modules,

PCA

from

Phillips

the

number

test

selections

Mod

number

test

Test

menu

access

is OFF.

Pod

of the

Pull

detent,

test

(to

gain access

Module

Pull

the

from

away

front

of

3

displayed:

are

1)

2)

3)

4)

9

(ROM

selections

9132A Main PCA:

the

to

Pod

by

turning

the

panel

the

on

and

pull

cable from

ROM

Module

by

pulling

Personality

of

the Main PCA

top

the board.

screws near

the

Main

is

(RAM Tests)

Module

displayed:

are

the

from

out

back of the main PCA

center

the

panel

selected,

is

Tests)

thumbscrewsoneach

case

free of

until

the

case.

the front of the Main PCA

and the Pod cable

cables,

to

PCA.

the

screws

up

Module

the

on

back

from its

the fasteners

by

panel

the Main

holding

connector

carefully pulling

and

the

selected,

3-20.

3-21.

panel

the

on

the

one

on

3-16

Removing

8.

Remove

the

Main PCA from

from

two

near

Test

following

that

the

reaches

drawer

the flat

near

away

Module

following

that

to

the

the module

position.

Module

Sync

following

that

to

the

top

the four

the

middle).

PCA

steps

power

to

self

test

its

and

continue

self

the

three

the self

the

Self

from

the

PCA

steps

ROM

the

moduleisOFF.

of the

comers

the

top

steps

the

Sync

the module is

of

corners

grommet

of the

away

and

the Self

Use the

1.

Check

2.

Open

drawer the

case.

3.

Remove

4.

Remove (two connector).

5.

Remove

board

ROM

the

Use the

1.

Check

power

2.

Turn the bottom of from unit.

3.

Tum

upward

4.

Carefully pull

the

Use the

1.

Check

power

2.

Tum the bottom of the module from the unit,

3.

Remove the pull

the

standoffs

press-fit

gain

to

the

drawer stop,

test

screws holding

test

Test PCA

two

gain

to

access

OFF.

Pod is

the

on

push

upward

pulling

cable from

cable

connector

from

press-fit

access

to

right-hand

on

standoffs

to

Moduleisdisconnected

the module

over

of the

case.

and

place

case

Pull

up,

away

PCA

access

Module

OFF.

case.

holding away

to

is

disconnected from the

up,

Pull

the

from

to

case

gain

the

by

panel

carefully

(two

near

the 9132A

the

the drawer

on

the

drawer

connector

the

Self

side of

the metal

Self

Test

and

one near

(near

until it

on

by

the

the ROM Module

from

and

the bottom

the

from the

the

and

the

RESET line

Sync

remove

handle

Module PCA:

Sync

remove

bottom

Module PCA.

the

away

of the

ROM Module

away

from the

pulling

the front

Test

PCA:

the Pod. Once

tab

the bottom of

on

is free

the

Self

Test

PCA

to

the

Sync

carefully ZIF

socket).

PCA:

the UUT and that

four

Phillips screws

from

the

socketinits

ZIF

UUT

the

four

Phillips screws

the

from

case.

9132A Service

the

board

of the PCA

3-22.

the

of

the Pod

PCA.

the

drawer

Module

pulling

3-23.

of the

rest

PCA.

3-24.

and

that

of

rest

Carefully

the

3-17/18

9132A Service

ASSEMBLY

9132A

Final

Main

Al

PCA

A2

Self

Test

A3

Module

Sync

Ad

RAM

ROM

Module

AS

ROM Module

A6

ROM

NAME

Assembly

......

PCA

Module PCA

Final

Assembly

PCA

Plug

Adapters...

.

........

List

TABLE OF CONTENTS

DRAWING

NO.

9132A-T&B

...

9132A-4001

9132A-4006 9132A-4002

9132A-4007

9132A-24,

91324-4003

-28,-32

9132A-4005-24,

of

Replaceable

NO.

42

-32

-28,

4-1

4-3 4-4

45 46 47

4-8

TABLE

PAGE

45

410 413

4-14 4-16 4-18

420

4-22

Section

Parts

FIGURE

NO.

PAGE

41

46

4-12

42

4-3

4.13

4-4

4-15

4-5

4-17

4-6 4-19

4-7

4.21

4-8

4.23

4

4-1/4-2

9132A Service

INTRODUCTION

This Interface electrical Each

The

parts

*

Reference

¢

Description

*

Fluke Stock

*

Federal

+

Total

HOW

TO

OBTAIN

Components

from

or representative ordered has will

be

necessary.

To

ensure

following

*

+

«Description

*

+

Parts Inc. Parts

section

provides

Pod.

Components

and

mechanical

lists

part

is

shown

contain

listed

Designator

Number

Supply

Quantity

PARTS

be

may

the

John

by

using

been

accompanied

prompt

information:

Quantity

Fluke Stock

Reference

Printed

Instrument

price

or

Catalog,

Number

Designation

Circuit

Model Number

informationisavailable

its

representative.

which is available

illustrated

an

are

components

in

an

accompanying

the

following

Code for

Manufacturers

of

Components

ordered

Fluke

Manufacturing

the Fluke Stock Number.Inthe

by

replaced

by an

explanatory

and efficient

Assembly

Prices

parts

listed

alphanumerically

listed

are

illustration.

information:

(MFRS

Assembly

per

from

Part

from

are

request.

note

Number

also

the manufacturer's

of

the John

foundinthe Fiuke

directly

a new or improved

handling

(PCA)

and Serial

on

for

list

the 9132A

by

assembly.

reference

by

SPLY

CODE)

(TOT

QTY)

Co.,

Inc,

and

installation instructions if

order,

your

and

Fluke

or

the

part,

please

Revision

Manufacturing

an

event

Letter

4-1,

Memory

Both

designation.

4-2.

number,

part

authorized

the

replacement

include

Replacement

part

the

Co.,

An

asteriskinthe

device

a

static

discharge.

or

CAUTION

“S”

component

(static)

subject

column

to

indicates

damage by

43

9132A Service

MANUAL

STATUS

Table 4-9 the letter

ADDITIONAL

This and

NEWER

INSTRUMENTS

Changes

incrementing

These which,

INFORMATION

defines

configuration

the

on

component

INFORMATION

section

also

S.

U.

list

of

a

and

the revision letter

changes

when

applicable,

the

revision

of the

PCAs used

side

contains

and international

improvements

documented

are

is inserted

levels

documented

in

of each PCA.

a

your

list of

Manufacturer's

Technical

made

the instrument

to

markedonthe affected

on

a supplemental changeferrata

the front of the

at

in

instrument,

Service

this

Federal

Centers.

manual.

refertothe

Supply

identified

are

PCA

To

identify

revision

assembly.

4-3.

4-4,

Codes

4-5.

by

sheet

4-4

“A>

2

TE

IEEEEITTTITSSTTT

REFERENCE

DESIGNATOR

TRG

-NUMERICSwwm=>

§——mm

*

MAIN

PCA

*

a

PCA

SELFTEST

*

SYNC

MODULE

FUSE,

.25X1.25,0,254,250V,

CAP

EXT

NUT,

RIVET,

PUSH,

FASTENER,

MACH,

SCREW,

FASTENER,

RECEPTACLE,

SCREW,

MACH,

WASHER,

SPRING,

MACH,

SCREW,

SCREW, MACH,

MACH,

SCREW,

MAIN

BRACKET, CONNECTOR

RING,

RETAINER,

BOTTOM

PANEL,

TOP COVER

BRACKET,

SELFTEST

FRONT

PANEL, FOOT, VINYL,

CARD

GUIDE,

CABLE

ACCESSORY, CLAMP,

PHB TOP

COVER,

LABEL, VINYL,

CABLE

TIE,

CASE

TOP,

CRSE

BOTTOM,

SYNC

DECAL,

HOOK,W/0,025

CLIP, CLIP, PINCER,W/.025

BAG,

STATIC

HLDR

PART, FUSE,

BAG,

STATIC

BAG,

STATIC

CARD

GUIDE,

POD CABLE

WIRE

ASSY,

MAIN TO

SELFTEST

SYNC

MODULE CABLE ASSY

FLYING LEAD

SYNC ADAPTER CABLE ASSY

*

An

column

in

‘8’

Table

4-1.

(see

DESCRIPTION=mrrmme-

STL,

NYL,

KNOB,

P, STL,

$TL, STL, P, STL,

STI,

P,S8,

PWB

EXT,

PWB

PUSH

6.50X0.076,2

MODULE,

CAP,

GROUND

CABLE ASSY

FAST

6-32X.109

,16,,24

TURN,

1/4

6-32X0, 250

TURN,

1/4

6~32X0,312

.153, .312,

6-32X1.375

6-32X0.

250

4-40,

.

SUPPORT

PLASTIC

FLAT,

DOOR,

SUPPORT

RIVET,

ADHESIVE,

CODE

PAD TRANSFER

INTERFACE,BLACK

INTERFACE, 6X10

5X20MM

3XS

3.30, ,09,2

250

0,787X0.236

LW,

UNIV,

STUD,

PH,

P,

PH,

FH,

P,

PH,

PANEL

ASSY/SELFTEST

NYL.

NYLON,

.3,1.5,BAR

2"X1“CABLE

SYNC

ROM AND SYNC MODULE

MODULE

DISSIPATIVE,

SHIELDING,12"X16"

POLYCARB,

ASSY

EARTH

SET

indicatesastatic-sensitive

9132A

Figure 4-1.)

PLASTIC

.040

PAINTED

SNAP

NYLON

BLK

SNAP

Final

Assembly

FLUKE

STOCK

wnNO—m

768828

795252

749721

109314 152819

838409 838334 152140 838359 152157 543405

114926 114470 558791 788760 794180 838342 785600

792846 825588

749739 801001

326009

838300

804898

844712

620708

853379

788602

844139

757500

845409

453522

461020

658666

680983

838367

847009

858167

775239

785584 7177078

761684

part.

MFRS

SPLY

-CODE~

89536 89536 89536 71400 78189 06915 72794 73734 12734 73734 86928

COMMERCIAL

89536 89536 T2794 89536 89536 89536 89536 06915 23880 06915 89536 89536 59730 89536 89536

89536 05276

845276

89536 61935 89536 89536 06915 89536 89536 89536 89536 89536 89536

MANUFACTURERS

PART

NUMBER

~OR

GENERIC TYPE~em—-

788828

7985252

749721

AGC1~4

511-061800-00

SR-4060B

444-065-010SE

19042

004-912-010

19043

5808-87-25

788760 794180

004-000~C10

785600

792846

825588

749739

FF-008-P4X7 1650F MWSSEB-1-01A 804898

844712

FCC-2

855379 788802 844139

4521-0

5360-0

453522

031.1663

658666 680983

TCG1-3,300-23

847009

858167

775239

185584

777078

761684

9132A

TOT

QTY-

be

GONNA

NNN

ANP

RNREE

ERR

RERE

EEE

PP

NSH

ENR

FOR

EHP

Bb

Service

N

8

T

~

E-

45

9132A

Service

=

Figure

4-1. 9132A

E

3

Final

Assembly

9132A

(10f

T&B

4)

46

9132A Service

Figure

4-1.

9132A Final

Assembly

(cont.

+

DETAIL

9132A

T8B

of

(2

4)

4.7

9132A

Service

| |

Ly

i

£

g

tg

3

9132A

I

g

T&B

(3of4)

|

!

&

«

7

4-1.

Figure

48

9132A Final

Assembly

{cont.)

|

f

im ire

Service

9132A

MP16

Figure

4-1.

9132A

Final

POSITION

Assembly

STRIPE

1

T&B

9132A

of

4}

(4

(cont.)

49

Service

9132A

Table

REFERENCE

DESIGNATOR STOCK

ERICS~

¢

1-113,117-

c 122 747287 ¢

114-118

CR

1-3

1

3

2

J J

3-11

J

12-15

a

16 11

J

K

1-

MP1

¢

1-3

R

1

R

2-7,

35-37

R25,

R

26-

8,

R38

R

9+

11, 13,

R12, R34

1

s

1

2k

T™®

2-6

u

2, 39, 41,

[I

u

42,

U3,

Uo

83

u

4,

vu

5

U

6

U9,

Uo

24,

¢

37,

U

11, 12, 45, 47

u

uv o13

u

14, 46, 48,*IC,

U

49,

Uo

103

u

s8

15,

0

18

16,

u

17,

Uo

70

64,

uo20

U

21, 27,

uo

22

U

23,

31,

ues,

104

u

U

66

26,

u

96

28,

29

u

uo

32

u

51

36,

uv

38

U

Sd=

5:

U7,

uo

86

vu

62

61,

©

63, 79,

uo

74

65,

uv

89;

Tl;

y

78, 80,

uo

97

87,

u

95

88,

uv

83

uo

90

CAP, CER,

CAP,

TA,

*

DIODE,

HEADER,

SOCKET,

HEADER,

HEADER,2ROW,

CONN,

8

7,

14-

29,

30

31-

17

25

35,

60

30

44,

BY,

B4-

82

72, 81

an

HEADER,2ROW,

RELAY, ARMATURE,

LABEL, BAR-CODE,

*

TRANSISTOR, SI,PNP,SMALL

«

CERM,

RES,

*

RES,CERM,

*

RES,CERM,39,+-5%, ,125W,

*

RES,CERM, 470,

*

RES,CERM,100,+-5%,.125%,2009PM,

»

SWITCH,

JUMPER,

TERM,

UNINSUL,

«©

IC, LSTTL,

*

IC,CMOS,4

+

»

*

IC,CMOS,QUAD

*

1C,CMOS,

*

IC,CMOS,QUAD

*

IC,CMOS,QUAD

¥

*

IC,ALSTTL,

*

CMOS,

IC,

CMOS,

*

.

*

IC,CMOS,

*»

CMOS,

IC,

*

IC,CMOS,QUAD

»

IC, LSPTL,

*

CMOS,

IC,

*

IC,

ALSTTL,

*

IC,CMOS,OCTAL

*

IC,CMOS,QUAD

*

IC,CMOS,QUAD

*

IC,CMOS,B

+

PROGRAMMED PAL

*

IC,CMOS,DUAL

*

CMOS,OCTAL

IC,

*

CMOS,

IC,

*

IC,CMOS,BK

*

IC,CMOS,QUAD

*

CMOS,

IC,

*

IC,CMOS,QUAD

*

CMOS;

IC,

*

CMOS,

IC,

*

PROGRAMMED

*

PROGRAMMED

78"

in

3

50, 40, 73,*IC,CMOS,3-8

10, 19, 33, 52,

98,100-

34, 53,

76, 93,

75,

0.1UF,

10UF,+~20%,

$I,BV=70.0V,

2

ROW,

.100CTR,

2

PWB,

ROW,

2

ROW,

,050CTR,

DIN41612,

,100CTR,

+~5%,

47K,

4.7K,

+~5%,.1254,

PB, SPDT, WIRE, NONINSUL,

WIRE

HEX

SCHMT-TRIG

BIT

LINE

2

HEX

INVERTER,

2

OCTAL

QCTAL

OCTAL

HEX

INVERTER,

2

QUAD

2

8BIT

DUAL

D

OCTAL

2

INPUT

4

OCTAL

X

8

2-1

DUAL

4-1

2-1 LINE

OCTL

LINE

32KX8

PROM,

column

RIPTIO!

+~10%, 25V,X7R,

25V 772491

DUAL,

I0=50MA,

PIN 603662

26

50

.050CTR,

50

.0SOCTR,

60

TYPE

96 PIN

R,

50

1

FORM

C,SVDC

0.245X1.25

CPI,

9.4

SIGNAL,

200PPM,

1250,

.

+-5%, .125W, 200PPM,

200PPM,1206

2000PM,

LEVER

MOM,

200CTR 816090

0,

TEST

FORM,

INVERTER,

UP/DOWN

CNTR,

DCDR

W/ENABLE,SCIC

AND

GATE,

INPUT

SOIC

OR

GATE,

INPUT

NAND

INPUT

GATE,SOIC

BUFFER/LINE

D

+EDG

TRG,

F/F,

BUFFER/LINE

D

BUFFER/LINE

D

STATIC

indicates

DRVR,

SOIC

NOR

INPUT

GATE,

XCR

INPUT

GATE,

S~IN,P-OUT R-SHFT,

+EDG

TRG,

F/F,

D

F/F,+EDG

TRANSPARNT

NAND

INPUT

OR

INPUT

GATE,

NAND

SOIC

GATE,

AND

INPUT

GATE,

DRVR,

TRG,

F/F,+EDG

STATIC

RAM,

7ONSEC,

LINE

MUX,

SOIC 837971

MUX,

LINE

SOIC 837963 SOIC 837989

MUX,

SOIC

DRVR,

RAM,

150NS,SOIC

LO BYTE

BYTE

HI

a

Al Main

4-2,

(See

Figure

1206 747287

SOT23 742320

POS

SOT23

1206 746685

1206 740522

1206 740506 1206

POINT 781237

SOIC 742437

SOIC

SOIC 838227

SOIC

DRVR,

SOIC 838110

SOIC 799577

SOIC

SOIC 838193

SOIC

SOIC 742106

SOIC 837922

SOIC 799569

TRG,

LATCH,

SOIC 830760

GATE,

SQIC

SOIC 838383

SOIC

SOIC 601027

static-sensitive

4-2.)

Ad

851345 838565 844741 747808 182201

811059 807099

742023

740522 746255 746255

745297 746297 851381

845128 845128 837948 837948

838417 830276 838185 838185 838185

838110

838128 938128 838128 838219

838391 838391

830760 830760 838177

838268 857495 838250

B53671

838029 838029 838029

837989 742593 653333 857487 857482

FLUKE

PCA

part,

~CODE=~

007179

9R216

59124 59124

$9124

B2536

0D2A6

MFRS

SPLY

~OR

51406

GRM42-6XTR1I04K25VPB

56289

195D106X0025X2T 25403 00779 00779

00779 00779

532523-1

06779

2~102973-5

61529

DSIE-M-DCSV

807039

BCA1TTRL

13445

RM738-2BJ4738

RM73B-28-J4701KB

RM73B-2B-J39R00B

RM73B2BJ4718

91637 59124

RM73B2BJ101B

60850

v4T8-19771

91984

isoTl

27918

TP102-01 01295

SN74LS14DR

54590

CD74ACI

74HCT138DT

18324

CD74ACOBM

54590

CD74ACO4M

54590

CD74AC32M

54590

CD74ACOOM

54590

01295

SN74ALS541DWR

SNT74HCT3I74DWR

01295 18324

T4HCTS41DT

CD74RCTO4M

54590

CD74ACO2M

54590

CD74ACTBEM

54590

18324

NN74LS164DT

CD74RCT4M

54590 01295

SN74ALS374DWR

MC7T4HCT373DWIRT

04713

CD74ACTOOM

54590 54590

CDT4ACTI2M

01295

SN74AS30DR

857435

01295

SN74A521DR

54530

CD74AC240M

18324

74HC273DT

MSM5165FP-70L

CD74ACL57M

54590 54590

CD74ACT153M

54590

CD74ACTL5

01285

SN74BCT244DWR

12581

HM62256FP-15T 88536

857487

83536

857482

MANUFACTURERS

PART NUMBER

GENERIC

91M

TM

TYPE~=ww-

TOT

QTY-

N

0

T

~I

E-

aa

omEee

s&

wen

©

one

we

Gr

oN

Smee

bo

wN

an

aN

4-10

ATR

REFERENCE

DESIGNATOR

“A> u u

u

Xu

~NUMERICS=

92

99

94, 32

90

89,

mrad

An

§rmmmmmm——ommre

OSCILLATOR,

*

IC,NMOS,16

*

1C,CMO0S8,0CTAL

SOCKET, IC, SOCKET, IC,

*

in ‘S’

column

mw

BMHZ,

BIT

24 28 PIN

DESCRI

TTL

MICROPROCESSOR,

BUS

indicates

Table

4-2.

=m =

PT

LON

CLOCK

TRANSCEIVER,

a

Al Main

mmm

PLCC

SOIC

static-sensitive

PCA

FLUKE

STOCK

we

584169 742429 742577 812198 448217

NO

{(cont.}

part.

MFRS

SPLY

~CODE-

91637 18324 01295 14329 91506

MANUFACTURERS

PART NUMBER

~OR

GENERIC TYPE~

X0~-438

SCN6BOOOCBAGBT

SN74HCT245DR

802~0241-812

328-AG39D

9132A

TOT

QTY-

Nee

Service

mao

-I

4-11

9132A

Service

Hout

Figure

4-2.A1Maln

CEE

LE

FI

Soho.

PCA

¥

N

Bk

RYT

el

9132A-1601

4-12

9132A

Service

REFERENCE

DESIGNATOR

A

J J J

J

Mp 1

Me 2

Te

1

=

2

3

4

1,

RICS—mmm>

2

A2

Table

4-3.

(See

Figure 4-3.)

£8’

ASSY,

IC, IC,

2

ROW,

2

ROW,

SELFTEST

BAR-CODE,

WIRE,

column

2

i

80286

ZERO

.100CTR,

NONINSUL,

33

3

DESCRIPT.

INSERTION, INSERTION,

.100CTR,50

ZIF

9.4

indicates

Al

POD,

CPI,

FINAL TEST 803106

32 PIN 40 PIN

34 PIN

SOCKET

0,245X1.25

200CTR

0,

a

static-sensitive

J3

AZ

i

HYBRID

SOCKET,

HEADER,

DECAL,

LABEL, JUMPER,

*

An

in

PCA

Self Test

FLUKE MFRS

STOCK

==NQ~~

831156 53036 B45404 782201 00779 643841 00779 855403 89536 807099 9R216 807099 816090

part.

i

2

MANUFACTURERS

SPLY

«CODE~

~OR GENERIC TYPE-w——m

BO31L06

89536

232~-6411-50-3347

53036

240-6407-50-3347 2-102973-5 5227-139-8

835403

1SOTL

91984

50

“49

A3

RESET

En

PART NUMBER

TOT T

oTY~

3

3.

3,

3

1

2

N

0

~E-

fe

SC

4-3. A2

Figure

I

Self Test

PCA

GND

™=™

9132A-1606

4-13

9132A Service

REFERENCE

DESIGNATOR

18-3

1 HYBRID

a

c

1-4

c

5,

6

¢

17,18,

38

c c

7-12

c 20

&

=

3

1

J

2

J

2

J

MP 2

3

MP

POO

aww

~

15

14,

*

-

RB

~

-

NexECCOEREPRRIB

NOTE1=

B/N’s

34-pin connector

CAP,

CAP, CER,

13- 21-

CA?, TA,

18,

DIODE,

+x

DIODE, $1, BV=70.0V,

FUSE,

HEADER,

HEADER,2ROW,

HLDR

LABEL, BAR-CODE, TRANSISTOR, TRANSISTOR, SI,PNPF,

xe

RES, RES,

w

RES, RES, RES,

kek

RES, RES,

‘TERM,

IC,

«wow

1C, IC,

OVERDRIVE CABLE

HLDR

RES

in

500447 and 757443

80286

ASSY,

+-10%,

1000PF,

CER,

+~108,

0.1UF,

10UF, +-20%,

BV=75V,

SI,

.25X1.25,0.254,

ROW,

2

.050CTR,

.100CTR, .100CTR,

PART,FUSE,CAP,1/4X1~1/4

9.4

NEN,

SI,

CERM,

+~5%,

1.8K,

CERM,

+-1%, ,125W,

1.30K,

CERM,

+~5%, 1#, 2009PM,

27,

CERM,

+~5%, IW, 2000PM,

18,

CERM,

+-5%,.125W, 2009EM,

10K,

CERM,

100, +-5%,.125%, 2008FM,

100K,

CERM,

+-5%,

WIRE

UNINSUL,

2

INPUT

QUAD

CMOS,

OCTL

LINE

CMOS,

OCTAL

CMOS,

BUFFER/LINE

BODY,

PART,FUSE,

NET,DIP,16

PIN,8

NET,DIP,16

PIN,15

column

’$’

indicatesastatlc-sensitive

are

(J2).

Table 4-4.

RIPTIO

POD,

50V,

25V,X7R,

25V

10=250MA,

J0=50MA,

250V,

50

RT

CPI,0.245X1,25

SMALL

,125W,

.125W, 200PPM,

FORM,

XOR

DRVR,

ASSY

PWB MT

RES,33,+-2% RES,

mounted

{See

FINAL TEST

COG,

1206

50723

DUAL,

FAST

PIN ANG,20 ANG,14

SIGNAL, SIGNAL,

2002PM,

100PPM,

2512 2512

POINT

TEST

GATE,

SOIC

DRVR,

1M,

Figure

1206

SOIC

+-2%

to

S0T23

PIN PIN

SOT23 SOT23

SOIC

Sync

1206

1206 1206

1206

each other

4-4.)

Module

~=NO-—

803106 747378 747287 747287 747287 772491 772481 830489 830489 742320 742320 109314 838565 500447 757443 460238 807099 742031 742023 746453 780999 853791 853783 746610 146297 740548 781237 838391 838011 853676 847012 602763 852152 844779

FLUKE

STOCK

part.

to

PCA

—-CODE~

89536 51406

51406

56289

25403

71400 00779 00779

©0779

61935

9R216

13445 73445 59124 91637 56637 56637 58124 59124 59124 27918 54530 54590 54590 89536 61935 81637 91637

form

MANUFACTURERS

MFRS

PART NUMBER

SPLY

~OR GENERIC

803106

GRM42~6COGLO2K50VPB

GRMA2~6XTR104K25VPB

195D0106X0025X2T

BAS16é

BAVSD

AGC1-4

104068-5

1-87230~0

87230-7

031.1666

807099 BCX19TRL BCX17TRL

RM73B2BJ182B

CRCW-1206-132F MC2512-270HM~5%T MC2512-1BOHM-5%T

RM73B-2B-J1002KB

RM73B2BJ101B

RM73B-2B~J1003KB

TP102-01

CD74ACTB6M

CDT4ACT244M

CD74ACT240M

847012 FAUO31,3573

SOMC-1603-3306

SOMC~1603~105G

one

TYPE-----

BO2

TOT

FT

N

0

r

=

E-

1

4

24

ERE

NS

TO

RR

Rh

RR

FRR

9132A

Service

—ml

+

@

2

=

;

Fi

l

1

]

CRT]

IH

YEH

i

~-10

@|¥

cis

fe

TY

ea)

3

2

1

N

a

Fe

CRE]

Be

50

21

22

o

8

#7

RiS

oh

C9

+

C10

C14

[UY

ue

tl

Je

aL

£35

C33

23

Cal

C29

£13

v3

2

-

Figure

4-4.

9132A-1602

Module PCA

A3

Sync

4-15

9132A

Service

REFERENCE

DESIGNATOR

WO

®

aR

mooE

Ad RAM

Table 4-5.

(See

Figure

CBmmmu>

I

AB

=

ee

WA

dO

CAPR,

SOCKET, LABEL,

x

IC,CMOS,QUAD

1C,CMOS,QUAD

-

IC,CMOS,OCTAL

axon

on

IC,CMOS,8K

@

IC,

RES

*

An

in

DESCRIPT

CER,

0.10F,+~10%,25V,X7R,

2

ROW, PWB,

BARCODE,

2

BUS

8

X

QUAD

CMOS,

2-1

NET,DIP,16

*5’ column

indicates

.050CTR,

9.4

CPI,

INPUT INPUT

TRANSCEIVER,

STAT

LINE

PIN,8

RT

0.245X1.25

OR

GATE,

AND

GATE,

RAM,25NS,0.3

SCIC

MUX,

100,+-2%

RES,

a

static-sensitive

1206

60708

ANG,

SOIC

SOIC SOIC

PCA

Module

4-5.)

®

MFRS

SPLY

“~OR

~CODE~

GRM42-6X7TRID4R2EVER

51406

©0779

1039113

807093

9R216 $4590

CD74AC32M CD74AC08M

54590

0129%

SN74HCT245DR

6Y440

MTSCH408C~25

CD74ACL5TM

54590 91637

SOMC-1603-101G

MANUFACTURERS

PART NUMBER

GENERIC

TYPEw-m~-

FLUKE

STOCK

~~

NO

741287 844783 807099 838276 838227 742577

WIDE

845235 837871

838086

TOT

QTY~

rR

°

8

T

Ee

Q

EE

PoNNP

part.

4-16

©

o *

Service

9132A

~N

2

>

mss]

Ow

IO

L__A___J

Figure

4-5.

£0]

Dr

~

M

-i

D

3

>

RAM

A4

vd

>

Ct

Module

~

[SO]

0

>

©

>

9132A-1607

PCA

4-17

9132A

Service

Table 4-6.

ROM

Module

Final

4-6.)

Assembly

(See

Figure

REFERENCE

DESIGNATOR

RRR

ESWR

NNR

FLUKE

ASSY SET

STOCK

nN

758359 824326 825604 747923 558731 855408 855411

855416

188794

788802 844142 844147 844154 853796 776351 785568 785592 846337

SET

part.

ROM

MODULE PCA

eN

GA

ROM PLUG

*

An

SCREW,

DECAL,

CASE

TOP,

CASE

DECAL,

CABLE

MODULE CABLE

ROM

PLUG,24POSITION,

ROM

PLUG,

ROM

PLUG,32POSITION,

in ’S’

RIPTIO

24

ADAPTER,

28

ADAPTER,

32

ADAPTER,

MACH,

$8,

P,

4-40,

PH,

24 POSITION

28 POSITION 32

BOTTOM,

9132A~024

ACC,CLIP,1.38,GREY

column

ZIF

ZIf

POSITION

2IF

ROM MODULE

AND SYNC MODULE

ROM

ROM MODULE

ROM

9132A-028

ROM

9132A-032

ASSY SET

28

POSITION,

indicatesastatic-sensitive

POS,ASSY

ASSY

POS,

POS,ASSY

.250

SOCKET

MODULE

CABLE ASSY SET

CABLE

CABLE ASSY

MANUFACTURERS

MFRS

SPLY

-OR

-CODE-

89536 758359 83536 824326 89536 825604

747923

89536

COMMERCIAL

89536 855408 89536 855411

B9536 855416

89536 788794

788802

89536 89536 844142

844147

89336 89536 844154

8D528 LPO612

89536 776351

785568

89536

785592

89536

846337

89536

NUMBER TOT

PART

GENERIC

TYPE

QTY=

mao=

hp

he

bd

df

de

te

Rb

~~

4-18

9132A

Service

Figure

4-6. ROM

Module

Final

Assembly

9132A-24 9132A-28 9132A-32

4-19

9132A

Service

A5

ROM

Table 4-7.

{See

REFERENCE FLUKE

DESIGNATOR

NUMERICE

ER

A

i,

¢

1, 8,

c

2-

CR3,4

12

*

J

1, 3,

J

5

J

%

Mp

MP 2

R

i,

R

6

rR

3

5

R

8-

T°

1,

uv

1

2

u

3-

X&

1 HLDR

2

Xi

2

6,

2

4

2,

7

29

2

5

Srmmsimr

oS

10

8

4,*RES,

momen)

HYBRID

TA,

CAP, CAP, CER, 0,01UF, +~20%, 100V,

*

DIODE, SI,BV=70.0V,I0=50MA, FUSE,

.25X1.25,0,25A,

HEADER,2ROW,

SOCKET, IC,

HLOR

PART, FUSE,CAP,1/4X1-1/4

LABEL, BAR-CODE,

CERM,

*

CERM,

RES,

*

RES,CERM,

*

CERM,

RES,

TERM,

UNINSUL,

*

IC,CMOS,OCTL

*

PROGRAMMED

*

IC,CMCS,O0CTL

PART, FUSE,

SOCKET,

*

An

in ‘8’

DESCRIPTION-mmowm

80286

ASSY, 10UF, +~20%,

IC,

POD,

25V 772491 56289

X7R,

FAST

250V,

40 PIN

.050CTR,

50

.0S0CTR,

1K,

1.30K,

100,

column

4.7K,

ZERC

+~1%,

LINE

PAL,

LINE

20

32

INSERTION,

9.4

CPI,

0.245X1,25

+-5%, .125W,

200PPM,

100PPM,

.125W,

+-1%, ,125W, 100PPM,

+-5%, .125W,

200PPY,

WIRE

FORM,

TEST POINT

DRVR,

SOIC 938003

ROM

MODULE

DRVR,

SOIC

PWB MT

BODY,

indicatesastatic-sensitive

DUAL,

Module

4=7,}

Figure

weNQww

mmm

1206

SOT23 742320 25403

1206 740522 59124

1206

1206 780939

1206 746297

PCA

STOCK

«CODE

89536

803106

742981 72982

108314 71400

©0779

838573

00779

838565

53036

B31156

450238 61935

9R216

B07099

740522

59124

783241

91637 59124

781237 27918

54590 89536

857490

54580

B3B011

602763 61935 454421 09922

part,

MFRS

MANUFACTURERS

SPLY

PART NUMBER

“OR GENERIC

803106

195D106X0025X2T

GRM42-6XTRLOIMIOOVEB

BAV9Y

AGC1-4

1040684

104068-5

232-6411-50-3347

031.1666

807089

BRM73B-2B~J4701KB

RK73H-2B~F1001KB CRCW-1206~132F B02 RM73B2BJ101B TP102-01

CD74AC244M

857430

CB74ACT244M

FAU031.3573

DILB20P-108

TYPE=--—=s

N

¢

TOT

7

E~

«|

QTY~

wR

ENS

RR

VRE

Re

8

la

Ho

4-20

9132A

Service

Figure

4-7.

9132A-1603

Module PCA

AS

ROM

4-21

9132A

Service

Table 4~8.

A6 ROM

{See

Figure

Plug

4-8.}

Adapters

REFERENCE

DESIGNATOR

J

MP x

Mp 2

J

MP 1

up

J J

Mp 1

MP

MFRS

SELY

~CODE-

00779 81506 60197 89536

98779 91506 60197 89536

00779 81506 60197 89536

MANUFACTURERS

PART NUMBER

103916-9

B824AG11ID-ES

USCE24GHFCC

734103

1-103916~1

82BAGLID-ES

USC62BGHFCC

134103

1-1033%16-1

832-AG11D-ES

VSCHI2GHECC

734103

Hee

N

oe

[SREY

FLUKE

STOCK

—NO=-

838581 845206

845391 734103

838557

845201

845388 734103

838557 831875

845396 734103

part,

[LCE

mmm

9132R-024

HEADER,2ROW,

2

i,

3

SOCKET,

HEADER,2ROW,

PROTECTIVE

9132A-028

2

1,

3

2

HEADER,

SOCKET, IC,

HEADER,2ROW,

PROTECTIVE

9132-032

2

i,

3

2

HEADER,2ROW,

SOCKET, IC,

HEADER,

PROTECTIVE STRIP

*

An

in

’S*

A6 ROM

.050CTR,

MACHINED,

IC,

.100CTR,24

STRIP 3X1

A6

2

ROW,

.050CTR,

MACHINED,.6ROW,

.100CTR,

STRIP?

A6

.050CTR,40

MACHINED,

2

ROW,

.100CTR,

column

indicates

RIPTION

Plug

,6

ROM

Plug Adapters

3X1

ROM

Plug

.6

3X1

3¢ PIN

ROW,24

40 PIN

28

ROW,32

32

Adapters

28 PIN

Adapters

a

static-sensitive

4.22

Service

9132A

~¢

oy

~r

JI}

Je

[,

J3

dal]

7

Figure

4-8. A6

ROM

Plug

Adapters

CKT

1

9132A-1605-24 9132A-1605-28

1932A-1605-32

4-23

9132A Service

REF.

Al

A2

A3

Ad

AS AB

ASSEMBLY

Main

PCA

Self

Test

Module

Sync

RAM

Module

ROM

Module

ROM

24-Pin

ROM

28-Pin

ROM

32-Pin

NAME

PCA

PCA PCA

PCA Plug Plug Adapter Plug Adapter

Table 4-9.

Adapter

Manual

Status

FLUKE

PART NO.

788828 795252

749721

777490 758359 824326 825604 747923

information

REVISION LEVEL

D

B

Cc

B B

B

4-24

—

0D2A8

Mitsubishi

Electronics

Inc.

America

California

Torrance,

00779

Inc.

AMP,

Harrisburg,

Pennsylvania

01295 Texas Instruments Semiconductor

Texas

Dallas,

04713

Inc.

Motorola

Semicenductor

Arizona

Phoenix,

05276

ITT

Pomona

Division

Electronics

California

Pomona,

06915 Richeo

Plastic

lilinois

Chicago,

09922

Burndy

Corporation

Norwalk,

Connecticut

12681 Hitachi

Metals

Hitachi

Magna-Lock

Missouri

Big

Rapids,

14239

Wells

Electronics

South

Bend,

Group

Co.

Int. Ltd.

Indiana

Service

9132A

MANUFACTURER'S

18324 Signetics Corporation

23880 Stanford

25403

Inc.

Amperex

Siatersville,

27918

Bellmore,

34649

51406 Murata

53036 Textool

Div.

inc.

Sacramento,

Applied

Santa

Clara,

Electronic

Semiconductor

Micro-Circuit

Component

New

Intel

Corporation

Santa

Clara,

Erie,

Marietta,

Georgia

Company

Texas

Houston,

54590

RCA

Corporation

Distribution

Hill,

Cherry

56289

Electric

Sprague

North

Adams,

56637

ACD

Components

Manchester,

California

Div.

Rhode

Parts

York

California

No.

&

Special

New

Massachusetts

New

Engineering

Carp.

&

island

Corp.

America

York

Company

inc.

Hampshire

Inc.

Products

FEDERAL

59124

KOA-Speer Bradford,

59730

Thomas

fowa

6uss0

Burgess

Northbrook,

8Y440

Micron

Boise,

80197 Precicontact Langhorne,

61529 Aromat New

61935 Schurter Petaluma,

71400 Bussman

Div. of

St.

72794 Dzus Fastener West

72982 Gulton

Gudeman

SUPPLY CODES

Electronics

Pennsylvania

&

Betts

lowa

City,

Switch

illinois

Technology

Idaho

Inc.

Pennsylvania

Corporation

Providence,

Inc.

California

Manufacturing

McGraw-Edison

Missouri

Louis,

New York

Islip,

Industries,

Division

Co.

Corp.

Co.

New

Inc.

inc,

Inc.

inc.

Jersey

Co.

Amperex

Hicksville,

73734

Federal Screw

Chicago,

llinois

78188

Hlinois Tool

Shakeproof

ifinois

Elgin,

80528 Baumgartens

Atlanta,

Georgia

86928

Seastrom Glendale,

89538

John Fluke Everett,

Washington

9H216

Data

Composition

Laurel,

Maryland

91506

Inc.

Augat, Attisboro,

91637

Dale

Electronics

Columbus,

91984 Maida

Development

Hampton,

Electronic

New York

Products

Works

Division

Co. Inc.

Mfg.

California

Co.,

Mfg.

Massachusetts

Inc.

Nebraska

Virginia

Sve,

Corp.

inc.

Inc.

inc.

Co.

llinois

Chicago, 73445

Service

9132A

U.S.

California Fluke Technica 16969 Von Karman Avenue Suite irvine,

Tel:

Fhike Technical Center 46610 Fremont,

Tel:

Colorado Fluke Technical 14180 East Evans Aurora,

Tel:

Florida Fluke Technical Center 940N.Fern Creek Avenue Orlando, Tet:

Hilinois Fluke Technical Center 1150 Palatine, Tet:

Maryland Fluke Technical 5640 Rockville, Tel:

Now Fluke East 66 Midiand Avenua

Paramus, Tol:

Texas Fluke Technical Center 1801 Datlas,

Tol:

Washington Fluke Technical John 1420 75th St.

ws

Everett,

Tel:

Service

100

CA 92714

863-2031

(714)

Landing

CA

851-5112

(415)

CO

80014

695-1171

(303)

FL

32803

896-4881

{407)

W. Euclid Ave.

80067

il.

705-0500

(312)

Fishers

MD 20852

770-1576

(301)

Jersey

Technical Center

NJ

589-0500

(201)

Lane,

Royal

TX

75229

869-2848

(214)

Fluke

Mfg.

WA

58203

356-5560

(208)

Locations

Center

Parkway

84538

Center

07652-0930

Suite

Center

Co.

SW.

Avenue

Inc.

International

Srgonting,

S.

Coasin

Bino

del

4071

CAP

Aires

Customer

and Industrial

Burwood

3151

DPTO E-65

FED

Support

k

Die

pak

ogy

Virrey 1430 Buenos

Tel:

541522.5248

Australia Philips Scientific

Beane

East Victoria

10/89

4-26

307

Australia

Customer

Philips Scientific&Industrial 25-27 Paul St, North

North

N.S.W.

Ryde,

Tel:6102 868 8222

Austria

Oesterreichische

Unternehmensbereich

Triesterstrasse

Postfach

217

A-1101

Wein

Tel: 43

222-60101,

Belgium

& MBLE

Philips

&

Industrial

Scientific

Service

Department.

Rue

deux

80

des

Brussels

Tel:

32 2 525 6111

Brazil

Hi-Tek

Electronica Lida.

Al.

Amazonas

422, Alphaville

CEP

Barueri

06400

10 Paul

Tel:

55 011 421-5477

Canada

Fluke

Electronics

Rd,

Britannia

400

Ontario

Mesissaine:

1X

L4Z

eao:as0

Xo

41

Tel:

Chile

Intronsa

Inc.

Casilla

58

181

Santiag

Sas

Tel:

a.

1885,

China Fluke International P.O. Box

6085 Beijing Tel:

8601512-3436

Colombla

E

Sistemas

Instrumentagion,

Carrera

No.

13,

Aereo

92583

Ap.

gota

Tel:

57

232-4532

Denmark

A/S

Phitips Technical

Service1&E

1A

Strandlodsveif

PO Box

1919

DK-2300

Copenhagen

1

Tel:

45

572222

Ecuador

Proteco

Sogn

P.O. Box

2

Fae

Oreflana

2285y Quito Tel:

503 2

520684

TECHNICAL

Support

2113

Philips

Prof.

66

x1368

Associated

Equip.

Gares B-1070

Canada

inc.

East,

Unit

232-4308

Corp.

Of.

37-43,

Lida.

Cia,

SERVICE CENTERS

Industrie

Systeme

S.A.

Div

#1

Ltda.

401

Egypt Philips Egypt 10, el. P.O. Box 242 Dokki Cairo Tel: 20-2-490022

England

Philips

Test Colonial Watford

Hertforshire WD2 Tel:44923-240511

Finland Oy

Central

Sinikafiontie

Tet:

France

S.A. et Comerdiale,

Science 105 83002

Tel: 33-1-4942-8040

Greece

Philips 16, 177 78 10210

Tel:

Hong Keng Schmidt&Co 18/F1.,

23

Wanchai

Tel:

India

Hinditron

1st Floor, 17-8,

Maha! Industrial Estate

Mahakali Bombay

Tel:

Hinditron 33/44A 8th Main Road

Bangalore

Tel:91812

Hinditron Services Field Service

Emerald

Sth 114

Secunderabad

Tel:

Hindtron Services Pvt. Lid. 15

Community

Panchshila Park

New Delhi Tel:

Abdel Rahman Mohandessin

Scientific

&

Measuring

Way

AB

Philips

Service

1-3

368-0-52572

industrietie

Philips

et

Industry

de Paris BP 62

Rue

Bobigny,

S.A,

Hellenique

26th March Street

Tavros

Athens

3014834911

(HK)

Great

Eagle

Harbour Road

852 5 8330222

Services Pvt.

Andheri

Road,

400 083

91

22 6300043

Services Pvt. Inc.

Mahal Villas Extn.

Raj

560 080

363139

Center

Complex

Fioor

Devi Road

Sarofin

500 003

08 42-621117

Centre

110 017

011-6433675

Division

4TT

Cedex

el

Lid. Centre

Pvt.

1-7-264

Rafei

Ltd.

Indonesia

Lamda

PT.

Triguna

P.O. Box 8UATIG

st.

jakarta

13001

Tel:

8195365

(021)

Israel R.D.T. Electronics P.O. Box

Tel Aviv

Tel:

itaty Philips Sezione 18E Viale 20052

Tel: 38-39-363-5342

Japan

John Japan Sumitomo 1-1-11 Minato-ku Tokyo

Tei:

Korea Myoung Yeo Seoul Tel:

Mataysia Mecomp P.O. Box 24 46700

Selangor Tel:

Mexico Mexel Servicios

InstrumentacionyPerifericos Blvd. Adolfo Col. Mixcoac Mexico D.F.

Lid

Tel: 52-5-563-5411

Natherlands

East

Philips Test Postbus 5000

Teh

New Philips Scientific

2

Wagener

Auckland

Tel:

Norway Norsk

18E Service

Sandstuveien

Poalboliad.

N

0680

Tok:

43137

61430

9723483211

SpA.

T&M

/

Eivezia

2

Monza

Fluke

Mfg.

Branch

Higashi

Hamamatsucho

105

B1

434-0181

3

Corporation

Eui Do P.O. Box

150

82 2 784-9942

Malaysia

Petaling Jaya

60 3 774-3422

Lopez

Nederland

&

Moetapparaten

115

AC

Tilburg

31-13-352445

Zealand

Customer

&

Industrial Division Place

64 9 894-160

A/S

Philips

70

J

Menger

Of

ehozon

47-2-1

Engineering,

Co.,

Shinbashi

Sdn.

en

Support

Inc.

14

Bhd.

Computacion

Mateos No.

Div,

Ltd.

Bldg.

163

Pakistan

Intemational

Operations

Muhammad:

505

11.

Chundrigar

P.O.

Box 5323 Karachi Tei: 92 21

221127,

Peru

Importaciones

Electronicas S.A.

D. Roosevelt

Franklin

fund

S

14 288850

0

Philippines

&

Radio

Spark

P.O.

Greenhills, San

Metro-Manila

Juan,

Tol:

63-2.775192

Portugal

Philips

Portuguese

{&E

Division

Estrada de

Quturela-Carnaxide

2795 Linda-A-Vetha

Tel:

418 00

71

House

Road

239052

&

Representaciones

ElectronicS Inc.

Box 610

S.A.

(PAK)

Zip

9132A

de

Correo

Correos

oad,

Service

S.A 1400

Nr-70-136

241-1248

Elektribuj

und Industrie

18

TECHNICAL

Singapore

Ltd.

Rank

O'Connor's

Pasir

98

Panjang

0511

Singapore

Tel:

65

4737944

Africa

South

South African Service

Department

Ret

Main

195

Martindale,

Johannesburg

11

Tel:

105

27

470-5265

Spain

lberica Sae

Philips

Tecnico Instrumentacion

Depto.

Martinez

Vilergnd

M

28027

2

3113

1

Tol:

200

34

Sweden

Kistaindustrier Ab

foes

1&E

Technical

Borgarfiordsgatan

93 Kista

$164

Tel:

46-8-703-1000

Philips

Customer

Singapore Road

(Pty)

2

16

Pte Lid

Lid.

2092

Support

CENTERS

SERVICE

Switzerland

A.G.

Philips Technischer Kundendienst Postfach

670

Alimendstrasse 140

CH-8027 Zurich

Tel:

411482211

H.0.C.

Taiwan, Schmidt

Electronics

Sth

Floor,

Cathay

Commercial

Sheng

Mn

386

a

2

501-345

Thailand Measurstronix

2102/31

Ramkamhaeng 10240

Bangkok

Tel:

66 2

375-2733,

Turkey Turk

Philips Inonu Caddesi Posta Kutusu istanbul

1

1435881

Tel: 90

Min

Building,

East

Lid,

Ticaret A.S.

78/80

504-Beyogiu

Corp.

Sheng

Road

375-2734

Uruguay

Coasin

Casita

Libertad 2625 Montevideo

Tet:

Venezuela CoasinC.A.

Calie 8 Con Calle4,Edif. Edinurbi

Apartado

Los Ruices

Caracas 1070-

Tel:

West

Philips

Service

Rd.

fur Wissenschaft

8045 Tel:

Uruguaya

de

598-2-789015

68 2 241-

Germany

GmbH

VSF

Untemehmensbereich

Oskar-Messter-Strasse

ismaning

49-089-9605-260

4-27/4-28

10/89

9132A

Service

FIGURE NO.

5-1.

5-2, 5-3, A3

5-4. A4 5-5. 5-6. A6

Main

PCA

Al

A2 Self Test PCA

Module

Sync

RAM Module

AS5

ROM Module ROM

Plug

PCA

Adapters

Schematic

CONTENTS

OF

TABLE

TITLE

Section

Diagrams

PAGE

5-3

5-19

5-21

5-23 5-25

5-27

5

5-1/5-2

NOT

IMMSTALLED

9132A

RAM

(20000-2FFFF)

pa 69

D10

DIB

KAAMSEL ~

KERNEL

38K

X

16

O>

A

AS AB

A

A A A

A

£14

A15

(rem

|

ole

4

3;

25a

FEN Lia10

3

26

3

2OJEE

£2

amgacaze

A1 D1

Az

A3

ii

AS

lie

fa11

12

ia13

lata

GE

1

uss

po

D2 D3

oa

DS

De

oy

—

LS

BN/R

DE

BATA<IS:

[i907

00

D1

02 03

Da B8 D6

=

P36

>

£3,

3.8

P36

4,7

£3. 5,

7

ROM

KERNEL

32KX16

Lil

[18

[48

[L_+BY

(0~FFFF)

KAOMSEL ~

DATAZLS:

O>

A

AZ

{a8

A

I:

AB

A7

A

A10

A

Ald A15

J

~—

O

[(RIY

vie

EN]

i

NOT

INSTALLED

g

res

Gis

LE

u3s

vse

EEL)

Ed

Eryn] [REY

~

ae

ws]

ve

uz

us

ue

[Ei]

wr

ie

vas

uze

vas

N

fa

[T37]

—

ZH

0

use

ues

o

var

[221

use

vas

a

fea)

eo]

use

re)

270256

olao

oo

01

ar

ho

ge

8

A303

E

laa

04

5

las

os

a

Tae

os

3

la;

ov

25

Jan

24

hg

21

10

23

lxa4

Zla12

vp

26

lara

27

Inia

20

JCE

22

158

uso

9

|

x)

lhe

aS

]

i

|

!

A

AZ

AD

=

hy

483

R10

ALL

A12 p13 Aid p15

rm

a

28

24,0

21 23

2ly0a 26 27

BOqCE

LN

270256

6

a1

a2

A3

Ai

a5

lie

1;

1,

la10

1444

la13

laa

ACTE2

"24

BO

ole

E

a

3

EEANA

Lao

3

1

£8

+

Amggcaze

at

2

A3 las

a5 lie

1a?

l,g

jase

a1

la13

lia

JEE

GE

ues

po

D1 D2 D3 Da

DS

08li6_0D

[19

07

Do

G6

b1

01

02

D2]

03

Da

03

bd

05

16

DB

oe

49

D7

ov

[4

+8Y

vpp

Ul

8g

HE

A

AZ

re

Ad AS

AB

7 8 S

A16

A132

Ai3

LY 26 AE

Service

~N

”

~

-

5S

5

Noa) woo]

(E119)

O

-«

=

5

Nw]

ve?

n

“

3

wow

ves

eo

use

a

196

O

{Ten

ues

J

[eon]

vee

ves

vas

vies

Ueo

uss

uisz

ws

(Xr

[]

[tity]

uez

BR/~W

ups-

>

RESET

+5V A4

a5

4.7K

a7

4.7K

08C

MHZ

ourl®

usa

:

§

.

MICROPROCESSOR

4.7K

RB

4.7K

,

(TEST)

CLK

Ler?

TBLO

3 LgwP7

P7

Ler?

57

a

So

pq

+5

31]

n/c

BERR-

24

N/E

21

48

NC

BY.

BA__13imm

104

27

274

2gzei2

e6]

IPL

sox

BO 5

4

2!

2

D2

5

=

B5

£8

22

D

57

66

)

p08

—T

82

D

821041

s

61]

5

80

59]

Da4 D15

58

RESET

hie

TART

BERRA

RH

ya

BGACK

DTACK

TB00

TPL

t

Do

Jo

Joa

D3

oa

ps

06 07

55/08

B36

p12 gaa naa

pas

68000

Fe-P7

—p7

use

POWER UP

RESET

©

~

28H

re

3

LE

Ew

J

I]

CHE

I

-

utes

oO

0

54>

ocT00]

157]

yoephty

a)

,

i

|

A15

A231

A322

a21

10

AcTaz

Juzsa)

AST32

ACTO4

1

usa

3

4

2

BE

gp

§

tie

INTAT

AS

A18 A17

AC32

s

5

uasBLg

IRTR

14>

ACDR<23:

{

;

i

1

pd

wr

A3

AZ

a1

Wi

A3

AZ Ad

INPORTSEL.—

A3

a2

At

HE

TE

.

HCT

138

p23

4BER

YO

V3

TB

v2 v5

VE

V2

ws

HCT138

4

[Emr

v5

EEE VT

YZ

GT

co

5

B

Ya

A

VE VE

v7

u3

KRAMSEL

PMROMSEL-

ERAMSEL-

OUTPORTSEL-

£

INPORTSEL

7

N/C

pis

his

LAA

baz

BAD

LZ

P

»

:

T

22

3

hE

juesn

hts?

JuzechB ERAMASEL

KROMSEL~

ARAM~SEL~

~

—

ERAMBSEL

LFFFF)

(0-

OUT

oUTE~

ri

cute

il

QUT

12-

OUT14-

OUTi-

DUTa~

I

I5-

ou

7—

BUT

UTS

OUT11=

=

QUT13™

SUTL5-

INO/i-

INE

3

INa/S~

N/T

INB/9-

IN10/13—0 N/C N/C

—

ho

»PE

ps

pg

Oo

prs

ps ps

ps

p3

ve

Ps|

]

o

PE

8

£5 on a

5

og

ooo

Pry

ope

ns

Los=

Ah

RESET

-

—P3,

55

7

pa,

7

P37

£2, 5. 6

5

A23

INTA-

10 9

ACT00

usec

los

kh

9132A-1001

of

(1

8)

:

Figure

5-1.

A1

Main PCA

5-3/5-4

w7]

9132A

Service

NOT

STALLED

“g

ey

[1

r

vy

TATA

"

>

No]

]

oO

vis

vee

—

F]

us

a

LENE

use

LE

Vas

B

" a

Noa]

[E118]

nN

vig

HA

r

ue

vis

~

B

vas

u

2

uss

(E15)

al

uso

ho

3

e

vas

n

10)

ure

TAT

n

5

Mon

A

LEE

ues

—=

vos

|

tl

Oo

*

a

wa]

ue?

w

vie

-

:

Leen)

use

-

0

2

eye]

Vaz

vas

use

reas

[EE]

ues

us

ure

ROM1PINZB

AOM1PING

:

£

ROMiPING

ROMAP

BOMAPING

4

(

ROMIPIN7

ROMAPING

ROM1PING

AOM1PINIO

AOMIPIN1

ROM1PIN12

ROMAPIN22

ROM1PIN23

AOMiPIN2S

ROMAPIN2E

ROMiPIN27

AOMIPIN2S

|

INS

J

o

[]

us

:

we

vas

vd

=

fo

|

use

6

B

ur

uze

us3

ce

ves

vz

nme

uz

uae

[ra]

vas

ue

une

uae

Foss

uss

jars

ue

)

vas

uze

use

0

B PS

[$33]

3

vs?

NOT

INSTALLED

)

(oo

(

Coen)

GEE

[oée)

ues

[EW]

[

o

my

©

n

5

3

~

vay

=

[288]

=

HOMADDR

P7

Toh)

ues

[11 ues

0

v

wo

ues

vies

9132A-1601

(A413)

AOM1PIN2BPOL

5a

PSy

(A15)

AOMIPINIPOL

PS

AOM1PINIDC

PE

{(A12)

ROM1PINAPOL

P5

AOMIPINADC

am

P5

J

(a7)

ROMAPINSPOL.

ROMIPINSOC

go.

PE

(AB)

INGPOL

ROMP

5a.

ROMIPINGOC

gp.

PS

_

(AS)

POM1PIN7POL

Poe.

AOMIPINTDC

PS

ge

(Ad)

ROM1PINBPOL

PS.

HOMIPTNEDC

gu.

ps5

(a3)

AOM1PINGPOL

pre.

AOMIPINGDC

PS

go

(AZ)

AOMIPINIOPOL

5a.

FOMIPINIODC

Pay

(a1)

AOMIPINIIPOL

ps

AOMIPINLIiDC 5

PSge.

(AO)

ROMAPIN12POL10

PS

SEMTIPINIZOC

AOMAPINIZDE

PS

(AL11+)

ROMIPINZ2POL43

poe.

AOMIPTNZZ0E

FOMIFINS2

P55

ge

(A210)

FOMIPINZ3POL

PE

j

PSe-HOML

5a

pg

Pee

pgp

psa

pS.

PS

ps

PS

p55

PINZ30C

(A131)

AOMIPINZSPOL

AOMIPTNZEOC

(AD)

AOMIPINZEPOL

FOMIPINZEDC

--

(AB)

AOMIPINZZPOLE

FOMIPINZ70C

(A14)

ROMI1PINZGPOL

pHOMIPIN2S0C

HAOMISEL

ge

—

AOMIOT

gp

-

8

12

3)

1_\

2

4

5)

9

12%

1

2

9

10

12y 13

1

ay

5

{e188

ACTB6

\

ACTB6

5

ACT86

ACTE6

_\

uroBy

ACTB6

ACTE6

\

U34B)S

ACTB6

\

U34C

A

——

ACTEE

\

ACT86

\

ACTEE

ACTB6

\

Ua7a)3

ACTBE

U178

U34D

US3C

US3D

-

74A821

1

2

usa)

5 3

AC00

coo

a

1

3

2s

a

24

ACOO

4

2C00

0

ee0

Ja

12)

usop)-11

ACO6

?

2200

5

usse)E

q

ACOO

o

;

2

10

9

u3sc

ACO

COO

ACOO

uzsc).

o

8

AN

11

5

ACOO

13

E00

4,

2

q

4

5

u24a)

SER

U24B

2

8

N/C

NC

N/E

Se

T¥5V

WEE

L222.

N/C

———

us18)

13

11

gsc

1

Tans

2

IN

4

U36A)

3

51

n/c

74AS21

10

u3ss

12

N/C

Lr

ACO0

4

TN

6

_fuass

5

COMPAREQSUB1

6

COMPAREQSUB2

8

COMPAREQSUB3

8

EE

—

I5V

i

'

:

REGAESET

P5_g

ABORT

PS.

EN-ABORT

P55.

.

c

£1

7aasao

3

4

_jues

5 6

ft"

14

A

5

;

-

Nos]

hg

ge

-

PS.

Pl

_o

gm

FRCBANS

Fo

.

PLZACCBNKA/~B

PS

PS_g

PS.

gu

PEt

PS

gm

COMPARED

BCYCLECLK~-

bin

RESET

ANKA

SWAP-SELECT

FACBANKB

SC-11

RUNUUTREG

»

ps

+5v 4p

E00

uss)

;

|

!

i

;

:

!

:

i

:

|

:

|

HM

ACTO4

11

U1SE

ACO

5

4

ACOO

2

[U19B

RESET

10

8

DH

’

sabia

13)

[>

10600

59

27)

g 3

)

user

168800

59

uaz

ACO2

usec,

12

U1od\

8

10

8

5

vied)

!

ROM

PE_p

ACO4

PevNCCTLRAR

PS

sC-11

ac7a4

125557

ETE

11]

ACOZ

1.

TST-EN

i

12

UsF

AC74

2ip

u214

3

+5V

i

ole

518

=H

3

BCYCLECLK~-

a

-

Fav J

eT

als

§

.

CLA

A

|

pgp,

6

cLKLATCH

__CUKLATCH

AC74

48

12

55T

u278

114

EE

SYNC

ARUNUUT

AUNOUT

—

110

=

ole

ae

N/C

bor

-

18

aC74

"G74

4

2/5

4s

u27a

35

TH

:

PODDATASYNG

4

$218

GLE

ROMBANKSEL

HE08

g

2

1

roo

1

5

i.

=9

59

133

159

u0a)

ACOO

U1oB\

ACO0

u1oc)

ACO0

3

6

8

11

uaa

peoe

10

Uoac),

a

ACOD

13

U24D

12

ACO8

4

1uas

5

R31

100

A32

S00

R33

100

R34

100

BANKAAVAIL

3

BANKAAVAIL

8

TTY

11 BANKEAVATC

BANKBAVAIL

6

RUNUUTL

AUNUUT2

RUNUUTI

UNUUTS

oy

p7

oy

T

oy

EE

-

55

P3

Figure

5-1.

A1

Main

PCA

(cont.)

9132A-1001

of

(2

8)

5-5/5-6

9132A

Service

AOT

INSTALLED

Lf

5

tps

[]

ui

-

(

on

Ton

use

LEE

vas

wii

Nw

§

8

Ee

(Bloc

[RT

ig

2

e

TAGE]

ey

vas

si

wa

.

[<5]

W30

fl

pe)

O

vas vez vas

us

vas

Jrsv

1

L

N/C 16

BANKAAVAIL

wy

ROMBANKSE.

i

1

N/d

:

J14

TAS

>

P1

19

2

58 59

45

43

)

]

21

:

;

|

38

las

¥

17 13 13

7

14

a 6 8

12

5

15

9

10

23 25

i

a

§0

]34

49

Pa

po.

Ped

Plog

£2.

Pa

Pz

00 01 20

I——2

03 54 26

D5

D4

D6

D7

+5v

N/C

pBANKAAVAIL

OF.

A]

WC

Ne

AOMBANKSEL

gBRLM

ERAAD

ERAALD

N/C

r=

BANKBAVAIL

le

aoMAPINIA

P7.mE0M p7_pHOM4BING4

P7_HOMAPINAS

ROM4PIN17

P7.HOMAPINIE

GROMAPINIS

p7.

WHOMAPINGG

£7.

SROMAPINZL

po

(00) (D1)

(DF)

(D3)

(D4)

(0B)

(DB)

(07)

J15

18

22 24

28 30 32

19

2

58 58

15

ADOR<;

45

a3

21

38 36

34

49

41

39 37 35 33

31

29 27

Pt

STLE

£1.

>

A

AZ

Ad

AE

AG

2

AE

Cie

J

Ag

22

A

214

ALB A316

[a1]

ad

az

A184

.A18

A20

221

AZ

+5V

iE

dE

4.20

7

3lep

len

L170

Blan

4

7

3ls0

_1dlen 17190

81s

131en

d4len

HCT373

10

lap

40 40

OE

HCT373

1010

lop

130

©

LE

HCTA73

0

lop

a0

ap

go

Ji:

ure

23

oa

og 3g 4a

sa

gg

wg

8a

sq so

20 3g

sq

sa

apis

se

ta

20 36

4G

sa

se

42

lis

li9

[5

NE

TSYNC-PRERT

15

SELFTEST

it

T=

STo

TE

-27

~26 ~23 ~28 =a

—28

=29

~3

=

=31

=

28

+24

NE.

BOARD

-

.

=34 15 ~10

=

0

s28 530 S32

sv

BE

CONNECTOR

S47

on

13 12 11

10 2 7

17

18

asf

24]

a

27]

PE

34

Piped]

33 29 31

5

35

5

SN-SI08

40

|...51D

39 27

48]

45

+ 29)

43

26

3

26 30

las

Jag lav

)

jo

50

44 14

20 ee

2%.

EFTST

ap

SPTST

{BOPIN

00 ne

D4

BE

07

DS

2

1.476

L..18]

2

3

Jaz

VR

las

ed

5:8

= 2

3 4

Pi

HCTS41

mpmaRATASIS

[oy

vsli8.00

vali70%

EE

ysl

PC

A7 Y7}.2L

EEX

vi

a8

$a00

HETS43

Jas

valiB

Az

veld?

las

v3li8D

Aq

vali5 vsl44D

45

veli30

a8

7112

A7

AB

ys

u103

pg

id

D4

305

07]

08

D0

Did

11

DiS

©

|

J12

O>

18

22 24 26 28

30

19

2 +5V 2

58 59

16

45

a3

21

DATASAS:

Pio

Dog

Pt

EE

_—

S—

N/C 16

BANKAAVATL

CE

WC

Dg

bi

DZ

D4

05

DE

o7

Ogee]

38

136

Fa

23

25

:

3

50

{34

49

a7

ERBBADDR<

Pan

141

139 137

35

31

29 27

Py

p7_SPOMZPINTA

p7.

pr.

p7_GHOMZPINIG

pv.

pr.

pr

AOMBANKSEL

po.

pig

:

B/N

BANKBAVAIL

Pa.

p1.g0E.

12: 0>

ROM2PINI3

HOMBPINIE (D2)

WHOMEPINL7

ROMBPINIS

wBOMEPINGD

ROMZPINZL

ERAAD

[IYYE]

N/T

ered

ERBAD

EABA1Z

(DO)

(D1)

103)

(D4)

(0B) (0B) (D7)

mda]

O

vas

us?

0

AEE

eT

-

ep

Neva

13)

as

J16

P1ogmDATASES:

po

Pa

NOT

JASTALLED

Pa

Ji?

BE

pe

Prom

ADDR<32: 0>

PS

ROCEBANKBSELT

Pope

BANKBAVAIL

Pig

ABBADDR<12:

BOMIPINIG (D0)

P70!

p7_POMIPINIA

POMAPINGE

7.

O

[Te]

Er]

[ET]

vw

use

[ee

—

vas vez

Cost]

LEE)

vse

ues

us

1

vis

wr

uzs var

vee

wi

o

|

uss usa

ues

use

ry

wi]

ve ve

ue

5

{ery

vze

[E3Y]

uss

a

§

uss

use

Cn

TF]

vas

uae

uss

Tig

E38]

of]

x

-

08 59 20

D

5

D

015 32

PROCIBANKASEL

l+5V

N/C

_GBANKAAVATL

OE.

wu

pe]

ROMBANKSEL

pe

BRON

ERAAC

EAAA1IZ

ues

Uns

N/C

ed

BANKBAVAIL

OE

ERBAC

ERBALZ

(D1) (03)

03)

Da) 33

(05)

(08)

©7

J13

18

20 a2 24 26 28

aoc

3z

18

58

45

43

21

38 36

]

3a

49

a7

44 46 so

56

.

40 22

a

pid

48 54

51

141

39

[37 135

33

31

29 27

A

ERAMASEL

54

-

pa

AEs

10

J

BANKBAVATC

RANKBAVALL

Pa

13d

Ac32

P1

lATASIS:

0>

HOCSBANKASEL

PROCIBANKASEL

D2

~

BE

Plog

Ft

Po.

Pog

BALM

<<

pOANKBAVATL|

Po

[187]

BOPIN

80PIN

60PIN

BOPIN

9132A-1601

+

5V

°

savas

a

s

CR4

:

5Y

+

2

paves

2.

G0IL30

cA3

R13

100

<

6

RELA’

jeoy

[COIL

4

K2

wolaz_rsv

omM|7.

Ngpi0

SLFTST-CNTL-32

ACTO4

5

8

Rez

100

+5V

RELAY

coTL+

COIL

3

Nol12_+5Y

comiZ.

NC20

GLETST-CNTL-303

ps.

ST-30__

(A127)

ACTO4

SLETST-CNTL-28

PS.

KEY.

§T-28

(P16)

1

Bava

s

cA

;

wee

+

sv

2

+5Y

ves

CRS

3

COIL32

<

AELAY

noliz_ssy

1legys

comiZ

&

CoIL~

NC10

x3

a

Bae

9132A-1001

of

8)

(3

A1

Figure

5-1.

Main

PCA

(cont.)

5-7/5-8

}

/

J

4

/

9132A

.

Service

NOT

STALLED

29

(WET

5

TPL

")

~

]

(

$A

8

~

Now)

ni

3

vse

vee

v2?

use

3s

2 3

ww] ww]

[EY]

af3

——g

TNE]

als

=

"

us?

O O

.

2

own

-

i

ry

oc

yee

fe

4

8

ww

mn

ve

EE

|

vor use

(9

ves

-

ves

ve

viz ws we

vze uaz uze

uss usa uss uss

[

fea

usp ues

11

vez ves

0

vee

mm

vise

[E]

re

vez

va

=

us:

ves

ero

|

ure

~~

wo

vies

(]

ves ues ves

;

vier

3

uss

vie

Ef

ve?

urs

be

9

[RZ

ves]

J

vee

vse

K1

ve2

11121

vai

[35]

{

us?

e)

mn

ANAT

B

x2

O

w

3”

a

ores

©

8132A-1601

]

oan

—

AEE

B

x3

wa)

me

.

LL

TL

ERBAADDHE<12:

ADDRS23:

emg

P1

pS2364/~27XX

PS

L2ENABLE-

pA

ps

5

PS

gi

11ENABLE~

1>

74ACT153

ROM1PINA

ROM1PINZS

AOM1PINZS

ROM1PINZ2

(A12) (A11)

(a11)

(A11+)

Ald Al4

A135

A13

6

ico

5]

4c

al

ico

3]

1c3

10

p00

11]

504

12]

ncn

13

oe3

141

gg

2

Isa

16

15

oC

7.

ERAA12

1v|

ERAA1LL

9

oy

ROM1PIN4 ROMAPINZS

rmomirines

1

ROM1PING2

a

NOT

INSTALLED

74ACT157

+sv

2

[3a

3

1s

8

loa

6

lop

113,

10

ap

14]

2a

[13]

4p

1.

sEL

151s

ZAACTAST

2

{1a

3

is

5

2a

5

28

1134

10

3g

14

4p

13]

Sls

=

©

74ACT157

2

1A

3

lis

5

loa

6

log

1154

10

3p

14]

4p

13]

48

iisEL

15]%

1"

1v|4__ERAA8

ov

ay

av

uz2

av

vy

2

ay

“

ues

ay

ov

av

ay

uss

|7

ERAAS

|9

ERAAO

|12

N/C

ERAAY

a

7___ERAAS

l9

ERAAS ROMIPING

ERAA7

=

12

4__ERAAD

ERAAL

7

LS

ERAA2

[12

ERAA3

ROM1PIN2?

ROM1PIN26

ROM1PIN23

(AB)

(a7)

(AB)

A10

Ail

A12

-

3

ROM1P ING (Ad)

ROMIPIN?

ROM1PING

MAPIN A?

FRE

~

3

)

ROM1PINA2

J

ena

IQHMADDR

P7

AOM1PINA1

AOM1PIN10

ROM1PING

(AS)

(a8)

a

AQ

(40)

(a1)

(a2)

(a3)

AB

A7

AB

AS

A2

A3

Ad

AB

AOM1PINZ7

AOM1PIN2E

AOM1PIN23

BOMIPT

MIPING

ROMIPINY

ROM1PINS A7

AOM1PIN12

ROM1PIN11

AOM1PIN1O

ROM1PINS

0>

(A212)

(A11)

(A11) (A114)

(AB)

(49)

{A10)

ag)

(a5)

(AB)

a

AD

(A0)

(a1)

(a2)

(a3)

Ald

A14

Ail

A13

A10

All

Aig

AB

A7

AB

Ag

A2

A3

Ad

AS

+5v

2

3

5 8

1_1set

pl

2

3

5 5

1134

10]

2 3 5

LY

113,

10

141

13)

i

|

-

74ACT1S3

6

ico

5]

ica

4lice

3]

4c3

10500

11

264

12562

13}

aca

1450

Isa

1

3G

15

®

74ACT

[4a

lis

oa oy

om

113,

10]

2p

14]

aa

[13]

4a

Els

Jia

lis

sa

_lz28

3g

4

3]

45

©

15]

JAACT

1A

lis

loa

38

4a

48

sel

151%

9

1vl7

pyl

,,

157

iy

ayl9

av

u71

SACTan

av

ov

avy

ov

urs

157

1Y

oy

avy

4v

uso

ERBA1Z

EABA11L

9

l4_|ERBAB

l7

|ERBAS

(ERBAt0

212]

NC

[3 _LERBAZ

A

|7

|ERBAS

|EABAS

9

|ERBAY

12

£

_|ERABAD

4

L7

|EABAL

|S

|ERBA2

L412

|ERBA3

ERBBADDA<12:

1

gBCYCLECLK~

PE

»

HOMTSED

AOMISEL

ACTO4

13

12

U1SF

0>

55

ROM1PIN12

ROM1PINI1

ROMAPINLD

RGM1PIN AOMiPIN

AOM1BIN

ING

ROMP

INS

AOM1P

AOM1PIN27

AOM1PIN

ROM1PIN AOM1PINZS AOM1PING

AOM1PINZS

AOMiPIN22 A114)

AO

A

AZ

Ad AS AB

A7

AB) AS)

A10 At AL

Al

HCT373

3

[ip

1al2

ues

oq 3a

40l9

sgl

ag 7g 8g

lB

[6

22

L485

[16

L219

4

lop

7

130

8

lap

13]sp

14]ap

1779p

i8lap

1

JOE

>

11]

A0

A Az

A: Ad

AS AB

A7

<

HCT373 3 4

Te

8

13

14an

i7

18

1

OE

71

[10

1.0

4

a»

sa sg

70

78

gn 8g

LE

sas

10l2

2p

als

49

|E

S

[42

[15

16

19

AE

AS

A10

A114

A12

A13

ALLY

ROMSEL—

(SOMETIMES

A12)

DELAY

DELAY,_ROMACOR,

_ROMAODR

gps,

6

<

P2

po

BANKAAVATL

gu

BANKBAVAIL

pu

Figure

5-1.

A1

Main

PCA

(cont.)

(4

of

8)

5-9/5-10

9132A

|

1

3

Service

AOT

INSTALLED

TM

es

LEA)

us

vas

E47]

ve

uae

ue

R22

4.7K

us?

NOT

INSTALLED

Pt

Rai

4.7K

P7

R20

4.7K4.7K

p7

Eve

ues

Pi

No

U43, Hi,

Pi

qaa

Z1

Installed

Pi

Se

Ji6

9132A-1601

Ji17

Pe

Pl

H25

R24

4,7K

4.7K

Pi

|

9132A-1001

of

(5

8)

Figure

5-1.

A1

Main

PCA

(cont.)

5-11/5-12

9132A

PERSONALITY MODULE

CONNECTOR

v2

i;

aa

2

ass

Ata

A13

Asz

ass Me

Hi

A7

ag

bo

A324

A228

a1

Ao

oo

O12

ez

Rig

pa

85

2p

pe

07132

55

OS

Bas

gn.

ASYNC|

ATR

ceo

ore

oe

chs

one

CH?

REGRESET-22

PEGRESET

ovoRVa

PSYNCCTL3

AOMA~SEL~

PSYNCCTL2

PSY)

BCYCLECLK-

PM-PRSNT-

eg

DAV-RAST-HI

IoRY-AOT-L ow

FUSESENSE

[91g

SYNCOTLS

PSYNGETLY

OVOBVIUO OVORV3HI

SYNCCLK=

en

+5V

av

ono

Np

OPIN

5

J3

Al

PDATAO

Coan

am

POATAS

PDATA7

acLoCK-

8cH1~ 8CH2- BCHI~ BCH4-

BCHS—

BCHG- BCH7~

OVOAVIHY

ovoRVaLD

+12v

E6PIN

O

0

(ay)

K2

O

3 3

uses

O

9132A

~\

B

A

ds

©

-i

=

228)

ag

K3

a

1601

Ea

IN

-

°

wd

|.

Ew

|

3

MOT

J

INSTALLED

-8v

+8Y_§

SYNC

18

[Tig

a]

a8 48

50

MODULE CONNECTOR

1

3

NOT

STALLED

Vii vid Gis

vee

i

i.

I

BH

LEE]

uss

P31

#

55

+

ve

]

L|

Bp

oeryEe]

YRI7)

ues

uzs

ui

ues

cz)

2

TE)

Ge

{Tv}

vie

us

is

vas

uzs

3

uae

O

ver

vee

ven

use

vi?

ver

ve

uss uae uss

fee)

on

use ves

ron

——

use

vee

J

7]

vie

vas

eee)

vez

T

un

[ETE

vas

vss

os

bs

urs

Oo

Pe

J

vae

use us?

vias

[Tiny

ot

use

{

ow

FREER

K1

ure

(

wz

|

L

Rl

S$

8]

3

premmenrrameeenn

o

»

°

=

~

.

im

0

-

}

Rl

3

.

”

24

vr

n

?

~

nA

~

1H

=

rising

ve?

(30

vs3

LEE

ee

]

Oo

==

:

=F

use use

-

ues

ee

Oo

[Thy]

ves

vise

ko

7)

Gis

sd

roy

[B0)

ey

[Xr]

GE

[E13]

OO

vas

|

Had

>

=

yea

Ase

[3

6

16

(28

is

li2

16

267

[30

34

38 po

[84

———

reo [38

22

-

TTAE

‘

3

Ata 2

A

i

AS

A7

a6

1

Ad A3

{

AZ

4

A3

r

§

DAT

fy

Ba

1

O86

{

&§

—

PMROMSEL

By

DATASYNG

=!

[12

31

[25

[27

31

.

ps

OVDRAV3LO

L2

4

PO

4A

“use

ps

pw

"oo

pg og

-

AC240

JTAT \9A%

TAT

TAT BAZ

243

AA

It

az

39 39

;

FA39

Installed

1v1|48

1y2[

1v3]14

1vali2

2Y1

2v2 2v3

a

ay

R16

a

4.7K

R27

&

R40

-

1638

WV

Not

A38

[35g

[29

PEYNCCTLS

ROMISEL-

PSYNCCTLZ

PSYNCCTL1

11.

cium

L237.

SYNCCLK~

BCYCLECLK-

o

PM-PRESENTL

2

a5] wmv

[4

[SO

_ovoRVIHI

2

=

>

[12

[26

Lov

A3g

?

i»

[22

34

1.35.4.

38

4

2

oe

>

el

30

|24..

og

DAV-AST-HI

q

PRV-ROT-LOH

ge]

22

[20

t32V

SYNCFUSESENSE

22

oc

n2g

R28

39

ASAS

OVORV-RESET

£5

gn

DATASYNC

3

ACO4

No.4

8

-

P2

onion

RESETPOL

PSs

5

uss

PN

Aces

10

jusc

g

l

2

Fs

mci

)-8

>

mE

ey

aA

dd

<

P1

i

8

ac74

2/p>"

3

LS164

BCR

veo

[4

=F

U30A

CLA

J

i.

:

=

oc ao

GE

ae a6

ols

518

3

SE

N/C N/T

N7E N/C

N

n/c

000

001 002

poi

OUTS=

Pig

a

15

a

:

4.7

CLK=FAIL

.

/e

21

>

ACOB

(143

(van

\

[32

b

pe

Pig

BUTE:

OVORVCHS

"

pos

[GE]

oo

86%

006 067

d

ons

068

9010

2

.

P1

8

HET373

3

0

4120

30

no

28D Toy

5

JL

HCT373

1750

13

2p 20

13

an

18)

4p

sn

7180

8lyn

3

80 8a

Le

{TE

Syng

RESET-LAT

+5Y

A3s

4.7%

10

20 ao

mpm

56 28

uss

BE

10

12

[15

ag

[19.103

ag

sn

6G

70

yaa

+5

FRcSYNG

ABMEN

ARMSEL

SPARE-CIL

PSYNCETLA

ARAM—EN

D8

pg

bs

=

D

3

nia

al

100

for

165

104

65)

106)

107

UBS

3

5

6

7

81

8

10

11]

1a

a2

ACTO0

“

Ss

CLK

Soncerk

SC~11 FRC-SYnc

ARM

ARMEN

ARmMSEL

SeARE-OTL

pscTia

ARAM-EN

BEELK

pom

AC-11 RESET-LAT

5

oaL20RE

Gaz

ss

’

ow

-

R30

EYRE

470

SYNGAS

soon

sPaRE-01128 spaRg~02

Sst see

FRAM-CLK

ARAM-CLK

so

£E

=

SYNC-CAL

SYNC

[AB

SONT-ERS

neg

BIE

N/C__

[48_8S1

rss

TTT

[24

{mre

ARAM-CLK-

22

ARAM-CLK

13

+8V

R3s

4.7%

rE

.

11]

PS.

PE

ps

ps,

PS. PS.

AC191

Sia

B

le

ie.

4TE

2.

5

dos

u3g

ee

AC491

2

5

0ic

o

$2400

JCF

L4

5

PY

Taq

uso

AC182

5

Pow

6lc¢

I]t

I)

L.3_dTE

oz

a

u77

<

55.

P4,

000-0015

SCNT-EN-

SYNCCLK-

SUT

Plog

EE

Ga

68

ac

2

Max

oe

c

oe

Rooptd

max[i2

NC

ac

moobis

max}12

AE

ere

S50

0

104%

ARAM-EN-

2

rigd4

Agcy

ACE

AC-6

428436

oe

AC

C-

ae

Ac=10

C=

N/T N/C

S51

3938

ine/9-

ARAM-SEL

PE

ARAM-SEL-1

Fe

ere]

!

}

|

i

SINCEN

Po.

60.

bos

565

-

Ga

bos

oe

p00

007

bod

0 009 NC 0010

ER

a5

512

5¢

TEs

a

2

14

ic

i1

LA

5

sa

oll

.

1406

a 5

Lf

14

<r

HCTS431

vali

alas

vadz

Jae

Y

a3

Aa

va

as

vysli4

vg[13

as

a7 y7[22

v8

Aa

vag

HCTB41

5

2

as

Y

v4

las

a4

ASV!

Y

a8

Y7

a7

Y

a8

Ua

0

IAMCEN

OE-

pa

ARAM-CLK

WU 6

4

Bi

Pl

sans

ABAMCSELD

ALOO

1

Juazah2

2

AC191

A

GA

oc

Ei

Boge

Lo

Periz

dos

ua

AC181

A

GA

8 68

eC

0

ao AcoLi3

T6

JdTE

max|-128

N/C_

o/Y

uaz

ACEO

aa

8

c

ec

(ENC.

o_

ep

ncopi3

12

TE

Max

NGC

o/u

ve

s

:

=

usa

/C

Se

w/e

N/T N/C N/C N/C

N/C

SC-14

N/C

_N/C

.

100

IDL

102

1033

104 10S 106

107

Io

ID

GJ

1011

0

i

51a)

1812

5

fas

39

J

4

4U25C)

Sc-11

d

~

AC32

:

q

uasa

2A

AC02

g

4

Juiss)4

Aca

oft

PODSYNC

TO

8100

po

a

-

=

AZ

AS

22

AG

az

4

pa

1A 1Y

28

3a av

H3

18

013s

3]a48

SEL

5]

~°

I

AC157

1a

2a 3a

1

A

8

50

Glan

348

se

Tues

4

p7

oeLAY

PaugmmRELAY

_FOMADOR

av

ayli2__A3

vez

ARAM-ADDR

w———————r

sv

2vl|2

av|e

avy

4 0

5

9.

|4

22

po

fe

A

ii

a2

Ad

AS

se

AZ

!

BY

p22

CG

p22

A273]

p48,

a6

Ase

A

a

re a5

A

a

4

a

i

HOMSEL

—

AQ AL

22

a

Ag ALO

Ai:

ARAM

S165FP-70

AO

DO D1

A:

A2

pz

a3 03

Ad

Da

AS

pS

A6

0836

{18

py

a7

8

24,9

io

Ald

[2

NIC

N/C

agp

3

R/

LBs

5465FP-70

10/la0

po

D1

AL

Az D2

A3 D3

oa

2d

Al

os ps

4las

35147

3

AS

2

A10

23.4,

20]

®ET

55]

68

2

HCT244

2

4

Haws

54%

HCT244

4

2

4

+2476

L.22436

28.

07

ElaianvcfroN/C

avsld8

f1as

yyo|16

1ia2

1yajid

1A3 1A4

1va[i2

241 2vs

2a2 ava

aos

2Y4

2A4

yey

1vs}28

_lia1

1v2[36

11a2

1vali4

1a3

1va

1a4

32D

8

241

v4}

2a2 ava

2v3[8

2a3

2v4l3

2A4

>

ua?

po

D1

oa 53

1

_

Ds

D8

D7

08

E]

010]

D

=

Did Dis

09

D1

02

D3

D4

04

0s

5

08

708

010

0

D

Did YE

ARAM-DATA

Tmm——

p52

53

-

Ios

J

oo

22

De

5

=

oss

HCT245

8a:

ripe

se:

86 87

B8

"3915

HET245

oe

TF

Ble

16

isa

S184

3

8s as

[uid

§

5

a1l2

a2|

A2

AB

see

A7

2

AB

prA

bi

usa

2

5

a

-

a3 a4

laa

oIRpi

uss

Do

01 —

D8

oe

_-

Ho

D

5

0

D

5

bis

=

BW/~B

54

L_DATA<IS.

O>

gp

-1 01

of

6

8

Service

[33g

.

Figure

5-1.

A1

Main PCA

(cont.)

[RE

9132A

Service

MOT

ASTALLED

=

O

(Tye) [EW

use

ROM

ACM

41

ROM

MODULE

/C

SWO4

SPOT

NOT

ues

1MSTALLED

CONNECTOR

ROM

MODULE

CONNECTOR

2

MODULE

CONNECTOR

3

MODULE 4

CONNECTOR

3

N

=

a

N=]N

J

Bs

CONNETOR

TEST

Pi

A

3

$B

i—=5

ver

]

L285]

”

=

3

n

-

=

= =

a

ues

LEE)

Jn

LR.

Nn

ver

ues

3

LJ

O

HEE

Ji?

uae

ves

OO

ws]

J16

O

[E117]

loa]

9132A-1601

Figure

5-1.

A1

Main

PCA

(cont.)

9132A-1001

of

(7

8)

5-15/5-16

~5v

TANT

C115

20%

10UF

C116

20%

10UF

CAPS

BYPASS

CAPS

9132A

Service

MOT INSTALLED

BAN

Y

TF3

[1]

ves vez vas

vie

(TI8

=

ARERR

-

K3

§

Oo

ag

ARE

Bg

as

a

3

9132A-1601

K3

Fe

3 5

Ne

NOT

INSTALLED

+!

5

“1

ep

GROUND

[

+5

ong

enp

+

enp

TEST

ss

+5V

©-2UF

=

|

TP2

|

1

|

c32

cg7

O-3UF

©-3UF

0-2UF

ces

1

To.1uF

POINTS

fea

To.1UuF

C33

1

To.20F

|

To.1uFr

{cee

To.1uFr

Tes

To.2uF To.2uF

t34

T

To.1wrFTo.1F

ces

c87

1

To.2uF To.2uF

{ces

To.4uF

ca

|

To.

>

[cass

ces

c1o0

1uF

+5V

AC00

4

5

ACTOO

13

12]

1°¢8

To.auF

{cao

To.4uFr

|u37Bb8

p12

uss

cae

|

To.2uFr

ces

|

To.4uFr

N/C N/C N/C N/C N/C

N/C

NC

N/C

jee

To.

|

To.4uF

c1o2

|

To.

z

:

4

5

6

1c

aur

T0.3uF T0.4uF

cay

|

To.

1¢€70

2uF

To.

]

2uF

To.4uFr

SPARE

SPAR

lcs

cas

1c

To.

c1031c104]c108|c108

|

sur

To.

4uF

To.2uF

13

N/C

_N/C

12

N/C

11

_N/C

10

Ss

N/C

'gN/C

cas

sur

jc72 jc73

To.

1ce

T0.4UF

cao

To.

a

uF

To.4uF

To.

4uF

MGS T0.4UF

|

sur

To.2uF

N/C N/C N/C N/C N/C N/C N/C

cad

To.

1

To.

SPARE

cv

wins

~Sloiola

2uF

|

To.

SPARE

7_|

1c

T0.4UF

lca

1UF

To.

1¢7s

T0.3uF

c107

2uF

PADS

SPA2

jee

T

1

T

{cos

T0.20F

FOR PACKAGES

15 14 13 N/C 12 N/C 11 10 N/C

jc

2UF

0.

ca3

aUF

0.

lcs

T0.2UF T0.1UF TO.

]

T

1

T

cio8

4UF

0.

ca4

4UF

0.

1¢77

T0.2UF

N/C N/C

N/C

9 N/C

cia

J

0.4UF

T

cas

1

TO.

jee

c110

|

T0.2UF

N/C

N/E

N/C N/C

N/CS

N/C

N/C N/C

+5V

ACGS

15

DES

J

U

TP TPE

K

a

A

c

Zz

ch

s

H

jcas

T0.4UF

Cca6

1

aUF

1

2 3 a

6

7 13

8 8

usp

qUF

0.

T

j¢c7e

4UF

T0.4UF

c1y7

0.2UFT0.1UF

T

SPARE

sPa3

SPARE

L411

N/C

LAST

J15

0104

K3

a3

R40

c123

Z1

CRS

S1

H1

J

Tce

0.4UF

T

Ca7

1

0.

T

1

T0.1UF

ci1e

18 18 17 16 15 14

12

[11

GATES

USED

1%

9.

T

1

aUF

o.1UF

T

cso

i

T0.4UF

cite

|

0,1UF

T

i

|

N/C N/C

N/C_

|

N/C_

|

N/C_

|

N/C_

N/C

|

j

|

:

i

|

;

3

;

{

i

NOT USED| NOT

*

:

1

2UF

48

c81

J

T0.4UF

cas

T0.1WF

c1eo

|

T

ce

Jc

T0.4UF

cso

1

To.1uF

ca2

0.

1UF

JIGEEES

1

T

INSTALLED

1

T

0.1UFT0.4UF

a3

R39,

21

A

[SE]

0.

Tce

T0.4UF

1

To.2uFr

1

4UF

T

ci22

]

0.

T

R40

cst

ces

1

T

1c82 To.

c84

0.4UFT0.1UFT0.4UFT0.4UF

4UF

0.4UF

c8s

1

cee

T0.1UF

1cs3

aur

To.

1

TE]

cas

aur

-5V

GND

JER

0.

T

csa

1

To.

1

AC74

1UF

quF

c87

121p

11

0.1UF

7

u30B

4

TCR

cea

|

0.

T

css

To.

1

T

Ev

10

13

13s cae

1UF

T

1

1uF

To.

cas

1

4UF

0.

T

c112

1UF

0.

N/C

alL8

__N/C

TL8

c91

ca.

J

jcss

1

T

cez2

0.

0.4UFT0.4UFT0.1UFT0.4UF

1e=7

css

cee

0.

2UF

jes?

To.

4UF

+412V

GND

ces

2UF

To.2uF T0.2uF

C90

1

T

1

0.4UFT0.1UF

€113

0.1UF

1

REF DES DEVICE +5V

-

U9

U10_U19

U33

U35 U37 74AC00

U24_UE0 74AC00

U18

Ui6 us

UB

Ua

UiS

Us8

U34

Ui7

UE4

U70 74ACT U38 U26 UE6

UB

U7 U25

Ugs

uzs

U2

U36

US1 U21 U27 U30

U3

U40

Us5 U74

U71 U72

Ug

UB0_UBY

U78

UE3

U79

U2

U39

USO

Ua2

uaz

U11

U12 U45

uaz

US4

USS USE

U59

US7 UB5 UB

U67

U75 7

U23

U31

ues

U76 U104

u13

U46

Ula

U49 USB U101

U102

UB7 Ug?

_U94

Ugg

U1

VED)

U61

u62

Ug5

ues

Us2

b

U32

_U90

uss

’

ces

|

T

]¢so

T

4UF

US3

UB3

UsB2

U41

U77

UB4

Uda

U93 74HCT37

U4B

U100

cao

1UF

0.

T

|

2UF

0.

T0.1UF T

ce3

1

1UF

0.

T

74AC00

US2]

74AC02

74ACO04

74ACOE

74ACTO4

74ACTBE

74AC240

74ACTOO

74AC32

—[7aacT32

74AS30 74A821 74AC74

74HCT

U73[

FAACT153

74ACT

74AC157

74AC191 74AC191

74AL.S374

74ALSS544

74ALS541 20

74HC

74HC27 74HC27

4HC

7aHC

7aHCT37

74HCT374

74HCTS41 74HCT541

U103] 74HCT541

74HCT244 74HCT248

74LS14 74LS164

MEM165~70

MEMB256

MCE8000

Jos

20R4 24

27C256

0.1UF

cet

c94

1

T

136

e3

|

0.

T

ce2

|

1

0.4UF

T

HE

157

9132A-1001

4UF

0.1UF

c85

0.1UF

|

T

14 14

i4

14 14 14

14

14 20

14

14 14 14 14 14

1

16 16

16

6 20 20

20 20 20 20

0

0 10

0 0

0140

0

0 10

0

14

14 28 28

14

5216

28

(8

ce3

1UF

0.

co6

1

1UF

0.

T

GND

7

7 7

10

7

7 7 7 7 7

10 10 40 10 40 10 10

[10

10 10

0

10

7 7

14

17

56

57

12 [SDIP-24

14

of

8)

[PACKAGE

S0IC-14

S0IC~14 S0IC~34

S0IC-14

S0Ic-14

S0IC-14

S0IC~14

SOIC~14

S0IC-14

[s0IC-20

S0IC-14 S0IC-14

S0IC-14 S0IC-14 S0IC-14 S0IC-14

SOIC-16 SOIC-16

SO0IC-1

S0IC-1 S0IC-1 S0IC-1 SoIC-1 |s0IC-20

|soic-20

_S0IC-20

S0IC-30 }soic-20

S0IC~20

1S0IC~20

|soic-z0

[Ssoic-20

[S0IC-20

__[SOIC-20

|soic-20

_|SoIc-20

S0IC-20

0IC-20

01C-26

S0IC-14 S0IC-14

|S0IC-28

S0IC-28

[PLCC-68

>

_|DIP-28

QTY

©

~

-

2

2 2 5

—

:

4

2

=

6 3

-

8

1

-

4 ~ ~ ~

410

-

7

1

-

~

1

¢

4

2

Figure

5-1.

A1

Main PCA

(cont.)

5-17/5-18

33

5.

—

Al

\

J3

Jy

AZ

50

49

AS

fe

JZ

J

CC

uuT

RESET

RT

GND

=

GND

TEST

TP2

T™

MODULE

SYNC

CONNECTOR

POINT

RESET

OVERDRIVE

TEST

POINT

1

T™®

24->32

ROM

MODULE

CONNECTOR

40

ROM

MODULE

CONNECTOR

EXTERNAL

500

PROTECTION

HYBRID

4HO7T

Al

-BUS

500

PROTECTION

HYBRID

4HO7T

AR

NOTES

ON

SIGNAL

NAMES:

500

PROTECTION

HYBRID

4HO7T

A3

MAIN-BOARD~-BUS

9132A

BOARD

MAIN

CONNECTOR

+5V +5V

S§T~1 {(A20)

ST-2

ST-3

S$T-4

ST-5

ST-6

8T-7 ST-8 ST-8 ST-10 ST-11

44

ST-12

ST-22

ST-23 ST-24 ST-28 ST-26 ST-27 ST-28 ST-29 ST-30 ST-31 ST-32

STDO

STD1

STDR2

sSTD3

STD4

STDS

STO6

STD? sTO8

STDS

STD10 STD11 STD12

STDA3

ST014 STD1S

ST-SYNC

SFT1ST

KEY

GND GND GND GND GND GND

statisti

deat

Pepe

(A117)

(A16)

(A413) (AB) {A7)

(AS)

(A5) (A4)

(A3) (A2)

(a1)

(A21)

(A114)

(A22) (A12)

(A410)

(a9)

(A14/+5V)

(A158)

(A17/+5V)

(A19)

(XXX/+5V)

(DO)

(D1) (D2)

(03)

(Da) (D5) (D6)

(D7)

(DB) (089)

(010)

(D114)

(D12) (D13)

(D114) (D195)

SOPIN

Service

RIBBON

9132A-1606

DES

LAST

USED

NOT

USED

ST-X

1.

X

SX

THE

SELF

OF

IS

NAMES

BOARD

2.

EXCEPT FOR

PROTECTION

3.

MAIN THE

MEANS

THE

PASSING

uP

TEST

THE

32

SAME

HYBRID.

IN

LINE LINE.

NODE

CONNECTS

ROM

SIGNAL

{)S

SOCKET.

AS

THROUGH

REFER

WHICH CONTROLS

TO

ST-X

A

THE

TO

Figure

5-2.

A2

Self

Test

9132A-1006

PCA

5-19/5-20

9132A

Service

N

=

id

+

CiB

Ci9

21

22

Fi

mn

n

wn

DH

a

0

ca

ci

C

C4

c3

ue

|e]

ck]

CeRz

C22

E3

al)

C23

cas

G27

C24

c26

C28

23

C33

Je

emcee

:

C35 C33 C31 C29

S0

49

R14 R12 R16

Belek

R13

R1S

C6

C9

cio

[C34

C32

|

a

+

C12

[ER12|[ERo|[CR10

+

fey

0

u3

C8

_*lirei

+

WN

Cc?

o

9132A-1602

15]

|ER11

[ER13|[CRs

WUT

TO

=

C16

ee

OVERDRIVE

UUT RESET

_wwrte

pack

OATAC

DATAS

DATA2 DATA3 DATA4

OATAS

DATAG

OATA7

crock

re

Ha

ons cna ons

oHe

oH

ac-6nD

AC-GND

AC~GND

ac-aND

AC-GND

AC-6ND

ac-6ND

Ac-oNp

Ac-6ND

AC-GND

ac~6np

Ac-6nND

AC-GND

b-nib

ay

62

HOLE

B28

HOLE

[23

n/c

24

Key

prem

[22 [24 [28 128 CHE 139

32

L3

|.5.

|Z

2

B

27

22

-

193

rFuses-onp

|.2

[18

[41

1232

138

147

[18

23,

1

DATAD DATAL DATAZ

DATA

OATAQ

[32

DATAS

14

DATAG

16

DATA?

cLOcK 2

CHz

Ena

CHa

CHE CHY

[3

5

e

i

23

FUSE2-GND

BAS18

xh

enlo

£7

TO

ovDAVA

&

a.

TANT TANT

&

0.254

BAS16

>

4

CR12

CR13

co

She

10UF 10UF

TANT TANT

Nore

0.254

T5600

[7

8

6

1MEG-X~15 RESISTOR

BARIG

TY

Pron

8,

.

Tone

FUSE

BAS16

2

#

c10 =i¢

FUSE

11

<>

To.

|

v

28

gr]

29

38

15

1a

5%

Ex

4

23lio

481

Hoe

13

12

a3

40

a8

52

[12 [23

1%

Lor

<&

ce

uF

20

*

500

HY

0

*

800

PROTECTION

HYBRID

HOTT

a1

[14

i

PACK

Ria

—

100

c

C

/¢

os

N/

/

HI

.

N/C N/C N/T N/E N/T N/C N/C N/C

c36

0.1uF

N/C

OVDRV3IHI

538

4 jpne

6

CR14

4

G1

BY

o

DAV-AST-HI

DAV~-RST-LO

1

I

BYPASS

cas

10UF

re

CAPS

cis

c12 c13

Jd

10UF

x

Fant

oz

~5V

4d

os

~3V

JO.

bd

+5V

Foo

BYPASS CAPS

fev

cia

we =

1UF

0.

z

c15

1UF

vv

cao

10UF

TANT

4

1

18

fas

iw

To-10e

ACT244

2

alias

1A3

144

i241

3)

2a2

15]

aaa

2a4

iz

15

5

Fie

ACT240

spr

2

1s

Gas

aT

241 242 243

21s

1

8

Ts

R10

27

iW

ACTEE

104

Noe

U1D

cis

S9TLL8

Tobe

BYERS

BY

0

8

5

A

2

8

3

4

2

Pi

3

.

GROUND

TEST POINTS

TE1

i

a

RESISTOR

33

&

5

[9

9

RESISTOR

THRU

PACK

THRU

24

PACK

22

PDATA FOATA

5

3

PDATA,

4

PDATA,

FOAIA FOATAS POATAS POATA7

BCLOCK=

0

sao

Z

BCH2- BCH3-

r

BCHa~

4

BEHS=

3

&

BCHE-

5

BCH7~

2

frome

ol

CONNECTION

SHIELD

£1

HOLE

.

TO MAIN BOARD

2 «|

9

2]

4]

£]ppata7

32 35

36]

38

40 a2 a4

57]

24]

26

28]

30]

20

2

18)

19}

a7]

48

a

bon 251

—27

er

pei

57]

p32] _—e

42

321

or

EoATAD

BOATAD EOATAS

poATAS

PoaTas

ppatas

soo

ova

BCHA-

BCHa~-

BCHS~

Sore

BCH7~

pAV-RST~HI

pAV-RET-LO

ovpRVaKHI

ovoavaLo

+1av

FUSESENSE

sv sv

sv

45v

+5v

GND GND BND

ono

eND

GND

She

GND GND

oie

GND

ono ano

GND GND GND

ono

GNO GND GND GND

sat

a

>

REF

[Us Lug [U3

DES

A

22

2s,

23

DES

LASY USED

CiQi0iC

|}

mi,

U3 C38 CR16

Je

DEVICE

AACTEE

74ACTR244

Z4ACT240

H07T

OHM RN

3

MEG AN

NOT

USED NOT

R1.3, 8.7.

TRPRTREET

+5V

14

20 20

+.

35

- -

-

9

GND

[PACKAGE

7

803IC-14

10

S01C-20

10

SQIC-20

CUSTOM

SOIC-16W

18

SCIC-18W

INSTALLED

pRnanooonng

QTY

9132A-1002

oil”

123,

Figure

5-3. A3

Sync

Module

PCA

5-21/5-22

PROC-DATA

EMUL.

RAM

9132A

A

Service

ERA-ADDR

EMUL.

RAM B

REF DES

DEVICE

+5V

GND

[PACKAGE

QTY

9132A-1607

ERB-ADDR

ROM MODULE

7

DES

DATA

BUS

C1

0:

4LF

1

T

c2

0.1

c3

1

Rd

ca

I

TOF

3WF

1

J

c6

Oabp

cs

1

0.

T

1 7

c7

0:2

cs

1

20F

0:

T

A4

Figure

5-4.

RAM

LAST

Module

USED

PCA

NOT

USED

NOT

INSTALLED

9132A-1007

5-23/5-24

9132A

Service

ROMTYPE4

ROMTYPE2] AOMTYPES

NT.

FUSE

FAST

(.25A

DECOUPLING CAPS

©3

I

.08UF

BLOW)

Ta TE

“TF

.01UF“T.04UF

cs

Tour

89132A-1603

UNLESS OTHERWISE

ALL

RESISTOR

ALL

CAPACITOR

FOR

REFERENCE DES.

ASSEMBLY DWG

FOR

CHANGES TO THRU

NG.

WARNING:

MOS

STATIC DISCHARGE.

PER

THIS SCHEMATIC

FUTURENET

9132A-1003;

®

DEVICE (S)

S.0.P. 19.1.

SPECIFIED.

VALUES AREINOHMS,

VALUES ARE

SEE

CAD DATABASE

FD.

INDICATES

WHICH

DWG

SEE

91324-40035

BE DAMAGED

MAY

USE

SPECIAL

MICROFARADS.

IN

91324-1603.

MUST BE MADE

THE

1/Bw,

AND

USE

BY

HANDLING

—4003A.

OF

SX.

£2070

o

CER4mIC

DEVICE

1Y%

1A1

1

1A2

¢

1A3

1Y

1A4

2Y1

:

CAUTION

SUBJECT

STATIC

TO

ELECTRICITY

DAMAGE

BY

2A1

242 243 244

1%

26

2Y

Figure

5-5.

A5

ROM

Module

PCA

+5V PACKAGE

GTY

9132A-1003

5-25/5-26

|

9132A

Service

——S

JI

o—N

Je

Pes

{==

Bree

J3

{

SUNT

9132A-1605-24

Figure

5-6. A6

ROM

Plug

9132A-1005-24

Adapters

5-27/5-28

9132A

Service

JI

CKT

Je

2

J3

2 2 6

Ji

8_|

!

1

10

12 14

16

18

20 22 24 26 28 30 32

34 36 38 20

|

_N/C

1

3

NCL

[7_nN/C

N/C

8

N/C

11

13

15

17

19

21

23

25 27 29 31 33

35

37

39

A7

AB

A5 A4 A3

AZ

Al

AO

DO

D1 D2

GND

1

2

3

4

5 6 7

8 9

10 11

12

13

14

J3

28 27 26 25 24 23 22 21 20

19 18 17 16 15

AB

AS

A10

D7 D6 D5 D4

D3

N/C2

N/C N/C

N/C8

N/C

“22

"24

4

6

10

12

14 16 18

20

26 28 30 32 34 36 38 40

40PIN

Je

|

40PIN

1

3 5

7 g

11 13

[15

17

19

21

23 25 27 29

31

33 35 37 39

2BPIN

9132A-1005-28

9132A-1605-28

.

Sins”

Figure

5-6.

A6

ROM

Plug

Adapters

(cont.)

5-29/5-30

9132A

Service

JI]

CKT

|Je

2

[

CKT

-~

J3

Noss

-

SW

1

3

ZN

om

on

J

5 7 9

i

3

7 9

WIDINIOIO

|O

bale

|WIN»

isha

NOD

/

1932A-1605-32

Figure

5-6.

A6

ROM

Plug

Adapters

9132A-1005-32

(cont.)

5-31/5-32

2-8

ABORT, Address

RAM,

Arm

Select,

Back

Panel,

3-4

Opening,

3-7

Closing,

Available,

Bank Bank

Swapping,

BCYCLECLK-,

3-2

Cleaning,

Clock Comparator,

COMPAREQ-,

Fail,

2-9,2-11

Disassembly,

Emulation

RAM,

Connectors

2-7

Control,

Bank

Force Fuse Fuses,

Sense,

Changing,

General

Generic

Inspecting a

Kemel

Main

Board, Address Emulation

Theory

PAL,

ROM,

RAM,

A,B,

Input/Output

2-9

2-8

2-3

2-4

3-16

and Self

2-9

of

2-11

Shipment,

2-3

RAM

Devices,

2-6

2-8

2-4,2-7

2-15

Test,

2-5

3-3

Operation,

2-9

Control,

Service

9132A

INDEX

2-1

Kemel, RAM

ROM Module

Seif

Test,

Generation

Sync

Module

Sync

Mainteriance Procedures,

Manual

Status,

Instruments,

Newer

Overdrive

PAL,

Generic,

Personality

How

Parts,

2-6

2-1

3-2

2-7

Personality

Modules, Installing,

Plug-In

RAM

Module

RAM

Modules,

REARM,

1

ROM

ROM Bank Select,

Module

ROM

Module

ROM

Modules

ROM

28-,

(24-;

Installing,

ROM

Plug

ROM

Present,

Connectors,

2-6

Channel

Reset;

2-11

Module,

Obtain,

to

Module,

Module

or

2-8

Polarity,

1

PAL,

and

3-5

Adapters,

2-6

Connections;

Timing,

Interface,

4-4

3, 2-8,

2-5

2-11,2-15 Installing, Present,

Emulation

Installing,

2-7

2-6

Address

2-13

32-pin

2-9

2-12

2-3

2-9

3-2

2-11

4-3

2-9

3-3

RAM,

3-6

2-7

Bus,

Assemblies),

2-14

3-4

2-15

2-13

INDEX-1

9132A

Service

Test,

Test Test Test

Failure

Test

Sync

Test,

the

and

2-10

Adapters,

Module,

State

Equipment

of

Preparation, Service

Test,

and

for

Repair or

2-6

2-6,

37

Assembly,

Enable,

Present,

3-13

Pod

1-1

Control

2-16

2-10,

Installing;

Machine,

for

Operation,

Procedures,

3-12

3-13

Factory: Service,

Adjustment;

RUNUUT,

Self Self Self Self Self

Service

Shipping Specifications,

Status

SYNC,

Sync

Sync Géneération, 2-3

Sync Module,

Sync

Test

Theory

Troubleshooting

‘Warranty

2-3

Codes,

to

Fluke,

Lines,

Pod

2-15

3-10

2-9

2-10

2-12

3-5

2-12

Troubleshooting;

2-1

Fr?

3-2

3-11

3-2

INDEX-2