Fairchild Semiconductor ML4801CP Datasheet

March 2001

15

VEAO

IEAO

V

FB

I

AC

V

RMS

I

SENSE

RAMP 1

OSCILLATOR

OVP

PFC I

LIMIT

UVLO

V

REF

PULSE WIDTH MODULATOR

POWER FACTOR CORRECTOR

2.5V

+

-

-

+

16

2

4

3

7.5V

REFERENCE

14

V

CC

13

V

CC

VEA

8

+

–

IEA

1

+

­+

-

PFC OUT

12

SRQ

Q

SRQ

Q

2.75V

-1V

RAMP 2

9

PWM OUT

11

GND

10

SRQ

Q

V

DC

6

SS

5

RTC

T

7

V

CC

DUTY CYCLE

LIMIT

+

-

1.5V

-

+

2.5V

V

FB

-

+

8V

8V

VIN OK

GAIN

MODULATOR

V

CC

÷2

1.6kΩ

1.6kΩ

1.25V

25µA

-

+

DC I

LIMIT

PRELIMINARY

ML4801

Variable Feedforward PFC/PWM Controller Combo

GENERAL DESCRIPTION

The ML4801 is a controller for power factor corrected,
switched mode power supplies. Key features of this
combined PFC and PWM controller are low start-up and
operating currents. Power Factor Correction (PFC) allows
the use of smaller, lower cost bulk capacitors, reduces
power line loading and stress on the switching FETs, and
results in a power supply that fully complies with
IEC1000-2-3 specifications. The ML4801 includes circuits
for the implementation of a leading edge, average current
“boost” type power factor correction and a trailing edge
pulse width modulator (PWM).

The PFC frequency of the ML4801 is automatically set at
half that of the PWM frequency generated by the internal
oscillator. This technique allows the user to design with
smaller output components while maintaining the
optimum operating frequency for the PFC. An over­voltage comparator shuts down the PFC section in the
event of a sudden decrease in load. The PFC section also
includes peak current limiting and input voltage brown­out protection.

BLOCK DIAGRAM

FEATURES

■ Internally synchronized PFC and PWM in one IC

■ Low start-up current (200µA typ.)

■ Low operating current (5.5mA typ.)

■ Low total harmonic distortion

■ Reduces ripple current in the storage capacitor

between the PFC and PWM sections

■ Average current continuous boost leading edge PFC

■ High efficiency trailing edge PWM optimized for

current mode operation

■ Current fed gain modulator for improved noise

immunity

■ Brown-out control, overvoltage protection, UVLO, and

soft start

REV. 1.1 3/9/2001

ML4801

PIN CONFIGURATION

ML4801

16-Pin PDIP (P16)

16-Pin Narrow SOIC (S16N)

IEAO

I

SENSE

V

RMS

V

RTC

RAMP 1

PIN DESCRIPTION

PIN NAME FUNCTION

1 IEAO PFC transconductance current error

amplifier output

2I

AC

3I

SENSE

PFC gain control reference input

Current sense input to the PFC current
limit comparator

I

AC

SS

DC

1

2

3

4

5

6

7

T

8

TOP VIEW

16

VEAO

15

V

FB

14

V

REF

13

V

CC

12

PFC OUT

11

PWM OUT

10

GND

9

RAMP 2

PIN NAME FUNCTION

9 RAMP 2 PWM ramp current sense input

10 GND Ground

11 PWM OUT PWM driver output

12 PFC OUT PFC driver output

4V

RMS

Input for PFC RMS line voltage
compensation

5 SS Connection point for the PWM soft start

capacitor

6V

DC

PWM voltage feedback input

13 V

14 V

15 V

CC

REF

FB

Positive supply (connected to an
internal shunt regulator).

Buffered output for the internal 7.5V
reference

PFC transconductance voltage error
amplifier input

7R

TCT

Connection for oscillator frequency
setting components

16 VEAO PFC transconductance voltage error

amplifier output

8 RAMP 1 PFC ramp input

2 REV. 1.1 3/9/2001

ABSOLUTE MAXIMUM RATINGS

ML4801

Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.

Junction Temperature ............................................. 150°C

Storage Temperature Range ...................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec) ..................... 260°C

Thermal Resistance (θ

)

JA

Plastic DIP ........................................................ 80°C/W

V

..............................................................................................

CC

Voltage .................................................. -3V to 5V

I

SENSE

Voltage on Any Other Pin ...... GND - 0.3V to V

I

...........................................................................................

REF

I

Input Current .....................................................10mA

AC

+ 0.3V

CC

18V

20mA

Peak PFC OUT Current, Source or Sink ................. 500mA

Peak PWM OUT Current, Source or Sink............... 500mA

PFC OUT, PWM OUT Energy Per Cycle ................... 1.5µJ

Plastic SOIC ...................................................105°C/W

OPERATING CONDITIONS

Temperature Range

ML4801CX ................................................. 0°C to 70°C

ML4801IX ............................................... -40°C to 85°C

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, VCC = 15V, RT = 29.4kΩ, R
T

= Operating Temperature Range (Note 1)

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VOLTAGE ERROR AMPLIFIER

Input Voltage Range 0 5 V

Transconductance V

Feedback Reference Voltage 2.43 2.50 2.57 V

Input Bias Current Note 2 -0.5 -1.0 µA

Output High Voltage 6.0 6.7 V

Output Low Voltage 0.1 0.4 V

Source Current ∆VIN = ±0.5V, V

Sink Current ∆VIN = ±0.5V, V

Open Loop Gain 60 70 dB

PSRR 11V < VCC < 16.5V 60 70 dB

CURRENT ERROR AMPLIFIER

Input Voltage Range -1.5 2 V

Transconductance V

Input Offset Voltage 0 8 15 mV

Input Bias Current -0.5 -1.0 µA

Output High Voltage 6.0 6.7 V

Output Low Voltage 0.65 1.0 V

Source Current ∆VIN = ±0.5V, V

Sink Current ∆VIN = ±0.5V, V

Open Loop Gain 55 65 dB

PSRR 11V < VCC < 16.5V 60 75 dB

NON INV

NON INV

= 15.4kΩ, CT = 270pF, C

RAMP1

= V

, VEAO = 3.75V 40 65 80 µ

INV

= 6V -40 -70 -150 µA

OUT

= 1.5V 40 70 150 µA

OUT

= V

, VEAO = 3.75V 60 100 120 µ

INV

= 6V -40 -70 -150 µA

OUT

= 1.5V 40 70 150 µA

OUT

RAMP1

= 620pF,

Ω

Ω

REV. 1.1 3/9/2001 3

ML4801

ELECTRICAL CHARACTERISTICS (Continued)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

OVP COMPARATOR

Threshold Voltage 2.65 2.75 2.85 V

Hysteresis 175 250 325 mV

PFC I

DC I

VIN OK COMPARATOR

GAIN MODULATOR

OSCILLATOR

COMPARATOR

LIMIT

Threshold Voltage -0.9 -1.0 -1.1 V

∆PFC I

Threshold - Gain Modulator Output 120 220 mV

LIMIT

Delay to Output 150 300 ns

COMPARATOR

LIMIT

Threshold Voltage 1.4 1.5 1.6 V

Input Bias Current ±0.3 ±1 µA

Delay to Output 150 300 ns

Threshold Voltage 2.4 2.5 2.6 V

Hysteresis 0.8 1.0 1.2 V

Gain (Note 3) IAC = 100µA, V

IAC = 50µA, V

IAC = 50µA, V

IAC = 100µA, V

= VFB = 0V 0.65 0.85 1.05

RMS

= 1V, VFB = 0V 1.90 2.20 2.40

RMS

= 1.8V, VFB = 0V 0.90 1.05 1.25

RMS

= 3.3V, VFB = 0V 0.20 0.30 0.40

RMS

Bandwidth IAC = 100µA 10 MHz

Output Voltage I

= 350µA, V

AC

= 1V, 0.65 0.75 0.85 V

RMS

VFB = 0V

Initial Accuracy TA = 25ºC 188 200 212 kHz

Voltage Stability 11V < VCC < 16.5V 1 %

Temperature Stability 2%

Total Variation Over Line and Temp 182 218 kHz

Ramp Valley to Peak Voltage 2.5 V

PFC Dead Time 350 470 600 ns

CT Discharge Current V

RAMP 2

= 0V, V

= 2.5V 3.5 5.5 7.5 mA

RAMP 1

4 REV. 1.1 3/9/2001

ML4801

ELECTRICAL CHARACTERISTICS (Continued)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

REFERENCE

Output Voltage TA = 25ºC, I(V

Line Regulation 11V < VCC < 16.5V 10 25 mV

Load Regulation 1mA < I(V

Temperature Stability 0.4 %

Total Variation Line, Load, Temp 7.35 7.65 V

Long Term Stability TJ = 125ºC, 1000 Hours 5 25 mV

PFC

Minimum Duty Cycle V

Maximum Duty Cycle V

Output Low Voltage I

Output High Voltage I

> 6.7V 0 %

IEAO

< 1.2V 90 95 %

IEAO

= -20mA 0.4 0.8 V

OUT

I

= -100mA 0.7 2.0 V

OUT

I

= -10mA, VCC = 9V 0.4 0.8 V

OUT

= 20mA VCC - 0.8 V

OUT

I

= 100mA VCC - 2.0 V

OUT

Rise/Fall Time CL = 1000pF 50 ns

PWM

DC Duty Cycle Range 0-44 0-47 0-50 %

V

V

Output Low Voltage I

OL

Output High Voltage I

OH

= -20mA 0.4 0.8 V

OUT

I

= -100mA 0.7 2.0 V

OUT

I

= -10mA, VCC = 9V 0.4 0.8 V

OUT

= 20mA VCC - 0. 8 V

OUT

I

= 100mA VCC - 2.0 V

OUT

Rise/Fall Time CL = 1000pF 50 ns

SUPPLY

) = 1mA 7.4 7.5 7.6 V

REF

) < 10mA 10 20 mV

REF

Start-up Current VCC = 12V, CL = 0 200 350 µA

Operating Current VCC = 14V, CL = 0 5.5 7.0 mA

Undervoltage Lockout Threshold 12.4 13.0 13.6 V

Undervoltage Lockout Hysteresis 2.7 3.0 3.3 V

Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.

Note 2: Includes all bias currents to other circuits connected to the V

- I

Note 3: Gain = K x 5.3V; K = (I

MULO

) x IAC x (VEAO - 0.625V)-1.

OFFSET

pin.

FB

REV. 1.1 3/9/2001 5