Fairchild Semiconductor KSD1588 Datasheet

Low Frequency Power Amplifier
• Low Speed Switching
• Complement to KSB1097
KSD1588
KSD1588
1
TO-220F
1.Base 2.Collector 3.Emitter
NPN Epitaxial Silicon Transistor
Absolute Maximum Ratings
Symbol Parameter Value Units
V
CBO
V
CEO
V
EBO IC ICP IB PC PC
T
J
T
STG
* PW≤300µs, Duty Cycle≤10%
Collector-Base Voltage 100 V Collector-Emitter Voltage 60 V Emitter-Base Voltage 7 V Collector Current (DC) 7 A *Collector Current (Pulse) 15 A Base Current 3.5 A Collector Dissipation (Ta=25°C) 2 W Collector Dissipation (TC=25°C) 30 W Junction Temperature 150 °C Storage T emperature -55 ~ 150 °C
Symbol Parameter Test Condition Min. Max. Units
I
CBO IEBO h FE1
h
FE2
V
(sat) *Collector-Emitter Saturation Voltage IC = 5A, IB = 0.5A 0.5 V
CE
(sat) *Base-Emitter Saturation Voltage IC = 5A, IB = 0.5A 1.5 V
V
BE
* Pulse Test: PW≤350µs, Duty Cycle≤2%
Collector Cut-off Current V Emitter Cut-off Cu rr en t V *DC Current Gain V
TC=25°C unless otherwise noted
TC=25°C unless otherwise noted
CB EB CE
V
CE
= 80V, IE = 0 10 µA = 5V, IC = 0 10 µA = 1V, IC = 3A
4020200
= 1V, IC = 5A
h
Classification
FE1
Classification R O Y
h
FE1
©2000 Fairchild Semiconductor International Rev. A, February 2000
40 ~ 80 80 ~ 120 100 ~ 200
Typical Characteristics
KSD1588
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
[A], COLLECTOR CURRENT
0.2
C
I
0.1
0 5 10 15 20 25 30 35 40 45 50
IB = 18mA
IB = 16mA
IB = 14mA
IB = 12mA
IB = 10mA
IB = 8mA
IB = 6mA
IB = 4mA
IB = 2mA
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 1. Static Characteristic Figure 2. DC current Gain
10
1
0.1
(sat)[V], SATURATION VOLTAGE
CE
(sat), V
BE
V
0.01
0.001 0.01 0.1 1 10
VBE(sat)
VCE(sat)
IC[A], COLLECTOR CURRENT
IB = 0
Ic = 10 I
1000
100
10
, DC CURRENT GAIN
FE
h
1
0.001 0.01 0.1 1 10
VCE = 1V
IC[A], COLLECTOR CURRENT
10ms
100mS
300uS
1mS
100uS
50uS
B
100
10
1
0.1
[A], COLLECTOR CURRENT
C
I
0.01 1 10 100 1000
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 3. Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage
160
140
120
100
80
60
40
dT[%], Ic DERATING
20
0
0 25 50 75 100 125 150 175 200
TC[oC], CASE TEMPERATURE
Figure 5. Derating Curve Safe Operating Area Figure 6. Power Derating
©2000 Fairchild Semiconductor International
s/b LIMITED
DISSIPATION LIMITED
Figure 4. Safe OPerating Area
40
35
30
25
20
15
10
[W], POWER DISSIPATION
C
P
5
0
25 50 75 100 125 150 175
TC[oC], CASE TEMPERATURE
Rev. A, February 2000
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