Fairchild Semiconductor KSA940 Datasheet
KSA940
Vertical Deflection Output Power Amplifier
• Complement to KSC2073
KSA940
1
TO-220
1.Base 2.Collector 3.Emitter
PNP Epitaxial Silicon Transistor
Absolute Maximum Ratings
Symbol Parameter Ratings Units
V
V
V
I
I
P
P
T
T
CBO
CEO
EBO
C
B
C
C
J
STG
Collector-Base Voltage - 150 V
Collector-Emitter Voltage - 150 V
Emitter-Base Voltage - 5 V
Collector Current - 1.5 A
Base Current - 0.5 A
Collector Dissipation (Ta=25°C) 1.5 W
Collector Dissipation (TC=25°C) 25 W
Junction Temperature 150 °C
Storage T emperature - 55 ~ 150 °C
Electrical Characteristics
Symbol Parameter Test Condition Min. Typ. Max. Units
I
CBO
I
EBO
h
FE
(sat) Collector-Emitter Saturation Voltage IC = - 500mA, IB = - 50mA - 1.5 V
V
CE
(on) Base-Emitter ON Voltage V
V
BE
f
T
C
ob
Collector Cut-off Current V
Emitter Cut-off Current V
DC Current Gain V
Current Gain Bandwidth Product V
Output Capacitance V
TC=25°C unless otherwise noted
TC=25°C unless otherwise noted
= - 120V, IE = 0 - 10 µA
CB
= - 5V, IC = 0 - 10 µA
EB
= - 10V, IC = - 500mA 40 75 140
CE
= - 10V, IC = - 500mA - 0.65 - 0.75 - 0.85 V
CE
= - 10V, IC = - 500mA 4 MHz
CE
= - 10V, IE = 0
CB
f = 1MHz
55
pF
©2000 Fairchild Semiconductor International Rev. A, February 2000
Typical Characteristics
KSA940
-2.0
= -150mA
B
I
-1.6
= -100mA
B
I
= -50mA
B
I
IB = -40mA
IB = -30mA
-1.2
IB = -20mA
1000
100
IB = -15mA
-0.8
[A], COLLECTOR CURRENT
-0.4
C
I
IB = -10mA
IB = -5mA
10
, DC CURRENT GAIN
FE
h
IB = 0mA
-0.0
-0 -4 -8 -12 -16 -20
VCE[V], COLLECTOR-EMITTER VOLTAGE
1
-0.01 -0.1 -1
IC[A], COLLECTOR CURRENT
Figure 1. Static Characteristic Figure 2. DC current Gain
-10
-1
IC = 10 I
B
-0.1
-10
IC MAX. (Pulse)
IC MAX. (DC)
-1
-0.1
VCE = -10V
10ms
100ms
1s
DC
T
C
=25
℃
(sat)[V], SATURATION VOLTAGE
CE
V
-0.01
-0.01 -0.1 -1
IC[A], COLLECTOR CURRENT
[A], COLLECTOR CURRENT
C
I
-0.01
-1 -10 -100
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 3. Collector-Emitter Saturation Voltage Figure 4. Safe Operating Area
32
28
24
20
16
12
8
[W], POWER DISSIPATION
C
P
4
0
050100150
TC[oC], CASE TEMPERATURE
Figure 5. Power Derating
MAX.
CEO
V
©2000 Fairchild Semiconductor International
Rev. A, February 2000
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