Fairchild Semiconductor ISL9N306AP3, ISL9N306AS3ST Datasheet

February 2002
N-Channel Logic Level PWM Optimized UltraFET® Trench Power MOSFETs
ISL9N306AP3/ISL9N306AS3ST
General Description
This device employs a new advanced trench MOSFET
Features
• Fast switching technology and features low gate charge while maintaining low on-resistance.
Optimized for switching applications, this device improves the overall efficiency of DC/DC converters and allows operation to higher switching frequencies.
Applications
• DC/DC converters
DRAIN
(FLANGE)
GATE
SOURCE
•r
•r
•Q
•Q
•C
DRAIN
(FLANGE)
= 0.0052 (Typ), VGS = 10V
DS(ON)
= 0.0085 (Typ), VGS = 4.5V
DS(ON)
(Typ) = 30nC, VGS = 5V
g
(Typ) = 11nC
gd
(Typ) = 3400pF
ISS
SOURCE
DRAIN
GATE
D
G
S
TO-263AB TO-220AB
MOSFET Maximum Ratings
Symbol Parameter Ratings Units
V
DSS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage 30 V Gate to Source Voltage ±20 V Drain Current Continuous (T Continuous (T Continuous (T
= 25oC, VGS = 10V)
C
= 100oC, VGS = 4.5V) 61 A
C
= 25oC, VGS = V, R
C
Pulsed Figure 4 A Power dissipation
Derate above 25
o
C
Operating and Storage Temperature -55 to 175
TA = 25°C unless otherwise noted
75 A
= 43oC/W) 18 A
θJC
125
0.83
W
W/oC
o
C
Thermal Characteristics
R
θJC
R
θJA
R
θJA
Thermal Resistance Junction to Case TO-220, TO-263 1.2 Thermal Resistance Junction to Ambient TO-220, TO-263 62 Thermal Resistance Junction to Ambient TO-263, 1in2 copper pad area 43
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
N306AS ISL9N306AS3ST TO-263AB 330mm 24mm 800 units N306AP ISL9N306AP3 TO-220AB Tube N/A 50 units
©2002 Fairchild Semiconductor Corporation
o
C/W
o
C/W
o
C/W
Rev. B, February 2002
ISL9N306AP3/ISL9N306AS3ST
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
B I
DSS
I
GSS
VDSS
Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V 30 - - V
V
= 25V - - 1
Zero Gate Voltage Drain Current
DS
= 0V TC = 150
V
GS
o
- - 250
Gate to Source Leakage Current VGS = ±20V - - ±100 nA
On Characteristics
V
GS(TH)
r
DS(ON)
Gate to Source Threshold Voltage VGS = VDS, ID = 250µA1-3V
I
= 75A, VGS = 10V - 0.0052 0.0060
Drain to Source On Resistance
D
I
= 61A, VGS = 4.5V - 0.0085 0.0095
D
Dynamic Characteristics
Q
C
ISS
C
OSS
C
RSS g(TOT)
Q
g(5)
Q
g(TH)
Q
gs
Q
gd
Input Capacitance Output Capacitance - 650 - pF Reverse Transfer Capacitance - 300 - pF Total Gate Charge at 10V VGS = 0V to 10V Total Gate Charge at 5V VGS = 0V to 5V - 30 45 nC Threshold Gate Charge VGS = 0V to 1V - 3.0 4.5 nC Gate to Source Gate Charge - 10 - nC Gate to Drain “Miller” Charge - 11 - nC
Switching Characteristics
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Turn-On Time Turn-On Delay Time - 16 - ns Rise Time - 70 - ns Turn-Off Delay Time - 34 - ns Fall Time - 30 - ns Turn-Off Time - - 97 ns
(VGS = 4.5V)
= 15V, VGS = 0V,
V
DS
f = 1MHz
V
= 15V, ID = 18A
DD
V
= 4.5V, RGS = 4.3
GS
= 15V
V
DD
I
= 61A
D
= 1.0mA
I
g
-3400- pF
60 90 nC
- - 131 ns
µA
Switching Characteristics
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Turn-On Time Turn-On Delay Time - 10 - ns Rise Time - 43 - ns Turn-Off Delay Time - 62 - ns Fall Time - 29 - ns Turn-Off Time - - 137 ns
(VGS = 10V)
= 15V, ID = 18A
V
DD
= 10V, RGS = 4.3
V
GS
- - 80 ns
Unclamped Inductive Switching
t
AV
Avalanche Time ID = 3.6A, L = 3mH 240 - - µs
Drain-Source Diode Characteristics
I
= 61A - - 1.25 V
V
SD
t
rr
Q
RR
©2002 Fairchild Semiconductor Corporation Rev. B, February 2002
Source to Drain Diode Voltage Reverse Recovery Time ISD = 61A, dISD/dt = 100A/µs- - 35 ns
Reverse Recovered Charge ISD = 61A, dISD/dt = 100A/µs- - 30 nC
SD
= 25A - - 1.0 V
I
SD
Typical Characteristic
ISL9N306AP3/ISL9N306AS3ST
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 175
125
150
TC, CASE TEMPERATURE (oC)
Figure 1. Normalized Power Dissipation vs
Ambient Temperature
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJA
Z
THERMAL IMPEDANCE
0.01
-5
10
SINGLE PULSE NOTES:
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
90
75
VGS = 10V
60
VGS = 4.5V
45
30
, DRAIN CURRENT (A)
D
I
15
0
25 50 75 100 125 150 175
TC, CASE TEMPERATURE (oC)
Figure 2. Maximum Contin uous Drain Current vs
Case Temperature
P
DM
t
1
t
2
DUTY FACTOR: D = t1/t PEAK TJ = PDM x Z
-2
10
-1
10
2
x R
+ T
θJA
θJA
A
0
10
1
10
Figure 3. Normalized Maximum Transient Thermal Impedance
2000
1000
, PEAK CURRENT (A)
DM
I
100
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
50
-5
10
VGS = 10V
VGS = 5V
-4
10
-3
10
-2
10
-1
10
t, PULSE WIDTH (s)
TC = 25oC FOR TEMPERATURES
ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS:
I = I
175 - T
25
0
10
150
C
1
10
Figure 4. Peak Current Capability
©2002 Fairchild Semiconductor Corporation Rev. B, February 2002
ISL9N306AP3/ISL9N306AS3ST
Typical Characteristic
150
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
V
= 15V
DD
100
50
, DRAIN CURRENT (A)
D
I
TJ = 25oC
0
12345
Figure 5. Transfer Ch aracteri stics Figure 6. Saturation Characteristics
25
20
15
TJ = 175oC
VGS, GATE TO SOURCE VOLTAGE (V )
ID = 61A
(Continued)
TJ = -55oC
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
TC = 25oC
150
TC = 25oC
100
50
, DRAIN CURRENT (A)
D
I
0
0 0.5 1.0 1.5 2.0
2.0
1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
VGS = 10V
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
VGS = 4.5V
VGS = 3.5V
VGS = 3V
, DRAIN TO SOURCE
r
ID = 30A
ON RESISTANCE (mΩ)
10
DS(ON)
5
246810
ID = 75A
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 7. Drain to Source On Resis tanc e vs Ga te
Voltage and Drain Current
1.4
1.0
0.6
NORMALIZED GATE
THRESHOLD VOLTAGE
0.2
-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
VGS = VDS, ID = 250µA
Figure 9. Normalized Gate Thres hold Volta ge v s
Junction Temperature
ON RESISTANCE
1.0
NORMALIZED DRAIN TO SOURCE
0.5
-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
VGS = 10V, ID = 75A
Figure 8. Normalized Drain to Source On
Resistance vs Junction Temperature
1.2
1.1
1.0
BREAKDOWN VOLTAGE
NORMALIZED DRAIN TO SOURCE
0.9
-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
ID = 250µA
Figure 10. Normalized Drain to Source
Breakdown Voltage vs Junction Temp er atu re
©2002 Fairchild Semiconductor Corporation Rev. B, February 2002
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