600V, SMPS Series N-Channel IGBT with
Anti-Parallel Hyperfast Diode
This family of MOS gat ed high voltage switching devices
combine the best f eatures of MOSFETs and bipolar
transist ors. These devices hav e the high input i m pedance of
a MOSFET and the low on-st ate conduction l oss of a bipolar
transist or. The much lower on-state voltage drop v ari es only
moderately bet ween 25
o
C and 150oC. Th e IGBT used is the
dev elopment type TA49339. The diode used in anti-parallel
is the development type TA49372.
These IGBT’s are ideal for many high volt age switching
applications operating at high frequencies where low
conduction losses are essential. These devices have been
optimized for high frequency switch mode power
supplies.
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . T
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Rati ngs” may cause permane nt damage to the device. This is a stress only rating and oper ation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
C25
C110
CM
GES
GEM
D
, T
J
STG
L
70A
40A
280A
±20V
±30V
290W
-55 to 150
260
o
C
o
C
NOTE:
1. Pulse width limited by maximum junction temperature.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
J
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Collector to Emitter Breakdown VoltageBV
Collector to Emitter Leakage CurrentI
Collector to Emitter Saturation VoltageV
Gate to Emitter Threshold VoltageV
Gate to Emitter Leakag e C urrentI
CES
CES
CE(SAT)IC
GE(TH)
GES
Switching SOASSOAT
Gate to Emitter Plateau VoltageV
On-State Gate ChargeQ
Current Turn-On Delay Timet
Current Rise Timet
Current Turn-Off Delay Timet
Current Fal l Tim et
Turn-On Energy (Note 3)E
Turn-On Energy (Note 3)E
Turn-Off Energy (Note 2)E
Current Turn-On Delay Timet
Current Rise Timet
Current Turn-Off Delay Timet
Current Fal l Tim et
Turn-On Energy (Note 3)E
Turn-On Energy (Note 3)E
Turn-Off Energy (Note 2)E
2. Turn-Off Energy Loss (E
at the point where the collector current equals zero (I
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
) is define d as the integr al of the i nsta ntaneo us pow er loss st arti ng at the tr aili ng edge of the inp ut pul se and en ding
OFF
= 0A). Al l d ev ic es we r e tes t ed per J E DEC S t anda r d No . 2 4-1 Met hod fo r Mea su r eme nt
CE
3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E
is the turn-on loss when a typ ical diode is used i n the test circuit and the diod e is at the sa me T
Figure 20.