Fairchild Semiconductor FIN1532 Datasheet
December 2001
Revised December 2001
FIN1532
5V LVDS 4-Bit High Speed Differential Receiver
FIN1532 5V LVDS 4-Bit High Speed Differential Receiver
General Description
This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typical differential input th reshold of 1 00 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipation even at high frequen cies. This device is ideal for high
speed transfer of clock and data.
The FIN1532 can be paired with its companion dr iver, the
FIN1531, or any other LVDS driver.
Features
■ Greater than 400Mbs data rate
■ 5V power su pply operation
■ 0.5 ns maximum differential pulse skew
■ 3 ns maximum propagation delay
■ Low power dissipation
■ Power-Off protection for inputs and outputs
■ Fail safe protection for ope n-circuit, shorted and termi-
nated receiver inputs
■ Meets or exceeds the TIA/EIA-644 LVDS standard
■ Pin compatible with equivalent RS-422
and PECL devices
■ 16-Lead SOIC and TSSOP packages save space
Ordering Code:
Order Number Package Number Package Description
FIN1532M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1532MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
Pin Descriptions
Pin Name Description
R
, R
, R
OUT1
R
IN1+
R
IN1−
, R
, R
OUT2
IN2+
IN2−
, R
OUT3
, R
, R
IN3+
IN4+
, R
, R
IN3−
EN Driver Enable Pin
EN
V
GND Ground
IN4−
CC
LVTTL Data Outputs
OUT4
Non-inverting LVDS Inputs
Inverting LVDS Inputs
Inverting Driver Enable Pin
Power Supply
Connection Diagram
Function Table
Input Outputs
EN EN
HXHLH
HXLHL
H X Fail Safe Condition H
XLHLH
XLLHL
X L Fail Safe Condition H
LH X Z
H = HIGH Logic Le v el L = LOW Logic Leve l X = Don’t Care
Z = High Impedance Fail Safe = Open, Shorted, Terminat ed
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R
IN+
R
IN+
R
OUT
Top View
Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage ( VCC) −0.5 V to +6 V
DC Input Voltage (V
FIN1532
Enable Inputs
Receiver Inputs
DC Output Voltage (V
DC Output Current (I
Storage Temperature Range (T
Max Junction Temperature (T
Lead Temperature (T
)
IN
−0.5 V to +6 V
−0.5 V to +6 V
) −0.5 V to +6 V
OUT
)16 mA
O
)
L
) −65°C to +150°C
STG
)150°C
J
(Soldering, 10 seconds) 260
ESD (Human Body Model)
ESD (Machine Model)
≥ 8000 V
≥ 300 V
Conditions
Supply Voltage (V
Input Voltage (V
Enable Inputs 0 to V
Receiver Inputs 0 to 2.4 V
Magnitude of Differential Voltage
(|V
|) 100 mV to 600 mV
ID
Common-mode Input Voltage
)|V
(V
°C
IC
Operating Temperature (T
Note 1: The “Absolute Maximum Ratings”: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperatur e and output/input loading va riables. Fairchild
does not recommend operation of circu it s o ut s ide databook specific ation.
) 4.5 V to 5.5 V
CC
)
IN
) −40°C to +85°C
A
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol Parameter Test Conditions
V
TH
V
TL
I
IN
V
IH
V
IL
V
OH
V
OL
V
IK
I
OZ
I
O(OFF)
I
OS
I
CCZ
I
CC
I
PU/PD
C
IN
C
OUT
Note 2: All typical values are at TA = 25°C and with VCC = 5V.
Differential Input Threshold HIGH VIC = +1.2V, See Figure 1 100 mV
Differential Input Threshold LOW VIC = +1.2V, See Figure 1 −100 mV
Input Current EN or EN VIN = 0V or VCC, VCC = 5.5 or 0V ±20 µA
Input Current Receiver Inputs V
Input High Voltage (EN or EN)2.0V
Input Low Voltage (EN or EN)GND0.8V
Output HIGH Voltage IOH = −100 µAV
Output LOW Voltage IOH = 100 µA0.010.2
Input Clamp Voltage IIK = −18 mA −1.5 −0.8 V
Disabled Output Leakage Current EN = 0.8 and EN = 2V, V
Power-OFF Output Current V
Output Short Circuit Test Receiver Enabled, V
Disabled Power Supply Current Receiver Disabled 1.2 5 mA
Power Supply Current Receiver Enabled, R
Output Power Up/Power Down VCC = 0V to 2.0V ±20 µA
High Z Leakage Current
Input Capacitance 5.5 pF
Output Capacitance 4.5 pF
= 0V or 2.4 V, VCC = 5.5 or 0V ±20 µA
IN
IOH = −8 mA 3.8 4.68
= 8 mA 0.22 0.5
I
OL
= 0V or 5.5V, VCC = 0V 50 µA
OUT
(one output shorted at a time)
Receiver Enabled, R
OUT
= 0V
OUT
= 1V and R
IN+
= 1.4V and R
IN+
= 5.5V or 0V ±20 µA
= 1.4V 11 17
IN−
= 1V 15 23
IN−
Min Typ Max
−0.2 4.98
CC
−15 −100 mA
(Note 2)
|/2 to (2.4−|VID|/2)
ID
CC
CC
Units
V
V
V
mA
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