Fairchild Semiconductor FIN1047 Datasheet

FIN1047

3.3V LVDS 4-Bit Flow-Through
High Speed Differential Driver

FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver

June 2001
Revised August 2003

General Description

This quad driver is designed for high speed inte rconnects
utilizing Low Voltage Differential Signaling (LVDS) technol­ogy. The driver translates LVTTL signal levels to LVDS lev­els with a typical differen tial output swin g of 350mV w hich
provides low EMI at ultra low power dissipation even at
high frequencies. Th is device is ideal for hi gh spe ed tran s­fer of clock and data.

The FIN1047 can be paired with its companion receiver,
the FIN1048, or any other LVDS receiver.

Features

■ Greater than 400Mbs data rate

■ Flow-through pinout simpli f ies PCB layout

■ 3.3V power supply operation

■ 0.4 ns maximum differential pulse skew

■ 1.7 ns maximum propagation delay

■ Low power dissipation

■ Power-Off protection

■ Meets or exceeds the TIA/EIA-644 LVDS standard

■ Pin compatible with equivalent RS-422 and LVPECL

devices

■ 16-Lead SOIC and TSSOP packages save space

Ordering Code:

Order Number Package Number Package Description

FIN1047M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1047MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.

Connection Diagram

Pin Descriptions

Pin Name Description

, D

, D

, D

IN2

IN3

, D

OUT3+

, D

OUT3−

EN Driver Enable Pin
EN

V

CC

GND Ground

D

D

OUT1+

OUT1−

D

IN1

, D

OUT2+

, D

OUT2−

IN4

, D

, D

LVTTL Data Inputs
Non-Inverting

OUT4+

Driver Outputs
Inverting

OUT4−

Driver Outputs

Inverting Driver
Enable Pin

Power Supply

Truth Table

Inputs Outputs

EN EN

H L or OPEN H H L
H L or OPEN L L H
H L or OPEN OPEN L H
XHXZZ

L or OPEN X X Z Z

H = HIGH Logic Le v el L = LOW Logic Lev el
X = Don’t Care Z = High Impedance

D

D

IN

OUT+

D

OUT−

© 2003 Fairchild Semiconductor Corporation DS500589 www.fairchildsemi.com

Absolute Maximum Ratings(Note 1) Recommended Operating

Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V

FIN1047

DC Input Voltage (V
Driver Short Circuit Current (I
Storage Temperature Range (T
Max Junction Temperature (T
Lead Temperature (T

) −0.5V to +6V

IN

) −0.5V to 4.6V

OUT

) 260°C

L

) Continuous

OSD

) −65°C to +150°C

STG

) 150°C

J

(Soldering, 10 seconds)
ESD (Human Body Model)
ESD (Machine Model)

≥ 9000V
≥ 1200V

Conditions

Supply Voltage (V
Input Voltage ( V
Operating Temperature (TA) −40°C to +85°C

Note 1: The “Absolute Maximum Ratings”: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperatur e and output/input loading va riables. Fairchild
does not recommend operation of circu it s o ut s ide databook specific ation.

) 3.0V to 3.6V

CC

) 0 to V

IN

DC Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified

Symbol Parameter Test Conditions

V

OD

∆V

V

OS

∆V

V

OH

V

OL

I

OFF

I

OS

V

IH

V

IL

I

IN

I

OZ

I

I(OFF)

V

IK

I

CC

I

PU/PD

Note 2: All typical values are at TA = 25°C and with VCC = 3.3V .
Note 3: For transient conditio ns w hen t ≤ 5ns and I

Output Differential Voltage 250 340 450 mV
VOD Magnitude Change from

OD

Differential LOW-to-HIGH RL = 100Ω, Driver Enabled,
Offset Voltage See Figure 1 1.125 1.25 1.375 V
Offset Magnitude Change from

OS

Differential LOW-to-HIGH
HIGH Output Voltage VIN = V
LOW Output Voltage VIN = 0V 0.9 1.05 V
Power Off Output Current VCC = 0V, V
Short Circuit Output Current V

Input HIGH Voltage 2.0 VCC + 1.0 V
Input LOW Voltage (Note 3) GND 0.8 V
Input Current VIN = 0V or V
Disabled Output Leakage Current V
Power-Off Input Current VCC = 0V, VIN = 0V or 3.6V −20 20 µA
Input Clamp Voltage IIK = −18 mA −1.5 −0.7 V
Power Supply Current No Load, VIN = 0V or VCC, Driver Enabled 5 8

Output Power Up/Power Down
High Z Leakage Current

≤ −100 mA, V

IN

CC

= 0V or 3.6V −20 20 µA

OUT

= 0V, Driver Enabled −3 −6

OUT

= 0V, Driver Enabled −3.5 −6

V

OD

CC

= 0V or 4.6V −20 20 µA

OUT

= 100 Ω, VIN = 0V or VCC, Driver Enabled 1 6 22

R

L

= 0V or 1.5V −20 20 µA

V

CC

= −1.0V.

ILmin

Min Typ Max

(Note 2)

−20 20 µA

CC

Units

1.4 25 mV

1.2 25 mV

1.4 1.6 V

mA

mARL = 100 Ω, Driver Disabled 1.7 4

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AC Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified

Symbol Parameter Test Conditions

t

PLHD

Differential Propagation Delay
LOW-to-HIGH

t

PHLD

Differential Propagation Delay
HIGH-to-LOW

t

TLHD

t

THLD

t

SK(P)

t

SK(LH)

t

SK(HL)

t

SK(PP)

f

MAX

t

ZHD

t

ZLD

t

HZD

t

LZD

C

IN

C

OUT

Note 4: All typical values are at TA = 25°C and with VCC = 3.3V.
Note 5: t

tion.
Note 6: t
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.

Note 7: f
Note 8: Test Circuits in Figures 2, 4, 6 are simplified representations of test fixture and DUT loading.

Differential Output Rise Time (20% to 80%) RL = 100 Ω, CL = 10 pF, 0.4 1.2 ns
Differential Output Fall Time (80% to 20%) See Figure 2 (Note 8), and Figure 3 0.4 1.2 ns
Pulse Skew |t

- t

| 0.4 ns

PLH

PHL

Channel-to-Channel Skew
(Note 5)
Part-to-Part Skew (Note 6) 1.0 ns
Maximum Frequency (Note 7) RL = 100Ω, See Figure 6 (Note 8) 200 250 MHz
Differential Output Enable Time from Z to HIGH 1.7 5.0 ns
Differential Output Enable Time from Z to LOW RL = 100Ω, CL = 10 pF, 1.7 5.0 ns
Differential Output Disable Time from HIGH to Z See Figure 4 (Note 8), and Figure 5 2.7 5.0 ns
Differential Output Disable Time from LOW to Z 2.7 5.0 ns
Input Capacitance 4.2 pF
Output Capacitance 5.2 pF

, t

SK(LH)

SK(PP)

MAX

is the skew between spe cifi ed out puts of a sing le dev ice whe n the ou tput s have iden tical lo ads an d ar e switch ing in the sam e direc-

SK(HL)

is the magnitude of t he difference in propagation delay tim es between any sp ec if ied terminals of two devices switching in the same direction

criteria: Input tR = tF < 1ns, 0V to 3V, 50% Duty Cycle; Output VOD > 250 mv, 45% to 55% Duty Cycle; all switching in phase c hannels.

Min Typ Max

(Note 4)

0.6 1.1 1.7 ns

0.6 1.2 1.7 ns

0.05 0.3 ns

FIN1047

Units

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