Fairchild Semiconductor FIN1026 Datasheet

June 2002 Revised June 2002
FIN1026
3.3V LVDS 2-Bit High Speed Differential Receiver
FIN1026 3.3V LVDS 2-Bit High Speed Differential Receiver
General Description
This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technol­ogy. The receiver translates LVDS levels, with a typical dif­ferential input threshold of 10 0mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data.
The FIN1026 can be paired with its companion dr iver, the FIN1025, or any other LVDS driver.
Features
Greater than 400Mbs data rate
Flow-through pinout simpli f ies PCB layout
3.3V power supply operation
0.4ns maximum differential pulse skew
2.5ns maximum propagation delay
Low power dissipation
Power-Off protection
Fail safe protection for ope n-circuit, shorted and termi-
nated non-driven input conditions
Meets or exceeds the TIA/EIA-644 LVDS standard
14-Lead TSSOP package saves space
Ordering Code:
Order Number Package Number Package Description
FIN1026MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
Connection Diagram Pin Descriptions
Pin Name Description
, R
R
OUT1
R
, R
IN1+
R
, R
IN1
EN Driver Enable Pin EN
V
CC
GND Ground
NC No Connect
LVTTL Data Outputs
OUT2
Non-Inverting LVDS Inputs
IN2+
Inverting LVDS Inputs
IN2
Inverting Driver Enable Pin Power Supply
Truth Table
Inputs Outputs
EN EN
HL or OpenH L H HL or OpenL H L H L or Open Fail Safe Condition H
XHXXZ
L or Open X X X Z
H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance Fail Safe = Open, Shorted, Terminated
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R
IN+
R
IN
R
OUT
Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) 0.5V to +4.6V LVDS DC Input Voltage (V
FIN1026
LVTTL DC Input Voltage (V DC Output Voltage (V DC Output Current (I Storage Temperature Range (T Max Junction Temperature (T Lead Temper ature (T
) 0.5V to +4.6V
IN
) 0.5V to 6V
IN
) 0.5V to 6V
OUT
)16mA
O
)
L
) 65°C to +150°C
STG
) 150°C
J
(Soldering, 10 seco nds) 260 ESD (Human Body Model) 10,000V ESD (Machine Model) 600V
Conditions
Supply Voltage (V Magnitude of Differential Voltage
(|V
|) 100mV to V
ID
Common-Mode Input Voltage (VIC) 0.05V to 2.35V Input Voltage (V Operating Temperature (TA) 40°C to +85°C
Note 1: The Absolute Maximum Ratings: are those values beyond which damage to the device may occur. The databook specifications should be
°C
met, without exception, to ensure that the system design is reliable over its power supply, temperatur e and output/input loading va riables. Fairchild does not recommend operation of circu it s o ut s ide databook specific ation.
) 3.0V to 3.6V
CC
) 0 to V
IN
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol Parameter Test Conditions
V
TH
V
TL
I
IN
I
I(OFF)
V
OH
V
OL
I
OZ
V
IK
I
OS
I
CCZ
I
CC
Note 2: All typical values are at TA = 25°C and with VCC = 3.3V .
Differential Input Threshold HIGH See Figure 1, VIC = +0.05V, +1.2V, or 2.35V 100 mV Differential Input Threshold LOW See Figure 1, VIC = +0.05V, +1.2V, or 2.35V 100 mV Input Current VIN = 0V or V Power-Off Input Current VCC = 0V, V Output HIGH Voltage IOH = 100 µAV
Output LOW Voltage IOH = 100 µA00.2
Disabled Output Leakage Current EN = 0.8 and EN* = 2V, V Input Clamp Voltage IIK = 18 mA 1.5 0.8 V Output Short Circuit Current Receiver Enabled, V
Disabled Power Supply Current Receiver Disabled 2.6 5 mA Power Supply Current Receiver Enabled, (R
IOH = 8 mA 2.4 3.1
I
OL
(one output shorted at a time)
or (R
CC
= 0V or 3.6V ±20 µA
IN
= 8 mA 0.18 0.5
OUT
= 0V
OUT
= 1V and R
= 1.4V and R
IN+
IN+ IN
= 1V)
= 3.6V or 0V ±20 µA
= 1.4V)
IN
Min Typ Max
0.2 3.29
CC
-15 100 mA
(Note 2)
±20 µA
4.8 8.5 mA
CC
CC
Units
V
V
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