Fairchild Semiconductor FDZ202P Datasheet
ADVANCE INFORMATION
FDZ202P
P-Channel 2.5V Specified PowerTrenchTM BGA MOSFET
FDZ202P
November 1999
General Description
Combining Fairchild’s advanced 2.5V specified
PowerTrench process with state of the art BGA
packaging, the FDZ202P minimizes both PCB space
and R
. This BGA MOSFET embodies a
DS(ON)
breakthrough in packaging technology which enables
the device to combine excellent thermal transfer
characteristics, high c urrent handling capability, ultralow profile packaging, low gate charge, and low R
DS(ON)
.
Applications
•= Battery management
•= Load switch
•= Battery protection
D D D
Pin 1
S
GSS
D D D
S
S
Bottom
Absolute Maximum Ratings T
Pin 1
Top
o
=25
C unless otherwise noted
A
Features
•= –5.5 A, –20 V. R
R
•= Occupies only 5 mm
Only 55% of the area of SSOT-6
•= Ultra-thin package: less than 0.70 mm height when
mounted to PCB
•= Outstanding thermal t ransfer characteristic s:
4 times better than S S OT-6
•= Ultra-low Q
x R
g
•= High power and current handling capability.
= 0.045 Ω=@ VGS = –4.5 V
DS(ON)
= 0.075 Ω @ VGS = –2.5 V.
DS(ON)
2
of PCB area.
figure-of-merit.
DS(ON)
S
F202
G
D
Symbol Parameter Ratings Units
V
Drain-Source Voltage –20 V
DSS
V
Gate-Source Voltage
GSS
±12
ID Drain Current – Continuous (Note 1a) –5.5 A
– Pulsed –20
PD Power Dissipation (Steady State) (Note 1a) 2.7 W
TJ, T
Operating and Storage Junction Temperature Range -55 to +175
stg
V
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a) 55
(Note 1) 8
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
F202 FDZ202P TBD TBD TBD
1999 Fairchild Semiconductor Corporation
°C/W
°C/W
FDZ202P Rev. A (W)
FDZ202P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS
===∆T
I
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
DSS
I
GSSF
Breakdown Voltage Temperature
Coefficient
J
Gate–Body Leakage Current,
V
= 0 V, ID = –250 µA
GS
I
= –250 µA, Referenced to
D
25°C
VGS = –12 V, VDS = 0 V –100 nA
–20 V
28
mV/°C
Forward
I
Gate–Body Leakage Current,
GSSR
VGS = 12 V VDS = 0 V 100 nA
Reverse
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
R
Static Drain–Source
DS(on)
On–Resistance
V
= VGS, ID = –250 µA
DS
VGS = –4.5 V, ID = –5.5 A
V
= –2.5 V, ID = –4.0 A
GS
–0.4 –0.9 –1.5 V
0.036
0.060
0.045
0.075
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –2.3 A
VSD Drain–Source Diode Forward
Voltage
Notes:
1. R
is the a function of the junction-to-case (R
θJA
defined the top surface of the package. R
(a). R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
= 55°C/W (steady-state) when mounted on 1 in2 of 2 oz. copper.
θJA
θJC
is guaranteed by design while R
θJC
), case-to-ambient (R
VGS = 0 V, IS = –2.3 A (Note 2) –0.77 –1.2 V
) and the PC Board (R
θCA
and R
θCA
θBA
) thermal resistance where the case thermal reference is
θBA
are determined by the user's design.
µA
Ω
FDZ202P Rev. A (W)