Fairchild Semiconductor FDW262P Datasheet

FDW262P
20V P-Channel PowerTrench

FDW262P
June 2001
General Description
This P-Channel 1.8V specified MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been espec ially tailored to minimize the on-state resistance and yet maintain
Features
–4.5 A, –20 V. R R R
= 47 m @ VGS = –4.5 V
DS(ON)
= 65 m @ VGS = –2.5 V
DS(ON)
= 100 m @ VGS = –1.8 V
DS(ON)
low gate charge for superior switching performance.
R
rated for use with 1.8 V logic
DS(ON)
Applications
Power management
Load switch
D
S
S
D
D
TSSOP-8
Pin 1
Absolute Maximum Ratings T
G
S
S
o
=25
C unless otherwise noted
A
Low gate charge (13nC typical)
High performance trench te chnology for extremely
low R
DS(ON)
Low profile TSSOP-8 package
5 6 7 8
4 3 2 1
Symbol Parameter Ratings Units
V
Drain–Source Voltage –20 V
DSS
V
Gate-Source Voltage
GSS
±8 ID Drain Current – Continuous (Note 1a) –4.5 A – Pulsed –40
PD
TJ, T
STG
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range –55 to +150
(Note 1a) 1.3 (Note 1b)
0.6
V
W
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1a) 87 (Note 1b)
133
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
2001 Fairchild Semiconductor Corporation
262P FDW262P 13’’ 16mm 3000 units
°C/W °C/W
FDW262P Rev C(W)
FDW262P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
BVDSS T
I
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
DSS
I
GSSF
I
GSSR
Breakdown Voltage Temperature Coefficient
J
Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –8 V VDS = 0 V –100 nA
= 0 V, ID = –250 µA
V
GS
= –250 µA, Referenced to 25°C
I
D
–20 V
–14
mV/°C
µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
VGS(th)TJ
R
DS(on)
Gate Threshold Voltage Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current VGS = –4.5 V, VDS = –5 V –20 A
D(on)
= VGS, ID = –250 µA
V
DS
I
= –250 µA,
D
Referenced to 25°C VGS = –4.5 V, ID = –4.5 A
= –2.5 V, ID = –3.7 A
V
GS
= –1.8 V, ID = –3 A
V
GS
=–4.5 V, ID =–4.5A, TJ=125°C
V
GS
gFS Forward Transconductance VDS = –5 V, ID = –4.5 A 16 S
–0.4 –0.8 –1.5 V
2.5 37
50 77 48
47 65
100
65
mV/°C
m
Dynamic Characteristics
C
Input Capacitance 1193 pF
iss
C
Output Capacitance 193 pF
oss
C
Reverse Transfer Capacitance
rss
= –10 V, V
V
DS
f = 1.0 MHz
= 0 V,
GS
96 pF
Switching Characteristics (Note 2)
t
Turn–On Delay Time 11 20 ns
d(on)
tr Turn–On Rise Time 9 18 ns t
Turn–Off Delay Time 36 57 ns
d(off)
tf Turn–Off Fall Time Qg Total Gate Charge 13 18 nC Qgs Gate–Source Charge 2.5 nC Qgd Gate–Drain Charge
= –10 V, ID = –1 A,
V
DD
= –4.5 V, R
V
GS
V
= –10 V, ID = –4.5 A,
DS
= –4.5 V
V
GS
GEN
= 6
19 34 ns
3.6 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –1.1 A VSD
Notes:
1. R
θJA
the drain pins. R
Drain–Source Diode Forward Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
θCA
a) 87°C/W when
mounted on a 1in2 pad of 2 oz copper.
V
= 0 V, IS = –1.1 A (Note 2) –0.7 –1.2 V
GS
is determined by the user's board design.
b) 133°C/W when mounted
on a minimum pad of 2 oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDW262P Rev C(W)
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