Fairchild Semiconductor FDW256P Datasheet
FDW256P
FDW256P
30V P-Channel PowerTrench MOSFET
May 2001
General Description
This P-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
Applications
• Battery protection
• DC/DC conversion
Features
• –8 A, –30 V R
R
• Extended V
GSS
• High performance trench technology for extremely
low R
DS(ON)
• Low profile TSSOP-8 package
= 13.5 mΩ @ VGS = –10 V
DS(ON)
= 20 mΩ @ VGS = –4.5 V
DS(ON)
range (±25V) for battery applications
• Power management
• Load switch
D
S
S
D
S
S
D
TSSOP-8
Pin 1
Absolute Maximum Ratings T
G
o
=25
C unless otherwise noted
A
5
6
7
8
4
3
2
1
Symbol Parameter Ratings Units
V
Drain-Source Voltage –30 V
DSS
V
Gate-Source Voltage ± 25 V
GSS
ID Drain Current – Continuous (Note 1) –8 A
– Pulsed –50
PD Power Dissipation (Note 1a) 1.3 W
TJ, T
STG
(Note 1b)
0.6
Operating and Storage Junction Temperature Range –55 to +150 °C
Thermal Characteristics
R
Thermal Resistance, Junction-to-Ambient (Note 1a) 96 °C/W
θJA
(Note 1b)
208
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
2001 Fairchild Semiconductor Corporation FDW256P Rev C(W)
256P FDW256P 13’’ 16mm 3000 units
FDW256P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA –30 V
DSS
∆BVDSS
∆TJ
I
Zero Gate Voltage Drain Current VDS = –24 V, VGS = 0 V –1 µA
DSS
I
GSSF
I
GSSR
Breakdown Voltage Temperature
Coefficient
ID = –250 µA, Referenced to 25°C –23 mV/°C
Gate–Body Leakage, Forward VGS = 25 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –25 V, VDS = 0 V –100 nA
On Characteristics (Note 2)
V
Gate Threshold Voltage VDS = VGS, ID = –250 µA –1 –1.7 –3 V
GS(th)
∆VGS(th)
∆TJ
R
DS(on)
I
D(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = –250 µA, Referenced to 25°C
VGS = –10 V, ID = –8.0 A
VGS = –4.5 V, ID = –6.5 A
VGS=–10 V, ID =–8.0A, TJ=125°C
5 mV/°C
11
13.5
16
15
m Ω
20
19
On–State Drain Current VGS = –10 V, VDS = –5 V –50 A
gFS Forward Transconductance VDS = –5 V, ID = –8.0 A 30 S
Dynamic Characteristics
C
Input Capacitance 2267 pF
iss
C
Output Capacitance 599 pF
oss
C
Reverse Transfer Capacitance
rss
VDS = –15 V, V
f = 1.0 MHz
= 0 V,
GS
315 pF
Switching Characteristics (Note 2)
t
Turn–On Delay Time 15 27 ns
d(on)
tr Turn–On Rise Time 11 35 ns
t
Turn–Off Delay Time 78 125 ns
d(off)
tf Turn–Off Fall Time
Qg Total Gate Charge 28 38 nC
Qgs Gate–Source Charge 7 nC
Qgd Gate–Drain Charge
VDD = –15 V, ID = –1 A,
VGS = –10 V, R
GEN
= 6 Ω
VDS = –15 V, ID = –8.0 A,
VGS = –5.0V
45 72 ns
12 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current –1.2 A
VSD
Notes:
1. R
θJA
the drain pins. R
a) R
b) R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Drain–Source Diode Forward
Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
is 96 °C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
θJA
is 208 °C/W (steady state) when mounted on a minimum copper pad on FR-4.
θJA
is determined by the user's board design.
θCA
VGS = 0 V, IS = –1.2 A (Note 2) –0.7 –1.2 V
FDW256P Rev C(W)
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