Fairchild Semiconductor FDW252P Datasheet
FDW252P
P-Channel 2.5V Specified PowerTrench
MOSFET
FDW252P
June 2000
PRELIMINARY
General Description
This P-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (2.5V – 12V).
Features
• –8.8 A, –20 V. R
R
• Extended V
range (±12V) for battery
GSS
= 0.012 Ω @ VGS = –4.5 V
DS(ON)
= 0.018 Ω @ VGS = –2.5 V
DS(ON)
applications
Applications
• Load switch
• Motor drive
• DC/DC conversion
• Power management
D
S
S
D
S
S
TSSOP-8
D
Pin 1
Absolute Maximum Ratings T
G
=25oC unless otherwise noted
A
• Low gate charge
• High performance trench technology for extremely
low R
DS(ON)
• Low profile TSSOP-8 package
5
6
7
8
4
3
2
1
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage -20 V
Gate-Source Voltage
± 12
Drain Current – Continuous (Note 1) -8.8 A
– Pulsed -50
Power Dissipation (Note 1a) 1.3 W
(Note 1b)
0.6
Operating and Storage Junction Temperature Range -55 to +150
V
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1a) 96
(Note 1b)
208
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
252P FDW252P 13’’ 16mm 3000 units
2000 Fairchild Semiconductor Corporati on
°C/W
FDW252P Rev. B(W)
FDW252P
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
===∆T
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
= 0 V, ID = –250 µA
V
GS
I
= –250 µA, Referenced to 25°C
D
Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1
Gate–Body Leakage, Forward VGS = –12 V, VDS = 0 V –100 nA
Gate–Body Leakage, Reverse VGS = 12 V, VDS = 0 V 100 nA
–20 V
–12
mV/°C
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
===∆T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
= VGS, ID = –250 µA
V
DS
I
= –250 µA, Referenced to 25°C
D
= –4.5 V, ID = –8.8 A
V
GS
= –2.5 V, ID = –7.2 A
V
GS
= –4.5 V, ID = –8.8 A, TJ= 125°C
V
GS
On–State Drain Current VGS = –4.5 V, VDS = –5 V –50 A
Forward Transconductance VDS = –10 V, ID = –8.8 A 46 S
–0.6 –0.8 –1.5 V
3.5
9
13
13
mV/°C
12
18
20
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 5045 pF
V
= –10 V, V
Output Capacitance 1035 pF
Reverse Transfer Capacitance
DS
f = 1.0 MHz
GS
= 0 V,
549 pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 8 16 ns
Turn–On Rise Time 14 25 ns
Turn–Off Delay Time 130 208 ns
Turn–Off Fall Time
= –10 V, ID = –1 A,
V
DD
= –4.5 V, R
V
GS
GEN
= 6 Ω
80 128 ns
Total Gate Charge 41 66 nC
V
= –10 V, ID = –8.8 A,
Gate–Source Charge 7 nC
Gate–Drain Charge
DS
V
GS
= –4.5 V
11 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
Maximum Continuous Drain–Source Diode Forward Current –1.2 A
Drain–Source Diode Forward
Voltage
= 0 V, IS = –1.2 A (Note 2) –0.6 –1.2 V
V
GS
µA
mΩ
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface
θJA
of the drain pins. R
a) R
is 96°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
θJA
is 208°C/W (steady state) when mounted on a minimum copper pad on FR-4.
b) R
θJA
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
FDW252P Rev. B(W)
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