Fairchild Semiconductor FDW2503N Datasheet

FDW2503N

Dual N-Channel 2.5V Specified PowerTrench



MOSFET

FDW2503N

April 2000

PRELIMINARY

General Description

This N-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild's Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (2.5V – 12V).

Applications

• Load switch

• Motor drive

• DC/DC conversion

• Power management

G

2

S

2

S

2

D

2

S

D

1

TSSOP-8

Pin 1

Features

• 5.5 A, 20 V. R

• Extended V

GSS

• Low gate charge

• High performance trench technology for extremely

low R

DS(ON)

• Low profile TSSOP-8 package

G

1

S

1

1

= 0.021 Ω @ VGS = 4.5 V

DS(ON)

= 0.035 Ω @ VGS = 2.5 V

R

DS(ON)

range (±12V) for battery applications

1

2

3

4

8

7

6

5

Absolute Maximum Ratings T

=25oC unless otherwise noted

A

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

STG

Drain-Source Voltage 20 V

Gate-Source Voltage

±12

Drain Current – Continuous (Note 1a) 5.5 A

– Pulsed 30

Power Dissipation (Note 1a) 1.0 W

(Note 1b)

0.6

Operating and Storage Junction Temperature Range -55 to +150

Thermal Characteristics

R

θJA

Thermal Resistance, Junction-to-Ambient (Note 1a) 125

(Note 1b)

208

°C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

2503N FDW2503N 13’’ 12mm 3000 units

2000 Fairchild Semiconductor Corporati on

FDW2503N Rev D (W)

V

°C

FDW2503N

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BVDSS
===∆T
I

DSS

I

GSSF

I

GSSR

Drain–Source Breakdown Voltage

Breakdown Voltage Temperature
Coefficient

J

V

= 0 V, ID = 250 µA

GS

I

= 250 µA,Referenced to 25°C

D

20 V

14

Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1

Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA

Gate–Body Leakage, Reverse VGS = –12 V VDS = 0 V –100 nA

mV/°C

On Characteristics (Note 2)

V

GS(th)

∆VGS(th)
===∆T
R

DS(on)

I

D(on)

g

FS

Gate Threshold Voltage

Gate Threshold Voltage
Temperature Coefficient

J

Static Drain–Source
On–Resistance

V

= VGS, ID = 250 µA

DS

= 250 µA,Referenced to 25°C

I

D

= 4.5 V, ID = 5.5 A

V

GS

= 2.5 V, ID = 4.2 A

V

GS

= 4.5 V, ID = 5.5A, TJ=125°C

V

GS

0.6 0.8 1.5 V

–3.2

17

22

23

On–State Drain Current VGS = 4.5 V, VDS = 5 V 30 A

Forward Transconductance VDS = 5 V, ID = 5.5 A 26 S

21

35

29

mV/°C

mΩ

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance 1082 pF

Output Capacitance 277 pF

Reverse Transfer Capacitance

= 10 V, V

V

DS

f = 1.0 MHz

GS

= 0 V,

130 pF

Switching Characteristics (Note 2)

t

t

t

t

Q

Q

Q

d(on)

r

d(off)

f

g

gs

gd

Turn–On Delay Time 8 16 ns

Turn–On Rise Time 8 16 ns

= 10 V, ID = 1 A,

V

DD

= 4.5 V, R

V

GS

GEN

= 6 Ω

Turn–Off Delay Time 24 38 ns

Turn–Off Fall Time

Total Gate Charge 12 19 nC

Gate–Source Charge 2 nC

V

= 10 V, ID = 5.5 A,

DS

= 4.5 V

V

GS

Gate–Drain Charge

816ns

3nC

Drain–Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

a) R

b) R

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

Maximum Continuous Drain–Source Diode Forward Current 0.83 A

Drain–Source Diode Forward

VGS = 0 V, IS = 0.83 A (Note 2) 0.7 1.2 V

Voltage

is guaranteed by design while R

θJC

is 125°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.

θJA

is 208°C/W (steady state) when mounted on a minimum copper pad on FR-4.

θJA

is determined by the user's board design.

θCA

µA

FDW2503N Rev. D (W)