Fairchild Semiconductor FDS8958A Datasheet

FDS8958A Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description Features
June 1998
These dual N- and P -Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
SuperSOTTM-6
D2
D2
D1
D1
FDS
8958A
G2
S2
SO-8
pin 1
G1
S1
N-Channel 7.0 A,30 V, R R P-Channel -5.0 A,-30 V,R R
High density cell design for extremely low R
=0.028 @ VGS=10 V
DS(ON)
=0.040 @ VGS= 4.5 V.
DS(ON)
=0.052 @ VGS=-10 V
DS(ON)
=0.080 @ VGS=-4.5 V.
DS(ON)
.
DS(ON)
High power and current handling capability in a widely used surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
SOIC-16SOT-23 SuperSOTTM-8 SO-8 SOT-223
5
6
7
8
3 2
141
Absolute Maximum Ratings T
Symbol Parameter N-Channel P-Channel Units
V
DSS
V
GSS
I
D
P
D
TJ,T
THERMAL CHARACTERISTICS
R
θJA
R
θ
JC
© 1998 Fairchild Semiconductor Corporation
Drain-Source Voltage 30 -30 V Gate-Source Voltage 20 -20 V Drain Current - Continuous (Note 1a) 7 -5 A
- Pulsed 20 -20 Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 Operating and Storage Temperature Range -55 to 150 °C
STG
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
A
FDS8958A Rev. C
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Type Min Typ Max Units OFF CHARACTERISTICS
BV
BV
I
DSS
I
GSSF
I
GSSR
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA N-Ch 30 V
VGS = 0 V, ID = -250 µA
Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC N-Ch 30 mV/oC
/T
J
ID = -250 µA, Referenced to 25 oC
Zero Gate Voltage Drain Current VDS = 24 V, V
VDS = -24 V, V
= 0 V N-Ch 1 µA
GS
= 0 V
GS
P-Ch -30 V
P-Ch -25
P-Ch -1 µA Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA Gate - Body Leakage, Reverse
VGS = -20 V, VDS = 0 V
All -100 nA
ON CHARACTERISTICS (Note 2)
V
V
R
I
D(on)
g
GS(th)
DS(ON)
FS
GS(th)
Gate Threshold Voltage
Gate Threshold Voltage Temp. Coefficient
/T
J
Static Drain-Source On-Resistance
On-State Drain Current
Forward Transconductance
V
= VGS, ID = 250 µA
DS
V
= VGS, ID = -250 µA
DS
ID = 250 µA, Referenced to 25 oC ID = -250 µA, Referenced to 25 oC V
= 10 V, ID = 7.0 A
GS
V
= 4.5 V, ID = 6.0 A 0.035 0.04
GS
V
= -10 V, ID = -5.0 A
GS
V
= -4.5 V, ID = - 4.0 A 0.068 0.08
GS
VGS = 10 V, V VGS = -10 V, V
= 5 V
DS
= -5 V P-Ch -20
DS
VDS = 5 V, I D = -7 A
N-Ch 1 1.7 3 V
P-Ch -1 -1.5 -3 V
N-Ch -4.4
mV/oC P-Ch 3.2 N-Ch 0.024 0.028
P-Ch 0.044 0.052
N-Ch 20 A
N-Ch 15 S
VDS = -5 V, I D = -5 A P-Ch 8 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
Input Capacitance
VDS = 15 V, VGS = 0 V, f = 1.0 MHz
Input Capacitance N-Ch 345 pF
VDS = -15 V, VGS = 0 V,
C
rss
Reverse Transfer Capacitance N-Ch 90 pF
f = 1.0 MHz
N-Ch 650 pF P-Ch 730
P-Ch 400
P-Ch 90
FDS8958A Rev. C
Electrical Characteristics (continued)
SWITCHING CHARACTERISTICS (Note 2) Symbol Parameter Conditions Type Min Typ Max Units
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
JA
θ
design while R
Turn - On Delay Time V
= 10 V, I D = 1 A N-Ch 8 16 ns
DS
VGS = 10 V , R
GEN
= 6
P-Ch 11 20
Turn - On Rise Time N-Ch 14 25 ns
P-Ch 10 18
Turn - Off Delay Time V
= -10 V, I D = -1 A N-Ch 23 37 ns
DS
VGS = -10 V , R
GEN
= 6
P-Ch 90 125
Turn - Off Fall Time N-Ch 9 18 ns
P-Ch 55 80
Total Gate Charge
VDS = 10 V, I D = 7 A, VGS = 10 V
N-Ch 18 26 nC P-Ch 19 27
Gate-Source Charge N-Ch 3.2 nC
VDS = -10 V, I D = -5 A, P-Ch 3.5
Gate-Drain Charge
VGS = -10 V
N-Ch 4.3 nC P-Ch 3.6
Maximum Continuous Drain-Source Diode Forward Current N-Ch 1.3 A
P-Ch -1.3 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A
VGS = 0 V, IS = -1.3 A
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design.
CA
θ
(Note 2) N-Ch 0.75 1.2 V
(Note 2)
P-Ch -0.75 -1.2 V
is guaranteed by
JC
θ
a. 78OC/W on a 0.5 in
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%..
pad of 2oz copper.
2
b. 125OC/W on a 0.02 in
pad of 2oz copper.
2
c. 135OC/W on a 0.003 in
pad of 2oz copper.
2
FDS8958A Rev. C
Typical Electrical Characteristics: N-Channel
30
V = 10V
GS
5.5V
24
18
12
4.5V
4.0V
3.5V
6
D
I , DRAIN-SOURCE CURRENT (A)
0
0 1 2 3 4 5
V , DRAIN-SOURCE VOLTAGE (V)
DS
3.0V
Figure 1. On-Region Characteristics.
1.8
I = 7A
D
V = 10V
GS
1.6
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)
J
2.4
2
V = 4.0V
GS
1.6
4.5 V
5.0V
DS(ON)
1.2
R , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.8 0 6 12 18 24 30
I , DRAIN CURRENT (A)
D
6.0 V
7.0V
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.15
0.12
0.09
0.06
0.03
DS(ON)
R , ON-RESISTANCE (OHM)
0
2 4 6 8 10
V , GATE TO SOURCE VOLTAGE (V)
GS
10V
I = 3A
D
T = 125°C
A
T = 25°C
A
Figure 3. On-Resistance Variation
with Temperature.
30
V = 10V
DS
25
20
15
10
D
I , DRAIN CURRENT (A)
5
0
1 2 3 4 5
Figure 5. Transfer Characteristics.
T = 125°C
J
25°C
-55°C
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
20
V = 0V
GS
1
T = 125°C
J
25°C
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2
V , BODY DIODE FORWARD VOLTAGE (V)
SD
-55°C
Figure 6. Body Diode Forward Voltage
Variation with Source Current and Temperature.
FDS8958A Rev. C
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