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February 1998
FDS8926A
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description Features
SO-8 N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to provide superior switching
performance and minimize on-state resistance. These devices
are particularly suited for low voltage applications such as disk
drive motor control, battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
are needed.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
D2
D2
D1
D1
FDS
8926A
G2
S2
SO-8
pin 1
G1
S1
5.5 A, 30 V. R
R
High density cell design for extremely low R
Combines low gate threshold (fully enhanced at 2.5V) with
high breakdown voltage of 30 V.
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
SO-8 SOT-223
5
6
7
8
= 0.030 Ω @ VGS = 4.5 V
DS(ON)
= 0.038 Ω @ VGS = 2.5 V.
DS(ON)
DS(ON)
SOIC-16
4
3
2
1
.
Absolute Maximum Ratings T
Symbol Parameter FDS8926A Units
V
DSS
V
GSS
I
D
P
D
TJ,T
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
© 1998 Fairchild Semiconductor Corporation
Drain-Source Voltage 30 V
Gate-Source Voltage ±8 V
Drain Current - Continuous (Note 1a) 5.5 A
- Pulsed 20
Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
Operating and Storage Temperature Range -55 to 150 °C
STG
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
= 25oC unless other wise noted
A
FDS8926A Rev.B
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Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
∆BV
I
DSS
I
GSSF
I
GSSR
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, I D = 250 µA 30 V
Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
ID = 250 µA, Referenced to 25oC
VDS = 24 V, V
GS
= 0 V
32
1 µA
TJ = 55°C
Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse
VGS = -8 V, V
DS
= 0 V
mV / oC
10 µA
-100 nA
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = 250 µA 0.4 0.67 1 V
Gate Threshold Voltage Temp. Coefficient
/∆T
J
Static Drain-Source On-Resistance
ID = 250 µA, Referenced to 25oC
VGS = 4.5 V, I D = 5.5 A
-3
0.025 0.03
mV /oC
Ω
TJ =125°C 0.037 0.052
0.031 0.038
20 S
I
g
D(ON)
FS
VGS = 2.5 V, I D = 4.5 A
On-State Drain Current VGS = 4.5 V, VDS = 5 V 20 A
Forward Transconductance
VDS = 5 V, I D = 5.5 A
DYNAMIC CH ARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = 10 V, VGS = 0 V,
Output Capacitance 410 pF
f = 1.0 MHz
900 pF
Reverse Transfer Capacitance 110 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
Turn - On Delay Time
Turn - On Rise Time
V
= 6 V, I D = 1 A
DS
VGS = 4.5 V , R
GEN
= 6 Ω
Turn - Off Delay Time 42 67
Turn - Off Fall Time 13 24
g
gs
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge 6.3
VDS = 10 V, I D = 5.5 A,
VGS = 4.5 V
6 12 ns
19 31
19.8 28 nC
2
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
design while R
JA
θ
Maximum Continuous Drain-Source Diode Forward Current 1.3 A
Drain-Source Diode Forward Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design.
CA
θ
VGS = 0 V, I S = 1.3 A
(Note 2)
0.68 1.2 V
is guaranteed by
JC
θ
a. 78OC/W on a 0.5 in
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
pad of 2oz copper.
2
b. 125OC/W on a 0.02 in
pad of 2oz copper.
2
c. 135OC/W on a 0.003 in
pad of 2oz copper.
2
FDS8926A Rev.B
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Typical Electrical Characteristics
30
V =4.5V
GS
3.5V
25
20
15
10
5
D
I , DRAIN-SOURCE CURRENT (A)
0
0 0.5 1 1.5 2 2.5 3
3.0V
2.5V
2.0V
1.5V
V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
1.8
I = 5.5 A
D
1.6
V = 4.5 V
GS
1.4
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
1.8
1.6
V = 2.0V
GS
1.4
1.2
DS(ON)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.8
0 5 10 15 20 25
Figure 2. On-Resistance Variation with
0.1
0.075
0.05
0.025
DS(ON)
R , ON-RESISTANCE (OHM)
0
1 2 3 4 5
2.5V
3.0V
3.5V
I , DRAIN CURRENT (A)
D
Drain Current and Gate Voltage.
T = 125°C
A
T = 25°C
A
V , GATE TO SOURCE VOLTAGE (V)
GS
4.5V
I = 2.8A
D
Figure 3. On-Resistance Variation With
Temperature.
20
V =5V
DS
16
12
8
D
I , DRAIN CURRENT (A)
4
0
0 0.5 1 1.5 2 2.5 3
V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5 . Transfer Characteristics.
T = -55°C
A
25°C
125°C
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
20
V = 0V
GS
1
0.1
0.01
0.001
S
I , REVERSE DRAIN CURRENT (A)
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
T = 125°C
A
25°C
-55°C
V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDS8926A Rev.B