Fairchild Semiconductor 74ABT541CMSA, 74ABT541CSJX, 74ABT541CSJ, 74ABT541CSCX, 74ABT541CSC Datasheet

September 1992
Revised November 1999

74ABT541
Octal Buffer/Line Driv e r with 3-STATE Outputs

74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs

General Description

The ABT541 is an octal buffer and line driver with 3-STATE
outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The ABT541 is simil ar to t he ABT 244 wi th br oad­side pinout.

Features

■ Non-inverting buffers

■ Output sink capability of 64 mA, source capability of

32 mA

■ Guaranteed output skew

■ Guaranteed multiple output switching specifications

■ Output switching sp ecified for both 50 pF and 250 pF

loads

■ Guaranteed simultaneous switching, noise level and
dynamic threshold performan ce

■ Guaranteed latchup protection

■ High impedance, glitch free bus loading during entire

power up and power down cycle

■ Nondestructive hot insertion capability

■ Flow-through pinout for ease of PC board layout

■ Disable time less than enable time to avoid bus

contention

Ordering Code:

Order Number Package Number Package Description

74ABT541CSC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74ABT541CSJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ABT541CMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT541CMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74ABT541CPC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.

Connection Diagram Pin Descriptions

Pin Names Descriptio n

OE
I
O

0–I7

1

0–O7

, OE

Output Enable Input (Active LOW)

2

Inputs
Outputs

Truth Table

Inputs

OE

LLH H
HXX Z
XHX Z

LLL L

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance

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OE

1

2

I

Outputs

Absolute Maximum Ratings(Note 1) Recommended Operating

Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C

74ABT541

Junction Temperature under Bias −55°C to +150°C
V

Pin Potential to Ground Pin −0.5V to +7.0V

CC

Input Voltage (Note 2) −0.5V to +7.0V
Input Cur rent (Note 2) −30 mA to +5.0 mA
Voltage Applied to Any Output

in the Disabled or
Power-Off State −0.5V to 5.5V
in the HIGH State −0.5V to V

Current Applied to Output

in LOW State (Max) twice the rated I
DC Latchup Source Current −500 mA
Over Voltage Latchup (I/O) 10V

OL

Conditions

Free Air Ambient Temperature −40°C to +85°C
Supply Voltage +4.5V to +5.5V
Minimum Input Edge Rate (∆V/∆t)

Data Input 50 mV/ns
Enable Input 20 mV/ns

Note 1: Absolute maximum ratings are values beyond which the device

CC

may be damaged or have its useful life impair ed. Functional operation
under these conditi ons is not implied.

(mA)

Note 2: Either voltage lim it or c urrent limit is sufficient to prot ect inputs.

DC Electrical Characteristics

Symbol Parameter Min Typ Max Units

V
V
V
V

Input HIGH Voltage 2.0 V Recognized HIGH Signal

IH

Input LOW Voltage 0.8 V Recognized LOW Signal

IL

Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA

CD

Output HIGH Voltage 2.5 V Min IOH = −3 mA

OH

2.0 V Min IOH = −32 mA
V
I

IH

Output LOW Voltage 0.55 V Min IOL = 64 mA

OL

Input HIGH Current 1

1V

I

BVI

I

IL

Input HIGH Current
Breakdown Test
Input LOW Current −1

7 µAMaxVIN = 7.0V

−1V

V

I
I

I
I
I
I
I
I

I

OZH

OZL
OS

CEX
ZZ
CCH
CCL
CCZ

CCT

Input Leakage Test 4.75 V 0.0 IID = 1.9 µA

ID

Output Leakage Current 10 µA0 − 5.5V
Output Leakage Current −10 µA0 − 5.5V

Output Short-Circuit Current −100 −275 mA Max V
Output HIGH Leakage Current 50 µAMaxV
Bus Drainage Test 100 µA0.0V
Power Supply Current 50 µA Max All Outputs HIGH
Power Supply Current 30 mA Max All Outputs LOW
Power Supply Current

50 µAMax

Additional ICC/Input Outputs Enabled 2.5 mA VI = VCC − 2.1V

Outputs 3-STATE 2.5 mA Max Enable Input VI = VCC − 2.1V
Outputs 3-STATE 50 µA Data Input VI = VCC − 2.1V;

I

CCD

Dynamic I

CC

No Load mA/

(Note 4) 0.1 MHz One Bit Toggling (Note 3),

Note 3: For 8 bits toggling, I
Note 4: Guaranteed, but not tested.

< 0.8 mA/MHz.

CCD

V

CC

µAMax

µAMax

VIN = 2.7V (Note 4)

VIN = 0.5V (Note 4)

All Other Pins Grounded
V
V

OEn = VCC;
All Others at VCC or Ground

All Others at VCC or Ground
Outputs Open, OEn = GND,

Max

50% Duty Cycle

Conditions

= V

IN

CC

= 0.0V

IN

= 2.7V; OEn = 2.0V

OUT

= 0.5V; OEn = 2.0V

OUT

= 0.0V

OUT

= V

OUT

CC

= 5.5V; All Others GND

OUT

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DC Electrical Characteristics

(SOIC Package)

Symbol Parameter Min Typ Max Units

V
V
V
V
V

Quiet Output Maximum Dynamic V

OLP

Quiet Output Minimum Dynamic V

OLV

Minimum HIGH Level Dynamic Output Voltage 2.7 3.1 V 5.0 TA = 25°C (Note 6)

OHV

Minimum HIGH Level Dynamic Input Voltage 2.0 1.4 V 5.0 TA = 25°C (Note 7)

IHD

Maximum LOW Level Dynamic Input Voltage 1.1 0.6 V 5.0 TA = 25°C (Note 7)

ILD

Note 5: Max number of outputs define d as (n). n − 1 data inputs are drive n 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6: Max number of outputs define d as (n). n − 1 data inputs are drive n 0V to 3V. One output HIGH. Guaran te ed, but not tested.
Note 7: Max number of data inputs (n) s witc hing. n − 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V

Guaranteed, but not tested.

OL

OL

−1.3 −0.8 V 5.0 TA = 25°C (Note 5)

0.7 1.0 V 5.0 TA = 25°C (Note 5)

V

CC

Conditions

CL = 50 pF, RL = 500Ω

), 0V to threshold (V

ILD

AC Electrical Characteristics

(SOIC and SSOP Package)

Symbol Parameter

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation Delay 1.0 2.0 3.6 1.0 3.6
Data to Outputs 1.0 2.4 3.6 1.0 3.6
Output Enable Time 1.5 3.1 6.0 1.5 6.0

Output Disable Time 1.7 3.5 6.1 1.7 6.1

TA = +25°CT

= +5V VCC = 4.5V–5.5V

V

CC

= −40°C to +85°C

A

CL = 50 pF CL = 50 pF

Min Typ Max Min Max

1.5 3.7 6.0 1.5 6.0

1.7 3.1 5.6 1.7 5.6

Units

Extended AC Electrical Characteristics

(SOIC Package)

−40°C to +85°C

VCC = 4.5V–5.5V VCC = 4.5V–5.5V VCC = 4.5V–5.5V

Symbol Parameter

CL = 50 pF CL = 250 pF CL = 250 pF

8 Outputs Switching 1 Output Switching 8 Outputs Switching

(Note 8) (Note 9) (Note 10)

Min Typ Max Min Max Min Max

f

TOGGLE

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Note 8: This specification is guaranteed but not tested. The limits apply to pr opagation delays fo r all paths described swit c hing in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).

Note 9: This specification is guaranteed but not tested. The limits represent propagation delay w it h 250 pF load capacito rs in place of the 50 pF load capac­itors in the standard AC load. This specification pertains to single output switching only.

Note 10: This specific at ion is guaranteed bu t n ot te s te d. T he limits represent prop agation delays for all pat hs described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.

Note 11: The 3-STATE delays are dominated by the RC network (500Ω, 250 pF) on the output and have been excluded from the datasheet.

Max Toggle Frequency 100 MHz
Propagation Delay 1.5 5.0 1.5 6.0 2.5 8.5
Data to Outputs 1.5 5.0 1.5 6.0 2.5 8.5
Output Enable Time 1.5 6.5 2.5 7.5 2.5 9.5

1.5 6.5 2.5 7.5 2.5 10.5

Output Disable Time 1.0 6.1

1.0 5.6

TA = −40°C to +85°CTA = −40°C to +85°C

Units

(Note 11) ns

74ABT541

).

IHD

ns

ns

ns

ns

ns

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