Fairchild Semiconductor 100201SCX, 100201SC Datasheet

© 1999 Fairchild Semiconductor Corporation DS011000 www.fairchildsemi.com

June 1992
Revised November 1999

100201 Low Power 2-Input OR/NOR Gate/Inverter

100201
Low Power 2-Input OR/NOR Gate/Inverter

General Description

The 100201 is a 2-input OR/NOR Gate and a single
Inverter Gate in an eight pin SOIC package. All inputs have
50 kΩ pull-down resistors and all outputs are buffered. The
100201 is ideal for single gate needs or for use as the feed­back loop of a crystal oscillator circuit.

Features

■ Small 8 lead 150 mil SOIC package

■ 2000V ESD protection

■ 300 MHz minimum F toggle

■ Temperature compensated

■ Voltage compensated operating rang e = −4.2V to −5.7V

V

EE

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol Connection Diagram

Pin Descriptions

Order Number Package Number Package Description

100201SC M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.50” Narrow

Pin Names Description

D

a

, D1b, D

2b

Data Inputs

O

b

Data Outputs

O

a

, O

b

Complementary Data Outputs

www.fairchildsemi.com 2

100201

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: The “Absolute Maximum Ratings” are those values beyon d which

the safety of the dev ice cannot be guaranteed. T he device sh ould not be
operated at these limit s. The parametric values defin ed in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recomme nded O peratin g Cond itions ” table will defin e the condition s
for actual device operation.

Note 2: ESD testing conf orm s t o M I L-STD-883, Method 3015.

Commercial Version
DC Electrical Characteristics

(Note 3)

V

EE

= −4.2V to −5.7V, VCC = GND, TC = 0°C to +85°C

Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the all owable syste m opera ti ng r ange s. Co ndi ti ons fo r t est ing shown in the ta ble s are cho­sen to guarantee operation under “worst case” condit ions.

SOIC AC Electrical Characteristics

VEE = −4.2V to −5.7V, VCC = GND

Note 4: The propagation dela y sp ec if ied is for single output sw it c hing. Delays may vary up to 100 ps with multiple outputs switching.

Storage Temperature (T

STG

) −65°C to +150°C

Maximum Junction Temperature (T

J

) +150°C

V

EE

Pin Potential to Ground Pin −7.0V to +0.5V

Input Voltage (DC) V

EE

to +0.5V
Output Current (DC Output HIGH) −50 mA
ESD (Note 2) ≥2000V

Operating Temperature (T

C

)0°C to +85°C

Supply Voltage (V

EE

) −5.7V to −4.2V

Symbol Parameter Min Typ Max Units Conditions

V

OH

Output HIGH Voltage −1025 −955 −870 mV

VIN = V

IH(Max)

or V

IL(Min)

Loading with

V

OL

Output LOW Voltage −1830 −1705 −1620 mV 50Ω to −2.0V

V

OHC

Output HIGH Voltage −1035 mV

VIN = V

IH(Min)

or V

IL(Max)

Loading with

V

OLC

Output LOW Voltage −1610 mV 50Ω to −2.0V

V

IH

Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal for All Inputs

V

IL

Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal for All Inputs

I

IL

Input LOW Current 0.50 µA VIN = V

IL(Min)

I

IH

Input HIGH Current 240 µA VIN = V

IH(Max)

I

EE

Power Supply Current −29 −17 −15 mA Inputs OPEN

Symbol Parameter

T

C

= 0°CT

C

= +25°CT

C

= +85°C

Units Conditions

Min Max Min Max Min Max

t

PLH

Propagation Delay

0.4 1.10 0.4 1.15 0.4 1.20 ns

Figure 1Figure 2

t

PHL

Data to Output (Note 4)

t

TLH

Transition Time

0.40 1.20 0.40 1.20 0.40 1.20 ns Figure 1Figure 2

t

THL

20% to 80%, 80% to 20%