Fairchild NC7WZ00 service manual
®
NC7WZ00 — TinyLogic UHS Dual 2-Input NAND Gate
March 2008
NC7WZ00
TinyLogic
®
UHS Dual 2-Input NAND Gate
Features
■
Space saving US8 surface mount package
■
MicroPak™ leadless package
Ultra High Speed; t
■
■
High Output Drive; ±24mA at 3V V
Broad V
■
■
Matches the performance of LCX when operated at
3.3V V
Power down high impedance inputs/output
■
■
Overvoltage tolerant inputs facilitate 5V to 3V
translation
■
Proprietary noise/EMI reduction circuitry implemented
Operating Range; 1.65V–5.5V
CC
CC
2.4ns typ. into 50pF at 5V V
PD
CC
Ordering Information
CC
General Description
The NC7WZ00 is a dual 2-Input NAND Gate from
Fairchild's Ultra High Speed Series of TinyLogic . The
device is fabricated with advanced CMOS technology to
achieve ultra high speed with high output drive while
maintaining low static power dissipation over a broad
V
operating range. The device is specified to operate
CC
over the 1.65V to 5.5V V
and output are high impedance when V
tolerate voltages up to 7V independent of V
voltage.
operating range. The inputs
CC
is 0V. Inputs
CC
operating
CC
Order
Number
NC7WZ00K8X MAB08A WZ00 8-Lead US8, JEDEC MO-187,
NC7WZ00L8X MAC08A N6 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Package
Number
Product Code
Top Mark Package Description Supplied As
3k Units on Tape and
Var iation CA 3.1mm Wide
Reel
Reel
©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ00 Rev. 1.11.0
Y =
H =
NC7WZ00 — TinyLogic
Connection Diagram
(Top View)
Pin One Orientation Diagram
AAA represents Product Code Top Mark – see
ordering code
Note:
Orientation of Top Mark determines Pin One
location. Read the top product code mark left to right, Pin
One is the lower left pin (see diagram).
Logic Symbol
IEEE/IEC
Function Table
AB
Inputs Output
AB Y
LL H
LH H
HL H
HH L
HIGH Logic Level
L = LOW Logic Level
®
UHS Dual 2-Input NAND Gate
Pad Assignments for MicroPak
(Top Thru View)
Pin Description
Pin Names Description
A
, B
n
n
Y
n
Inputs
Output
©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ00 Rev. 1.11.0 2
<
<
=
=
=
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter Rating
I
CC
V
V
I
T
CC
V
IN
OUT
I
IK
I
OK
OUT
/I
STG
T
T
L
P
D
GND
J
Supply Voltage –0.5V to +7V
DC Input Voltage –0.5V to +7V
DC Output Voltage –0.5V to +7V
DC Input Diode Current @ V
DC Output Diode Current @ V
–0.5V –50mA
IN
–0.5V –50mA
OUT
DC Output Current ±50mA
DC V
/GND Current ±100mA
CC
Storage Temperature –65°C to +150°C
Junction Temperature Under Bias 150°C
Junction Lead Temperature (Soldering, 10 seconds) 260°C
Power Dissipation @ +85°C 250mW
NC7WZ00 — TinyLogic
®
UHS Dual 2-Input NAND Gate
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Rating
V
CC
V
IN
V
OUT
T
A
, t
t
r
f
θ
JA
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
Supply Voltage Operating 1.65V to 5.5V
Supply Voltage Data Retention 1.5V to 5.5V
Input Voltage 0V to 5.5V
Output Voltage 0V to V
Operating Temperature –40°C to +85°C
Input Rise and Fall Time
V
V
V
1.65V ± 0.15V, 2.5V ± 0.2V 0ns/V to 20ns/V
CC
3.3V ±0.3V 0ns/V to 10ns/V
CC
5.0V ±0.5V 0ns/V to 5ns/V
CC
Thermal Resistance 250°C/W
CC
©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ00 Rev. 1.11.0 3
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