Fairchild HUF75321P3, HUF75321S3S service manual
HUF75321P3, HUF75321S3S
Data Sheet December 2001
35A, 55V, 0.034 Ohm, N-Channel UltraFE T
Power MOSFETs
These N-Channel pow er MOSFETs
are manufactured using the
innovat ive Ul traFET® pr ocess . This
advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outsta nding performance. This device is capable
of withstanding hi gh energy in the ava lan che mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, lowvoltage bus switches, and pow er management in portable
and battery-operated products.
Formerly developmental type TA75321.
Ordering Information
PART NUMBER PACKAGE BRAND
HUF75321P3 TO-220AB 75321P
HUF75321S3S TO-263AB 75321S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75321S3ST.
Features
• 35A, 55V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Models
- Thermal Impedance SPICE and SABER Models
Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC TO-220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
GATE
SOURCE
DRAIN
(FLANGE)
©2001 Fairchild Semiconductor Corpo ration HUF75321P3, HUF75321S3S Rev. B
HUF75321P3, HUF75321S3S
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (R
= 20kΩ) (Note 1) . . . . . . . . . . . . . V
GS
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
DGR
GS
55 V
55 V
±20 V
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . .T
, T
J
STG
D
DM
AS
D
35
Figure 4
Figures 6, 14, 15
93
0.625
-55 to 175
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300
260
A
W
W/oC
o
C
o
C
o
C
NOTE:
1. T
= 25oC to 150oC.
J
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
DSSID
DSS
GSS
= 250µA, VGS = 0V (Figure 11) 55 - - V
VDS = 50V, VGS = 0V - - 1 µA
V
= 45V, VGS = 0V, TC = 150oC--250µA
DS
VGS = ±20V - - ±100 nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
Drain to Source On Resistance r
GS(TH)VGS
DS(ON)ID
= VDS, ID = 250µA (Figure 10) 2 - 4 V
= 35A, VGS = 10V (Figure 9) - 0.028 0.034 Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
Turn-On Delay Time t
d(ON)
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Turn-Off Time t
θJC
θJA
ON
r
f
OFF
(Figure 3) - - 1.6
TO-220, TO-263 - - 62
VDD = 30V, ID ≅ 35A,
R
= 0.86Ω, VGS = 10V,
L
= 25Ω
R
GS
--100ns
-11- ns
-55- ns
-47- ns
-66- ns
--170ns
o
C/W
o
C/W
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
Gate to Source Gate Charge Q
Reverse Transfer Capacitance Q
g(TOT)VGS
g(10)
g(TH)
VGS = 0V to 10V - 21 26 nC
VGS = 0V to 2V - 1.3 1.6 nC
gs
gd
= 0V to 20V VDD = 30V,
I
≅ 35A,
D
= 0.86Ω
R
L
I
= 1.0mA
g(REF)
(Figure 13)
-3644nC
-3-nC
-9-nC
©2001 Fairchild Semiconductor Corpo ration HUF75321P3, HUF75321S3S Rev. B
5
HUF75321P3, HUF75321S3S
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
CAPACITANCE SPECIFICATIONS
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q
Typical Performance Curves
1.2
1.0
0.8
ISS
OSS
RSS
SD
rr
RR
VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)
- 680 - pF
- 270 - pF
-60-pF
ISD = 35A - - 1.25 V
ISD = 35A, dISD/dt = 100A/µs--59ns
ISD = 35A, dISD/dt = 100A/µs--82nC
40
30
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
TC, CASE TEMPERATURE (oC)
125 17
FIGURE 1. NORMALIZED POWER DISSIP ATION vs CASE
TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJC
Z
THERMAL IMPEDANCE
0.01
-5
10
SINGLE PULSE
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
20
, DRAIN CURRENT (A)
10
D
I
0
25
50 75 100 125 150 175
TC, CASE TEMPERA TURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
P
DM
t
1
NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-2
10
-1
10
1/t2
x R
θJC
0
10
t
θJC
2
+ T
C
1
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corpo ration HUF75321P3, HUF75321S3S Rev. B
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