<25mW with Bias Winding for FSL206MR, <30mW
with Bias Winding for FSL206MRBN
without Bias Winding;
AC
No Need for Auxiliary Bias Winding
Frequency Modulation for Attenuating EMI
Line Under-Voltage Protection (LUVP)
Pulse-by-Pulse Current Limiting
Low Under-Voltage Lockout (UVLO)
Ultra-Low Operating Current: 300µA
Built-In Soft-Start and Startup Circuit
Various Protections: Overload Protection (OLP),
Over-Voltage Protection (OVP), Thermal Shutdown
(TSD), Abnormal Over-Current Protection (AOCP)
Auto-Restart Mode for All Protections
Applications
SMPS for STB, DVD, and DVCD Player
SMPS for Auxiliary Power
Related Resources
Fairchild Power Supply WebDesigner – Flyback
Design and Simulation – In Minutes at No Expense
AN-4137 — Design Guidelines for Offline Flyback
Converters Using FPS™
AN-4141 — Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback
Applications
AN-4147 — Design Guidelines for RCD Snubber of
Flyback
AN-4150 — Design Guidelines for Flyback
Converters Using FSQ-Series Fairchild Power
Switch (FPS™)
Description
The FSL206MR integrated Pulse-Width Modulator
(PWM) and SenseFET is specifically designed for highperformance offline Switched-Mode Power Supplies
(SMPS) with minimal external components. This device
integrates high-voltage power regulators that combine
an avalanche-rugged SenseFET with a Current-Mode
PWM control block.
The integrated PWM controller includes: 7.8V regulator
for no bias winding, Under-Voltage Lockout (UVLO)
protection, Leading-Edge Blanking (LEB), an optimized
gate turn-on/turn-off driver, EMI attenuator, Thermal
Shutdown (TSD) protection, temperature-compensated
precision current sources for loop compensation, and
fault-protection circuitry such as; Overload Protection
(OLP), Over-Voltage Protection (OVP), Abnormal OverCurrent Protection (AOCP), and Line Under-Voltage
Protection (LUVP). During startup, the FSL206MR offers
good soft-start performance.
The internal high-voltage startup switch and the BurstMode operation with very low operating current reduce
the power loss in Standby Mode. As a result, it is
possible to reach power loss of 150mW with no-bias
winding and 25mW (for FSL206MR) or 30mW (for
FSL206MRBN) with bias winding at no-load condition
when the input voltage is 265V
Ground. SenseFET source terminal on primary side and internal control ground.
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (V
Diagram section). It is not until V
) via an internal switch during startup (see Internal Block
STR
reaches the UVLO upper threshold (8V) that the internal
CC
startup switch opens and device power is supplied via the auxiliary transformer winding.
Feedback Voltage. Non-inverting input to the PWM comparator, with a 0.11mA current source
connected internally and a capacitor and opto-coupler typically connected externally. There is a
delay while charging external capacitor CFB from 2.4V to 5V using an internal 2.7A current
source. This delay prevents false triggering under transient conditions, but allows the protection
mechanism to operate under true overload conditions.
Line Sense Pin. This pin is used to protect the device when the input voltage is lower than the
rated input voltage range. If this pin is not used, connect to ground.
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the VCC pin
STR
and ground. Once V
reaches 8V, all internal blocks are activated. After that, the internal high-
CC
voltage regulator (HV REG) turns on and off irregularly to maintain V
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the
transformer decreases leakage inductance.
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. T
Symbol Parameter Min. Max. Unit
V
V
STR
VDS Drain Pin Voltage -0.3 650.0 V
VCC Supply Voltage 26 V
VLS LS Pin Voltage -0.3
VFB Feedback Voltage Range -0.3
IDM Drain Current Pulsed
EAS Single-Pulsed Avalanche Energy
PD Total Power Dissipation 1.3 W
TJ Operating Junction Temperature -40 +150 °C
TA Operating Ambient Temperature -40 +125 °C
T
Storage Temperature -55 +150 °C
STG
ESD
Notes:
4. VFB is clamped by internal clamping diode (13V I
V
< VFB < VCC.
SD
5. Repetitive rating: pulse-width limited by maximum junction temperature.
6. L=21mH, starting T
Pin Voltage -0.3 650.0 V
STR
(5)
1.5 A
(6)
Human Body Model, JESD22-A114 4
Charged Device Model, JESD22-C101 2
=25°C.
J
= 25°C unless otherwise specified.
A
Internally Clamped
Voltage
Internally Clamped
Voltage
(4)
(4)
V
V
11 mJ
KV
CLAMP_MAX
< 100A). After shutdown, before VCC reaching V
STOP
,
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol Parameter Value Unit
JA Junction-to-Ambient Thermal Impedance
Notes:
7. JEDEC recommended environment, JESD51-2 and test board, JESD51-10 with minimum land pattern for 8DIP
and JESD51-3 with minimum land pattern for 8LSOP.