Fairchild FSL206MR service manual

FSL206MR Green Mode Fairchild Power Switch (FPS™)
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
June 2012
Features
Internal Avalanche-Rugged SenseFET: 650V Precision Fixed Operating Frequency: 67kHz No-Load <150mW at 265V
<25mW with Bias Winding for FSL206MR, <30mW with Bias Winding for FSL206MRBN
without Bias Winding;
AC
No Need for Auxiliary Bias Winding Frequency Modulation for Attenuating EMI Line Under-Voltage Protection (LUVP) Pulse-by-Pulse Current Limiting Low Under-Voltage Lockout (UVLO) Ultra-Low Operating Current: 300µA Built-In Soft-Start and Startup Circuit Various Protections: Overload Protection (OLP),
Over-Voltage Protection (OVP), Thermal Shutdown (TSD), Abnormal Over-Current Protection (AOCP) Auto-Restart Mode for All Protections
Applications
SMPS for STB, DVD, and DVCD Player SMPS for Auxiliary Power
Related Resources
Fairchild Power Supply WebDesigner – Flyback
Design and Simulation – In Minutes at No Expense
AN-4137 — Design Guidelines for Offline Flyback
Converters Using FPS™
AN-4141 — Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback Applications
AN-4147 — Design Guidelines for RCD Snubber of
Flyback
AN-4150 — Design Guidelines for Flyback
Converters Using FSQ-Series Fairchild Power Switch (FPS™)
Description
The FSL206MR integrated Pulse-Width Modulator (PWM) and SenseFET is specifically designed for high­performance offline Switched-Mode Power Supplies (SMPS) with minimal external components. This device integrates high-voltage power regulators that combine an avalanche-rugged SenseFET with a Current-Mode PWM control block.
The integrated PWM controller includes: 7.8V regulator for no bias winding, Under-Voltage Lockout (UVLO) protection, Leading-Edge Blanking (LEB), an optimized gate turn-on/turn-off driver, EMI attenuator, Thermal Shutdown (TSD) protection, temperature-compensated precision current sources for loop compensation, and fault-protection circuitry such as; Overload Protection (OLP), Over-Voltage Protection (OVP), Abnormal Over­Current Protection (AOCP), and Line Under-Voltage Protection (LUVP). During startup, the FSL206MR offers good soft-start performance.
The internal high-voltage startup switch and the Burst­Mode operation with very low operating current reduce the power loss in Standby Mode. As a result, it is possible to reach power loss of 150mW with no-bias winding and 25mW (for FSL206MR) or 30mW (for FSL206MRBN) with bias winding at no-load condition when the input voltage is 265V
AC
.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4
Ordering Information
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
(1)
Output Power Table
Part
Number
FSL206MRN
Operating
Temperature
Top Mark PKG
8-DIP
Packing
Method
Current
Limit
R
FSL206MR
-40 ~ 115°C
Rail 0.6A 19 12W 7W FSL206MRL 8-LSOP
FSL206MRBN L206MRB 8-DIP
Notes:
1. The junction temperature can limit the maximum output power.
2. 230V
or 100/115VAC with doubler. The maximum power with CCM operation.
AC
3. Maximum practical continuous power in an open-frame design at 50°C ambient.
Application Diagram
AC
IN
DC
OUT
Drain
V
STR
LS
PWM
V
V
FB
GND
CC
AC
IN
LS
PWM
V
FB
DS(ON),MAX
Drain
V
STR
GND
V
CC
230V ±15%
Open
Frame
AC
(2)
(3)
265VAC
Frame
85 ~
Open
DC
OUT
(3)
(a) With Bias Winding (b) Without Bias Winding
Internal Block Diagram
Figure 1. Typical Application
Figure 2. Internal Block Diagram
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 2
Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin # Name Description
1 GND
2 VCC
3 VFB
4 LS
5 V
6, 7, 8 Drain
Ground. SenseFET source terminal on primary side and internal control ground. Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (V
Diagram section). It is not until V
) via an internal switch during startup (see Internal Block
STR
reaches the UVLO upper threshold (8V) that the internal
CC
startup switch opens and device power is supplied via the auxiliary transformer winding. Feedback Voltage. Non-inverting input to the PWM comparator, with a 0.11mA current source
connected internally and a capacitor and opto-coupler typically connected externally. There is a delay while charging external capacitor CFB from 2.4V to 5V using an internal 2.7A current source. This delay prevents false triggering under transient conditions, but allows the protection mechanism to operate under true overload conditions.
Line Sense Pin. This pin is used to protect the device when the input voltage is lower than the
rated input voltage range. If this pin is not used, connect to ground.
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the VCC pin
STR
and ground. Once V
reaches 8V, all internal blocks are activated. After that, the internal high-
CC
voltage regulator (HV REG) turns on and off irregularly to maintain V
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance.
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
at 7.8V.
CC
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 3
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. T
Symbol Parameter Min. Max. Unit
V
V
STR
VDS Drain Pin Voltage -0.3 650.0 V
VCC Supply Voltage 26 V
VLS LS Pin Voltage -0.3
VFB Feedback Voltage Range -0.3
IDM Drain Current Pulsed
EAS Single-Pulsed Avalanche Energy
PD Total Power Dissipation 1.3 W
TJ Operating Junction Temperature -40 +150 °C
TA Operating Ambient Temperature -40 +125 °C
T
Storage Temperature -55 +150 °C
STG
ESD
Notes:
4. VFB is clamped by internal clamping diode (13V I V
< VFB < VCC.
SD
5. Repetitive rating: pulse-width limited by maximum junction temperature.
6. L=21mH, starting T
Pin Voltage -0.3 650.0 V
STR
(5)
1.5 A
(6)
Human Body Model, JESD22-A114 4
Charged Device Model, JESD22-C101 2
=25°C.
J
= 25°C unless otherwise specified.
A
Internally Clamped
Voltage
Internally Clamped
Voltage
(4)
(4)
V
V
11 mJ
KV
CLAMP_MAX
< 100A). After shutdown, before VCC reaching V
STOP
,
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol Parameter Value Unit
JA Junction-to-Ambient Thermal Impedance
Notes:
7. JEDEC recommended environment, JESD51-2 and test board, JESD51-10 with minimum land pattern for 8DIP and JESD51-3 with minimum land pattern for 8LSOP.
(7)
93 °C/W
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 4
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TA = 25°C unless otherwise specified.
Symbol Parameter Condition Min. Typ. Max. Unit
SenseFET Section
BV
Drain-Source Breakdown Voltage VCC = 0V, ID = 250µA 650 V
DSS
I
Zero Gate Voltage Drain Current
DSS
R
Drain-Source On-State Resistance
DS(ON)
C
Input Capacitances VGS = 0V, VDS = 25V, f = 1MHz 162 pF
iSS
C
Output Capacitance VGS = 0V, VDS = 25V, f = 1MHz 14.9 pF
OSS
C
Reverse Transfer Capacitance VGS = 0V, VDS = 25V, f = 1MHz 2.7 pF
RSS
tr Rise Time VDS = 325V, ID = 0.5A, RG = 25 6.1 ns
tf Fall Time VDS = 325V, ID = 0.5A, RG = 25 43.6 ns
Control Section
f
Switching Frequency VFB = 4V, VCC = 10V 61 67 73 KHz
OSC
f
Switching Frequency Variation -25°C < TJ < 85°C ±5 ±10 %
OSC
fM Frequency Modulation
D
Maximum Duty Cycle VFB = 4V, VCC = 10V 66 72 78 %
MAX
D
Minimum Duty Cycle VFB = 0V, VCC = 10V 0 0 0 %
MIN
V
START
V
STOP
UVLO Threshold Voltage
After Turn On 6 7 8 V
(8)
±3 KHz
IFB Feedback Source Current VFB= 0V, VCC = 10V 90 110 130 µA
t
Internal Soft-Start Time VFB = 4V, VCC = 10V 10 15 20 ms
S/S
Burst Mode Section
V
Burst-Mode HIGH Threshold Voltage
BURH
V
Burst-Mode LOW Threshold Voltage
BURL
HYS
Burst-Mode Hysteresis
BUR
Protection Section
I
Peak Current Limit
LIM
t
Current Limit Delay
CLD
(8)
100 ns
VSD Shutdown Feedback Voltage VCC = 10V 4.5 5.0 5.5 V
I
Shutdown Delay Current VFB = 4V 2.1 2.7 3.3 µA
DELAY
t
Leading-Edge Blanking Time
LEB
V
Abnormal Over-Current Protection
AOCP
V
Over-Voltage Protection VFB = 4V, VCC Increase 23.0 24.5 26.0 V
OVP
V
Line-Sense Protection On to Off VFB = 3V, VCC = 10V, VLS Decrease 1.9 2.0 2.1 V
LS_OFF
V
Line-Sense Protection Off to On VFB = 3V, VCC = 10V, VLS Increase 1.4 1.5 1.6 V
LS_ON
(8)
250 ns
TSD Thermal Shutdown Temperature
HYS
TSD Hysteresis Temperature
TSD
(8)
60 °C
VDS = 650V, VGS = 0V 50 µA
VDS = 520V, VGS = 0V, TA = 125°C
(9)
VGS = 10V, ID = 0.3A 14 19
(8)
250 µA
VFB = 0V, VCC Sweep 7 8 9 V
= 10V,
V
CC
V
Increase
FB
= 10V,
V
CC
V
Decrease
FB
FSL206MR 0.66 0.83 1.00 V
FSL206MRB 0.40 0.50 0.60 V
FSL206MR 0.59 0.74 0.89 V
FSL206MRB 0.28 0.35 0.42 V
FSL206MR 90 mV
FSL206MRB 150 mV
= 4V, di/dt = 300mA/µs,
V
FB
V
= 10V
CC
(8)
0.7 V
(8)
125 135 150 °C
0.54 0.60 0.66 A
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 5
Loading...
+ 9 hidden pages