Fairchild FSL206MR service manual

FSL206MR Green Mode Fairchild Power Switch (FPS™)
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
June 2012
Features
Internal Avalanche-Rugged SenseFET: 650V Precision Fixed Operating Frequency: 67kHz No-Load <150mW at 265V
<25mW with Bias Winding for FSL206MR, <30mW with Bias Winding for FSL206MRBN
without Bias Winding;
AC
No Need for Auxiliary Bias Winding Frequency Modulation for Attenuating EMI Line Under-Voltage Protection (LUVP) Pulse-by-Pulse Current Limiting Low Under-Voltage Lockout (UVLO) Ultra-Low Operating Current: 300µA Built-In Soft-Start and Startup Circuit Various Protections: Overload Protection (OLP),
Over-Voltage Protection (OVP), Thermal Shutdown (TSD), Abnormal Over-Current Protection (AOCP) Auto-Restart Mode for All Protections
Applications
SMPS for STB, DVD, and DVCD Player SMPS for Auxiliary Power
Related Resources
Fairchild Power Supply WebDesigner – Flyback
Design and Simulation – In Minutes at No Expense
AN-4137 — Design Guidelines for Offline Flyback
Converters Using FPS™
AN-4141 — Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback Applications
AN-4147 — Design Guidelines for RCD Snubber of
Flyback
AN-4150 — Design Guidelines for Flyback
Converters Using FSQ-Series Fairchild Power Switch (FPS™)
Description
The FSL206MR integrated Pulse-Width Modulator (PWM) and SenseFET is specifically designed for high­performance offline Switched-Mode Power Supplies (SMPS) with minimal external components. This device integrates high-voltage power regulators that combine an avalanche-rugged SenseFET with a Current-Mode PWM control block.
The integrated PWM controller includes: 7.8V regulator for no bias winding, Under-Voltage Lockout (UVLO) protection, Leading-Edge Blanking (LEB), an optimized gate turn-on/turn-off driver, EMI attenuator, Thermal Shutdown (TSD) protection, temperature-compensated precision current sources for loop compensation, and fault-protection circuitry such as; Overload Protection (OLP), Over-Voltage Protection (OVP), Abnormal Over­Current Protection (AOCP), and Line Under-Voltage Protection (LUVP). During startup, the FSL206MR offers good soft-start performance.
The internal high-voltage startup switch and the Burst­Mode operation with very low operating current reduce the power loss in Standby Mode. As a result, it is possible to reach power loss of 150mW with no-bias winding and 25mW (for FSL206MR) or 30mW (for FSL206MRBN) with bias winding at no-load condition when the input voltage is 265V
AC
.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4
Ordering Information
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
(1)
Output Power Table
Part
Number
FSL206MRN
Operating
Temperature
Top Mark PKG
8-DIP
Packing
Method
Current
Limit
R
FSL206MR
-40 ~ 115°C
Rail 0.6A 19 12W 7W FSL206MRL 8-LSOP
FSL206MRBN L206MRB 8-DIP
Notes:
1. The junction temperature can limit the maximum output power.
2. 230V
or 100/115VAC with doubler. The maximum power with CCM operation.
AC
3. Maximum practical continuous power in an open-frame design at 50°C ambient.
Application Diagram
AC
IN
DC
OUT
Drain
V
STR
LS
PWM
V
V
FB
GND
CC
AC
IN
LS
PWM
V
FB
DS(ON),MAX
Drain
V
STR
GND
V
CC
230V ±15%
Open
Frame
AC
(2)
(3)
265VAC
Frame
85 ~
Open
DC
OUT
(3)
(a) With Bias Winding (b) Without Bias Winding
Internal Block Diagram
Figure 1. Typical Application
Figure 2. Internal Block Diagram
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 2
Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin # Name Description
1 GND
2 VCC
3 VFB
4 LS
5 V
6, 7, 8 Drain
Ground. SenseFET source terminal on primary side and internal control ground. Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (V
Diagram section). It is not until V
) via an internal switch during startup (see Internal Block
STR
reaches the UVLO upper threshold (8V) that the internal
CC
startup switch opens and device power is supplied via the auxiliary transformer winding. Feedback Voltage. Non-inverting input to the PWM comparator, with a 0.11mA current source
connected internally and a capacitor and opto-coupler typically connected externally. There is a delay while charging external capacitor CFB from 2.4V to 5V using an internal 2.7A current source. This delay prevents false triggering under transient conditions, but allows the protection mechanism to operate under true overload conditions.
Line Sense Pin. This pin is used to protect the device when the input voltage is lower than the
rated input voltage range. If this pin is not used, connect to ground.
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the VCC pin
STR
and ground. Once V
reaches 8V, all internal blocks are activated. After that, the internal high-
CC
voltage regulator (HV REG) turns on and off irregularly to maintain V
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance.
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
at 7.8V.
CC
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 3
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. T
Symbol Parameter Min. Max. Unit
V
V
STR
VDS Drain Pin Voltage -0.3 650.0 V
VCC Supply Voltage 26 V
VLS LS Pin Voltage -0.3
VFB Feedback Voltage Range -0.3
IDM Drain Current Pulsed
EAS Single-Pulsed Avalanche Energy
PD Total Power Dissipation 1.3 W
TJ Operating Junction Temperature -40 +150 °C
TA Operating Ambient Temperature -40 +125 °C
T
Storage Temperature -55 +150 °C
STG
ESD
Notes:
4. VFB is clamped by internal clamping diode (13V I V
< VFB < VCC.
SD
5. Repetitive rating: pulse-width limited by maximum junction temperature.
6. L=21mH, starting T
Pin Voltage -0.3 650.0 V
STR
(5)
1.5 A
(6)
Human Body Model, JESD22-A114 4
Charged Device Model, JESD22-C101 2
=25°C.
J
= 25°C unless otherwise specified.
A
Internally Clamped
Voltage
Internally Clamped
Voltage
(4)
(4)
V
V
11 mJ
KV
CLAMP_MAX
< 100A). After shutdown, before VCC reaching V
STOP
,
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol Parameter Value Unit
JA Junction-to-Ambient Thermal Impedance
Notes:
7. JEDEC recommended environment, JESD51-2 and test board, JESD51-10 with minimum land pattern for 8DIP and JESD51-3 with minimum land pattern for 8LSOP.
(7)
93 °C/W
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 4
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TA = 25°C unless otherwise specified.
Symbol Parameter Condition Min. Typ. Max. Unit
SenseFET Section
BV
Drain-Source Breakdown Voltage VCC = 0V, ID = 250µA 650 V
DSS
I
Zero Gate Voltage Drain Current
DSS
R
Drain-Source On-State Resistance
DS(ON)
C
Input Capacitances VGS = 0V, VDS = 25V, f = 1MHz 162 pF
iSS
C
Output Capacitance VGS = 0V, VDS = 25V, f = 1MHz 14.9 pF
OSS
C
Reverse Transfer Capacitance VGS = 0V, VDS = 25V, f = 1MHz 2.7 pF
RSS
tr Rise Time VDS = 325V, ID = 0.5A, RG = 25 6.1 ns
tf Fall Time VDS = 325V, ID = 0.5A, RG = 25 43.6 ns
Control Section
f
Switching Frequency VFB = 4V, VCC = 10V 61 67 73 KHz
OSC
f
Switching Frequency Variation -25°C < TJ < 85°C ±5 ±10 %
OSC
fM Frequency Modulation
D
Maximum Duty Cycle VFB = 4V, VCC = 10V 66 72 78 %
MAX
D
Minimum Duty Cycle VFB = 0V, VCC = 10V 0 0 0 %
MIN
V
START
V
STOP
UVLO Threshold Voltage
After Turn On 6 7 8 V
(8)
±3 KHz
IFB Feedback Source Current VFB= 0V, VCC = 10V 90 110 130 µA
t
Internal Soft-Start Time VFB = 4V, VCC = 10V 10 15 20 ms
S/S
Burst Mode Section
V
Burst-Mode HIGH Threshold Voltage
BURH
V
Burst-Mode LOW Threshold Voltage
BURL
HYS
Burst-Mode Hysteresis
BUR
Protection Section
I
Peak Current Limit
LIM
t
Current Limit Delay
CLD
(8)
100 ns
VSD Shutdown Feedback Voltage VCC = 10V 4.5 5.0 5.5 V
I
Shutdown Delay Current VFB = 4V 2.1 2.7 3.3 µA
DELAY
t
Leading-Edge Blanking Time
LEB
V
Abnormal Over-Current Protection
AOCP
V
Over-Voltage Protection VFB = 4V, VCC Increase 23.0 24.5 26.0 V
OVP
V
Line-Sense Protection On to Off VFB = 3V, VCC = 10V, VLS Decrease 1.9 2.0 2.1 V
LS_OFF
V
Line-Sense Protection Off to On VFB = 3V, VCC = 10V, VLS Increase 1.4 1.5 1.6 V
LS_ON
(8)
250 ns
TSD Thermal Shutdown Temperature
HYS
TSD Hysteresis Temperature
TSD
(8)
60 °C
VDS = 650V, VGS = 0V 50 µA
VDS = 520V, VGS = 0V, TA = 125°C
(9)
VGS = 10V, ID = 0.3A 14 19
(8)
250 µA
VFB = 0V, VCC Sweep 7 8 9 V
= 10V,
V
CC
V
Increase
FB
= 10V,
V
CC
V
Decrease
FB
FSL206MR 0.66 0.83 1.00 V
FSL206MRB 0.40 0.50 0.60 V
FSL206MR 0.59 0.74 0.89 V
FSL206MRB 0.28 0.35 0.42 V
FSL206MR 90 mV
FSL206MRB 150 mV
= 4V, di/dt = 300mA/µs,
V
FB
V
= 10V
CC
(8)
0.7 V
(8)
125 135 150 °C
0.54 0.60 0.66 A
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 5
Electrical Characteristics (Continued)
T
= 25°C unless otherwise specified.
A
Symbol Parameter Conditions Min. Typ. Max. Units
High Voltage Regulator Section
V
HV Regulator Voltage VFB = 0V, V
HVR
Total Device Section
I
I
I
OP1
OP2
OP3
Operating Supply Current (Control Part Only, without Switching)
Operating Supply Current (Control Part Only, without Switching)
Operating Supply Current (While Switching)
(8)
VCC = 15V, 0V<VFB<V
VCC = 8V, 0V<VFB<V
V
= 15V, V
CC
ICH Startup Charging Current VCC = 0V, V
I
Startup Current VCC = Before V
START
V
Minimum V
STR
Supply Voltage VCC = VFB = 0V, V
STR
Notes:
8. Though guaranteed by design, not 100% tested in production.
9. Pulse test: pulse width=300ms, duty cycle=2%.
= 40V 7.8 V
STR
0.3 0.5 mA
BURL
0.25 0.45 mA
BURL
BURL<VFB<VSD
> 40V 1.6 1.9 2.2 mA
STR
START
STR
1.3 mA
, VFB = 0V 100 150 µA
Increase 26 V
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 6
Typical Performance Characteristics
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Operating Frequency (f
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40-25 0℃ 25 50 75 90110115
OSC
)
HV Regulator Voltage (V
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 11 0
HVR
)
Figure 4. Operating Frequency vs. Temperature Figure 5. HV Regulator Voltage vs. Temperature
Start Theshold Voltage (V
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
START
)
Stop Theshold Voltage (V
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
STOP
)
Figure 6. Start Threshold Voltage vs. Temperature Figure 7. Stop Threshold Voltage vs. Temperature
Feedback Source Current (IFB)
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40-25 0℃ 25 50 75 90110
Peak Current Limit (I
LIM
)
Figure 8. Feedback Source Current vs. Temperature Figure 9. Peak Current Limit vs. Temperature
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 7
Typical Performance Characteristics (Continued)
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Startup Charging Current (ICH)
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
Operating Supply Current (Iop1)
Figure 10. Startup Charging Current vs. Temperature Figure 11. Operating Supply Current 1
vs. Temperature
Operating Supply Current (Iop2)
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 11 0
Figure 12. Operating Supply Current 2
vs. Temperature
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
Figure 13. Over-Voltage Protection Voltage
Over-Voltage Protection (V
vs. Temperature
OVP
)
Suntdown Delay Current (I
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-40 -25 0℃ 25 50 75 90 110
DELAY
)
Figure 14. Shutdown Delay Current vs. Temperature
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 8
C
Functional Description
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Startup
At startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (C
) connected to the VCC pin, as illustrated in
A
Figure 15. An internal high-voltage regulator (HV REG) located between the V V
to 7.8V and supplies operating current. Therefore,
CC
and VCC pins regulates the
STR
FSL206MR needs no auxiliary bias winding.
V
DC,link
V
STR
I
V
CC
3
A
7.8V
CH
HV/REG
I
START
V
REF
UVLO
2
Figure 15. Startup Block
Oscillator Block
The oscillator frequency is set internally and the FPS™ has a random frequency fluctuation function.
Fluctuation of the switching frequency can reduce EMI by spreading the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. The amount of EMI reduction is directly related to the range of the frequency variation. The range of frequency variation is fixed internally; however, its selection is randomly chosen by the combination of an external feedback voltage and internal free-running oscillator. This randomly chosen switching frequency effectively spreads the EMI noise near switching frequency and allows the use of a cost-effective inductor instead of an AC input line filter to satisfy world-wide EMI requirements.
Figure 16. Frequency Fluctuation Waveform
Feedback Control
FSL206MR employs Current-Mode control, as shown in Figure 17. An opto-coupler (such as the FOD817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the R resistor makes it possible to control the switching duty cycle. When the shunt regulator reference pin voltage exceeds the internal reference voltage of 2.5V; the opto­coupler LED current increases, feedback voltage V pulled down, and the duty cycle is reduced. This typically occurs when input voltage is increased or output load is decreased.
Figure 17. Pulse-Width-Modulation (PWM) Circuit
Leading-Edge Blanking (LEB)
At the instant the internal SenseFET is turned on, the primary-side capacitance and secondary-side rectifier diode reverse recovery typically cause a high-current spike through the SenseFET. Excessive voltage across the R
resistor leads to incorrect feedback operation
SENSE
in the Current-Mode PWM control. To counter this effect, the FPS employs a leading-edge blanking (LEB)
circuit (see Figure 17). This circuit inhibits the PWM
comparator for a short time (t
) after the SenseFET is
LEB
turned on.
Protection Circuits
The protective functions include Overload Protection (OLP), Over-Voltage Protection (OVP), Under-Voltage Lockout (UVLO), Line Under-Voltage Protection (LUVP), Abnormal Over-Current Protection (AOCP), and thermal shutdown (TSD). Because these protection circuits are fully integrated inside the IC without external components, reliability is improved without increasing cost. Once a fault condition occurs, switching is terminated and the SenseFET remains off. This causes V
to fall. When VCC reaches the UVLO stop voltage
CC
V
(7V), the protection is reset and the internal high-
STOP
voltage current source charges the V V
pin. When VCC reaches the UVLO start voltage
STR
V
(8V), the FPS resumes normal operation. In this
START
manner, auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated.
capacitor via the
CC
SENSE
is
FB
© 2011 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.4 www.fairchildsemi.com
Figure 18. Auto-Restart Protection Waveforms
Overload Protection (OLP)
Overload is defined as the load current exceeding a pre­set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is operating normally, the overload protection (OLP) circuit can be activated during the load transition or startup. To avoid this undesired operation, the OLP circuit is activated after a specified time to determine whether it is a transient situation or a true overload situation. The Current-Mode feedback path limits the current in the SenseFET when the maximum PWM duty cycle is attained. If the output consumes more than this maximum power, the output voltage (V
) decreases
O
below its rating voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, increasing the feedback voltage (V diode is blocked and the 2.7µA current source (I starts to charge C
). If VFB exceeds 2.4V, the feedback input
FB
slowly up. In this condition, VFB
FB
DELAY
)
increases until it reaches 5V, when the switching operation is terminated, as shown in Figure 19. The shutdown delay is the time required to charge C
from
FB
2.4V to 5V with 2.7µA current source.
Figure 20. Abnormal Over-Current Protection
Abnormal Over-Current Protection (AOCP)
When the secondary rectifier diodes or the transformer pin are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time. Even though the FPS has overload protection, it is not enough to protect the FPS in that abnormal case, since severe current stress is imposed on the SenseFET until OLP triggers. The FPS includes the internal AOCP (Abnormal Over-Current Protection) circuit shown in Figure 20. When the gate turn-on signal is applied to the power sense, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing-resistor voltage is greater than the AOCP level, the set signal is applied to the latch, resulting in the shutdown of the SMPS.
Thermal Shutdown (TSD)
The SenseFET and control IC being integrated makes it easier to detect the temperature of the SenseFET. When the junction temperature exceeds ~135°C, thermal shutdown is activated and the FPS is restarted after temperature decreases to 60°C.
Over-Voltage Protection (OVP)
In the event of a malfunction in the secondary-side feedback circuit or an open feedback loop caused by a soldering defect, the current through the opto-coupler
transistor becomes almost zero (refer to Figure 17).
Then V situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is activated. Because excess energy is provided to the output, the output voltage may exceed the rated voltage before the overload protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an over-voltage protection (OVP) circuit is employed. In general, V output voltage and the FPS uses V monitoring the output voltage. If V OVP circuit is activated, resulting in termination of the switching operation. To avoid undesired activation of OVP during normal operation, V to be below 24.5V.
climbs up in a similar manner to the overload
FB
is proportional to the
CC
instead of directly
CC
exceeds 24.5V,
CC
should be designed
CC
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Figure 19. Overload Protection (OLP)
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 10
Line Under-Voltage Protection (LUVP)
If the input voltage of the converter is lower than the minimum operating voltage, the converter input current increases too much, causing components failure. If the input voltage is low, the converter should be protected. In the FSL206MR, the LUVP circuit senses the input voltage using the LS pin and, if this voltage is lower than
1.5V, the LUVP signal is generated. The comparator
has 0.5V hysteresis. If the LUVP signal is generated, the output drive block is shut down and the output voltage feedback loop is saturated.
+
Figure 21. Line UVP Circuit
Soft-Start
The FSL206MR has an internal soft-start circuit that slowly increases the feedback voltage, together with the SenseFET current, after it starts. The typical soft-start time is 15ms, as shown in Figure 22, where progressive increments of the SenseFET current are allowed during the startup phase. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. It also helps prevent transformer saturation and reduce the stress on the secondary diode.
Burst Operation
To minimize power dissipation in Standby Mode, the FPS enters Burst Mode. As the load decreases, the feedback voltage decreases. As shown in Figure 23, the device automatically enters Burst Mode when the feedback voltage drops below V continues until the feedback voltage drops below V At this point, switching stops and the output voltages start to drop at a rate dependent on the standby current load. This causes the feedback voltage to rise. Once it passes V
, switching resumes. The feedback voltage
BURH
then falls and the process repeats. Burst Mode alternately enables and disables switching of the SenseFET and reduces switching loss in Standby Mode.
V
O
set
Vo
V
FB
V
BURH
V
BURL
I
DS
V
DS
Switching
disabled
t1 t2 t3
Figure 23. Burst-Mode Operation
BURH
Switching
disabled
. Switching
BURL
time
t4
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
.
Figure 22. Internal Soft-Start
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 11
Physical Dimensions
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
9.83
9.00
6.67
6.096
8.255
7.61
5.08 MAX
0.33 MIN
(0.56)
2.54
7.62
0.56
0.355
3.60
3.00
1.65
1.27
3.683
3.20
0.356
0.20
7.62
9.957
7.87
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANC
ES PER
ASME Y14.5M-1994
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 24. 8-Lead, Dual In-Line Package (DIP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 12
Physical Dimensions (Continued)
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
MKT-MLSOP08ArevA
Figure 25. 8-Lead, .300" Wide, Surface Mount Package (LSOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 13
.
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL206MR • Rev. 1.0.4 14
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