Offline Flyback Converters Using Fairchild Power
Switch (FPS
! AN-4141: Troubleshooting and Design Tips for
Fairchild Power Switch (FPS
! AN-4145: Electromagnetic Compatibility for Power
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) Flyback Applications
Converters
! AN-4147: Design Guidelines for RCD Snubber of
Flyback Converters
! AN-4148: Audible Noise Reduction Techniques for
Fairchild Power Switch (FPS
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Applications
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Description
The FSFM260/261/300 is an integrated Pulse Width
Modulator (PWM) and SenseFET specifically designed
for high-performance offline Switch Mode Power
Supplies (SMPS) with minimal external components.
This device is an integrated high-voltage powerswitching regulator that combines an avalanche-rugged
SenseFET with a current-mode PWM control block. The
PWM controller includes an integrated fixed-frequency
oscillator, under-voltage lockout, leading-edge blanking
(LEB), optimized gate driver, internal soft-start,
temperature-compensated precise-current sources for a
loop compensation, and self-protection circuitry.
Compared with discrete MOSFET and PWM controller
solutions, it can reduce total cost, component count, size,
and weight while simultaneously increasing efficiency,
productivity, and system reliability. This device is a basic
platform for cost-effective designs of flyback converters.
1GNDGround. This pin is the control ground and the SenseFET source.
2V
3FB
4I
5V
LIM
STR
6,7,8DrainSenseFET Drain. High-voltage power SenseFET drain connection.
Power Supply. This pin is the positive supply input, providing internal operating current for
CC
both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator. The
collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should
be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload protection triggers, which shuts down the FPS.
Peak Current Limit. Adjusts the peak current limit of the Sense FET. The feedback 0.9mA
current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any external resistor to GND on this pin to determine the peak current limit.
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At
startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is
disabled. It is not recommended to connect V
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T