FDS89161
G2
S1
G1
S2
D2
D2
D1
D1
5
6
7
8
3
2
1
4
Pin 1
SO-8
D1
D1
D2
D2
S2
S1
G1
G2
Dual N-Channel PowerTrench® MOSFET
100 V, 2.7 A, 105 mΩ
Features
Max r
Max r
High performance trench technology for extremely low r
High power and current handling capability in a widely used
surface mount package
100% UIL Tested
RoHS Compliant
= 105 mΩ at V
DS(on)
= 171 mΩ at V
DS(on)
= 10 V, ID = 2.7 A
GS
= 6 V, ID = 2.1 A
GS
DS(on)
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been optimized for
ruggedness
Applications
Synchronous Rectifier
Primary Switch For Bridge Topology
FDS89161 Dual N-Channel PowerTrench
June 2011
®
process that has
r
, switching performance and
DS(on)
.
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous 2.7
-Pulsed 15
Single Pulse Avalanche Energy (Note 3) 13 mJ
Power Dissipation TC = 25 °C 31
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
A
= 25 °C (Note1a) 1.6
A
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDS89161 Rev. C2
FDS89161 FDS89161 SO-8 13 ’’ 12 mm 2500 units
Thermal Resistance, Junction to Case (Note 1) 4.0
Thermal Resistance, Junction to Ambient (Note 1a) 78
A
W
°C/W
FDS89161 Dual N-Channel PowerTrench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V
I
= 250 μA, referenced to 25 °C 67 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±100 nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA234V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -9 mV/°C
D
V
= 10 V, ID = 2.7 A 86 105
GS
= 6 V, ID = 2.1 A 120 171
GS
= 10 V, ID = 2.7 A, TJ = 125 °C 144 176
V
GS
Forward Transconductance VDS = 10 V, ID = 2.7 A 5 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 43 58 pF
Reverse Transfer Capacitance 3 5 pF
= 50 V, VGS = 0 V,
V
DS
f = 1MHz
Gate Resistance 1 Ω
158 210 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
g(TOT)
g(TOT)
gs
gd
Turn-On Delay Time
Rise Time 1.3 10 ns
Turn-Off Delay Time 7.3 15 ns
= 50 V, ID = 2.7 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
Fall Time 1.9 10 ns
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge 0.8 nC
= 0 V to 10 V
GS
= 0 V to 5 V 1.7 2.4
GS
V
DD
I
= 2.7 A
D
= 50 V,
Gate to Drain “Miller” Charge 0.8 nC
4.2 10 ns
34.1nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 2.7 A (Note 2) 0.85 1.3
V
SD
t
rr
Q
rr
NOTES:
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 i n. boar d of FR-4 ma terial. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25°C, L = 3 mH, IAS = 3 A, VDD = 100 V, VGS = 10 V.
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDS89161 Rev. C2
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 21 34 nC
a) 78°C/W when
mounted on a 1 in
pad of 2 oz copper
GS
= 0 V, IS = 2 A (Note 2) 0.82 1.2
V
GS
= 2.7 A, di/dt = 100 A/μs
I
F
2
θJC
34 54 ns
is guaranteed by design whil e R
b) 135°C/W when
mounted on a
minimun pad
is determined by
θCA
V