Fairchild FDS6875 service manual
November 1998
FDS6875
Dual P-Channel 2.5V Specified PowerTrenchTM MOSFET
General Description Features
These P-Channel 2.5V specified MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored to
minimize the on-state resistance and yet maintain low gate
charge for superior switching performance.
These devices are well suited for portable electronics
applications: load switching and power management,
battery charging and protection circuits.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
D2
D2
D1
D1
FDS
6875
G2
S2
SO-8
pin 1
G1
S1
-6 A, -20 V. R
R
= 0.030 Ω @ VGS = -4.5 V,
DS(ON)
= 0.040 Ω @ VGS = -2.5 V.
DS(ON)
Low gate charge (23nC typical).
High performance trench technology for extremely low
R
.
DS(ON)
High power and current handling capability.
SO-8 SOT-223
5
6
7
8
SOIC-16
4
3
2
1
Absolute Maximum Ratings T
= 25oC unless otherwise noted
A
Symbol Parameter FDS6875 Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V
Gate-Source Voltage ±8 V
Drain Current - Continuous (Note 1a) -6 A
- Pulsed -20
P
D
Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,T
Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
© 1998 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
FDS6875 Rev.C
Electrical Characteristics (T
= 25 OC unless otherwise noted )
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
∆BV
I
DSS
I
GSSF
I
GSSR
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Breakdown Voltage Temp. Coefficient
/∆T
J
Zero Gate Voltage Drain Current
ID = -250 µA, Referenced to 25 oC
VDS = -16 V, V
GS
= 0 V
-21
-1 µA
TJ = 55°C
Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse
VGS = -8 V, V
DS
= 0 V
mV/oC
-10 µA
-100 nA
ON CHARACTERISTICS (Note 2)
V
∆V
R
GS(th)
GS(th)
DS(ON)
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.4 -0.8 -1.5 V
Gate Threshold Voltage Temp. Coefficient
/∆T
J
Static Drain-Source On-Resistance
ID = 250 µA, Referenced to 25 oC
VGS = -4.5 V, ID = -6 A
2.8
0.024 0.03
mV/oC
Ω
TJ =125°C 0.033 0.048
0.032 0.04
22 S
I
g
D(ON)
FS
VGS = -2.5 V, ID = -5.3 A
On-State Drain Current VGS = -4.5 V, VDS = -5 V -20 A
Forward Transconductance
VDS = -4.5 V, ID = -6 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -10 V, VGS = 0 V,
Output Capacitance 500 pF
f = 1.0 MHz
2250 pF
Reverse Transfer Capacitance 200 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
Turn - On Delay Time
Turn - On Rise Time
VDS= -10 V, ID = -1 A
V
= -4.5 V, R
GEN
GEN
= 6 Ω
Turn - Off Delay Time 98 135 ns
Turn - Off Fall Time 35 55 ns
g
gs
gd
Total Gate Charge VDS = -10 V, ID = -6 A, 23 31 nC
Gate-Source Charge
V
= -5 V
GS
Gate-Drain Charge 5.5 nC
8 16 ns
15 27 ns
3.9 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
design while R
JA
θ
Maximum Continuous Drain-Source Diode Forward Current -1.3 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
is determined by the user's board design.
CA
θ
(Note 2) -0.7 -1.2 V
is guaranteed by
JC
θ
a. 78OC/W on a 0.5 in
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
2
b. 125OC/W on a 0.02 in
pad of 2oz copper.
2
c. 135OC/W on a 0.003 in
pad of 2oz copper.
2
FDS6875 Rev.C
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